diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ddi.c | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 12acdb08a750..61d7145f93bf 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
| @@ -3133,6 +3133,22 @@ static void intel_ddi_enable_fec(struct intel_encoder *encoder, | |||
| 3133 | DRM_ERROR("Timed out waiting for FEC Enable Status\n"); | 3133 | DRM_ERROR("Timed out waiting for FEC Enable Status\n"); |
| 3134 | } | 3134 | } |
| 3135 | 3135 | ||
| 3136 | static void intel_ddi_disable_fec_state(struct intel_encoder *encoder, | ||
| 3137 | const struct intel_crtc_state *crtc_state) | ||
| 3138 | { | ||
| 3139 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | ||
| 3140 | enum port port = encoder->port; | ||
| 3141 | u32 val; | ||
| 3142 | |||
| 3143 | if (!crtc_state->fec_enable) | ||
| 3144 | return; | ||
| 3145 | |||
| 3146 | val = I915_READ(DP_TP_CTL(port)); | ||
| 3147 | val &= ~DP_TP_CTL_FEC_ENABLE; | ||
| 3148 | I915_WRITE(DP_TP_CTL(port), val); | ||
| 3149 | POSTING_READ(DP_TP_CTL(port)); | ||
| 3150 | } | ||
| 3151 | |||
| 3136 | static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, | 3152 | static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, |
| 3137 | const struct intel_crtc_state *crtc_state, | 3153 | const struct intel_crtc_state *crtc_state, |
| 3138 | const struct drm_connector_state *conn_state) | 3154 | const struct drm_connector_state *conn_state) |
| @@ -3272,7 +3288,8 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder, | |||
| 3272 | } | 3288 | } |
| 3273 | } | 3289 | } |
| 3274 | 3290 | ||
| 3275 | static void intel_disable_ddi_buf(struct intel_encoder *encoder) | 3291 | static void intel_disable_ddi_buf(struct intel_encoder *encoder, |
| 3292 | const struct intel_crtc_state *crtc_state) | ||
| 3276 | { | 3293 | { |
| 3277 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); | 3294 | struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); |
| 3278 | enum port port = encoder->port; | 3295 | enum port port = encoder->port; |
| @@ -3291,6 +3308,9 @@ static void intel_disable_ddi_buf(struct intel_encoder *encoder) | |||
| 3291 | val |= DP_TP_CTL_LINK_TRAIN_PAT1; | 3308 | val |= DP_TP_CTL_LINK_TRAIN_PAT1; |
| 3292 | I915_WRITE(DP_TP_CTL(port), val); | 3309 | I915_WRITE(DP_TP_CTL(port), val); |
| 3293 | 3310 | ||
| 3311 | /* Disable FEC in DP Sink */ | ||
| 3312 | intel_ddi_disable_fec_state(encoder, crtc_state); | ||
| 3313 | |||
| 3294 | if (wait) | 3314 | if (wait) |
| 3295 | intel_wait_ddi_buf_idle(dev_priv, port); | 3315 | intel_wait_ddi_buf_idle(dev_priv, port); |
| 3296 | } | 3316 | } |
| @@ -3314,7 +3334,7 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder, | |||
| 3314 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | 3334 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); |
| 3315 | } | 3335 | } |
| 3316 | 3336 | ||
| 3317 | intel_disable_ddi_buf(encoder); | 3337 | intel_disable_ddi_buf(encoder, old_crtc_state); |
| 3318 | 3338 | ||
| 3319 | intel_edp_panel_vdd_on(intel_dp); | 3339 | intel_edp_panel_vdd_on(intel_dp); |
| 3320 | intel_edp_panel_off(intel_dp); | 3340 | intel_edp_panel_off(intel_dp); |
| @@ -3337,7 +3357,7 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder, | |||
| 3337 | 3357 | ||
| 3338 | intel_ddi_disable_pipe_clock(old_crtc_state); | 3358 | intel_ddi_disable_pipe_clock(old_crtc_state); |
| 3339 | 3359 | ||
| 3340 | intel_disable_ddi_buf(encoder); | 3360 | intel_disable_ddi_buf(encoder, old_crtc_state); |
| 3341 | 3361 | ||
| 3342 | intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain); | 3362 | intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain); |
| 3343 | 3363 | ||
| @@ -3388,7 +3408,7 @@ void intel_ddi_fdi_post_disable(struct intel_encoder *encoder, | |||
| 3388 | val &= ~FDI_RX_ENABLE; | 3408 | val &= ~FDI_RX_ENABLE; |
| 3389 | I915_WRITE(FDI_RX_CTL(PIPE_A), val); | 3409 | I915_WRITE(FDI_RX_CTL(PIPE_A), val); |
| 3390 | 3410 | ||
| 3391 | intel_disable_ddi_buf(encoder); | 3411 | intel_disable_ddi_buf(encoder, old_crtc_state); |
| 3392 | intel_ddi_clk_disable(encoder); | 3412 | intel_ddi_clk_disable(encoder); |
| 3393 | 3413 | ||
| 3394 | val = I915_READ(FDI_RX_MISC(PIPE_A)); | 3414 | val = I915_READ(FDI_RX_MISC(PIPE_A)); |
