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-rw-r--r--drivers/clocksource/mips-gic-timer.c7
-rw-r--r--drivers/irqchip/irq-mips-gic.c14
2 files changed, 18 insertions, 3 deletions
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 02a1945e5093..89d3e4d7900c 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -140,9 +140,10 @@ static cycle_t gic_hpt_read(struct clocksource *cs)
140} 140}
141 141
142static struct clocksource gic_clocksource = { 142static struct clocksource gic_clocksource = {
143 .name = "GIC", 143 .name = "GIC",
144 .read = gic_hpt_read, 144 .read = gic_hpt_read,
145 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 145 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
146 .archdata = { .vdso_clock_mode = VDSO_CLOCK_GIC },
146}; 147};
147 148
148static void __init __gic_clocksource_init(void) 149static void __init __gic_clocksource_init(void)
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index aeaa061f0dbf..9e17ef27a183 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -29,6 +29,7 @@ struct gic_pcpu_mask {
29 DECLARE_BITMAP(pcpu_mask, GIC_MAX_INTRS); 29 DECLARE_BITMAP(pcpu_mask, GIC_MAX_INTRS);
30}; 30};
31 31
32static unsigned long __gic_base_addr;
32static void __iomem *gic_base; 33static void __iomem *gic_base;
33static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; 34static struct gic_pcpu_mask pcpu_masks[NR_CPUS];
34static DEFINE_SPINLOCK(gic_lock); 35static DEFINE_SPINLOCK(gic_lock);
@@ -301,6 +302,17 @@ int gic_get_c0_fdc_int(void)
301 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_FDC)); 302 GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_FDC));
302} 303}
303 304
305int gic_get_usm_range(struct resource *gic_usm_res)
306{
307 if (!gic_present)
308 return -1;
309
310 gic_usm_res->start = __gic_base_addr + USM_VISIBLE_SECTION_OFS;
311 gic_usm_res->end = gic_usm_res->start + (USM_VISIBLE_SECTION_SIZE - 1);
312
313 return 0;
314}
315
304static void gic_handle_shared_int(bool chained) 316static void gic_handle_shared_int(bool chained)
305{ 317{
306 unsigned int i, intr, virq, gic_reg_step = mips_cm_is64 ? 8 : 4; 318 unsigned int i, intr, virq, gic_reg_step = mips_cm_is64 ? 8 : 4;
@@ -798,6 +810,8 @@ static void __init __gic_init(unsigned long gic_base_addr,
798{ 810{
799 unsigned int gicconfig; 811 unsigned int gicconfig;
800 812
813 __gic_base_addr = gic_base_addr;
814
801 gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size); 815 gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size);
802 816
803 gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG)); 817 gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));