1 files changed, 14 insertions, 0 deletions

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 15ee4e9af633..92bea8accc35 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4137,6 +4137,18 @@ static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags)
         return acs_flags ? 0 : 1;
 }
 
+static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags)
+{
+        /*
+         * X-Gene root matching this quirk do not allow peer-to-peer
+         * transactions with others, allowing masking out these bits as if they
+         * were unimplemented in the ACS capability.
+         */
+        acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
+
+        return acs_flags ? 0 : 1;
+}
+
 /*
  * Many Intel PCH root ports do provide ACS-like features to disable peer
  * transactions and validate bus numbers in requests, but do not provide an
@@ -4385,6 +4397,8 @@ static const struct pci_dev_acs_enabled {
         { 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */
         /* Cavium ThunderX */
         { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
+        /* APM X-Gene */
+        { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },
         { 0 }
 };