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-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 7683d7fd6463..7b683fb2173c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -3144,6 +3144,12 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
3144 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, 3144 WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
3145 mqd->cp_hqd_pq_doorbell_control); 3145 mqd->cp_hqd_pq_doorbell_control);
3146 3146
3147 /* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */
3148 ring->wptr = 0;
3149 mqd->cp_hqd_pq_wptr = ring->wptr;
3150 WREG32(mmCP_HQD_PQ_WPTR, mqd->cp_hqd_pq_wptr);
3151 mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR);
3152
3147 /* set the vmid for the queue */ 3153 /* set the vmid for the queue */
3148 mqd->cp_hqd_vmid = 0; 3154 mqd->cp_hqd_vmid = 0;
3149 WREG32(mmCP_HQD_VMID, mqd->cp_hqd_vmid); 3155 WREG32(mmCP_HQD_VMID, mqd->cp_hqd_vmid);