diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/si.c | 975 |
1 files changed, 492 insertions, 483 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/si.c b/drivers/gpu/drm/amd/amdgpu/si.c index c46b0159007d..9bf7afb2f74e 100644 --- a/drivers/gpu/drm/amd/amdgpu/si.c +++ b/drivers/gpu/drm/amd/amdgpu/si.c | |||
| @@ -40,337 +40,343 @@ | |||
| 40 | #include "dce_v6_0.h" | 40 | #include "dce_v6_0.h" |
| 41 | #include "si.h" | 41 | #include "si.h" |
| 42 | #include "dce_virtual.h" | 42 | #include "dce_virtual.h" |
| 43 | #include "gca/gfx_6_0_d.h" | ||
| 44 | #include "oss/oss_1_0_d.h" | ||
| 45 | #include "gmc/gmc_6_0_d.h" | ||
| 46 | #include "dce/dce_6_0_d.h" | ||
| 47 | #include "uvd/uvd_4_0_d.h" | ||
| 43 | 48 | ||
| 44 | static const u32 tahiti_golden_registers[] = | 49 | static const u32 tahiti_golden_registers[] = |
| 45 | { | 50 | { |
| 46 | 0x17bc, 0x00000030, 0x00000011, | 51 | mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011, |
| 47 | 0x2684, 0x00010000, 0x00018208, | 52 | mmCB_HW_CONTROL, 0x00010000, 0x00018208, |
| 48 | 0x260c, 0xffffffff, 0x00000000, | 53 | mmDB_DEBUG, 0xffffffff, 0x00000000, |
| 49 | 0x260d, 0xf00fffff, 0x00000400, | 54 | mmDB_DEBUG2, 0xf00fffff, 0x00000400, |
| 50 | 0x260e, 0x0002021c, 0x00020200, | 55 | mmDB_DEBUG3, 0x0002021c, 0x00020200, |
| 51 | 0x031e, 0x00000080, 0x00000000, | 56 | mmDCI_CLK_CNTL, 0x00000080, 0x00000000, |
| 52 | 0x340c, 0x000000c0, 0x00800040, | 57 | 0x340c, 0x000000c0, 0x00800040, |
| 53 | 0x360c, 0x000000c0, 0x00800040, | 58 | 0x360c, 0x000000c0, 0x00800040, |
| 54 | 0x16ec, 0x000000f0, 0x00000070, | 59 | mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070, |
| 55 | 0x16f0, 0x00200000, 0x50100000, | 60 | mmFBC_MISC, 0x00200000, 0x50100000, |
| 56 | 0x1c0c, 0x31000311, 0x00000011, | 61 | mmDIG0_HDMI_CONTROL, 0x31000311, 0x00000011, |
| 57 | 0x09df, 0x00000003, 0x000007ff, | 62 | mmMC_ARB_WTM_CNTL_RD, 0x00000003, 0x000007ff, |
| 58 | 0x0903, 0x000007ff, 0x00000000, | 63 | mmMC_XPB_P2P_BAR_CFG, 0x000007ff, 0x00000000, |
| 59 | 0x2285, 0xf000001f, 0x00000007, | 64 | mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, |
| 60 | 0x22c9, 0xffffffff, 0x00ffffff, | 65 | mmPA_SC_FORCE_EOV_MAX_CNTS, 0xffffffff, 0x00ffffff, |
| 61 | 0x22c4, 0x0000ff0f, 0x00000000, | 66 | mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000, |
| 62 | 0xa293, 0x07ffffff, 0x4e000000, | 67 | mmPA_SC_MODE_CNTL_1, 0x07ffffff, 0x4e000000, |
| 63 | 0xa0d4, 0x3f3f3fff, 0x2a00126a, | 68 | mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x2a00126a, |
| 64 | 0x000c, 0xffffffff, 0x0040, | 69 | 0x000c, 0xffffffff, 0x0040, |
| 65 | 0x000d, 0x00000040, 0x00004040, | 70 | 0x000d, 0x00000040, 0x00004040, |
| 66 | 0x2440, 0x07ffffff, 0x03000000, | 71 | mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000, |
| 67 | 0x23a2, 0x01ff1f3f, 0x00000000, | 72 | mmSQ_DED_CNT, 0x01ff1f3f, 0x00000000, |
| 68 | 0x23a1, 0x01ff1f3f, 0x00000000, | 73 | mmSQ_SEC_CNT, 0x01ff1f3f, 0x00000000, |
| 69 | 0x2418, 0x0000007f, 0x00000020, | 74 | mmSX_DEBUG_1, 0x0000007f, 0x00000020, |
| 70 | 0x2542, 0x00010000, 0x00010000, | 75 | mmTA_CNTL_AUX, 0x00010000, 0x00010000, |
| 71 | 0x2b05, 0x00000200, 0x000002fb, | 76 | mmTCP_ADDR_CONFIG, 0x00000200, 0x000002fb, |
| 72 | 0x2b04, 0xffffffff, 0x0000543b, | 77 | mmTCP_CHAN_STEER_HI, 0xffffffff, 0x0000543b, |
| 73 | 0x2b03, 0xffffffff, 0xa9210876, | 78 | mmTCP_CHAN_STEER_LO, 0xffffffff, 0xa9210876, |
| 74 | 0x2234, 0xffffffff, 0x000fff40, | 79 | mmVGT_FIFO_DEPTHS, 0xffffffff, 0x000fff40, |
| 75 | 0x2235, 0x0000001f, 0x00000010, | 80 | mmVGT_GS_VERTEX_REUSE, 0x0000001f, 0x00000010, |
| 76 | 0x0504, 0x20000000, 0x20fffed8, | 81 | mmVM_CONTEXT0_CNTL, 0x20000000, 0x20fffed8, |
| 77 | 0x0570, 0x000c0fc0, 0x000c0400, | 82 | mmVM_L2_CG, 0x000c0fc0, 0x000c0400, |
| 78 | 0x052c, 0x0fffffff, 0xffffffff, | 83 | mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0xffffffff, |
| 79 | 0x052d, 0x0fffffff, 0x0fffffff, | 84 | mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 80 | 0x052e, 0x0fffffff, 0x0fffffff, | 85 | mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 81 | 0x052f, 0x0fffffff, 0x0fffffff | 86 | mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 82 | }; | 87 | }; |
| 83 | 88 | ||
| 84 | static const u32 tahiti_golden_registers2[] = | 89 | static const u32 tahiti_golden_registers2[] = |
| 85 | { | 90 | { |
| 86 | 0x0319, 0x00000001, 0x00000001 | 91 | mmMCIF_MEM_CONTROL, 0x00000001, 0x00000001, |
| 87 | }; | 92 | }; |
| 88 | 93 | ||
| 89 | static const u32 tahiti_golden_rlc_registers[] = | 94 | static const u32 tahiti_golden_rlc_registers[] = |
| 90 | { | 95 | { |
| 91 | 0x263e, 0xffffffff, 0x12011003, | 96 | mmGB_ADDR_CONFIG, 0xffffffff, 0x12011003, |
| 92 | 0x3109, 0xffffffff, 0x00601005, | 97 | mmRLC_LB_PARAMS, 0xffffffff, 0x00601005, |
| 93 | 0x311f, 0xffffffff, 0x10104040, | 98 | 0x311f, 0xffffffff, 0x10104040, |
| 94 | 0x3122, 0xffffffff, 0x0100000a, | 99 | 0x3122, 0xffffffff, 0x0100000a, |
| 95 | 0x30c5, 0xffffffff, 0x00000800, | 100 | mmRLC_LB_CNTR_MAX, 0xffffffff, 0x00000800, |
| 96 | 0x30c3, 0xffffffff, 0x800000f4, | 101 | mmRLC_LB_CNTL, 0xffffffff, 0x800000f4, |
| 97 | 0x3d2a, 0x00000008, 0x00000000 | 102 | mmUVD_CGC_GATE, 0x00000008, 0x00000000, |
| 98 | }; | 103 | }; |
| 99 | 104 | ||
| 100 | static const u32 pitcairn_golden_registers[] = | 105 | static const u32 pitcairn_golden_registers[] = |
| 101 | { | 106 | { |
| 102 | 0x17bc, 0x00000030, 0x00000011, | 107 | mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011, |
| 103 | 0x2684, 0x00010000, 0x00018208, | 108 | mmCB_HW_CONTROL, 0x00010000, 0x00018208, |
| 104 | 0x260c, 0xffffffff, 0x00000000, | 109 | mmDB_DEBUG, 0xffffffff, 0x00000000, |
| 105 | 0x260d, 0xf00fffff, 0x00000400, | 110 | mmDB_DEBUG2, 0xf00fffff, 0x00000400, |
| 106 | 0x260e, 0x0002021c, 0x00020200, | 111 | mmDB_DEBUG3, 0x0002021c, 0x00020200, |
| 107 | 0x031e, 0x00000080, 0x00000000, | 112 | mmDCI_CLK_CNTL, 0x00000080, 0x00000000, |
| 108 | 0x340c, 0x000300c0, 0x00800040, | 113 | 0x340c, 0x000300c0, 0x00800040, |
| 109 | 0x360c, 0x000300c0, 0x00800040, | 114 | 0x360c, 0x000300c0, 0x00800040, |
| 110 | 0x16ec, 0x000000f0, 0x00000070, | 115 | mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070, |
| 111 | 0x16f0, 0x00200000, 0x50100000, | 116 | mmFBC_MISC, 0x00200000, 0x50100000, |
| 112 | 0x1c0c, 0x31000311, 0x00000011, | 117 | mmDIG0_HDMI_CONTROL, 0x31000311, 0x00000011, |
| 113 | 0x0ab9, 0x00073ffe, 0x000022a2, | 118 | mmMC_SEQ_PMG_PG_HWCNTL, 0x00073ffe, 0x000022a2, |
| 114 | 0x0903, 0x000007ff, 0x00000000, | 119 | mmMC_XPB_P2P_BAR_CFG, 0x000007ff, 0x00000000, |
| 115 | 0x2285, 0xf000001f, 0x00000007, | 120 | mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, |
| 116 | 0x22c9, 0xffffffff, 0x00ffffff, | 121 | mmPA_SC_FORCE_EOV_MAX_CNTS, 0xffffffff, 0x00ffffff, |
| 117 | 0x22c4, 0x0000ff0f, 0x00000000, | 122 | mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000, |
| 118 | 0xa293, 0x07ffffff, 0x4e000000, | 123 | mmPA_SC_MODE_CNTL_1, 0x07ffffff, 0x4e000000, |
| 119 | 0xa0d4, 0x3f3f3fff, 0x2a00126a, | 124 | mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x2a00126a, |
| 120 | 0x000c, 0xffffffff, 0x0040, | 125 | 0x000c, 0xffffffff, 0x0040, |
| 121 | 0x000d, 0x00000040, 0x00004040, | 126 | 0x000d, 0x00000040, 0x00004040, |
| 122 | 0x2440, 0x07ffffff, 0x03000000, | 127 | mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000, |
| 123 | 0x2418, 0x0000007f, 0x00000020, | 128 | mmSX_DEBUG_1, 0x0000007f, 0x00000020, |
| 124 | 0x2542, 0x00010000, 0x00010000, | 129 | mmTA_CNTL_AUX, 0x00010000, 0x00010000, |
| 125 | 0x2b05, 0x000003ff, 0x000000f7, | 130 | mmTCP_ADDR_CONFIG, 0x000003ff, 0x000000f7, |
| 126 | 0x2b04, 0xffffffff, 0x00000000, | 131 | mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000, |
| 127 | 0x2b03, 0xffffffff, 0x32761054, | 132 | mmTCP_CHAN_STEER_LO, 0xffffffff, 0x32761054, |
| 128 | 0x2235, 0x0000001f, 0x00000010, | 133 | mmVGT_GS_VERTEX_REUSE, 0x0000001f, 0x00000010, |
| 129 | 0x0570, 0x000c0fc0, 0x000c0400, | 134 | mmVM_L2_CG, 0x000c0fc0, 0x000c0400, |
| 130 | 0x052c, 0x0fffffff, 0xffffffff, | 135 | mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0xffffffff, |
| 131 | 0x052d, 0x0fffffff, 0x0fffffff, | 136 | mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 132 | 0x052e, 0x0fffffff, 0x0fffffff, | 137 | mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 133 | 0x052f, 0x0fffffff, 0x0fffffff | 138 | mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 134 | }; | 139 | }; |
| 135 | 140 | ||
| 136 | static const u32 pitcairn_golden_rlc_registers[] = | 141 | static const u32 pitcairn_golden_rlc_registers[] = |
| 137 | { | 142 | { |
| 138 | 0x263e, 0xffffffff, 0x12011003, | 143 | mmGB_ADDR_CONFIG, 0xffffffff, 0x12011003, |
| 139 | 0x3109, 0xffffffff, 0x00601004, | 144 | mmRLC_LB_PARAMS, 0xffffffff, 0x00601004, |
| 140 | 0x311f, 0xffffffff, 0x10102020, | 145 | 0x311f, 0xffffffff, 0x10102020, |
| 141 | 0x3122, 0xffffffff, 0x01000020, | 146 | 0x3122, 0xffffffff, 0x01000020, |
| 142 | 0x30c5, 0xffffffff, 0x00000800, | 147 | mmRLC_LB_CNTR_MAX, 0xffffffff, 0x00000800, |
| 143 | 0x30c3, 0xffffffff, 0x800000a4 | 148 | mmRLC_LB_CNTL, 0xffffffff, 0x800000a4, |
| 144 | }; | 149 | }; |
| 145 | 150 | ||
| 146 | static const u32 verde_pg_init[] = | 151 | static const u32 verde_pg_init[] = |
| 147 | { | 152 | { |
| 148 | 0x0d4f, 0xffffffff, 0x40000, | 153 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x40000, |
| 149 | 0x0d4e, 0xffffffff, 0x200010ff, | 154 | mmGMCON_PGFSM_CONFIG, 0xffffffff, 0x200010ff, |
| 150 | 0x0d4f, 0xffffffff, 0x0, | 155 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 151 | 0x0d4f, 0xffffffff, 0x0, | 156 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 152 | 0x0d4f, 0xffffffff, 0x0, | 157 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 153 | 0x0d4f, 0xffffffff, 0x0, | 158 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 154 | 0x0d4f, 0xffffffff, 0x0, | 159 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 155 | 0x0d4f, 0xffffffff, 0x7007, | 160 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x7007, |
| 156 | 0x0d4e, 0xffffffff, 0x300010ff, | 161 | mmGMCON_PGFSM_CONFIG, 0xffffffff, 0x300010ff, |
| 157 | 0x0d4f, 0xffffffff, 0x0, | 162 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 158 | 0x0d4f, 0xffffffff, 0x0, | 163 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 159 | 0x0d4f, 0xffffffff, 0x0, | 164 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 160 | 0x0d4f, 0xffffffff, 0x0, | 165 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 161 | 0x0d4f, 0xffffffff, 0x0, | 166 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 162 | 0x0d4f, 0xffffffff, 0x400000, | 167 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x400000, |
| 163 | 0x0d4e, 0xffffffff, 0x100010ff, | 168 | mmGMCON_PGFSM_CONFIG, 0xffffffff, 0x100010ff, |
| 164 | 0x0d4f, 0xffffffff, 0x0, | 169 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 165 | 0x0d4f, 0xffffffff, 0x0, | 170 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 166 | 0x0d4f, 0xffffffff, 0x0, | 171 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 167 | 0x0d4f, 0xffffffff, 0x0, | 172 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 168 | 0x0d4f, 0xffffffff, 0x0, | 173 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 169 | 0x0d4f, 0xffffffff, 0x120200, | 174 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x120200, |
| 170 | 0x0d4e, 0xffffffff, 0x500010ff, | 175 | mmGMCON_PGFSM_CONFIG, 0xffffffff, 0x500010ff, |
| 171 | 0x0d4f, 0xffffffff, 0x0, | 176 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 172 | 0x0d4f, 0xffffffff, 0x0, | 177 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 173 | 0x0d4f, 0xffffffff, 0x0, | 178 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 174 | 0x0d4f, 0xffffffff, 0x0, | 179 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 175 | 0x0d4f, 0xffffffff, 0x0, | 180 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 176 | 0x0d4f, 0xffffffff, 0x1e1e16, | 181 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x1e1e16, |
| 177 | 0x0d4e, 0xffffffff, 0x600010ff, | 182 | mmGMCON_PGFSM_CONFIG, 0xffffffff, 0x600010ff, |
| 178 | 0x0d4f, 0xffffffff, 0x0, | 183 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 179 | 0x0d4f, 0xffffffff, 0x0, | 184 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 180 | 0x0d4f, 0xffffffff, 0x0, | 185 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 181 | 0x0d4f, 0xffffffff, 0x0, | 186 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 182 | 0x0d4f, 0xffffffff, 0x0, | 187 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 183 | 0x0d4f, 0xffffffff, 0x171f1e, | 188 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x171f1e, |
| 184 | 0x0d4e, 0xffffffff, 0x700010ff, | 189 | mmGMCON_PGFSM_CONFIG, 0xffffffff, 0x700010ff, |
| 185 | 0x0d4f, 0xffffffff, 0x0, | 190 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 186 | 0x0d4f, 0xffffffff, 0x0, | 191 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 187 | 0x0d4f, 0xffffffff, 0x0, | 192 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 188 | 0x0d4f, 0xffffffff, 0x0, | 193 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 189 | 0x0d4f, 0xffffffff, 0x0, | 194 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 190 | 0x0d4f, 0xffffffff, 0x0, | 195 | mmGMCON_PGFSM_WRITE, 0xffffffff, 0x0, |
| 191 | 0x0d4e, 0xffffffff, 0x9ff, | 196 | mmGMCON_PGFSM_CONFIG, 0xffffffff, 0x9ff, |
| 192 | 0x0d40, 0xffffffff, 0x0, | 197 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x0, |
| 193 | 0x0d41, 0xffffffff, 0x10000800, | 198 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x10000800, |
| 194 | 0x0d41, 0xffffffff, 0xf, | 199 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xf, |
| 195 | 0x0d41, 0xffffffff, 0xf, | 200 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xf, |
| 196 | 0x0d40, 0xffffffff, 0x4, | 201 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x4, |
| 197 | 0x0d41, 0xffffffff, 0x1000051e, | 202 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x1000051e, |
| 198 | 0x0d41, 0xffffffff, 0xffff, | 203 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xffff, |
| 199 | 0x0d41, 0xffffffff, 0xffff, | 204 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xffff, |
| 200 | 0x0d40, 0xffffffff, 0x8, | 205 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x8, |
| 201 | 0x0d41, 0xffffffff, 0x80500, | 206 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x80500, |
| 202 | 0x0d40, 0xffffffff, 0x12, | 207 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x12, |
| 203 | 0x0d41, 0xffffffff, 0x9050c, | 208 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x9050c, |
| 204 | 0x0d40, 0xffffffff, 0x1d, | 209 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x1d, |
| 205 | 0x0d41, 0xffffffff, 0xb052c, | 210 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xb052c, |
| 206 | 0x0d40, 0xffffffff, 0x2a, | 211 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x2a, |
| 207 | 0x0d41, 0xffffffff, 0x1053e, | 212 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x1053e, |
| 208 | 0x0d40, 0xffffffff, 0x2d, | 213 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x2d, |
| 209 | 0x0d41, 0xffffffff, 0x10546, | 214 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x10546, |
| 210 | 0x0d40, 0xffffffff, 0x30, | 215 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x30, |
| 211 | 0x0d41, 0xffffffff, 0xa054e, | 216 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xa054e, |
| 212 | 0x0d40, 0xffffffff, 0x3c, | 217 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x3c, |
| 213 | 0x0d41, 0xffffffff, 0x1055f, | 218 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x1055f, |
| 214 | 0x0d40, 0xffffffff, 0x3f, | 219 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x3f, |
| 215 | 0x0d41, 0xffffffff, 0x10567, | 220 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x10567, |
| 216 | 0x0d40, 0xffffffff, 0x42, | 221 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x42, |
| 217 | 0x0d41, 0xffffffff, 0x1056f, | 222 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x1056f, |
| 218 | 0x0d40, 0xffffffff, 0x45, | 223 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x45, |
| 219 | 0x0d41, 0xffffffff, 0x10572, | 224 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x10572, |
| 220 | 0x0d40, 0xffffffff, 0x48, | 225 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x48, |
| 221 | 0x0d41, 0xffffffff, 0x20575, | 226 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x20575, |
| 222 | 0x0d40, 0xffffffff, 0x4c, | 227 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x4c, |
| 223 | 0x0d41, 0xffffffff, 0x190801, | 228 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x190801, |
| 224 | 0x0d40, 0xffffffff, 0x67, | 229 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x67, |
| 225 | 0x0d41, 0xffffffff, 0x1082a, | 230 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x1082a, |
| 226 | 0x0d40, 0xffffffff, 0x6a, | 231 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x6a, |
| 227 | 0x0d41, 0xffffffff, 0x1b082d, | 232 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x1b082d, |
| 228 | 0x0d40, 0xffffffff, 0x87, | 233 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x87, |
| 229 | 0x0d41, 0xffffffff, 0x310851, | 234 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x310851, |
| 230 | 0x0d40, 0xffffffff, 0xba, | 235 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xba, |
| 231 | 0x0d41, 0xffffffff, 0x891, | 236 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x891, |
| 232 | 0x0d40, 0xffffffff, 0xbc, | 237 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xbc, |
| 233 | 0x0d41, 0xffffffff, 0x893, | 238 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x893, |
| 234 | 0x0d40, 0xffffffff, 0xbe, | 239 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xbe, |
| 235 | 0x0d41, 0xffffffff, 0x20895, | 240 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x20895, |
| 236 | 0x0d40, 0xffffffff, 0xc2, | 241 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xc2, |
| 237 | 0x0d41, 0xffffffff, 0x20899, | 242 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x20899, |
| 238 | 0x0d40, 0xffffffff, 0xc6, | 243 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xc6, |
| 239 | 0x0d41, 0xffffffff, 0x2089d, | 244 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x2089d, |
| 240 | 0x0d40, 0xffffffff, 0xca, | 245 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xca, |
| 241 | 0x0d41, 0xffffffff, 0x8a1, | 246 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x8a1, |
| 242 | 0x0d40, 0xffffffff, 0xcc, | 247 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xcc, |
| 243 | 0x0d41, 0xffffffff, 0x8a3, | 248 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x8a3, |
| 244 | 0x0d40, 0xffffffff, 0xce, | 249 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xce, |
| 245 | 0x0d41, 0xffffffff, 0x308a5, | 250 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x308a5, |
| 246 | 0x0d40, 0xffffffff, 0xd3, | 251 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0xd3, |
| 247 | 0x0d41, 0xffffffff, 0x6d08cd, | 252 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x6d08cd, |
| 248 | 0x0d40, 0xffffffff, 0x142, | 253 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x142, |
| 249 | 0x0d41, 0xffffffff, 0x2000095a, | 254 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x2000095a, |
| 250 | 0x0d41, 0xffffffff, 0x1, | 255 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x1, |
| 251 | 0x0d40, 0xffffffff, 0x144, | 256 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x144, |
| 252 | 0x0d41, 0xffffffff, 0x301f095b, | 257 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x301f095b, |
| 253 | 0x0d40, 0xffffffff, 0x165, | 258 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x165, |
| 254 | 0x0d41, 0xffffffff, 0xc094d, | 259 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xc094d, |
| 255 | 0x0d40, 0xffffffff, 0x173, | 260 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x173, |
| 256 | 0x0d41, 0xffffffff, 0xf096d, | 261 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xf096d, |
| 257 | 0x0d40, 0xffffffff, 0x184, | 262 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x184, |
| 258 | 0x0d41, 0xffffffff, 0x15097f, | 263 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x15097f, |
| 259 | 0x0d40, 0xffffffff, 0x19b, | 264 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x19b, |
| 260 | 0x0d41, 0xffffffff, 0xc0998, | 265 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xc0998, |
| 261 | 0x0d40, 0xffffffff, 0x1a9, | 266 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x1a9, |
| 262 | 0x0d41, 0xffffffff, 0x409a7, | 267 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x409a7, |
| 263 | 0x0d40, 0xffffffff, 0x1af, | 268 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x1af, |
| 264 | 0x0d41, 0xffffffff, 0xcdc, | 269 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0xcdc, |
| 265 | 0x0d40, 0xffffffff, 0x1b1, | 270 | mmGMCON_RENG_RAM_INDEX, 0xffffffff, 0x1b1, |
| 266 | 0x0d41, 0xffffffff, 0x800, | 271 | mmGMCON_RENG_RAM_DATA, 0xffffffff, 0x800, |
| 267 | 0x0d42, 0xffffffff, 0x6c9b2000, | 272 | mmGMCON_RENG_EXECUTE, 0xffffffff, 0x6c9b2000, |
| 268 | 0x0d44, 0xfc00, 0x2000, | 273 | mmGMCON_MISC2, 0xfc00, 0x2000, |
| 269 | 0x0d51, 0xffffffff, 0xfc0, | 274 | mmGMCON_MISC3, 0xffffffff, 0xfc0, |
| 270 | 0x0a35, 0x00000100, 0x100 | 275 | mmMC_PMG_AUTO_CFG, 0x00000100, 0x100, |
| 271 | }; | 276 | }; |
| 272 | 277 | ||
| 273 | static const u32 verde_golden_rlc_registers[] = | 278 | static const u32 verde_golden_rlc_registers[] = |
| 274 | { | 279 | { |
| 275 | 0x263e, 0xffffffff, 0x02010002, | 280 | mmGB_ADDR_CONFIG, 0xffffffff, 0x02010002, |
| 276 | 0x3109, 0xffffffff, 0x033f1005, | 281 | mmRLC_LB_PARAMS, 0xffffffff, 0x033f1005, |
| 277 | 0x311f, 0xffffffff, 0x10808020, | 282 | 0x311f, 0xffffffff, 0x10808020, |
| 278 | 0x3122, 0xffffffff, 0x00800008, | 283 | 0x3122, 0xffffffff, 0x00800008, |
| 279 | 0x30c5, 0xffffffff, 0x00001000, | 284 | mmRLC_LB_CNTR_MAX, 0xffffffff, 0x00001000, |
| 280 | 0x30c3, 0xffffffff, 0x80010014 | 285 | mmRLC_LB_CNTL, 0xffffffff, 0x80010014, |
| 281 | }; | 286 | }; |
| 282 | 287 | ||
| 283 | static const u32 verde_golden_registers[] = | 288 | static const u32 verde_golden_registers[] = |
| 284 | { | 289 | { |
| 285 | 0x17bc, 0x00000030, 0x00000011, | 290 | mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011, |
| 286 | 0x2684, 0x00010000, 0x00018208, | 291 | mmCB_HW_CONTROL, 0x00010000, 0x00018208, |
| 287 | 0x260c, 0xffffffff, 0x00000000, | 292 | mmDB_DEBUG, 0xffffffff, 0x00000000, |
| 288 | 0x260d, 0xf00fffff, 0x00000400, | 293 | mmDB_DEBUG2, 0xf00fffff, 0x00000400, |
| 289 | 0x260e, 0x0002021c, 0x00020200, | 294 | mmDB_DEBUG3, 0x0002021c, 0x00020200, |
| 290 | 0x031e, 0x00000080, 0x00000000, | 295 | mmDCI_CLK_CNTL, 0x00000080, 0x00000000, |
| 291 | 0x340c, 0x000300c0, 0x00800040, | 296 | 0x340c, 0x000300c0, 0x00800040, |
| 292 | 0x360c, 0x000300c0, 0x00800040, | 297 | 0x360c, 0x000300c0, 0x00800040, |
| 293 | 0x16ec, 0x000000f0, 0x00000070, | 298 | mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070, |
| 294 | 0x16f0, 0x00200000, 0x50100000, | 299 | mmFBC_MISC, 0x00200000, 0x50100000, |
| 295 | 0x1c0c, 0x31000311, 0x00000011, | 300 | mmDIG0_HDMI_CONTROL, 0x31000311, 0x00000011, |
| 296 | 0x0ab9, 0x00073ffe, 0x000022a2, | 301 | mmMC_SEQ_PMG_PG_HWCNTL, 0x00073ffe, 0x000022a2, |
| 297 | 0x0903, 0x000007ff, 0x00000000, | 302 | mmMC_XPB_P2P_BAR_CFG, 0x000007ff, 0x00000000, |
| 298 | 0x2285, 0xf000001f, 0x00000007, | 303 | mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, |
| 299 | 0x22c9, 0xffffffff, 0x00ffffff, | 304 | mmPA_SC_FORCE_EOV_MAX_CNTS, 0xffffffff, 0x00ffffff, |
| 300 | 0x22c4, 0x0000ff0f, 0x00000000, | 305 | mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000, |
| 301 | 0xa293, 0x07ffffff, 0x4e000000, | 306 | mmPA_SC_MODE_CNTL_1, 0x07ffffff, 0x4e000000, |
| 302 | 0xa0d4, 0x3f3f3fff, 0x0000124a, | 307 | mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x0000124a, |
| 303 | 0x000c, 0xffffffff, 0x0040, | 308 | 0x000c, 0xffffffff, 0x0040, |
| 304 | 0x000d, 0x00000040, 0x00004040, | 309 | 0x000d, 0x00000040, 0x00004040, |
| 305 | 0x2440, 0x07ffffff, 0x03000000, | 310 | mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000, |
| 306 | 0x23a2, 0x01ff1f3f, 0x00000000, | 311 | mmSQ_DED_CNT, 0x01ff1f3f, 0x00000000, |
| 307 | 0x23a1, 0x01ff1f3f, 0x00000000, | 312 | mmSQ_SEC_CNT, 0x01ff1f3f, 0x00000000, |
| 308 | 0x2418, 0x0000007f, 0x00000020, | 313 | mmSX_DEBUG_1, 0x0000007f, 0x00000020, |
| 309 | 0x2542, 0x00010000, 0x00010000, | 314 | mmTA_CNTL_AUX, 0x00010000, 0x00010000, |
| 310 | 0x2b05, 0x000003ff, 0x00000003, | 315 | mmTCP_ADDR_CONFIG, 0x000003ff, 0x00000003, |
| 311 | 0x2b04, 0xffffffff, 0x00000000, | 316 | mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000, |
| 312 | 0x2b03, 0xffffffff, 0x00001032, | 317 | mmTCP_CHAN_STEER_LO, 0xffffffff, 0x00001032, |
| 313 | 0x2235, 0x0000001f, 0x00000010, | 318 | mmVGT_GS_VERTEX_REUSE, 0x0000001f, 0x00000010, |
| 314 | 0x0570, 0x000c0fc0, 0x000c0400, | 319 | mmVM_L2_CG, 0x000c0fc0, 0x000c0400, |
| 315 | 0x052c, 0x0fffffff, 0xffffffff, | 320 | mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0xffffffff, |
| 316 | 0x052d, 0x0fffffff, 0x0fffffff, | 321 | mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 317 | 0x052e, 0x0fffffff, 0x0fffffff, | 322 | mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 318 | 0x052f, 0x0fffffff, 0x0fffffff | 323 | mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 319 | }; | 324 | }; |
| 320 | 325 | ||
| 321 | static const u32 oland_golden_registers[] = | 326 | static const u32 oland_golden_registers[] = |
| 322 | { | 327 | { |
| 323 | 0x17bc, 0x00000030, 0x00000011, | 328 | mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011, |
| 324 | 0x2684, 0x00010000, 0x00018208, | 329 | mmCB_HW_CONTROL, 0x00010000, 0x00018208, |
| 325 | 0x260c, 0xffffffff, 0x00000000, | 330 | mmDB_DEBUG, 0xffffffff, 0x00000000, |
| 326 | 0x260d, 0xf00fffff, 0x00000400, | 331 | mmDB_DEBUG2, 0xf00fffff, 0x00000400, |
| 327 | 0x260e, 0x0002021c, 0x00020200, | 332 | mmDB_DEBUG3, 0x0002021c, 0x00020200, |
| 328 | 0x031e, 0x00000080, 0x00000000, | 333 | mmDCI_CLK_CNTL, 0x00000080, 0x00000000, |
| 329 | 0x340c, 0x000300c0, 0x00800040, | 334 | 0x340c, 0x000300c0, 0x00800040, |
| 330 | 0x360c, 0x000300c0, 0x00800040, | 335 | 0x360c, 0x000300c0, 0x00800040, |
| 331 | 0x16ec, 0x000000f0, 0x00000070, | 336 | mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070, |
| 332 | 0x16f0, 0x00200000, 0x50100000, | 337 | mmFBC_MISC, 0x00200000, 0x50100000, |
| 333 | 0x1c0c, 0x31000311, 0x00000011, | 338 | mmDIG0_HDMI_CONTROL, 0x31000311, 0x00000011, |
| 334 | 0x0ab9, 0x00073ffe, 0x000022a2, | 339 | mmMC_SEQ_PMG_PG_HWCNTL, 0x00073ffe, 0x000022a2, |
| 335 | 0x0903, 0x000007ff, 0x00000000, | 340 | mmMC_XPB_P2P_BAR_CFG, 0x000007ff, 0x00000000, |
| 336 | 0x2285, 0xf000001f, 0x00000007, | 341 | mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, |
| 337 | 0x22c9, 0xffffffff, 0x00ffffff, | 342 | mmPA_SC_FORCE_EOV_MAX_CNTS, 0xffffffff, 0x00ffffff, |
| 338 | 0x22c4, 0x0000ff0f, 0x00000000, | 343 | mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000, |
| 339 | 0xa293, 0x07ffffff, 0x4e000000, | 344 | mmPA_SC_MODE_CNTL_1, 0x07ffffff, 0x4e000000, |
| 340 | 0xa0d4, 0x3f3f3fff, 0x00000082, | 345 | mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x00000082, |
| 341 | 0x000c, 0xffffffff, 0x0040, | 346 | 0x000c, 0xffffffff, 0x0040, |
| 342 | 0x000d, 0x00000040, 0x00004040, | 347 | 0x000d, 0x00000040, 0x00004040, |
| 343 | 0x2440, 0x07ffffff, 0x03000000, | 348 | mmSPI_CONFIG_CNTL, 0x07ffffff, 0x03000000, |
| 344 | 0x2418, 0x0000007f, 0x00000020, | 349 | mmSX_DEBUG_1, 0x0000007f, 0x00000020, |
| 345 | 0x2542, 0x00010000, 0x00010000, | 350 | mmTA_CNTL_AUX, 0x00010000, 0x00010000, |
| 346 | 0x2b05, 0x000003ff, 0x000000f3, | 351 | mmTCP_ADDR_CONFIG, 0x000003ff, 0x000000f3, |
| 347 | 0x2b04, 0xffffffff, 0x00000000, | 352 | mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000, |
| 348 | 0x2b03, 0xffffffff, 0x00003210, | 353 | mmTCP_CHAN_STEER_LO, 0xffffffff, 0x00003210, |
| 349 | 0x2235, 0x0000001f, 0x00000010, | 354 | mmVGT_GS_VERTEX_REUSE, 0x0000001f, 0x00000010, |
| 350 | 0x0570, 0x000c0fc0, 0x000c0400, | 355 | mmVM_L2_CG, 0x000c0fc0, 0x000c0400, |
| 351 | 0x052c, 0x0fffffff, 0xffffffff, | 356 | mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0xffffffff, |
| 352 | 0x052d, 0x0fffffff, 0x0fffffff, | 357 | mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 353 | 0x052e, 0x0fffffff, 0x0fffffff, | 358 | mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 354 | 0x052f, 0x0fffffff, 0x0fffffff | 359 | mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 360 | |||
| 355 | }; | 361 | }; |
| 356 | 362 | ||
| 357 | static const u32 oland_golden_rlc_registers[] = | 363 | static const u32 oland_golden_rlc_registers[] = |
| 358 | { | 364 | { |
| 359 | 0x263e, 0xffffffff, 0x02010002, | 365 | mmGB_ADDR_CONFIG, 0xffffffff, 0x02010002, |
| 360 | 0x3109, 0xffffffff, 0x00601005, | 366 | mmRLC_LB_PARAMS, 0xffffffff, 0x00601005, |
| 361 | 0x311f, 0xffffffff, 0x10104040, | 367 | 0x311f, 0xffffffff, 0x10104040, |
| 362 | 0x3122, 0xffffffff, 0x0100000a, | 368 | 0x3122, 0xffffffff, 0x0100000a, |
| 363 | 0x30c5, 0xffffffff, 0x00000800, | 369 | mmRLC_LB_CNTR_MAX, 0xffffffff, 0x00000800, |
| 364 | 0x30c3, 0xffffffff, 0x800000f4 | 370 | mmRLC_LB_CNTL, 0xffffffff, 0x800000f4, |
| 365 | }; | 371 | }; |
| 366 | 372 | ||
| 367 | static const u32 hainan_golden_registers[] = | 373 | static const u32 hainan_golden_registers[] = |
| 368 | { | 374 | { |
| 369 | 0x17bc, 0x00000030, 0x00000011, | 375 | 0x17bc, 0x00000030, 0x00000011, |
| 370 | 0x2684, 0x00010000, 0x00018208, | 376 | mmCB_HW_CONTROL, 0x00010000, 0x00018208, |
| 371 | 0x260c, 0xffffffff, 0x00000000, | 377 | mmDB_DEBUG, 0xffffffff, 0x00000000, |
| 372 | 0x260d, 0xf00fffff, 0x00000400, | 378 | mmDB_DEBUG2, 0xf00fffff, 0x00000400, |
| 373 | 0x260e, 0x0002021c, 0x00020200, | 379 | mmDB_DEBUG3, 0x0002021c, 0x00020200, |
| 374 | 0x031e, 0x00000080, 0x00000000, | 380 | 0x031e, 0x00000080, 0x00000000, |
| 375 | 0x3430, 0xff000fff, 0x00000100, | 381 | 0x3430, 0xff000fff, 0x00000100, |
| 376 | 0x340c, 0x000300c0, 0x00800040, | 382 | 0x340c, 0x000300c0, 0x00800040, |
| @@ -379,63 +385,63 @@ static const u32 hainan_golden_registers[] = | |||
| 379 | 0x16ec, 0x000000f0, 0x00000070, | 385 | 0x16ec, 0x000000f0, 0x00000070, |
| 380 | 0x16f0, 0x00200000, 0x50100000, | 386 | 0x16f0, 0x00200000, 0x50100000, |
| 381 | 0x1c0c, 0x31000311, 0x00000011, | 387 | 0x1c0c, 0x31000311, 0x00000011, |
| 382 | 0x0ab9, 0x00073ffe, 0x000022a2, | 388 | mmMC_SEQ_PMG_PG_HWCNTL, 0x00073ffe, 0x000022a2, |
| 383 | 0x0903, 0x000007ff, 0x00000000, | 389 | mmMC_XPB_P2P_BAR_CFG, 0x000007ff, 0x00000000, |
| 384 | 0x2285, 0xf000001f, 0x00000007, | 390 | mmPA_CL_ENHANCE, 0xf000001f, 0x00000007, |
| 385 | 0x22c9, 0xffffffff, 0x00ffffff, | 391 | mmPA_SC_FORCE_EOV_MAX_CNTS, 0xffffffff, 0x00ffffff, |
| 386 | 0x22c4, 0x0000ff0f, 0x00000000, | 392 | mmPA_SC_LINE_STIPPLE_STATE, 0x0000ff0f, 0x00000000, |
| 387 | 0xa293, 0x07ffffff, 0x4e000000, | 393 | mmPA_SC_MODE_CNTL_1, 0x07ffffff, 0x4e000000, |
| 388 | 0xa0d4, 0x3f3f3fff, 0x00000000, | 394 | mmPA_SC_RASTER_CONFIG, 0x3f3f3fff, 0x00000000, |
| 389 | 0x000c, 0xffffffff, 0x0040, | 395 | 0x000c, 0xffffffff, 0x0040, |
| 390 | 0x000d, 0x00000040, 0x00004040, | 396 | 0x000d, 0x00000040, 0x00004040, |
| 391 | 0x2440, 0x03e00000, 0x03600000, | 397 | mmSPI_CONFIG_CNTL, 0x03e00000, 0x03600000, |
| 392 | 0x2418, 0x0000007f, 0x00000020, | 398 | mmSX_DEBUG_1, 0x0000007f, 0x00000020, |
| 393 | 0x2542, 0x00010000, 0x00010000, | 399 | mmTA_CNTL_AUX, 0x00010000, 0x00010000, |
| 394 | 0x2b05, 0x000003ff, 0x000000f1, | 400 | mmTCP_ADDR_CONFIG, 0x000003ff, 0x000000f1, |
| 395 | 0x2b04, 0xffffffff, 0x00000000, | 401 | mmTCP_CHAN_STEER_HI, 0xffffffff, 0x00000000, |
| 396 | 0x2b03, 0xffffffff, 0x00003210, | 402 | mmTCP_CHAN_STEER_LO, 0xffffffff, 0x00003210, |
| 397 | 0x2235, 0x0000001f, 0x00000010, | 403 | mmVGT_GS_VERTEX_REUSE, 0x0000001f, 0x00000010, |
| 398 | 0x0570, 0x000c0fc0, 0x000c0400, | 404 | mmVM_L2_CG, 0x000c0fc0, 0x000c0400, |
| 399 | 0x052c, 0x0fffffff, 0xffffffff, | 405 | mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0xffffffff, |
| 400 | 0x052d, 0x0fffffff, 0x0fffffff, | 406 | mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 401 | 0x052e, 0x0fffffff, 0x0fffffff, | 407 | mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 402 | 0x052f, 0x0fffffff, 0x0fffffff | 408 | mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff, |
| 403 | }; | 409 | }; |
| 404 | 410 | ||
| 405 | static const u32 hainan_golden_registers2[] = | 411 | static const u32 hainan_golden_registers2[] = |
| 406 | { | 412 | { |
| 407 | 0x263e, 0xffffffff, 0x2011003 | 413 | mmGB_ADDR_CONFIG, 0xffffffff, 0x2011003, |
| 408 | }; | 414 | }; |
| 409 | 415 | ||
| 410 | static const u32 tahiti_mgcg_cgcg_init[] = | 416 | static const u32 tahiti_mgcg_cgcg_init[] = |
| 411 | { | 417 | { |
| 412 | 0x3100, 0xffffffff, 0xfffffffc, | 418 | mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc, |
| 413 | 0x200b, 0xffffffff, 0xe0000000, | 419 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 414 | 0x2698, 0xffffffff, 0x00000100, | 420 | mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 415 | 0x24a9, 0xffffffff, 0x00000100, | 421 | mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 416 | 0x3059, 0xffffffff, 0x00000100, | 422 | mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 417 | 0x25dd, 0xffffffff, 0x00000100, | 423 | mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100, |
| 418 | 0x2261, 0xffffffff, 0x06000100, | 424 | mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100, |
| 419 | 0x2286, 0xffffffff, 0x00000100, | 425 | mmCGTT_PA_CLK_CTRL, 0xffffffff, 0x00000100, |
| 420 | 0x24a8, 0xffffffff, 0x00000100, | 426 | mmCGTT_PC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 421 | 0x30e0, 0xffffffff, 0x00000100, | 427 | mmCGTT_RLC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 422 | 0x22ca, 0xffffffff, 0x00000100, | 428 | mmCGTT_SC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 423 | 0x2451, 0xffffffff, 0x00000100, | 429 | mmCGTT_SPI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 424 | 0x2362, 0xffffffff, 0x00000100, | 430 | mmCGTT_SQ_CLK_CTRL, 0xffffffff, 0x00000100, |
| 425 | 0x2363, 0xffffffff, 0x00000100, | 431 | mmCGTT_SQG_CLK_CTRL, 0xffffffff, 0x00000100, |
| 426 | 0x240c, 0xffffffff, 0x00000100, | 432 | mmCGTT_SX_CLK_CTRL0, 0xffffffff, 0x00000100, |
| 427 | 0x240d, 0xffffffff, 0x00000100, | 433 | mmCGTT_SX_CLK_CTRL1, 0xffffffff, 0x00000100, |
| 428 | 0x240e, 0xffffffff, 0x00000100, | 434 | mmCGTT_SX_CLK_CTRL2, 0xffffffff, 0x00000100, |
| 429 | 0x240f, 0xffffffff, 0x00000100, | 435 | mmCGTT_SX_CLK_CTRL3, 0xffffffff, 0x00000100, |
| 430 | 0x2b60, 0xffffffff, 0x00000100, | 436 | mmCGTT_TCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 431 | 0x2b15, 0xffffffff, 0x00000100, | 437 | mmCGTT_TCP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 432 | 0x225f, 0xffffffff, 0x06000100, | 438 | mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100, |
| 433 | 0x261a, 0xffffffff, 0x00000100, | 439 | mmDB_CGTT_CLK_CTRL_0, 0xffffffff, 0x00000100, |
| 434 | 0x2544, 0xffffffff, 0x00000100, | 440 | mmTA_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 435 | 0x2bc1, 0xffffffff, 0x00000100, | 441 | mmTCA_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 436 | 0x2b81, 0xffffffff, 0x00000100, | 442 | mmTCC_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 437 | 0x2527, 0xffffffff, 0x00000100, | 443 | mmTD_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 438 | 0x200b, 0xffffffff, 0xe0000000, | 444 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 439 | 0x2458, 0xffffffff, 0x00010000, | 445 | 0x2458, 0xffffffff, 0x00010000, |
| 440 | 0x2459, 0xffffffff, 0x00030002, | 446 | 0x2459, 0xffffffff, 0x00030002, |
| 441 | 0x245a, 0xffffffff, 0x00040007, | 447 | 0x245a, 0xffffffff, 0x00040007, |
| @@ -516,55 +522,55 @@ static const u32 tahiti_mgcg_cgcg_init[] = | |||
| 516 | 0x24a5, 0xffffffff, 0x00000015, | 522 | 0x24a5, 0xffffffff, 0x00000015, |
| 517 | 0x24a6, 0xffffffff, 0x00140013, | 523 | 0x24a6, 0xffffffff, 0x00140013, |
| 518 | 0x24a7, 0xffffffff, 0x00170016, | 524 | 0x24a7, 0xffffffff, 0x00170016, |
| 519 | 0x2454, 0xffffffff, 0x96940200, | 525 | mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200, |
| 520 | 0x21c2, 0xffffffff, 0x00900100, | 526 | mmCP_RB_WPTR_POLL_CNTL, 0xffffffff, 0x00900100, |
| 521 | 0x311e, 0xffffffff, 0x00000080, | 527 | mmRLC_GCPM_GENERAL_3, 0xffffffff, 0x00000080, |
| 522 | 0x3101, 0xffffffff, 0x0020003f, | 528 | mmRLC_CGCG_CGLS_CTRL, 0xffffffff, 0x0020003f, |
| 523 | 0x000c, 0xffffffff, 0x0000001c, | 529 | 0x000c, 0xffffffff, 0x0000001c, |
| 524 | 0x000d, 0x000f0000, 0x000f0000, | 530 | 0x000d, 0x000f0000, 0x000f0000, |
| 525 | 0x0583, 0xffffffff, 0x00000100, | 531 | 0x0583, 0xffffffff, 0x00000100, |
| 526 | 0x0409, 0xffffffff, 0x00000100, | 532 | mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, |
| 527 | 0x040b, 0x00000101, 0x00000000, | 533 | mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, |
| 528 | 0x082a, 0xffffffff, 0x00000104, | 534 | mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104, |
| 529 | 0x0993, 0x000c0000, 0x000c0000, | 535 | mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000, |
| 530 | 0x0992, 0x000c0000, 0x000c0000, | 536 | mmMC_CITF_MISC_RD_CG, 0x000c0000, 0x000c0000, |
| 531 | 0x1579, 0xff000fff, 0x00000100, | 537 | mmCGTT_DRM_CLK_CTRL0, 0xff000fff, 0x00000100, |
| 532 | 0x157a, 0x00000001, 0x00000001, | 538 | 0x157a, 0x00000001, 0x00000001, |
| 533 | 0x0bd4, 0x00000001, 0x00000001, | 539 | mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, |
| 534 | 0x0c33, 0xc0000fff, 0x00000104, | 540 | mmHDP_XDP_CGTT_BLK_CTRL, 0xc0000fff, 0x00000104, |
| 535 | 0x3079, 0x00000001, 0x00000001, | 541 | mmCP_MEM_SLP_CNTL, 0x00000001, 0x00000001, |
| 536 | 0x3430, 0xfffffff0, 0x00000100, | 542 | 0x3430, 0xfffffff0, 0x00000100, |
| 537 | 0x3630, 0xfffffff0, 0x00000100 | 543 | 0x3630, 0xfffffff0, 0x00000100, |
| 538 | }; | 544 | }; |
| 539 | static const u32 pitcairn_mgcg_cgcg_init[] = | 545 | static const u32 pitcairn_mgcg_cgcg_init[] = |
| 540 | { | 546 | { |
| 541 | 0x3100, 0xffffffff, 0xfffffffc, | 547 | mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc, |
| 542 | 0x200b, 0xffffffff, 0xe0000000, | 548 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 543 | 0x2698, 0xffffffff, 0x00000100, | 549 | mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 544 | 0x24a9, 0xffffffff, 0x00000100, | 550 | mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 545 | 0x3059, 0xffffffff, 0x00000100, | 551 | mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 546 | 0x25dd, 0xffffffff, 0x00000100, | 552 | mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100, |
| 547 | 0x2261, 0xffffffff, 0x06000100, | 553 | mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100, |
| 548 | 0x2286, 0xffffffff, 0x00000100, | 554 | mmCGTT_PA_CLK_CTRL, 0xffffffff, 0x00000100, |
| 549 | 0x24a8, 0xffffffff, 0x00000100, | 555 | mmCGTT_PC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 550 | 0x30e0, 0xffffffff, 0x00000100, | 556 | mmCGTT_RLC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 551 | 0x22ca, 0xffffffff, 0x00000100, | 557 | mmCGTT_SC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 552 | 0x2451, 0xffffffff, 0x00000100, | 558 | mmCGTT_SPI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 553 | 0x2362, 0xffffffff, 0x00000100, | 559 | mmCGTT_SQ_CLK_CTRL, 0xffffffff, 0x00000100, |
| 554 | 0x2363, 0xffffffff, 0x00000100, | 560 | mmCGTT_SQG_CLK_CTRL, 0xffffffff, 0x00000100, |
| 555 | 0x240c, 0xffffffff, 0x00000100, | 561 | mmCGTT_SX_CLK_CTRL0, 0xffffffff, 0x00000100, |
| 556 | 0x240d, 0xffffffff, 0x00000100, | 562 | mmCGTT_SX_CLK_CTRL1, 0xffffffff, 0x00000100, |
| 557 | 0x240e, 0xffffffff, 0x00000100, | 563 | mmCGTT_SX_CLK_CTRL2, 0xffffffff, 0x00000100, |
| 558 | 0x240f, 0xffffffff, 0x00000100, | 564 | mmCGTT_SX_CLK_CTRL3, 0xffffffff, 0x00000100, |
| 559 | 0x2b60, 0xffffffff, 0x00000100, | 565 | mmCGTT_TCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 560 | 0x2b15, 0xffffffff, 0x00000100, | 566 | mmCGTT_TCP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 561 | 0x225f, 0xffffffff, 0x06000100, | 567 | mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100, |
| 562 | 0x261a, 0xffffffff, 0x00000100, | 568 | mmDB_CGTT_CLK_CTRL_0, 0xffffffff, 0x00000100, |
| 563 | 0x2544, 0xffffffff, 0x00000100, | 569 | mmTA_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 564 | 0x2bc1, 0xffffffff, 0x00000100, | 570 | mmTCA_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 565 | 0x2b81, 0xffffffff, 0x00000100, | 571 | mmTCC_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 566 | 0x2527, 0xffffffff, 0x00000100, | 572 | mmTD_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 567 | 0x200b, 0xffffffff, 0xe0000000, | 573 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 568 | 0x2458, 0xffffffff, 0x00010000, | 574 | 0x2458, 0xffffffff, 0x00010000, |
| 569 | 0x2459, 0xffffffff, 0x00030002, | 575 | 0x2459, 0xffffffff, 0x00030002, |
| 570 | 0x245a, 0xffffffff, 0x00040007, | 576 | 0x245a, 0xffffffff, 0x00040007, |
| @@ -615,53 +621,54 @@ static const u32 pitcairn_mgcg_cgcg_init[] = | |||
| 615 | 0x2496, 0xffffffff, 0x00100013, | 621 | 0x2496, 0xffffffff, 0x00100013, |
| 616 | 0x2497, 0xffffffff, 0x00120011, | 622 | 0x2497, 0xffffffff, 0x00120011, |
| 617 | 0x2498, 0xffffffff, 0x00150014, | 623 | 0x2498, 0xffffffff, 0x00150014, |
| 618 | 0x2454, 0xffffffff, 0x96940200, | 624 | mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200, |
| 619 | 0x21c2, 0xffffffff, 0x00900100, | 625 | mmCP_RB_WPTR_POLL_CNTL, 0xffffffff, 0x00900100, |
| 620 | 0x311e, 0xffffffff, 0x00000080, | 626 | mmRLC_GCPM_GENERAL_3, 0xffffffff, 0x00000080, |
| 621 | 0x3101, 0xffffffff, 0x0020003f, | 627 | mmRLC_CGCG_CGLS_CTRL, 0xffffffff, 0x0020003f, |
| 622 | 0x000c, 0xffffffff, 0x0000001c, | 628 | 0x000c, 0xffffffff, 0x0000001c, |
| 623 | 0x000d, 0x000f0000, 0x000f0000, | 629 | 0x000d, 0x000f0000, 0x000f0000, |
| 624 | 0x0583, 0xffffffff, 0x00000100, | 630 | 0x0583, 0xffffffff, 0x00000100, |
| 625 | 0x0409, 0xffffffff, 0x00000100, | 631 | mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, |
| 626 | 0x040b, 0x00000101, 0x00000000, | 632 | mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, |
| 627 | 0x082a, 0xffffffff, 0x00000104, | 633 | mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104, |
| 628 | 0x1579, 0xff000fff, 0x00000100, | 634 | mmCGTT_DRM_CLK_CTRL0, 0xff000fff, 0x00000100, |
| 629 | 0x157a, 0x00000001, 0x00000001, | 635 | 0x157a, 0x00000001, 0x00000001, |
| 630 | 0x0bd4, 0x00000001, 0x00000001, | 636 | mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, |
| 631 | 0x0c33, 0xc0000fff, 0x00000104, | 637 | mmHDP_XDP_CGTT_BLK_CTRL, 0xc0000fff, 0x00000104, |
| 632 | 0x3079, 0x00000001, 0x00000001, | 638 | mmCP_MEM_SLP_CNTL, 0x00000001, 0x00000001, |
| 633 | 0x3430, 0xfffffff0, 0x00000100, | 639 | 0x3430, 0xfffffff0, 0x00000100, |
| 634 | 0x3630, 0xfffffff0, 0x00000100 | 640 | 0x3630, 0xfffffff0, 0x00000100, |
| 635 | }; | 641 | }; |
| 642 | |||
| 636 | static const u32 verde_mgcg_cgcg_init[] = | 643 | static const u32 verde_mgcg_cgcg_init[] = |
| 637 | { | 644 | { |
| 638 | 0x3100, 0xffffffff, 0xfffffffc, | 645 | mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc, |
| 639 | 0x200b, 0xffffffff, 0xe0000000, | 646 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 640 | 0x2698, 0xffffffff, 0x00000100, | 647 | mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 641 | 0x24a9, 0xffffffff, 0x00000100, | 648 | mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 642 | 0x3059, 0xffffffff, 0x00000100, | 649 | mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 643 | 0x25dd, 0xffffffff, 0x00000100, | 650 | mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100, |
| 644 | 0x2261, 0xffffffff, 0x06000100, | 651 | mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100, |
| 645 | 0x2286, 0xffffffff, 0x00000100, | 652 | mmCGTT_PA_CLK_CTRL, 0xffffffff, 0x00000100, |
| 646 | 0x24a8, 0xffffffff, 0x00000100, | 653 | mmCGTT_PC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 647 | 0x30e0, 0xffffffff, 0x00000100, | 654 | mmCGTT_RLC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 648 | 0x22ca, 0xffffffff, 0x00000100, | 655 | mmCGTT_SC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 649 | 0x2451, 0xffffffff, 0x00000100, | 656 | mmCGTT_SPI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 650 | 0x2362, 0xffffffff, 0x00000100, | 657 | mmCGTT_SQ_CLK_CTRL, 0xffffffff, 0x00000100, |
| 651 | 0x2363, 0xffffffff, 0x00000100, | 658 | mmCGTT_SQG_CLK_CTRL, 0xffffffff, 0x00000100, |
| 652 | 0x240c, 0xffffffff, 0x00000100, | 659 | mmCGTT_SX_CLK_CTRL0, 0xffffffff, 0x00000100, |
| 653 | 0x240d, 0xffffffff, 0x00000100, | 660 | mmCGTT_SX_CLK_CTRL1, 0xffffffff, 0x00000100, |
| 654 | 0x240e, 0xffffffff, 0x00000100, | 661 | mmCGTT_SX_CLK_CTRL2, 0xffffffff, 0x00000100, |
| 655 | 0x240f, 0xffffffff, 0x00000100, | 662 | mmCGTT_SX_CLK_CTRL3, 0xffffffff, 0x00000100, |
| 656 | 0x2b60, 0xffffffff, 0x00000100, | 663 | mmCGTT_TCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 657 | 0x2b15, 0xffffffff, 0x00000100, | 664 | mmCGTT_TCP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 658 | 0x225f, 0xffffffff, 0x06000100, | 665 | mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100, |
| 659 | 0x261a, 0xffffffff, 0x00000100, | 666 | mmDB_CGTT_CLK_CTRL_0, 0xffffffff, 0x00000100, |
| 660 | 0x2544, 0xffffffff, 0x00000100, | 667 | mmTA_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 661 | 0x2bc1, 0xffffffff, 0x00000100, | 668 | mmTCA_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 662 | 0x2b81, 0xffffffff, 0x00000100, | 669 | mmTCC_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 663 | 0x2527, 0xffffffff, 0x00000100, | 670 | mmTD_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 664 | 0x200b, 0xffffffff, 0xe0000000, | 671 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 665 | 0x2458, 0xffffffff, 0x00010000, | 672 | 0x2458, 0xffffffff, 0x00010000, |
| 666 | 0x2459, 0xffffffff, 0x00030002, | 673 | 0x2459, 0xffffffff, 0x00030002, |
| 667 | 0x245a, 0xffffffff, 0x00040007, | 674 | 0x245a, 0xffffffff, 0x00040007, |
| @@ -712,55 +719,56 @@ static const u32 verde_mgcg_cgcg_init[] = | |||
| 712 | 0x2496, 0xffffffff, 0x00100013, | 719 | 0x2496, 0xffffffff, 0x00100013, |
| 713 | 0x2497, 0xffffffff, 0x00120011, | 720 | 0x2497, 0xffffffff, 0x00120011, |
| 714 | 0x2498, 0xffffffff, 0x00150014, | 721 | 0x2498, 0xffffffff, 0x00150014, |
| 715 | 0x2454, 0xffffffff, 0x96940200, | 722 | mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200, |
| 716 | 0x21c2, 0xffffffff, 0x00900100, | 723 | mmCP_RB_WPTR_POLL_CNTL, 0xffffffff, 0x00900100, |
| 717 | 0x311e, 0xffffffff, 0x00000080, | 724 | mmRLC_GCPM_GENERAL_3, 0xffffffff, 0x00000080, |
| 718 | 0x3101, 0xffffffff, 0x0020003f, | 725 | mmRLC_CGCG_CGLS_CTRL, 0xffffffff, 0x0020003f, |
| 719 | 0x000c, 0xffffffff, 0x0000001c, | 726 | 0x000c, 0xffffffff, 0x0000001c, |
| 720 | 0x000d, 0x000f0000, 0x000f0000, | 727 | 0x000d, 0x000f0000, 0x000f0000, |
| 721 | 0x0583, 0xffffffff, 0x00000100, | 728 | 0x0583, 0xffffffff, 0x00000100, |
| 722 | 0x0409, 0xffffffff, 0x00000100, | 729 | mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, |
| 723 | 0x040b, 0x00000101, 0x00000000, | 730 | mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, |
| 724 | 0x082a, 0xffffffff, 0x00000104, | 731 | mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104, |
| 725 | 0x0993, 0x000c0000, 0x000c0000, | 732 | mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000, |
| 726 | 0x0992, 0x000c0000, 0x000c0000, | 733 | mmMC_CITF_MISC_RD_CG, 0x000c0000, 0x000c0000, |
| 727 | 0x1579, 0xff000fff, 0x00000100, | 734 | mmCGTT_DRM_CLK_CTRL0, 0xff000fff, 0x00000100, |
| 728 | 0x157a, 0x00000001, 0x00000001, | 735 | 0x157a, 0x00000001, 0x00000001, |
| 729 | 0x0bd4, 0x00000001, 0x00000001, | 736 | mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, |
| 730 | 0x0c33, 0xc0000fff, 0x00000104, | 737 | mmHDP_XDP_CGTT_BLK_CTRL, 0xc0000fff, 0x00000104, |
| 731 | 0x3079, 0x00000001, 0x00000001, | 738 | mmCP_MEM_SLP_CNTL, 0x00000001, 0x00000001, |
| 732 | 0x3430, 0xfffffff0, 0x00000100, | 739 | 0x3430, 0xfffffff0, 0x00000100, |
| 733 | 0x3630, 0xfffffff0, 0x00000100 | 740 | 0x3630, 0xfffffff0, 0x00000100, |
| 734 | }; | 741 | }; |
| 742 | |||
| 735 | static const u32 oland_mgcg_cgcg_init[] = | 743 | static const u32 oland_mgcg_cgcg_init[] = |
| 736 | { | 744 | { |
| 737 | 0x3100, 0xffffffff, 0xfffffffc, | 745 | mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc, |
| 738 | 0x200b, 0xffffffff, 0xe0000000, | 746 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 739 | 0x2698, 0xffffffff, 0x00000100, | 747 | mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 740 | 0x24a9, 0xffffffff, 0x00000100, | 748 | mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 741 | 0x3059, 0xffffffff, 0x00000100, | 749 | mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 742 | 0x25dd, 0xffffffff, 0x00000100, | 750 | mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100, |
| 743 | 0x2261, 0xffffffff, 0x06000100, | 751 | mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100, |
| 744 | 0x2286, 0xffffffff, 0x00000100, | 752 | mmCGTT_PA_CLK_CTRL, 0xffffffff, 0x00000100, |
| 745 | 0x24a8, 0xffffffff, 0x00000100, | 753 | mmCGTT_PC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 746 | 0x30e0, 0xffffffff, 0x00000100, | 754 | mmCGTT_RLC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 747 | 0x22ca, 0xffffffff, 0x00000100, | 755 | mmCGTT_SC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 748 | 0x2451, 0xffffffff, 0x00000100, | 756 | mmCGTT_SPI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 749 | 0x2362, 0xffffffff, 0x00000100, | 757 | mmCGTT_SQ_CLK_CTRL, 0xffffffff, 0x00000100, |
| 750 | 0x2363, 0xffffffff, 0x00000100, | 758 | mmCGTT_SQG_CLK_CTRL, 0xffffffff, 0x00000100, |
| 751 | 0x240c, 0xffffffff, 0x00000100, | 759 | mmCGTT_SX_CLK_CTRL0, 0xffffffff, 0x00000100, |
| 752 | 0x240d, 0xffffffff, 0x00000100, | 760 | mmCGTT_SX_CLK_CTRL1, 0xffffffff, 0x00000100, |
| 753 | 0x240e, 0xffffffff, 0x00000100, | 761 | mmCGTT_SX_CLK_CTRL2, 0xffffffff, 0x00000100, |
| 754 | 0x240f, 0xffffffff, 0x00000100, | 762 | mmCGTT_SX_CLK_CTRL3, 0xffffffff, 0x00000100, |
| 755 | 0x2b60, 0xffffffff, 0x00000100, | 763 | mmCGTT_TCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 756 | 0x2b15, 0xffffffff, 0x00000100, | 764 | mmCGTT_TCP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 757 | 0x225f, 0xffffffff, 0x06000100, | 765 | mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100, |
| 758 | 0x261a, 0xffffffff, 0x00000100, | 766 | mmDB_CGTT_CLK_CTRL_0, 0xffffffff, 0x00000100, |
| 759 | 0x2544, 0xffffffff, 0x00000100, | 767 | mmTA_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 760 | 0x2bc1, 0xffffffff, 0x00000100, | 768 | mmTCA_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 761 | 0x2b81, 0xffffffff, 0x00000100, | 769 | mmTCC_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 762 | 0x2527, 0xffffffff, 0x00000100, | 770 | mmTD_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 763 | 0x200b, 0xffffffff, 0xe0000000, | 771 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 764 | 0x2458, 0xffffffff, 0x00010000, | 772 | 0x2458, 0xffffffff, 0x00010000, |
| 765 | 0x2459, 0xffffffff, 0x00030002, | 773 | 0x2459, 0xffffffff, 0x00030002, |
| 766 | 0x245a, 0xffffffff, 0x00040007, | 774 | 0x245a, 0xffffffff, 0x00040007, |
| @@ -791,55 +799,56 @@ static const u32 oland_mgcg_cgcg_init[] = | |||
| 791 | 0x2473, 0xffffffff, 0x0000000b, | 799 | 0x2473, 0xffffffff, 0x0000000b, |
| 792 | 0x2474, 0xffffffff, 0x000a0009, | 800 | 0x2474, 0xffffffff, 0x000a0009, |
| 793 | 0x2475, 0xffffffff, 0x000d000c, | 801 | 0x2475, 0xffffffff, 0x000d000c, |
| 794 | 0x2454, 0xffffffff, 0x96940200, | 802 | mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200, |
| 795 | 0x21c2, 0xffffffff, 0x00900100, | 803 | mmCP_RB_WPTR_POLL_CNTL, 0xffffffff, 0x00900100, |
| 796 | 0x311e, 0xffffffff, 0x00000080, | 804 | mmRLC_GCPM_GENERAL_3, 0xffffffff, 0x00000080, |
| 797 | 0x3101, 0xffffffff, 0x0020003f, | 805 | mmRLC_CGCG_CGLS_CTRL, 0xffffffff, 0x0020003f, |
| 798 | 0x000c, 0xffffffff, 0x0000001c, | 806 | 0x000c, 0xffffffff, 0x0000001c, |
| 799 | 0x000d, 0x000f0000, 0x000f0000, | 807 | 0x000d, 0x000f0000, 0x000f0000, |
| 800 | 0x0583, 0xffffffff, 0x00000100, | 808 | 0x0583, 0xffffffff, 0x00000100, |
| 801 | 0x0409, 0xffffffff, 0x00000100, | 809 | mmXDMA_CLOCK_GATING_CNTL, 0xffffffff, 0x00000100, |
| 802 | 0x040b, 0x00000101, 0x00000000, | 810 | mmXDMA_MEM_POWER_CNTL, 0x00000101, 0x00000000, |
| 803 | 0x082a, 0xffffffff, 0x00000104, | 811 | mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104, |
| 804 | 0x0993, 0x000c0000, 0x000c0000, | 812 | mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000, |
| 805 | 0x0992, 0x000c0000, 0x000c0000, | 813 | mmMC_CITF_MISC_RD_CG, 0x000c0000, 0x000c0000, |
| 806 | 0x1579, 0xff000fff, 0x00000100, | 814 | mmCGTT_DRM_CLK_CTRL0, 0xff000fff, 0x00000100, |
| 807 | 0x157a, 0x00000001, 0x00000001, | 815 | 0x157a, 0x00000001, 0x00000001, |
| 808 | 0x0bd4, 0x00000001, 0x00000001, | 816 | mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, |
| 809 | 0x0c33, 0xc0000fff, 0x00000104, | 817 | mmHDP_XDP_CGTT_BLK_CTRL, 0xc0000fff, 0x00000104, |
| 810 | 0x3079, 0x00000001, 0x00000001, | 818 | mmCP_MEM_SLP_CNTL, 0x00000001, 0x00000001, |
| 811 | 0x3430, 0xfffffff0, 0x00000100, | 819 | 0x3430, 0xfffffff0, 0x00000100, |
| 812 | 0x3630, 0xfffffff0, 0x00000100 | 820 | 0x3630, 0xfffffff0, 0x00000100, |
| 813 | }; | 821 | }; |
| 822 | |||
| 814 | static const u32 hainan_mgcg_cgcg_init[] = | 823 | static const u32 hainan_mgcg_cgcg_init[] = |
| 815 | { | 824 | { |
| 816 | 0x3100, 0xffffffff, 0xfffffffc, | 825 | mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xfffffffc, |
| 817 | 0x200b, 0xffffffff, 0xe0000000, | 826 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 818 | 0x2698, 0xffffffff, 0x00000100, | 827 | mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 819 | 0x24a9, 0xffffffff, 0x00000100, | 828 | mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 820 | 0x3059, 0xffffffff, 0x00000100, | 829 | mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 821 | 0x25dd, 0xffffffff, 0x00000100, | 830 | mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100, |
| 822 | 0x2261, 0xffffffff, 0x06000100, | 831 | mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100, |
| 823 | 0x2286, 0xffffffff, 0x00000100, | 832 | mmCGTT_PA_CLK_CTRL, 0xffffffff, 0x00000100, |
| 824 | 0x24a8, 0xffffffff, 0x00000100, | 833 | mmCGTT_PC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 825 | 0x30e0, 0xffffffff, 0x00000100, | 834 | mmCGTT_RLC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 826 | 0x22ca, 0xffffffff, 0x00000100, | 835 | mmCGTT_SC_CLK_CTRL, 0xffffffff, 0x00000100, |
| 827 | 0x2451, 0xffffffff, 0x00000100, | 836 | mmCGTT_SPI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 828 | 0x2362, 0xffffffff, 0x00000100, | 837 | mmCGTT_SQ_CLK_CTRL, 0xffffffff, 0x00000100, |
| 829 | 0x2363, 0xffffffff, 0x00000100, | 838 | mmCGTT_SQG_CLK_CTRL, 0xffffffff, 0x00000100, |
| 830 | 0x240c, 0xffffffff, 0x00000100, | 839 | mmCGTT_SX_CLK_CTRL0, 0xffffffff, 0x00000100, |
| 831 | 0x240d, 0xffffffff, 0x00000100, | 840 | mmCGTT_SX_CLK_CTRL1, 0xffffffff, 0x00000100, |
| 832 | 0x240e, 0xffffffff, 0x00000100, | 841 | mmCGTT_SX_CLK_CTRL2, 0xffffffff, 0x00000100, |
| 833 | 0x240f, 0xffffffff, 0x00000100, | 842 | mmCGTT_SX_CLK_CTRL3, 0xffffffff, 0x00000100, |
| 834 | 0x2b60, 0xffffffff, 0x00000100, | 843 | mmCGTT_TCI_CLK_CTRL, 0xffffffff, 0x00000100, |
| 835 | 0x2b15, 0xffffffff, 0x00000100, | 844 | mmCGTT_TCP_CLK_CTRL, 0xffffffff, 0x00000100, |
| 836 | 0x225f, 0xffffffff, 0x06000100, | 845 | mmCGTT_VGT_CLK_CTRL, 0xffffffff, 0x06000100, |
| 837 | 0x261a, 0xffffffff, 0x00000100, | 846 | mmDB_CGTT_CLK_CTRL_0, 0xffffffff, 0x00000100, |
| 838 | 0x2544, 0xffffffff, 0x00000100, | 847 | mmTA_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 839 | 0x2bc1, 0xffffffff, 0x00000100, | 848 | mmTCA_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 840 | 0x2b81, 0xffffffff, 0x00000100, | 849 | mmTCC_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100, |
| 841 | 0x2527, 0xffffffff, 0x00000100, | 850 | mmTD_CGTT_CTRL, 0xffffffff, 0x00000100, |
| 842 | 0x200b, 0xffffffff, 0xe0000000, | 851 | mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000, |
| 843 | 0x2458, 0xffffffff, 0x00010000, | 852 | 0x2458, 0xffffffff, 0x00010000, |
| 844 | 0x2459, 0xffffffff, 0x00030002, | 853 | 0x2459, 0xffffffff, 0x00030002, |
| 845 | 0x245a, 0xffffffff, 0x00040007, | 854 | 0x245a, 0xffffffff, 0x00040007, |
| @@ -870,22 +879,22 @@ static const u32 hainan_mgcg_cgcg_init[] = | |||
| 870 | 0x2473, 0xffffffff, 0x0000000b, | 879 | 0x2473, 0xffffffff, 0x0000000b, |
| 871 | 0x2474, 0xffffffff, 0x000a0009, | 880 | 0x2474, 0xffffffff, 0x000a0009, |
| 872 | 0x2475, 0xffffffff, 0x000d000c, | 881 | 0x2475, 0xffffffff, 0x000d000c, |
| 873 | 0x2454, 0xffffffff, 0x96940200, | 882 | mmCGTS_SM_CTRL_REG, 0xffffffff, 0x96940200, |
| 874 | 0x21c2, 0xffffffff, 0x00900100, | 883 | mmCP_RB_WPTR_POLL_CNTL, 0xffffffff, 0x00900100, |
| 875 | 0x311e, 0xffffffff, 0x00000080, | 884 | mmRLC_GCPM_GENERAL_3, 0xffffffff, 0x00000080, |
| 876 | 0x3101, 0xffffffff, 0x0020003f, | 885 | mmRLC_CGCG_CGLS_CTRL, 0xffffffff, 0x0020003f, |
| 877 | 0x000c, 0xffffffff, 0x0000001c, | 886 | 0x000c, 0xffffffff, 0x0000001c, |
| 878 | 0x000d, 0x000f0000, 0x000f0000, | 887 | 0x000d, 0x000f0000, 0x000f0000, |
| 879 | 0x0583, 0xffffffff, 0x00000100, | 888 | 0x0583, 0xffffffff, 0x00000100, |
| 880 | 0x0409, 0xffffffff, 0x00000100, | 889 | 0x0409, 0xffffffff, 0x00000100, |
| 881 | 0x082a, 0xffffffff, 0x00000104, | 890 | mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104, |
| 882 | 0x0993, 0x000c0000, 0x000c0000, | 891 | mmMC_CITF_MISC_WR_CG, 0x000c0000, 0x000c0000, |
| 883 | 0x0992, 0x000c0000, 0x000c0000, | 892 | mmMC_CITF_MISC_RD_CG, 0x000c0000, 0x000c0000, |
| 884 | 0x0bd4, 0x00000001, 0x00000001, | 893 | mmHDP_MEM_POWER_LS, 0x00000001, 0x00000001, |
| 885 | 0x0c33, 0xc0000fff, 0x00000104, | 894 | mmHDP_XDP_CGTT_BLK_CTRL, 0xc0000fff, 0x00000104, |
| 886 | 0x3079, 0x00000001, 0x00000001, | 895 | mmCP_MEM_SLP_CNTL, 0x00000001, 0x00000001, |
| 887 | 0x3430, 0xfffffff0, 0x00000100, | 896 | 0x3430, 0xfffffff0, 0x00000100, |
| 888 | 0x3630, 0xfffffff0, 0x00000100 | 897 | 0x3630, 0xfffffff0, 0x00000100, |
| 889 | }; | 898 | }; |
| 890 | 899 | ||
| 891 | static u32 si_pcie_rreg(struct amdgpu_device *adev, u32 reg) | 900 | static u32 si_pcie_rreg(struct amdgpu_device *adev, u32 reg) |
