diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 18 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/Kconfig | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 21 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_link.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_stream.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 19 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/modules/power/power_helpers.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 21 |
14 files changed, 65 insertions, 59 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c index dafc645b2e4e..b083b219b1a9 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | |||
| @@ -531,17 +531,6 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev, | |||
| 531 | struct drm_gem_object *obj; | 531 | struct drm_gem_object *obj; |
| 532 | struct amdgpu_framebuffer *amdgpu_fb; | 532 | struct amdgpu_framebuffer *amdgpu_fb; |
| 533 | int ret; | 533 | int ret; |
| 534 | int height; | ||
| 535 | struct amdgpu_device *adev = dev->dev_private; | ||
| 536 | int cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0); | ||
| 537 | int pitch = mode_cmd->pitches[0] / cpp; | ||
| 538 | |||
| 539 | pitch = amdgpu_align_pitch(adev, pitch, cpp, false); | ||
| 540 | if (mode_cmd->pitches[0] != pitch) { | ||
| 541 | DRM_DEBUG_KMS("Invalid pitch: expecting %d but got %d\n", | ||
| 542 | pitch, mode_cmd->pitches[0]); | ||
| 543 | return ERR_PTR(-EINVAL); | ||
| 544 | } | ||
| 545 | 534 | ||
| 546 | obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); | 535 | obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); |
| 547 | if (obj == NULL) { | 536 | if (obj == NULL) { |
| @@ -556,13 +545,6 @@ amdgpu_display_user_framebuffer_create(struct drm_device *dev, | |||
| 556 | return ERR_PTR(-EINVAL); | 545 | return ERR_PTR(-EINVAL); |
| 557 | } | 546 | } |
| 558 | 547 | ||
| 559 | height = ALIGN(mode_cmd->height, 8); | ||
| 560 | if (obj->size < pitch * height) { | ||
| 561 | DRM_DEBUG_KMS("Invalid GEM size: expecting >= %d but got %zu\n", | ||
| 562 | pitch * height, obj->size); | ||
| 563 | return ERR_PTR(-EINVAL); | ||
| 564 | } | ||
| 565 | |||
| 566 | amdgpu_fb = kzalloc(sizeof(*amdgpu_fb), GFP_KERNEL); | 548 | amdgpu_fb = kzalloc(sizeof(*amdgpu_fb), GFP_KERNEL); |
| 567 | if (amdgpu_fb == NULL) { | 549 | if (amdgpu_fb == NULL) { |
| 568 | drm_gem_object_put_unlocked(obj); | 550 | drm_gem_object_put_unlocked(obj); |
diff --git a/drivers/gpu/drm/amd/amdkfd/Kconfig b/drivers/gpu/drm/amd/amdkfd/Kconfig index fbf0ee5201c3..c3613604a4f8 100644 --- a/drivers/gpu/drm/amd/amdkfd/Kconfig +++ b/drivers/gpu/drm/amd/amdkfd/Kconfig | |||
| @@ -4,8 +4,8 @@ | |||
| 4 | 4 | ||
| 5 | config HSA_AMD | 5 | config HSA_AMD |
| 6 | bool "HSA kernel driver for AMD GPU devices" | 6 | bool "HSA kernel driver for AMD GPU devices" |
| 7 | depends on DRM_AMDGPU && X86_64 | 7 | depends on DRM_AMDGPU && (X86_64 || ARM64) |
| 8 | imply AMD_IOMMU_V2 | 8 | imply AMD_IOMMU_V2 if X86_64 |
| 9 | select MMU_NOTIFIER | 9 | select MMU_NOTIFIER |
| 10 | help | 10 | help |
| 11 | Enable this if you want to use HSA features on AMD GPU devices. | 11 | Enable this if you want to use HSA features on AMD GPU devices. |
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c index b7bc7d7d048f..5d85ff341385 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c | |||
| @@ -863,6 +863,7 @@ static int kfd_fill_mem_info_for_cpu(int numa_node_id, int *avail_size, | |||
| 863 | return 0; | 863 | return 0; |
| 864 | } | 864 | } |
| 865 | 865 | ||
| 866 | #if CONFIG_X86_64 | ||
| 866 | static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size, | 867 | static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size, |
| 867 | uint32_t *num_entries, | 868 | uint32_t *num_entries, |
| 868 | struct crat_subtype_iolink *sub_type_hdr) | 869 | struct crat_subtype_iolink *sub_type_hdr) |
| @@ -905,6 +906,7 @@ static int kfd_fill_iolink_info_for_cpu(int numa_node_id, int *avail_size, | |||
| 905 | 906 | ||
| 906 | return 0; | 907 | return 0; |
| 907 | } | 908 | } |
| 909 | #endif | ||
| 908 | 910 | ||
| 909 | /* kfd_create_vcrat_image_cpu - Create Virtual CRAT for CPU | 911 | /* kfd_create_vcrat_image_cpu - Create Virtual CRAT for CPU |
| 910 | * | 912 | * |
| @@ -920,7 +922,9 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size) | |||
| 920 | struct crat_subtype_generic *sub_type_hdr; | 922 | struct crat_subtype_generic *sub_type_hdr; |
| 921 | int avail_size = *size; | 923 | int avail_size = *size; |
| 922 | int numa_node_id; | 924 | int numa_node_id; |
| 925 | #ifdef CONFIG_X86_64 | ||
| 923 | uint32_t entries = 0; | 926 | uint32_t entries = 0; |
| 927 | #endif | ||
| 924 | int ret = 0; | 928 | int ret = 0; |
| 925 | 929 | ||
| 926 | if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_CPU) | 930 | if (!pcrat_image || avail_size < VCRAT_SIZE_FOR_CPU) |
| @@ -982,6 +986,7 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size) | |||
| 982 | sub_type_hdr->length); | 986 | sub_type_hdr->length); |
| 983 | 987 | ||
| 984 | /* Fill in Subtype: IO Link */ | 988 | /* Fill in Subtype: IO Link */ |
| 989 | #ifdef CONFIG_X86_64 | ||
| 985 | ret = kfd_fill_iolink_info_for_cpu(numa_node_id, &avail_size, | 990 | ret = kfd_fill_iolink_info_for_cpu(numa_node_id, &avail_size, |
| 986 | &entries, | 991 | &entries, |
| 987 | (struct crat_subtype_iolink *)sub_type_hdr); | 992 | (struct crat_subtype_iolink *)sub_type_hdr); |
| @@ -992,6 +997,9 @@ static int kfd_create_vcrat_image_cpu(void *pcrat_image, size_t *size) | |||
| 992 | 997 | ||
| 993 | sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + | 998 | sub_type_hdr = (typeof(sub_type_hdr))((char *)sub_type_hdr + |
| 994 | sub_type_hdr->length * entries); | 999 | sub_type_hdr->length * entries); |
| 1000 | #else | ||
| 1001 | pr_info("IO link not available for non x86 platforms\n"); | ||
| 1002 | #endif | ||
| 995 | 1003 | ||
| 996 | crat_table->num_domains++; | 1004 | crat_table->num_domains++; |
| 997 | } | 1005 | } |
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c index 5f5b2acedbac..09da91644f9f 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c | |||
| @@ -1093,8 +1093,6 @@ static uint32_t kfd_generate_gpu_id(struct kfd_dev *gpu) | |||
| 1093 | * the GPU device is not already present in the topology device | 1093 | * the GPU device is not already present in the topology device |
| 1094 | * list then return NULL. This means a new topology device has to | 1094 | * list then return NULL. This means a new topology device has to |
| 1095 | * be created for this GPU. | 1095 | * be created for this GPU. |
| 1096 | * TODO: Rather than assiging @gpu to first topology device withtout | ||
| 1097 | * gpu attached, it will better to have more stringent check. | ||
| 1098 | */ | 1096 | */ |
| 1099 | static struct kfd_topology_device *kfd_assign_gpu(struct kfd_dev *gpu) | 1097 | static struct kfd_topology_device *kfd_assign_gpu(struct kfd_dev *gpu) |
| 1100 | { | 1098 | { |
| @@ -1102,12 +1100,20 @@ static struct kfd_topology_device *kfd_assign_gpu(struct kfd_dev *gpu) | |||
| 1102 | struct kfd_topology_device *out_dev = NULL; | 1100 | struct kfd_topology_device *out_dev = NULL; |
| 1103 | 1101 | ||
| 1104 | down_write(&topology_lock); | 1102 | down_write(&topology_lock); |
| 1105 | list_for_each_entry(dev, &topology_device_list, list) | 1103 | list_for_each_entry(dev, &topology_device_list, list) { |
| 1104 | /* Discrete GPUs need their own topology device list | ||
| 1105 | * entries. Don't assign them to CPU/APU nodes. | ||
| 1106 | */ | ||
| 1107 | if (!gpu->device_info->needs_iommu_device && | ||
| 1108 | dev->node_props.cpu_cores_count) | ||
| 1109 | continue; | ||
| 1110 | |||
| 1106 | if (!dev->gpu && (dev->node_props.simd_count > 0)) { | 1111 | if (!dev->gpu && (dev->node_props.simd_count > 0)) { |
| 1107 | dev->gpu = gpu; | 1112 | dev->gpu = gpu; |
| 1108 | out_dev = dev; | 1113 | out_dev = dev; |
| 1109 | break; | 1114 | break; |
| 1110 | } | 1115 | } |
| 1116 | } | ||
| 1111 | up_write(&topology_lock); | 1117 | up_write(&topology_lock); |
| 1112 | return out_dev; | 1118 | return out_dev; |
| 1113 | } | 1119 | } |
| @@ -1392,7 +1398,6 @@ int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev) | |||
| 1392 | 1398 | ||
| 1393 | static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) | 1399 | static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) |
| 1394 | { | 1400 | { |
| 1395 | const struct cpuinfo_x86 *cpuinfo; | ||
| 1396 | int first_cpu_of_numa_node; | 1401 | int first_cpu_of_numa_node; |
| 1397 | 1402 | ||
| 1398 | if (!cpumask || cpumask == cpu_none_mask) | 1403 | if (!cpumask || cpumask == cpu_none_mask) |
| @@ -1400,9 +1405,11 @@ static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) | |||
| 1400 | first_cpu_of_numa_node = cpumask_first(cpumask); | 1405 | first_cpu_of_numa_node = cpumask_first(cpumask); |
| 1401 | if (first_cpu_of_numa_node >= nr_cpu_ids) | 1406 | if (first_cpu_of_numa_node >= nr_cpu_ids) |
| 1402 | return -1; | 1407 | return -1; |
| 1403 | cpuinfo = &cpu_data(first_cpu_of_numa_node); | 1408 | #ifdef CONFIG_X86_64 |
| 1404 | 1409 | return cpu_data(first_cpu_of_numa_node).apicid; | |
| 1405 | return cpuinfo->apicid; | 1410 | #else |
| 1411 | return first_cpu_of_numa_node; | ||
| 1412 | #endif | ||
| 1406 | } | 1413 | } |
| 1407 | 1414 | ||
| 1408 | /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor | 1415 | /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor |
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 34f35e9a3c46..f4fa40c387d3 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | |||
| @@ -1772,7 +1772,7 @@ static int amdgpu_dm_backlight_update_status(struct backlight_device *bd) | |||
| 1772 | + caps.min_input_signal * 0x101; | 1772 | + caps.min_input_signal * 0x101; |
| 1773 | 1773 | ||
| 1774 | if (dc_link_set_backlight_level(dm->backlight_link, | 1774 | if (dc_link_set_backlight_level(dm->backlight_link, |
| 1775 | brightness, 0, 0)) | 1775 | brightness, 0)) |
| 1776 | return 0; | 1776 | return 0; |
| 1777 | else | 1777 | else |
| 1778 | return 1; | 1778 | return 1; |
| @@ -5933,7 +5933,7 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, | |||
| 5933 | for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { | 5933 | for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { |
| 5934 | if (!drm_atomic_crtc_needs_modeset(new_crtc_state) && | 5934 | if (!drm_atomic_crtc_needs_modeset(new_crtc_state) && |
| 5935 | !new_crtc_state->color_mgmt_changed && | 5935 | !new_crtc_state->color_mgmt_changed && |
| 5936 | !new_crtc_state->vrr_enabled) | 5936 | old_crtc_state->vrr_enabled == new_crtc_state->vrr_enabled) |
| 5937 | continue; | 5937 | continue; |
| 5938 | 5938 | ||
| 5939 | if (!new_crtc_state->enable) | 5939 | if (!new_crtc_state->enable) |
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 52deacf39841..b0265dbebd4c 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c | |||
| @@ -2190,8 +2190,7 @@ int dc_link_get_backlight_level(const struct dc_link *link) | |||
| 2190 | 2190 | ||
| 2191 | bool dc_link_set_backlight_level(const struct dc_link *link, | 2191 | bool dc_link_set_backlight_level(const struct dc_link *link, |
| 2192 | uint32_t backlight_pwm_u16_16, | 2192 | uint32_t backlight_pwm_u16_16, |
| 2193 | uint32_t frame_ramp, | 2193 | uint32_t frame_ramp) |
| 2194 | const struct dc_stream_state *stream) | ||
| 2195 | { | 2194 | { |
| 2196 | struct dc *core_dc = link->ctx->dc; | 2195 | struct dc *core_dc = link->ctx->dc; |
| 2197 | struct abm *abm = core_dc->res_pool->abm; | 2196 | struct abm *abm = core_dc->res_pool->abm; |
| @@ -2206,10 +2205,6 @@ bool dc_link_set_backlight_level(const struct dc_link *link, | |||
| 2206 | (abm->funcs->set_backlight_level_pwm == NULL)) | 2205 | (abm->funcs->set_backlight_level_pwm == NULL)) |
| 2207 | return false; | 2206 | return false; |
| 2208 | 2207 | ||
| 2209 | if (stream) | ||
| 2210 | ((struct dc_stream_state *)stream)->bl_pwm_level = | ||
| 2211 | backlight_pwm_u16_16; | ||
| 2212 | |||
| 2213 | use_smooth_brightness = dmcu->funcs->is_dmcu_initialized(dmcu); | 2208 | use_smooth_brightness = dmcu->funcs->is_dmcu_initialized(dmcu); |
| 2214 | 2209 | ||
| 2215 | DC_LOG_BACKLIGHT("New Backlight level: %d (0x%X)\n", | 2210 | DC_LOG_BACKLIGHT("New Backlight level: %d (0x%X)\n", |
| @@ -2637,11 +2632,6 @@ void core_link_enable_stream( | |||
| 2637 | 2632 | ||
| 2638 | if (dc_is_dp_signal(pipe_ctx->stream->signal)) | 2633 | if (dc_is_dp_signal(pipe_ctx->stream->signal)) |
| 2639 | enable_stream_features(pipe_ctx); | 2634 | enable_stream_features(pipe_ctx); |
| 2640 | |||
| 2641 | dc_link_set_backlight_level(pipe_ctx->stream->sink->link, | ||
| 2642 | pipe_ctx->stream->bl_pwm_level, | ||
| 2643 | 0, | ||
| 2644 | pipe_ctx->stream); | ||
| 2645 | } | 2635 | } |
| 2646 | 2636 | ||
| 2647 | } | 2637 | } |
diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h b/drivers/gpu/drm/amd/display/dc/dc_link.h index 29f19d57ff7a..b2243e0dad1f 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_link.h +++ b/drivers/gpu/drm/amd/display/dc/dc_link.h | |||
| @@ -146,8 +146,7 @@ static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_ | |||
| 146 | */ | 146 | */ |
| 147 | bool dc_link_set_backlight_level(const struct dc_link *dc_link, | 147 | bool dc_link_set_backlight_level(const struct dc_link *dc_link, |
| 148 | uint32_t backlight_pwm_u16_16, | 148 | uint32_t backlight_pwm_u16_16, |
| 149 | uint32_t frame_ramp, | 149 | uint32_t frame_ramp); |
| 150 | const struct dc_stream_state *stream); | ||
| 151 | 150 | ||
| 152 | int dc_link_get_backlight_level(const struct dc_link *dc_link); | 151 | int dc_link_get_backlight_level(const struct dc_link *dc_link); |
| 153 | 152 | ||
diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h index be34d638e15d..d70c9e1cda3d 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_stream.h +++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h | |||
| @@ -91,7 +91,6 @@ struct dc_stream_state { | |||
| 91 | 91 | ||
| 92 | /* DMCU info */ | 92 | /* DMCU info */ |
| 93 | unsigned int abm_level; | 93 | unsigned int abm_level; |
| 94 | unsigned int bl_pwm_level; | ||
| 95 | 94 | ||
| 96 | /* from core_stream struct */ | 95 | /* from core_stream struct */ |
| 97 | struct dc_context *ctx; | 96 | struct dc_context *ctx; |
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 4bf24758217f..8f09b8625c5d 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | |||
| @@ -1000,7 +1000,7 @@ void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx) | |||
| 1000 | 1000 | ||
| 1001 | pipe_ctx->stream_res.audio->funcs->az_enable(pipe_ctx->stream_res.audio); | 1001 | pipe_ctx->stream_res.audio->funcs->az_enable(pipe_ctx->stream_res.audio); |
| 1002 | 1002 | ||
| 1003 | if (num_audio == 1 && pp_smu != NULL && pp_smu->set_pme_wa_enable != NULL) | 1003 | if (num_audio >= 1 && pp_smu != NULL && pp_smu->set_pme_wa_enable != NULL) |
| 1004 | /*this is the first audio. apply the PME w/a in order to wake AZ from D3*/ | 1004 | /*this is the first audio. apply the PME w/a in order to wake AZ from D3*/ |
| 1005 | pp_smu->set_pme_wa_enable(&pp_smu->pp_smu); | 1005 | pp_smu->set_pme_wa_enable(&pp_smu->pp_smu); |
| 1006 | /* un-mute audio */ | 1006 | /* un-mute audio */ |
| @@ -1017,6 +1017,8 @@ void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx, int option) | |||
| 1017 | pipe_ctx->stream_res.stream_enc->funcs->audio_mute_control( | 1017 | pipe_ctx->stream_res.stream_enc->funcs->audio_mute_control( |
| 1018 | pipe_ctx->stream_res.stream_enc, true); | 1018 | pipe_ctx->stream_res.stream_enc, true); |
| 1019 | if (pipe_ctx->stream_res.audio) { | 1019 | if (pipe_ctx->stream_res.audio) { |
| 1020 | struct pp_smu_funcs_rv *pp_smu = dc->res_pool->pp_smu; | ||
| 1021 | |||
| 1020 | if (option != KEEP_ACQUIRED_RESOURCE || | 1022 | if (option != KEEP_ACQUIRED_RESOURCE || |
| 1021 | !dc->debug.az_endpoint_mute_only) { | 1023 | !dc->debug.az_endpoint_mute_only) { |
| 1022 | /*only disalbe az_endpoint if power down or free*/ | 1024 | /*only disalbe az_endpoint if power down or free*/ |
| @@ -1036,6 +1038,9 @@ void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx, int option) | |||
| 1036 | update_audio_usage(&dc->current_state->res_ctx, dc->res_pool, pipe_ctx->stream_res.audio, false); | 1038 | update_audio_usage(&dc->current_state->res_ctx, dc->res_pool, pipe_ctx->stream_res.audio, false); |
| 1037 | pipe_ctx->stream_res.audio = NULL; | 1039 | pipe_ctx->stream_res.audio = NULL; |
| 1038 | } | 1040 | } |
| 1041 | if (pp_smu != NULL && pp_smu->set_pme_wa_enable != NULL) | ||
| 1042 | /*this is the first audio. apply the PME w/a in order to wake AZ from D3*/ | ||
| 1043 | pp_smu->set_pme_wa_enable(&pp_smu->pp_smu); | ||
| 1039 | 1044 | ||
| 1040 | /* TODO: notify audio driver for if audio modes list changed | 1045 | /* TODO: notify audio driver for if audio modes list changed |
| 1041 | * add audio mode list change flag */ | 1046 | * add audio mode list change flag */ |
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c index dcb3c5530236..cd1ebe57ed59 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | |||
| @@ -463,7 +463,7 @@ void dpp1_set_cursor_position( | |||
| 463 | if (src_y_offset >= (int)param->viewport.height) | 463 | if (src_y_offset >= (int)param->viewport.height) |
| 464 | cur_en = 0; /* not visible beyond bottom edge*/ | 464 | cur_en = 0; /* not visible beyond bottom edge*/ |
| 465 | 465 | ||
| 466 | if (src_y_offset < 0) | 466 | if (src_y_offset + (int)height <= 0) |
| 467 | cur_en = 0; /* not visible beyond top edge*/ | 467 | cur_en = 0; /* not visible beyond top edge*/ |
| 468 | 468 | ||
| 469 | REG_UPDATE(CURSOR0_CONTROL, | 469 | REG_UPDATE(CURSOR0_CONTROL, |
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c index 345af015d061..d1acd7165bc8 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | |||
| @@ -1140,7 +1140,7 @@ void hubp1_cursor_set_position( | |||
| 1140 | if (src_y_offset >= (int)param->viewport.height) | 1140 | if (src_y_offset >= (int)param->viewport.height) |
| 1141 | cur_en = 0; /* not visible beyond bottom edge*/ | 1141 | cur_en = 0; /* not visible beyond bottom edge*/ |
| 1142 | 1142 | ||
| 1143 | if (src_y_offset < 0) //+ (int)hubp->curs_attr.height | 1143 | if (src_y_offset + (int)hubp->curs_attr.height <= 0) |
| 1144 | cur_en = 0; /* not visible beyond top edge*/ | 1144 | cur_en = 0; /* not visible beyond top edge*/ |
| 1145 | 1145 | ||
| 1146 | if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) | 1146 | if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) |
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index 91e015e14355..58a12ddf12f3 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | |||
| @@ -2355,29 +2355,22 @@ static void dcn10_apply_ctx_for_surface( | |||
| 2355 | top_pipe_to_program->plane_state->update_flags.bits.full_update) | 2355 | top_pipe_to_program->plane_state->update_flags.bits.full_update) |
| 2356 | for (i = 0; i < dc->res_pool->pipe_count; i++) { | 2356 | for (i = 0; i < dc->res_pool->pipe_count; i++) { |
| 2357 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | 2357 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; |
| 2358 | 2358 | tg = pipe_ctx->stream_res.tg; | |
| 2359 | /* Skip inactive pipes and ones already updated */ | 2359 | /* Skip inactive pipes and ones already updated */ |
| 2360 | if (!pipe_ctx->stream || pipe_ctx->stream == stream | 2360 | if (!pipe_ctx->stream || pipe_ctx->stream == stream |
| 2361 | || !pipe_ctx->plane_state) | 2361 | || !pipe_ctx->plane_state |
| 2362 | || !tg->funcs->is_tg_enabled(tg)) | ||
| 2362 | continue; | 2363 | continue; |
| 2363 | 2364 | ||
| 2364 | pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg); | 2365 | tg->funcs->lock(tg); |
| 2365 | 2366 | ||
| 2366 | pipe_ctx->plane_res.hubp->funcs->hubp_setup_interdependent( | 2367 | pipe_ctx->plane_res.hubp->funcs->hubp_setup_interdependent( |
| 2367 | pipe_ctx->plane_res.hubp, | 2368 | pipe_ctx->plane_res.hubp, |
| 2368 | &pipe_ctx->dlg_regs, | 2369 | &pipe_ctx->dlg_regs, |
| 2369 | &pipe_ctx->ttu_regs); | 2370 | &pipe_ctx->ttu_regs); |
| 2370 | } | ||
| 2371 | |||
| 2372 | for (i = 0; i < dc->res_pool->pipe_count; i++) { | ||
| 2373 | struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; | ||
| 2374 | 2371 | ||
| 2375 | if (!pipe_ctx->stream || pipe_ctx->stream == stream | 2372 | tg->funcs->unlock(tg); |
| 2376 | || !pipe_ctx->plane_state) | 2373 | } |
| 2377 | continue; | ||
| 2378 | |||
| 2379 | dcn10_pipe_control_lock(dc, pipe_ctx, false); | ||
| 2380 | } | ||
| 2381 | 2374 | ||
| 2382 | if (num_planes == 0) | 2375 | if (num_planes == 0) |
| 2383 | false_optc_underflow_wa(dc, stream, tg); | 2376 | false_optc_underflow_wa(dc, stream, tg); |
diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c index 00f63b7dd32f..c11a443dcbc8 100644 --- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c +++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c | |||
| @@ -57,6 +57,7 @@ static const unsigned char abm_config[abm_defines_max_config][abm_defines_max_le | |||
| 57 | #define NUM_POWER_FN_SEGS 8 | 57 | #define NUM_POWER_FN_SEGS 8 |
| 58 | #define NUM_BL_CURVE_SEGS 16 | 58 | #define NUM_BL_CURVE_SEGS 16 |
| 59 | 59 | ||
| 60 | #pragma pack(push, 1) | ||
| 60 | /* NOTE: iRAM is 256B in size */ | 61 | /* NOTE: iRAM is 256B in size */ |
| 61 | struct iram_table_v_2 { | 62 | struct iram_table_v_2 { |
| 62 | /* flags */ | 63 | /* flags */ |
| @@ -100,6 +101,7 @@ struct iram_table_v_2 { | |||
| 100 | uint8_t dummy8; /* 0xfe */ | 101 | uint8_t dummy8; /* 0xfe */ |
| 101 | uint8_t dummy9; /* 0xff */ | 102 | uint8_t dummy9; /* 0xff */ |
| 102 | }; | 103 | }; |
| 104 | #pragma pack(pop) | ||
| 103 | 105 | ||
| 104 | static uint16_t backlight_8_to_16(unsigned int backlight_8bit) | 106 | static uint16_t backlight_8_to_16(unsigned int backlight_8bit) |
| 105 | { | 107 | { |
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c index 54364444ecd1..0c8212902275 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | |||
| @@ -753,6 +753,22 @@ static int vega12_init_smc_table(struct pp_hwmgr *hwmgr) | |||
| 753 | return 0; | 753 | return 0; |
| 754 | } | 754 | } |
| 755 | 755 | ||
| 756 | static int vega12_run_acg_btc(struct pp_hwmgr *hwmgr) | ||
| 757 | { | ||
| 758 | uint32_t result; | ||
| 759 | |||
| 760 | PP_ASSERT_WITH_CODE( | ||
| 761 | smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc) == 0, | ||
| 762 | "[Run_ACG_BTC] Attempt to run ACG BTC failed!", | ||
| 763 | return -EINVAL); | ||
| 764 | |||
| 765 | result = smum_get_argument(hwmgr); | ||
| 766 | PP_ASSERT_WITH_CODE(result == 1, | ||
| 767 | "Failed to run ACG BTC!", return -EINVAL); | ||
| 768 | |||
| 769 | return 0; | ||
| 770 | } | ||
| 771 | |||
| 756 | static int vega12_set_allowed_featuresmask(struct pp_hwmgr *hwmgr) | 772 | static int vega12_set_allowed_featuresmask(struct pp_hwmgr *hwmgr) |
| 757 | { | 773 | { |
| 758 | struct vega12_hwmgr *data = | 774 | struct vega12_hwmgr *data = |
| @@ -931,6 +947,11 @@ static int vega12_enable_dpm_tasks(struct pp_hwmgr *hwmgr) | |||
| 931 | "Failed to initialize SMC table!", | 947 | "Failed to initialize SMC table!", |
| 932 | result = tmp_result); | 948 | result = tmp_result); |
| 933 | 949 | ||
| 950 | tmp_result = vega12_run_acg_btc(hwmgr); | ||
| 951 | PP_ASSERT_WITH_CODE(!tmp_result, | ||
| 952 | "Failed to run ACG BTC!", | ||
| 953 | result = tmp_result); | ||
| 954 | |||
| 934 | result = vega12_enable_all_smu_features(hwmgr); | 955 | result = vega12_enable_all_smu_features(hwmgr); |
| 935 | PP_ASSERT_WITH_CODE(!result, | 956 | PP_ASSERT_WITH_CODE(!result, |
| 936 | "Failed to enable all smu features!", | 957 | "Failed to enable all smu features!", |
