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-rw-r--r--drivers/clk/rockchip/clk-rk3288.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 961d4ee86b75..e8b5a6bfcc8a 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -861,6 +861,9 @@ static const int rk3288_saved_cru_reg_ids[] = {
861 RK3288_CLKSEL_CON(10), 861 RK3288_CLKSEL_CON(10),
862 RK3288_CLKSEL_CON(33), 862 RK3288_CLKSEL_CON(33),
863 RK3288_CLKSEL_CON(37), 863 RK3288_CLKSEL_CON(37),
864
865 /* We turn aclk_dmac1 on for suspend; this will restore it */
866 RK3288_CLKGATE_CON(10),
864}; 867};
865 868
866static u32 rk3288_saved_cru_regs[ARRAY_SIZE(rk3288_saved_cru_reg_ids)]; 869static u32 rk3288_saved_cru_regs[ARRAY_SIZE(rk3288_saved_cru_reg_ids)];
@@ -877,6 +880,14 @@ static int rk3288_clk_suspend(void)
877 } 880 }
878 881
879 /* 882 /*
883 * Going into deep sleep (specifically setting PMU_CLR_DMA in
884 * RK3288_PMU_PWRMODE_CON1) appears to fail unless
885 * "aclk_dmac1" is on.
886 */
887 writel_relaxed(1 << (12 + 16),
888 rk3288_cru_base + RK3288_CLKGATE_CON(10));
889
890 /*
880 * Switch PLLs other than DPLL (for SDRAM) to slow mode to 891 * Switch PLLs other than DPLL (for SDRAM) to slow mode to
881 * avoid crashes on resume. The Mask ROM on the system will 892 * avoid crashes on resume. The Mask ROM on the system will
882 * put APLL, CPLL, and GPLL into slow mode at resume time 893 * put APLL, CPLL, and GPLL into slow mode at resume time