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-rw-r--r--drivers/dma/pl330.c99
-rw-r--r--drivers/gpio/gpio-samsung.c72
-rw-r--r--drivers/input/keyboard/samsung-keypad.c174
-rw-r--r--drivers/rtc/rtc-s3c.c21
-rw-r--r--drivers/tty/serial/Kconfig45
-rw-r--r--drivers/tty/serial/Makefile5
-rw-r--r--drivers/tty/serial/s3c2410.c115
-rw-r--r--drivers/tty/serial/s3c2412.c149
-rw-r--r--drivers/tty/serial/s3c2440.c178
-rw-r--r--drivers/tty/serial/s3c6400.c149
-rw-r--r--drivers/tty/serial/s5pv210.c158
-rw-r--r--drivers/tty/serial/samsung.c639
-rw-r--r--drivers/tty/serial/samsung.h32
13 files changed, 705 insertions, 1131 deletions
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index 571041477ab2..a626e15799a5 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -19,6 +19,7 @@
19#include <linux/amba/pl330.h> 19#include <linux/amba/pl330.h>
20#include <linux/pm_runtime.h> 20#include <linux/pm_runtime.h>
21#include <linux/scatterlist.h> 21#include <linux/scatterlist.h>
22#include <linux/of.h>
22 23
23#define NR_DEFAULT_DESC 16 24#define NR_DEFAULT_DESC 16
24 25
@@ -116,6 +117,9 @@ struct dma_pl330_desc {
116 struct dma_pl330_chan *pchan; 117 struct dma_pl330_chan *pchan;
117}; 118};
118 119
120/* forward declaration */
121static struct amba_driver pl330_driver;
122
119static inline struct dma_pl330_chan * 123static inline struct dma_pl330_chan *
120to_pchan(struct dma_chan *ch) 124to_pchan(struct dma_chan *ch)
121{ 125{
@@ -267,6 +271,32 @@ static void dma_pl330_rqcb(void *token, enum pl330_op_err err)
267 tasklet_schedule(&pch->task); 271 tasklet_schedule(&pch->task);
268} 272}
269 273
274bool pl330_filter(struct dma_chan *chan, void *param)
275{
276 u8 *peri_id;
277
278 if (chan->device->dev->driver != &pl330_driver.drv)
279 return false;
280
281#ifdef CONFIG_OF
282 if (chan->device->dev->of_node) {
283 const __be32 *prop_value;
284 phandle phandle;
285 struct device_node *node;
286
287 prop_value = ((struct property *)param)->value;
288 phandle = be32_to_cpup(prop_value++);
289 node = of_find_node_by_phandle(phandle);
290 return ((chan->private == node) &&
291 (chan->chan_id == be32_to_cpup(prop_value)));
292 }
293#endif
294
295 peri_id = chan->private;
296 return *peri_id == (unsigned)param;
297}
298EXPORT_SYMBOL(pl330_filter);
299
270static int pl330_alloc_chan_resources(struct dma_chan *chan) 300static int pl330_alloc_chan_resources(struct dma_chan *chan)
271{ 301{
272 struct dma_pl330_chan *pch = to_pchan(chan); 302 struct dma_pl330_chan *pch = to_pchan(chan);
@@ -497,7 +527,7 @@ pluck_desc(struct dma_pl330_dmac *pdmac)
497static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch) 527static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
498{ 528{
499 struct dma_pl330_dmac *pdmac = pch->dmac; 529 struct dma_pl330_dmac *pdmac = pch->dmac;
500 struct dma_pl330_peri *peri = pch->chan.private; 530 u8 *peri_id = pch->chan.private;
501 struct dma_pl330_desc *desc; 531 struct dma_pl330_desc *desc;
502 532
503 /* Pluck one desc from the pool of DMAC */ 533 /* Pluck one desc from the pool of DMAC */
@@ -522,13 +552,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
522 desc->txd.cookie = 0; 552 desc->txd.cookie = 0;
523 async_tx_ack(&desc->txd); 553 async_tx_ack(&desc->txd);
524 554
525 if (peri) { 555 desc->req.peri = peri_id ? pch->chan.chan_id : 0;
526 desc->req.rqtype = peri->rqtype;
527 desc->req.peri = pch->chan.chan_id;
528 } else {
529 desc->req.rqtype = MEMTOMEM;
530 desc->req.peri = 0;
531 }
532 556
533 dma_async_tx_descriptor_init(&desc->txd, &pch->chan); 557 dma_async_tx_descriptor_init(&desc->txd, &pch->chan);
534 558
@@ -615,12 +639,14 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
615 case DMA_TO_DEVICE: 639 case DMA_TO_DEVICE:
616 desc->rqcfg.src_inc = 1; 640 desc->rqcfg.src_inc = 1;
617 desc->rqcfg.dst_inc = 0; 641 desc->rqcfg.dst_inc = 0;
642 desc->req.rqtype = MEMTODEV;
618 src = dma_addr; 643 src = dma_addr;
619 dst = pch->fifo_addr; 644 dst = pch->fifo_addr;
620 break; 645 break;
621 case DMA_FROM_DEVICE: 646 case DMA_FROM_DEVICE:
622 desc->rqcfg.src_inc = 0; 647 desc->rqcfg.src_inc = 0;
623 desc->rqcfg.dst_inc = 1; 648 desc->rqcfg.dst_inc = 1;
649 desc->req.rqtype = DEVTOMEM;
624 src = pch->fifo_addr; 650 src = pch->fifo_addr;
625 dst = dma_addr; 651 dst = dma_addr;
626 break; 652 break;
@@ -646,16 +672,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
646{ 672{
647 struct dma_pl330_desc *desc; 673 struct dma_pl330_desc *desc;
648 struct dma_pl330_chan *pch = to_pchan(chan); 674 struct dma_pl330_chan *pch = to_pchan(chan);
649 struct dma_pl330_peri *peri = chan->private;
650 struct pl330_info *pi; 675 struct pl330_info *pi;
651 int burst; 676 int burst;
652 677
653 if (unlikely(!pch || !len)) 678 if (unlikely(!pch || !len))
654 return NULL; 679 return NULL;
655 680
656 if (peri && peri->rqtype != MEMTOMEM)
657 return NULL;
658
659 pi = &pch->dmac->pif; 681 pi = &pch->dmac->pif;
660 682
661 desc = __pl330_prep_dma_memcpy(pch, dst, src, len); 683 desc = __pl330_prep_dma_memcpy(pch, dst, src, len);
@@ -664,6 +686,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
664 686
665 desc->rqcfg.src_inc = 1; 687 desc->rqcfg.src_inc = 1;
666 desc->rqcfg.dst_inc = 1; 688 desc->rqcfg.dst_inc = 1;
689 desc->req.rqtype = MEMTOMEM;
667 690
668 /* Select max possible burst size */ 691 /* Select max possible burst size */
669 burst = pi->pcfg.data_bus_width / 8; 692 burst = pi->pcfg.data_bus_width / 8;
@@ -692,25 +715,14 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
692{ 715{
693 struct dma_pl330_desc *first, *desc = NULL; 716 struct dma_pl330_desc *first, *desc = NULL;
694 struct dma_pl330_chan *pch = to_pchan(chan); 717 struct dma_pl330_chan *pch = to_pchan(chan);
695 struct dma_pl330_peri *peri = chan->private;
696 struct scatterlist *sg; 718 struct scatterlist *sg;
697 unsigned long flags; 719 unsigned long flags;
698 int i; 720 int i;
699 dma_addr_t addr; 721 dma_addr_t addr;
700 722
701 if (unlikely(!pch || !sgl || !sg_len || !peri)) 723 if (unlikely(!pch || !sgl || !sg_len))
702 return NULL; 724 return NULL;
703 725
704 /* Make sure the direction is consistent */
705 if ((direction == DMA_TO_DEVICE &&
706 peri->rqtype != MEMTODEV) ||
707 (direction == DMA_FROM_DEVICE &&
708 peri->rqtype != DEVTOMEM)) {
709 dev_err(pch->dmac->pif.dev, "%s:%d Invalid Direction\n",
710 __func__, __LINE__);
711 return NULL;
712 }
713
714 addr = pch->fifo_addr; 726 addr = pch->fifo_addr;
715 727
716 first = NULL; 728 first = NULL;
@@ -750,11 +762,13 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
750 if (direction == DMA_TO_DEVICE) { 762 if (direction == DMA_TO_DEVICE) {
751 desc->rqcfg.src_inc = 1; 763 desc->rqcfg.src_inc = 1;
752 desc->rqcfg.dst_inc = 0; 764 desc->rqcfg.dst_inc = 0;
765 desc->req.rqtype = MEMTODEV;
753 fill_px(&desc->px, 766 fill_px(&desc->px,
754 addr, sg_dma_address(sg), sg_dma_len(sg)); 767 addr, sg_dma_address(sg), sg_dma_len(sg));
755 } else { 768 } else {
756 desc->rqcfg.src_inc = 0; 769 desc->rqcfg.src_inc = 0;
757 desc->rqcfg.dst_inc = 1; 770 desc->rqcfg.dst_inc = 1;
771 desc->req.rqtype = DEVTOMEM;
758 fill_px(&desc->px, 772 fill_px(&desc->px,
759 sg_dma_address(sg), addr, sg_dma_len(sg)); 773 sg_dma_address(sg), addr, sg_dma_len(sg));
760 } 774 }
@@ -856,32 +870,16 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
856 INIT_LIST_HEAD(&pd->channels); 870 INIT_LIST_HEAD(&pd->channels);
857 871
858 /* Initialize channel parameters */ 872 /* Initialize channel parameters */
859 num_chan = max(pdat ? pdat->nr_valid_peri : 0, (u8)pi->pcfg.num_chan); 873 num_chan = max(pdat ? pdat->nr_valid_peri : (u8)pi->pcfg.num_peri,
874 (u8)pi->pcfg.num_chan);
860 pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL); 875 pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL);
861 876
862 for (i = 0; i < num_chan; i++) { 877 for (i = 0; i < num_chan; i++) {
863 pch = &pdmac->peripherals[i]; 878 pch = &pdmac->peripherals[i];
864 if (pdat) { 879 if (!adev->dev.of_node)
865 struct dma_pl330_peri *peri = &pdat->peri[i]; 880 pch->chan.private = pdat ? &pdat->peri_id[i] : NULL;
866 881 else
867 switch (peri->rqtype) { 882 pch->chan.private = adev->dev.of_node;
868 case MEMTOMEM:
869 dma_cap_set(DMA_MEMCPY, pd->cap_mask);
870 break;
871 case MEMTODEV:
872 case DEVTOMEM:
873 dma_cap_set(DMA_SLAVE, pd->cap_mask);
874 dma_cap_set(DMA_CYCLIC, pd->cap_mask);
875 break;
876 default:
877 dev_err(&adev->dev, "DEVTODEV Not Supported\n");
878 continue;
879 }
880 pch->chan.private = peri;
881 } else {
882 dma_cap_set(DMA_MEMCPY, pd->cap_mask);
883 pch->chan.private = NULL;
884 }
885 883
886 INIT_LIST_HEAD(&pch->work_list); 884 INIT_LIST_HEAD(&pch->work_list);
887 spin_lock_init(&pch->lock); 885 spin_lock_init(&pch->lock);
@@ -894,6 +892,15 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
894 } 892 }
895 893
896 pd->dev = &adev->dev; 894 pd->dev = &adev->dev;
895 if (pdat) {
896 pd->cap_mask = pdat->cap_mask;
897 } else {
898 dma_cap_set(DMA_MEMCPY, pd->cap_mask);
899 if (pi->pcfg.num_peri) {
900 dma_cap_set(DMA_SLAVE, pd->cap_mask);
901 dma_cap_set(DMA_CYCLIC, pd->cap_mask);
902 }
903 }
897 904
898 pd->device_alloc_chan_resources = pl330_alloc_chan_resources; 905 pd->device_alloc_chan_resources = pl330_alloc_chan_resources;
899 pd->device_free_chan_resources = pl330_free_chan_resources; 906 pd->device_free_chan_resources = pl330_free_chan_resources;
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index 866251852719..6b4d23fd158e 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -24,6 +24,9 @@
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25#include <linux/sysdev.h> 25#include <linux/sysdev.h>
26#include <linux/ioport.h> 26#include <linux/ioport.h>
27#include <linux/of.h>
28#include <linux/slab.h>
29#include <linux/of_address.h>
27 30
28#include <asm/irq.h> 31#include <asm/irq.h>
29 32
@@ -2374,6 +2377,63 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {
2374#endif 2377#endif
2375}; 2378};
2376 2379
2380#if defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF)
2381static int exynos4_gpio_xlate(struct gpio_chip *gc, struct device_node *np,
2382 const void *gpio_spec, u32 *flags)
2383{
2384 const __be32 *gpio = gpio_spec;
2385 const u32 n = be32_to_cpup(gpio);
2386 unsigned int pin = gc->base + be32_to_cpu(gpio[0]);
2387
2388 if (WARN_ON(gc->of_gpio_n_cells < 4))
2389 return -EINVAL;
2390
2391 if (n > gc->ngpio)
2392 return -EINVAL;
2393
2394 if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(be32_to_cpu(gpio[1]))))
2395 pr_warn("gpio_xlate: failed to set pin function\n");
2396 if (s3c_gpio_setpull(pin, be32_to_cpu(gpio[2])))
2397 pr_warn("gpio_xlate: failed to set pin pull up/down\n");
2398 if (s5p_gpio_set_drvstr(pin, be32_to_cpu(gpio[3])))
2399 pr_warn("gpio_xlate: failed to set pin drive strength\n");
2400
2401 return n;
2402}
2403
2404static const struct of_device_id exynos4_gpio_dt_match[] __initdata = {
2405 { .compatible = "samsung,exynos4-gpio", },
2406 {}
2407};
2408
2409static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
2410 u64 base, u64 offset)
2411{
2412 struct gpio_chip *gc = &chip->chip;
2413 u64 address;
2414
2415 if (!of_have_populated_dt())
2416 return;
2417
2418 address = chip->base ? base + ((u32)chip->base & 0xfff) : base + offset;
2419 gc->of_node = of_find_matching_node_by_address(NULL,
2420 exynos4_gpio_dt_match, address);
2421 if (!gc->of_node) {
2422 pr_info("gpio: device tree node not found for gpio controller"
2423 " with base address %08llx\n", address);
2424 return;
2425 }
2426 gc->of_gpio_n_cells = 4;
2427 gc->of_xlate = exynos4_gpio_xlate;
2428}
2429#elif defined(CONFIG_ARCH_EXYNOS4)
2430static __init void exynos4_gpiolib_attach_ofnode(struct samsung_gpio_chip *chip,
2431 u64 base, u64 offset)
2432{
2433 return;
2434}
2435#endif /* defined(CONFIG_ARCH_EXYNOS4) && defined(CONFIG_OF) */
2436
2377/* TODO: cleanup soc_is_* */ 2437/* TODO: cleanup soc_is_* */
2378static __init int samsung_gpiolib_init(void) 2438static __init int samsung_gpiolib_init(void)
2379{ 2439{
@@ -2455,6 +2515,10 @@ static __init int samsung_gpiolib_init(void)
2455 chip->config = &exynos4_gpio_cfg; 2515 chip->config = &exynos4_gpio_cfg;
2456 chip->group = group++; 2516 chip->group = group++;
2457 } 2517 }
2518#ifdef CONFIG_CPU_EXYNOS4210
2519 exynos4_gpiolib_attach_ofnode(chip,
2520 EXYNOS4_PA_GPIO1, i * 0x20);
2521#endif
2458 } 2522 }
2459 samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1); 2523 samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1);
2460 2524
@@ -2467,6 +2531,10 @@ static __init int samsung_gpiolib_init(void)
2467 chip->config = &exynos4_gpio_cfg; 2531 chip->config = &exynos4_gpio_cfg;
2468 chip->group = group++; 2532 chip->group = group++;
2469 } 2533 }
2534#ifdef CONFIG_CPU_EXYNOS4210
2535 exynos4_gpiolib_attach_ofnode(chip,
2536 EXYNOS4_PA_GPIO2, i * 0x20);
2537#endif
2470 } 2538 }
2471 samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2); 2539 samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2);
2472 2540
@@ -2479,6 +2547,10 @@ static __init int samsung_gpiolib_init(void)
2479 chip->config = &exynos4_gpio_cfg; 2547 chip->config = &exynos4_gpio_cfg;
2480 chip->group = group++; 2548 chip->group = group++;
2481 } 2549 }
2550#ifdef CONFIG_CPU_EXYNOS4210
2551 exynos4_gpiolib_attach_ofnode(chip,
2552 EXYNOS4_PA_GPIO3, i * 0x20);
2553#endif
2482 } 2554 }
2483 samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3); 2555 samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3);
2484 2556
diff --git a/drivers/input/keyboard/samsung-keypad.c b/drivers/input/keyboard/samsung-keypad.c
index f689f49e3109..8a0060cd3982 100644
--- a/drivers/input/keyboard/samsung-keypad.c
+++ b/drivers/input/keyboard/samsung-keypad.c
@@ -21,6 +21,8 @@
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/of.h>
25#include <linux/of_gpio.h>
24#include <linux/sched.h> 26#include <linux/sched.h>
25#include <plat/keypad.h> 27#include <plat/keypad.h>
26 28
@@ -68,31 +70,26 @@ struct samsung_keypad {
68 wait_queue_head_t wait; 70 wait_queue_head_t wait;
69 bool stopped; 71 bool stopped;
70 int irq; 72 int irq;
73 enum samsung_keypad_type type;
71 unsigned int row_shift; 74 unsigned int row_shift;
72 unsigned int rows; 75 unsigned int rows;
73 unsigned int cols; 76 unsigned int cols;
74 unsigned int row_state[SAMSUNG_MAX_COLS]; 77 unsigned int row_state[SAMSUNG_MAX_COLS];
78#ifdef CONFIG_OF
79 int row_gpios[SAMSUNG_MAX_ROWS];
80 int col_gpios[SAMSUNG_MAX_COLS];
81#endif
75 unsigned short keycodes[]; 82 unsigned short keycodes[];
76}; 83};
77 84
78static int samsung_keypad_is_s5pv210(struct device *dev)
79{
80 struct platform_device *pdev = to_platform_device(dev);
81 enum samsung_keypad_type type =
82 platform_get_device_id(pdev)->driver_data;
83
84 return type == KEYPAD_TYPE_S5PV210;
85}
86
87static void samsung_keypad_scan(struct samsung_keypad *keypad, 85static void samsung_keypad_scan(struct samsung_keypad *keypad,
88 unsigned int *row_state) 86 unsigned int *row_state)
89{ 87{
90 struct device *dev = keypad->input_dev->dev.parent;
91 unsigned int col; 88 unsigned int col;
92 unsigned int val; 89 unsigned int val;
93 90
94 for (col = 0; col < keypad->cols; col++) { 91 for (col = 0; col < keypad->cols; col++) {
95 if (samsung_keypad_is_s5pv210(dev)) { 92 if (keypad->type == KEYPAD_TYPE_S5PV210) {
96 val = S5PV210_KEYIFCOLEN_MASK; 93 val = S5PV210_KEYIFCOLEN_MASK;
97 val &= ~(1 << col) << 8; 94 val &= ~(1 << col) << 8;
98 } else { 95 } else {
@@ -235,6 +232,126 @@ static void samsung_keypad_close(struct input_dev *input_dev)
235 samsung_keypad_stop(keypad); 232 samsung_keypad_stop(keypad);
236} 233}
237 234
235#ifdef CONFIG_OF
236static struct samsung_keypad_platdata *samsung_keypad_parse_dt(
237 struct device *dev)
238{
239 struct samsung_keypad_platdata *pdata;
240 struct matrix_keymap_data *keymap_data;
241 uint32_t *keymap, num_rows = 0, num_cols = 0;
242 struct device_node *np = dev->of_node, *key_np;
243 unsigned int key_count = 0;
244
245 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
246 if (!pdata) {
247 dev_err(dev, "could not allocate memory for platform data\n");
248 return NULL;
249 }
250
251 of_property_read_u32(np, "samsung,keypad-num-rows", &num_rows);
252 of_property_read_u32(np, "samsung,keypad-num-columns", &num_cols);
253 if (!num_rows || !num_cols) {
254 dev_err(dev, "number of keypad rows/columns not specified\n");
255 return NULL;
256 }
257 pdata->rows = num_rows;
258 pdata->cols = num_cols;
259
260 keymap_data = devm_kzalloc(dev, sizeof(*keymap_data), GFP_KERNEL);
261 if (!keymap_data) {
262 dev_err(dev, "could not allocate memory for keymap data\n");
263 return NULL;
264 }
265 pdata->keymap_data = keymap_data;
266
267 for_each_child_of_node(np, key_np)
268 key_count++;
269
270 keymap_data->keymap_size = key_count;
271 keymap = devm_kzalloc(dev, sizeof(uint32_t) * key_count, GFP_KERNEL);
272 if (!keymap) {
273 dev_err(dev, "could not allocate memory for keymap\n");
274 return NULL;
275 }
276 keymap_data->keymap = keymap;
277
278 for_each_child_of_node(np, key_np) {
279 u32 row, col, key_code;
280 of_property_read_u32(key_np, "keypad,row", &row);
281 of_property_read_u32(key_np, "keypad,column", &col);
282 of_property_read_u32(key_np, "linux,code", &key_code);
283 *keymap++ = KEY(row, col, key_code);
284 }
285
286 if (of_get_property(np, "linux,input-no-autorepeat", NULL))
287 pdata->no_autorepeat = true;
288 if (of_get_property(np, "linux,input-wakeup", NULL))
289 pdata->wakeup = true;
290
291 return pdata;
292}
293
294static void samsung_keypad_parse_dt_gpio(struct device *dev,
295 struct samsung_keypad *keypad)
296{
297 struct device_node *np = dev->of_node;
298 int gpio, ret, row, col;
299
300 for (row = 0; row < keypad->rows; row++) {
301 gpio = of_get_named_gpio(np, "row-gpios", row);
302 keypad->row_gpios[row] = gpio;
303 if (!gpio_is_valid(gpio)) {
304 dev_err(dev, "keypad row[%d]: invalid gpio %d\n",
305 row, gpio);
306 continue;
307 }
308
309 ret = gpio_request(gpio, "keypad-row");
310 if (ret)
311 dev_err(dev, "keypad row[%d] gpio request failed\n",
312 row);
313 }
314
315 for (col = 0; col < keypad->cols; col++) {
316 gpio = of_get_named_gpio(np, "col-gpios", col);
317 keypad->col_gpios[col] = gpio;
318 if (!gpio_is_valid(gpio)) {
319 dev_err(dev, "keypad column[%d]: invalid gpio %d\n",
320 col, gpio);
321 continue;
322 }
323
324 ret = gpio_request(gpio, "keypad-col");
325 if (ret)
326 dev_err(dev, "keypad column[%d] gpio request failed\n",
327 col);
328 }
329}
330
331static void samsung_keypad_dt_gpio_free(struct samsung_keypad *keypad)
332{
333 int cnt;
334
335 for (cnt = 0; cnt < keypad->rows; cnt++)
336 if (gpio_is_valid(keypad->row_gpios[cnt]))
337 gpio_free(keypad->row_gpios[cnt]);
338
339 for (cnt = 0; cnt < keypad->cols; cnt++)
340 if (gpio_is_valid(keypad->col_gpios[cnt]))
341 gpio_free(keypad->col_gpios[cnt]);
342}
343#else
344static
345struct samsung_keypad_platdata *samsung_keypad_parse_dt(struct device *dev)
346{
347 return NULL;
348}
349
350static void samsung_keypad_dt_gpio_free(struct samsung_keypad *keypad)
351{
352}
353#endif
354
238static int __devinit samsung_keypad_probe(struct platform_device *pdev) 355static int __devinit samsung_keypad_probe(struct platform_device *pdev)
239{ 356{
240 const struct samsung_keypad_platdata *pdata; 357 const struct samsung_keypad_platdata *pdata;
@@ -246,7 +363,10 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev)
246 unsigned int keymap_size; 363 unsigned int keymap_size;
247 int error; 364 int error;
248 365
249 pdata = pdev->dev.platform_data; 366 if (pdev->dev.of_node)
367 pdata = samsung_keypad_parse_dt(&pdev->dev);
368 else
369 pdata = pdev->dev.platform_data;
250 if (!pdata) { 370 if (!pdata) {
251 dev_err(&pdev->dev, "no platform data defined\n"); 371 dev_err(&pdev->dev, "no platform data defined\n");
252 return -EINVAL; 372 return -EINVAL;
@@ -303,6 +423,16 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev)
303 keypad->cols = pdata->cols; 423 keypad->cols = pdata->cols;
304 init_waitqueue_head(&keypad->wait); 424 init_waitqueue_head(&keypad->wait);
305 425
426 if (pdev->dev.of_node) {
427#ifdef CONFIG_OF
428 samsung_keypad_parse_dt_gpio(&pdev->dev, keypad);
429 keypad->type = of_device_is_compatible(pdev->dev.of_node,
430 "samsung,s5pv210-keypad");
431#endif
432 } else {
433 keypad->type = platform_get_device_id(pdev)->driver_data;
434 }
435
306 input_dev->name = pdev->name; 436 input_dev->name = pdev->name;
307 input_dev->id.bustype = BUS_HOST; 437 input_dev->id.bustype = BUS_HOST;
308 input_dev->dev.parent = &pdev->dev; 438 input_dev->dev.parent = &pdev->dev;
@@ -343,12 +473,19 @@ static int __devinit samsung_keypad_probe(struct platform_device *pdev)
343 473
344 device_init_wakeup(&pdev->dev, pdata->wakeup); 474 device_init_wakeup(&pdev->dev, pdata->wakeup);
345 platform_set_drvdata(pdev, keypad); 475 platform_set_drvdata(pdev, keypad);
476
477 if (pdev->dev.of_node) {
478 devm_kfree(&pdev->dev, (void *)pdata->keymap_data->keymap);
479 devm_kfree(&pdev->dev, (void *)pdata->keymap_data);
480 devm_kfree(&pdev->dev, (void *)pdata);
481 }
346 return 0; 482 return 0;
347 483
348err_free_irq: 484err_free_irq:
349 free_irq(keypad->irq, keypad); 485 free_irq(keypad->irq, keypad);
350err_put_clk: 486err_put_clk:
351 clk_put(keypad->clk); 487 clk_put(keypad->clk);
488 samsung_keypad_dt_gpio_free(keypad);
352err_unmap_base: 489err_unmap_base:
353 iounmap(keypad->base); 490 iounmap(keypad->base);
354err_free_mem: 491err_free_mem:
@@ -374,6 +511,7 @@ static int __devexit samsung_keypad_remove(struct platform_device *pdev)
374 free_irq(keypad->irq, keypad); 511 free_irq(keypad->irq, keypad);
375 512
376 clk_put(keypad->clk); 513 clk_put(keypad->clk);
514 samsung_keypad_dt_gpio_free(keypad);
377 515
378 iounmap(keypad->base); 516 iounmap(keypad->base);
379 kfree(keypad); 517 kfree(keypad);
@@ -447,6 +585,17 @@ static const struct dev_pm_ops samsung_keypad_pm_ops = {
447}; 585};
448#endif 586#endif
449 587
588#ifdef CONFIG_OF
589static const struct of_device_id samsung_keypad_dt_match[] = {
590 { .compatible = "samsung,s3c6410-keypad" },
591 { .compatible = "samsung,s5pv210-keypad" },
592 {},
593};
594MODULE_DEVICE_TABLE(of, samsung_keypad_dt_match);
595#else
596#define samsung_keypad_dt_match NULL
597#endif
598
450static struct platform_device_id samsung_keypad_driver_ids[] = { 599static struct platform_device_id samsung_keypad_driver_ids[] = {
451 { 600 {
452 .name = "samsung-keypad", 601 .name = "samsung-keypad",
@@ -465,6 +614,7 @@ static struct platform_driver samsung_keypad_driver = {
465 .driver = { 614 .driver = {
466 .name = "samsung-keypad", 615 .name = "samsung-keypad",
467 .owner = THIS_MODULE, 616 .owner = THIS_MODULE,
617 .of_match_table = samsung_keypad_dt_match,
468#ifdef CONFIG_PM 618#ifdef CONFIG_PM
469 .pm = &samsung_keypad_pm_ops, 619 .pm = &samsung_keypad_pm_ops,
470#endif 620#endif
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 5b979d9cc332..175067a17c46 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -25,6 +25,7 @@
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/log2.h> 26#include <linux/log2.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/of.h>
28 29
29#include <mach/hardware.h> 30#include <mach/hardware.h>
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
@@ -507,7 +508,13 @@ static int __devinit s3c_rtc_probe(struct platform_device *pdev)
507 goto err_nortc; 508 goto err_nortc;
508 } 509 }
509 510
510 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data; 511#ifdef CONFIG_OF
512 if (pdev->dev.of_node)
513 s3c_rtc_cpu_type = of_device_is_compatible(pdev->dev.of_node,
514 "samsung,s3c6410-rtc") ? TYPE_S3C64XX : TYPE_S3C2410;
515 else
516#endif
517 s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
511 518
512 /* Check RTC Time */ 519 /* Check RTC Time */
513 520
@@ -629,6 +636,17 @@ static int s3c_rtc_resume(struct platform_device *pdev)
629#define s3c_rtc_resume NULL 636#define s3c_rtc_resume NULL
630#endif 637#endif
631 638
639#ifdef CONFIG_OF
640static const struct of_device_id s3c_rtc_dt_match[] = {
641 { .compatible = "samsung,s3c2410-rtc" },
642 { .compatible = "samsung,s3c6410-rtc" },
643 {},
644};
645MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
646#else
647#define s3c_rtc_dt_match NULL
648#endif
649
632static struct platform_device_id s3c_rtc_driver_ids[] = { 650static struct platform_device_id s3c_rtc_driver_ids[] = {
633 { 651 {
634 .name = "s3c2410-rtc", 652 .name = "s3c2410-rtc",
@@ -651,6 +669,7 @@ static struct platform_driver s3c_rtc_driver = {
651 .driver = { 669 .driver = {
652 .name = "s3c-rtc", 670 .name = "s3c-rtc",
653 .owner = THIS_MODULE, 671 .owner = THIS_MODULE,
672 .of_match_table = s3c_rtc_dt_match,
654 }, 673 },
655}; 674};
656 675
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 925a1e547a83..fb89b85d0d81 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -457,7 +457,7 @@ config SERIAL_SAMSUNG
457config SERIAL_SAMSUNG_UARTS_4 457config SERIAL_SAMSUNG_UARTS_4
458 bool 458 bool
459 depends on ARM && PLAT_SAMSUNG 459 depends on ARM && PLAT_SAMSUNG
460 default y if CPU_S3C2443 460 default y if !(CPU_S3C2410 || SERIAL_S3C2412 || CPU_S3C2440 || CPU_S3C2442)
461 help 461 help
462 Internal node for the common case of 4 Samsung compatible UARTs 462 Internal node for the common case of 4 Samsung compatible UARTs
463 463
@@ -465,7 +465,7 @@ config SERIAL_SAMSUNG_UARTS
465 int 465 int
466 depends on ARM && PLAT_SAMSUNG 466 depends on ARM && PLAT_SAMSUNG
467 default 6 if ARCH_S5P6450 467 default 6 if ARCH_S5P6450
468 default 4 if SERIAL_SAMSUNG_UARTS_4 468 default 4 if SERIAL_SAMSUNG_UARTS_4 || CPU_S3C2416
469 default 3 469 default 3
470 help 470 help
471 Select the number of available UART ports for the Samsung S3C 471 Select the number of available UART ports for the Samsung S3C
@@ -495,47 +495,6 @@ config SERIAL_SAMSUNG_CONSOLE
495 your boot loader about how to pass options to the kernel at 495 your boot loader about how to pass options to the kernel at
496 boot time.) 496 boot time.)
497 497
498config SERIAL_S3C2410
499 tristate "Samsung S3C2410 Serial port support"
500 depends on SERIAL_SAMSUNG && CPU_S3C2410
501 default y if CPU_S3C2410
502 help
503 Serial port support for the Samsung S3C2410 SoC
504
505config SERIAL_S3C2412
506 tristate "Samsung S3C2412/S3C2413 Serial port support"
507 depends on SERIAL_SAMSUNG && CPU_S3C2412
508 default y if CPU_S3C2412
509 help
510 Serial port support for the Samsung S3C2412 and S3C2413 SoC
511
512config SERIAL_S3C2440
513 tristate "Samsung S3C2440/S3C2442/S3C2416 Serial port support"
514 depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442 || CPU_S3C2416)
515 default y if CPU_S3C2440
516 default y if CPU_S3C2442
517 select SERIAL_SAMSUNG_UARTS_4 if CPU_S3C2416
518 help
519 Serial port support for the Samsung S3C2440, S3C2416 and S3C2442 SoC
520
521config SERIAL_S3C6400
522 tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support"
523 depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100)
524 select SERIAL_SAMSUNG_UARTS_4
525 default y
526 help
527 Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450
528 and S5PC100 SoCs
529
530config SERIAL_S5PV210
531 tristate "Samsung S5PV210 Serial port support"
532 depends on SERIAL_SAMSUNG && (CPU_S5PV210 || CPU_EXYNOS4210 || SOC_EXYNOS4212)
533 select SERIAL_SAMSUNG_UARTS_4 if (CPU_S5PV210 || CPU_EXYNOS4210 || SOC_EXYNOS4212)
534 default y
535 help
536 Serial port support for Samsung's S5P Family of SoC's
537
538
539config SERIAL_MAX3100 498config SERIAL_MAX3100
540 tristate "MAX3100 support" 499 tristate "MAX3100 support"
541 depends on SPI 500 depends on SPI
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index e10cf5b54b6d..84bc2e5a57be 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -39,11 +39,6 @@ obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o
39obj-$(CONFIG_SERIAL_BFIN) += bfin_uart.o 39obj-$(CONFIG_SERIAL_BFIN) += bfin_uart.o
40obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o 40obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o
41obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o 41obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o
42obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o
43obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o
44obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
45obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
46obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
47obj-$(CONFIG_SERIAL_MAX3100) += max3100.o 42obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
48obj-$(CONFIG_SERIAL_MAX3107) += max3107.o 43obj-$(CONFIG_SERIAL_MAX3107) += max3107.o
49obj-$(CONFIG_SERIAL_MAX3107_AAVA) += max3107-aava.o 44obj-$(CONFIG_SERIAL_MAX3107_AAVA) += max3107-aava.o
diff --git a/drivers/tty/serial/s3c2410.c b/drivers/tty/serial/s3c2410.c
deleted file mode 100644
index b1d7e7c1849d..000000000000
--- a/drivers/tty/serial/s3c2410.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * Driver for Samsung S3C2410 SoC onboard UARTs.
3 *
4 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/module.h>
13#include <linux/ioport.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19
20#include <asm/irq.h>
21#include <mach/hardware.h>
22
23#include <plat/regs-serial.h>
24#include <mach/regs-gpio.h>
25
26#include "samsung.h"
27
28static int s3c2410_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 if (strcmp(clk->name, "uclk") == 0)
34 ucon |= S3C2410_UCON_UCLK;
35 else
36 ucon &= ~S3C2410_UCON_UCLK;
37
38 wr_regl(port, S3C2410_UCON, ucon);
39 return 0;
40}
41
42static int s3c2410_serial_getsource(struct uart_port *port,
43 struct s3c24xx_uart_clksrc *clk)
44{
45 unsigned long ucon = rd_regl(port, S3C2410_UCON);
46
47 clk->divisor = 1;
48 clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk";
49
50 return 0;
51}
52
53static int s3c2410_serial_resetport(struct uart_port *port,
54 struct s3c2410_uartcfg *cfg)
55{
56 dbg("s3c2410_serial_resetport: port=%p (%08lx), cfg=%p\n",
57 port, port->mapbase, cfg);
58
59 wr_regl(port, S3C2410_UCON, cfg->ucon);
60 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
61
62 /* reset both fifos */
63
64 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
65 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
66
67 return 0;
68}
69
70static struct s3c24xx_uart_info s3c2410_uart_inf = {
71 .name = "Samsung S3C2410 UART",
72 .type = PORT_S3C2410,
73 .fifosize = 16,
74 .rx_fifomask = S3C2410_UFSTAT_RXMASK,
75 .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT,
76 .rx_fifofull = S3C2410_UFSTAT_RXFULL,
77 .tx_fifofull = S3C2410_UFSTAT_TXFULL,
78 .tx_fifomask = S3C2410_UFSTAT_TXMASK,
79 .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT,
80 .get_clksrc = s3c2410_serial_getsource,
81 .set_clksrc = s3c2410_serial_setsource,
82 .reset_port = s3c2410_serial_resetport,
83};
84
85static int s3c2410_serial_probe(struct platform_device *dev)
86{
87 return s3c24xx_serial_probe(dev, &s3c2410_uart_inf);
88}
89
90static struct platform_driver s3c2410_serial_driver = {
91 .probe = s3c2410_serial_probe,
92 .remove = __devexit_p(s3c24xx_serial_remove),
93 .driver = {
94 .name = "s3c2410-uart",
95 .owner = THIS_MODULE,
96 },
97};
98
99static int __init s3c2410_serial_init(void)
100{
101 return s3c24xx_serial_init(&s3c2410_serial_driver, &s3c2410_uart_inf);
102}
103
104static void __exit s3c2410_serial_exit(void)
105{
106 platform_driver_unregister(&s3c2410_serial_driver);
107}
108
109module_init(s3c2410_serial_init);
110module_exit(s3c2410_serial_exit);
111
112MODULE_LICENSE("GPL v2");
113MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
114MODULE_DESCRIPTION("Samsung S3C2410 SoC Serial port driver");
115MODULE_ALIAS("platform:s3c2410-uart");
diff --git a/drivers/tty/serial/s3c2412.c b/drivers/tty/serial/s3c2412.c
deleted file mode 100644
index 2234bf9ced45..000000000000
--- a/drivers/tty/serial/s3c2412.c
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs.
3 *
4 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/module.h>
13#include <linux/ioport.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19
20#include <asm/irq.h>
21#include <mach/hardware.h>
22
23#include <plat/regs-serial.h>
24#include <mach/regs-gpio.h>
25
26#include "samsung.h"
27
28static int s3c2412_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 unsigned long ucon = rd_regl(port, S3C2410_UCON);
32
33 ucon &= ~S3C2412_UCON_CLKMASK;
34
35 if (strcmp(clk->name, "uclk") == 0)
36 ucon |= S3C2440_UCON_UCLK;
37 else if (strcmp(clk->name, "pclk") == 0)
38 ucon |= S3C2440_UCON_PCLK;
39 else if (strcmp(clk->name, "usysclk") == 0)
40 ucon |= S3C2412_UCON_USYSCLK;
41 else {
42 printk(KERN_ERR "unknown clock source %s\n", clk->name);
43 return -EINVAL;
44 }
45
46 wr_regl(port, S3C2410_UCON, ucon);
47 return 0;
48}
49
50
51static int s3c2412_serial_getsource(struct uart_port *port,
52 struct s3c24xx_uart_clksrc *clk)
53{
54 unsigned long ucon = rd_regl(port, S3C2410_UCON);
55
56 switch (ucon & S3C2412_UCON_CLKMASK) {
57 case S3C2412_UCON_UCLK:
58 clk->divisor = 1;
59 clk->name = "uclk";
60 break;
61
62 case S3C2412_UCON_PCLK:
63 case S3C2412_UCON_PCLK2:
64 clk->divisor = 1;
65 clk->name = "pclk";
66 break;
67
68 case S3C2412_UCON_USYSCLK:
69 clk->divisor = 1;
70 clk->name = "usysclk";
71 break;
72 }
73
74 return 0;
75}
76
77static int s3c2412_serial_resetport(struct uart_port *port,
78 struct s3c2410_uartcfg *cfg)
79{
80 unsigned long ucon = rd_regl(port, S3C2410_UCON);
81
82 dbg("%s: port=%p (%08lx), cfg=%p\n",
83 __func__, port, port->mapbase, cfg);
84
85 /* ensure we don't change the clock settings... */
86
87 ucon &= S3C2412_UCON_CLKMASK;
88
89 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
90 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
91
92 /* reset both fifos */
93
94 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
95 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
96
97 return 0;
98}
99
100static struct s3c24xx_uart_info s3c2412_uart_inf = {
101 .name = "Samsung S3C2412 UART",
102 .type = PORT_S3C2412,
103 .fifosize = 64,
104 .has_divslot = 1,
105 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
106 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
107 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
108 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
109 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
110 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
111 .get_clksrc = s3c2412_serial_getsource,
112 .set_clksrc = s3c2412_serial_setsource,
113 .reset_port = s3c2412_serial_resetport,
114};
115
116/* device management */
117
118static int s3c2412_serial_probe(struct platform_device *dev)
119{
120 dbg("s3c2440_serial_probe: dev=%p\n", dev);
121 return s3c24xx_serial_probe(dev, &s3c2412_uart_inf);
122}
123
124static struct platform_driver s3c2412_serial_driver = {
125 .probe = s3c2412_serial_probe,
126 .remove = __devexit_p(s3c24xx_serial_remove),
127 .driver = {
128 .name = "s3c2412-uart",
129 .owner = THIS_MODULE,
130 },
131};
132
133static inline int s3c2412_serial_init(void)
134{
135 return s3c24xx_serial_init(&s3c2412_serial_driver, &s3c2412_uart_inf);
136}
137
138static inline void s3c2412_serial_exit(void)
139{
140 platform_driver_unregister(&s3c2412_serial_driver);
141}
142
143module_init(s3c2412_serial_init);
144module_exit(s3c2412_serial_exit);
145
146MODULE_DESCRIPTION("Samsung S3C2412,S3C2413 SoC Serial port driver");
147MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
148MODULE_LICENSE("GPL v2");
149MODULE_ALIAS("platform:s3c2412-uart");
diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c
deleted file mode 100644
index 1d0c324b813f..000000000000
--- a/drivers/tty/serial/s3c2440.c
+++ /dev/null
@@ -1,178 +0,0 @@
1/*
2 * Driver for Samsung S3C2440 and S3C2442 SoC onboard UARTs.
3 *
4 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/module.h>
13#include <linux/ioport.h>
14#include <linux/io.h>
15#include <linux/platform_device.h>
16#include <linux/init.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19
20#include <asm/irq.h>
21#include <mach/hardware.h>
22
23#include <plat/regs-serial.h>
24#include <mach/regs-gpio.h>
25
26#include "samsung.h"
27
28
29static int s3c2440_serial_setsource(struct uart_port *port,
30 struct s3c24xx_uart_clksrc *clk)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 /* todo - proper fclk<>nonfclk switch. */
35
36 ucon &= ~S3C2440_UCON_CLKMASK;
37
38 if (strcmp(clk->name, "uclk") == 0)
39 ucon |= S3C2440_UCON_UCLK;
40 else if (strcmp(clk->name, "pclk") == 0)
41 ucon |= S3C2440_UCON_PCLK;
42 else if (strcmp(clk->name, "fclk") == 0)
43 ucon |= S3C2440_UCON_FCLK;
44 else {
45 printk(KERN_ERR "unknown clock source %s\n", clk->name);
46 return -EINVAL;
47 }
48
49 wr_regl(port, S3C2410_UCON, ucon);
50 return 0;
51}
52
53
54static int s3c2440_serial_getsource(struct uart_port *port,
55 struct s3c24xx_uart_clksrc *clk)
56{
57 unsigned long ucon = rd_regl(port, S3C2410_UCON);
58 unsigned long ucon0, ucon1, ucon2;
59
60 switch (ucon & S3C2440_UCON_CLKMASK) {
61 case S3C2440_UCON_UCLK:
62 clk->divisor = 1;
63 clk->name = "uclk";
64 break;
65
66 case S3C2440_UCON_PCLK:
67 case S3C2440_UCON_PCLK2:
68 clk->divisor = 1;
69 clk->name = "pclk";
70 break;
71
72 case S3C2440_UCON_FCLK:
73 /* the fun of calculating the uart divisors on
74 * the s3c2440 */
75
76 ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON);
77 ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON);
78 ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON);
79
80 printk("ucons: %08lx, %08lx, %08lx\n", ucon0, ucon1, ucon2);
81
82 ucon0 &= S3C2440_UCON0_DIVMASK;
83 ucon1 &= S3C2440_UCON1_DIVMASK;
84 ucon2 &= S3C2440_UCON2_DIVMASK;
85
86 if (ucon0 != 0) {
87 clk->divisor = ucon0 >> S3C2440_UCON_DIVSHIFT;
88 clk->divisor += 6;
89 } else if (ucon1 != 0) {
90 clk->divisor = ucon1 >> S3C2440_UCON_DIVSHIFT;
91 clk->divisor += 21;
92 } else if (ucon2 != 0) {
93 clk->divisor = ucon2 >> S3C2440_UCON_DIVSHIFT;
94 clk->divisor += 36;
95 } else {
96 /* manual calims 44, seems to be 9 */
97 clk->divisor = 9;
98 }
99
100 clk->name = "fclk";
101 break;
102 }
103
104 return 0;
105}
106
107static int s3c2440_serial_resetport(struct uart_port *port,
108 struct s3c2410_uartcfg *cfg)
109{
110 unsigned long ucon = rd_regl(port, S3C2410_UCON);
111
112 dbg("s3c2440_serial_resetport: port=%p (%08lx), cfg=%p\n",
113 port, port->mapbase, cfg);
114
115 /* ensure we don't change the clock settings... */
116
117 ucon &= (S3C2440_UCON0_DIVMASK | (3<<10));
118
119 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
120 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
121
122 /* reset both fifos */
123
124 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
125 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
126
127 return 0;
128}
129
130static struct s3c24xx_uart_info s3c2440_uart_inf = {
131 .name = "Samsung S3C2440 UART",
132 .type = PORT_S3C2440,
133 .fifosize = 64,
134 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
135 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
136 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
137 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
138 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
139 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
140 .get_clksrc = s3c2440_serial_getsource,
141 .set_clksrc = s3c2440_serial_setsource,
142 .reset_port = s3c2440_serial_resetport,
143};
144
145/* device management */
146
147static int s3c2440_serial_probe(struct platform_device *dev)
148{
149 dbg("s3c2440_serial_probe: dev=%p\n", dev);
150 return s3c24xx_serial_probe(dev, &s3c2440_uart_inf);
151}
152
153static struct platform_driver s3c2440_serial_driver = {
154 .probe = s3c2440_serial_probe,
155 .remove = __devexit_p(s3c24xx_serial_remove),
156 .driver = {
157 .name = "s3c2440-uart",
158 .owner = THIS_MODULE,
159 },
160};
161
162static int __init s3c2440_serial_init(void)
163{
164 return s3c24xx_serial_init(&s3c2440_serial_driver, &s3c2440_uart_inf);
165}
166
167static void __exit s3c2440_serial_exit(void)
168{
169 platform_driver_unregister(&s3c2440_serial_driver);
170}
171
172module_init(s3c2440_serial_init);
173module_exit(s3c2440_serial_exit);
174
175MODULE_DESCRIPTION("Samsung S3C2440,S3C2442 SoC Serial port driver");
176MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
177MODULE_LICENSE("GPL v2");
178MODULE_ALIAS("platform:s3c2440-uart");
diff --git a/drivers/tty/serial/s3c6400.c b/drivers/tty/serial/s3c6400.c
deleted file mode 100644
index e2f6913d84d5..000000000000
--- a/drivers/tty/serial/s3c6400.c
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * Driver for Samsung S3C6400 and S3C6410 SoC onboard UARTs.
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/module.h>
15#include <linux/ioport.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/serial.h>
21
22#include <asm/irq.h>
23#include <mach/hardware.h>
24
25#include <plat/regs-serial.h>
26
27#include "samsung.h"
28
29static int s3c6400_serial_setsource(struct uart_port *port,
30 struct s3c24xx_uart_clksrc *clk)
31{
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 if (strcmp(clk->name, "uclk0") == 0) {
35 ucon &= ~S3C6400_UCON_CLKMASK;
36 ucon |= S3C6400_UCON_UCLK0;
37 } else if (strcmp(clk->name, "uclk1") == 0)
38 ucon |= S3C6400_UCON_UCLK1;
39 else if (strcmp(clk->name, "pclk") == 0) {
40 /* See notes about transitioning from UCLK to PCLK */
41 ucon &= ~S3C6400_UCON_UCLK0;
42 } else {
43 printk(KERN_ERR "unknown clock source %s\n", clk->name);
44 return -EINVAL;
45 }
46
47 wr_regl(port, S3C2410_UCON, ucon);
48 return 0;
49}
50
51
52static int s3c6400_serial_getsource(struct uart_port *port,
53 struct s3c24xx_uart_clksrc *clk)
54{
55 u32 ucon = rd_regl(port, S3C2410_UCON);
56
57 clk->divisor = 1;
58
59 switch (ucon & S3C6400_UCON_CLKMASK) {
60 case S3C6400_UCON_UCLK0:
61 clk->name = "uclk0";
62 break;
63
64 case S3C6400_UCON_UCLK1:
65 clk->name = "uclk1";
66 break;
67
68 case S3C6400_UCON_PCLK:
69 case S3C6400_UCON_PCLK2:
70 clk->name = "pclk";
71 break;
72 }
73
74 return 0;
75}
76
77static int s3c6400_serial_resetport(struct uart_port *port,
78 struct s3c2410_uartcfg *cfg)
79{
80 unsigned long ucon = rd_regl(port, S3C2410_UCON);
81
82 dbg("s3c6400_serial_resetport: port=%p (%08lx), cfg=%p\n",
83 port, port->mapbase, cfg);
84
85 /* ensure we don't change the clock settings... */
86
87 ucon &= S3C6400_UCON_CLKMASK;
88
89 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
90 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
91
92 /* reset both fifos */
93
94 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
95 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
96
97 return 0;
98}
99
100static struct s3c24xx_uart_info s3c6400_uart_inf = {
101 .name = "Samsung S3C6400 UART",
102 .type = PORT_S3C6400,
103 .fifosize = 64,
104 .has_divslot = 1,
105 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
106 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
107 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
108 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
109 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
110 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
111 .get_clksrc = s3c6400_serial_getsource,
112 .set_clksrc = s3c6400_serial_setsource,
113 .reset_port = s3c6400_serial_resetport,
114};
115
116/* device management */
117
118static int s3c6400_serial_probe(struct platform_device *dev)
119{
120 dbg("s3c6400_serial_probe: dev=%p\n", dev);
121 return s3c24xx_serial_probe(dev, &s3c6400_uart_inf);
122}
123
124static struct platform_driver s3c6400_serial_driver = {
125 .probe = s3c6400_serial_probe,
126 .remove = __devexit_p(s3c24xx_serial_remove),
127 .driver = {
128 .name = "s3c6400-uart",
129 .owner = THIS_MODULE,
130 },
131};
132
133static int __init s3c6400_serial_init(void)
134{
135 return s3c24xx_serial_init(&s3c6400_serial_driver, &s3c6400_uart_inf);
136}
137
138static void __exit s3c6400_serial_exit(void)
139{
140 platform_driver_unregister(&s3c6400_serial_driver);
141}
142
143module_init(s3c6400_serial_init);
144module_exit(s3c6400_serial_exit);
145
146MODULE_DESCRIPTION("Samsung S3C6400,S3C6410 SoC Serial port driver");
147MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
148MODULE_LICENSE("GPL v2");
149MODULE_ALIAS("platform:s3c6400-uart");
diff --git a/drivers/tty/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
deleted file mode 100644
index 8b0b888a1b76..000000000000
--- a/drivers/tty/serial/s5pv210.c
+++ /dev/null
@@ -1,158 +0,0 @@
1/*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com/
4 *
5 * Based on drivers/serial/s3c6400.c
6 *
7 * Driver for Samsung S5PV210 SoC UARTs.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/module.h>
15#include <linux/ioport.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/serial.h>
21#include <linux/delay.h>
22
23#include <asm/irq.h>
24#include <mach/hardware.h>
25#include <plat/regs-serial.h>
26#include "samsung.h"
27
28static int s5pv210_serial_setsource(struct uart_port *port,
29 struct s3c24xx_uart_clksrc *clk)
30{
31 struct s3c2410_uartcfg *cfg = port->dev->platform_data;
32 unsigned long ucon = rd_regl(port, S3C2410_UCON);
33
34 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
35 return 0;
36
37 if (strcmp(clk->name, "pclk") == 0)
38 ucon &= ~S5PV210_UCON_CLKMASK;
39 else if (strcmp(clk->name, "uclk1") == 0)
40 ucon |= S5PV210_UCON_CLKMASK;
41 else {
42 printk(KERN_ERR "unknown clock source %s\n", clk->name);
43 return -EINVAL;
44 }
45
46 wr_regl(port, S3C2410_UCON, ucon);
47 return 0;
48}
49
50
51static int s5pv210_serial_getsource(struct uart_port *port,
52 struct s3c24xx_uart_clksrc *clk)
53{
54 struct s3c2410_uartcfg *cfg = port->dev->platform_data;
55 u32 ucon = rd_regl(port, S3C2410_UCON);
56
57 clk->divisor = 1;
58
59 if (cfg->flags & NO_NEED_CHECK_CLKSRC)
60 return 0;
61
62 switch (ucon & S5PV210_UCON_CLKMASK) {
63 case S5PV210_UCON_PCLK:
64 clk->name = "pclk";
65 break;
66 case S5PV210_UCON_UCLK:
67 clk->name = "uclk1";
68 break;
69 }
70
71 return 0;
72}
73
74static int s5pv210_serial_resetport(struct uart_port *port,
75 struct s3c2410_uartcfg *cfg)
76{
77 unsigned long ucon = rd_regl(port, S3C2410_UCON);
78
79 ucon &= S5PV210_UCON_CLKMASK;
80 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
81 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
82
83 /* reset both fifos */
84 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
85 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
86
87 /* It is need to delay When reset FIFO register */
88 udelay(1);
89
90 return 0;
91}
92
93#define S5PV210_UART_DEFAULT_INFO(fifo_size) \
94 .name = "Samsung S5PV210 UART0", \
95 .type = PORT_S3C6400, \
96 .fifosize = fifo_size, \
97 .has_divslot = 1, \
98 .rx_fifomask = S5PV210_UFSTAT_RXMASK, \
99 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \
100 .rx_fifofull = S5PV210_UFSTAT_RXFULL, \
101 .tx_fifofull = S5PV210_UFSTAT_TXFULL, \
102 .tx_fifomask = S5PV210_UFSTAT_TXMASK, \
103 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \
104 .get_clksrc = s5pv210_serial_getsource, \
105 .set_clksrc = s5pv210_serial_setsource, \
106 .reset_port = s5pv210_serial_resetport
107
108static struct s3c24xx_uart_info s5p_port_fifo256 = {
109 S5PV210_UART_DEFAULT_INFO(256),
110};
111
112static struct s3c24xx_uart_info s5p_port_fifo64 = {
113 S5PV210_UART_DEFAULT_INFO(64),
114};
115
116static struct s3c24xx_uart_info s5p_port_fifo16 = {
117 S5PV210_UART_DEFAULT_INFO(16),
118};
119
120static struct s3c24xx_uart_info *s5p_uart_inf[] = {
121 [0] = &s5p_port_fifo256,
122 [1] = &s5p_port_fifo64,
123 [2] = &s5p_port_fifo16,
124 [3] = &s5p_port_fifo16,
125};
126
127/* device management */
128static int s5p_serial_probe(struct platform_device *pdev)
129{
130 return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
131}
132
133static struct platform_driver s5p_serial_driver = {
134 .probe = s5p_serial_probe,
135 .remove = __devexit_p(s3c24xx_serial_remove),
136 .driver = {
137 .name = "s5pv210-uart",
138 .owner = THIS_MODULE,
139 },
140};
141
142static int __init s5p_serial_init(void)
143{
144 return s3c24xx_serial_init(&s5p_serial_driver, *s5p_uart_inf);
145}
146
147static void __exit s5p_serial_exit(void)
148{
149 platform_driver_unregister(&s5p_serial_driver);
150}
151
152module_init(s5p_serial_init);
153module_exit(s5p_serial_exit);
154
155MODULE_LICENSE("GPL");
156MODULE_ALIAS("platform:s5pv210-uart");
157MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support");
158MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index b31f1c3a2c4c..f96f37b5fec6 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -42,6 +42,7 @@
42#include <linux/delay.h> 42#include <linux/delay.h>
43#include <linux/clk.h> 43#include <linux/clk.h>
44#include <linux/cpufreq.h> 44#include <linux/cpufreq.h>
45#include <linux/of.h>
45 46
46#include <asm/irq.h> 47#include <asm/irq.h>
47 48
@@ -49,6 +50,7 @@
49#include <mach/map.h> 50#include <mach/map.h>
50 51
51#include <plat/regs-serial.h> 52#include <plat/regs-serial.h>
53#include <plat/clock.h>
52 54
53#include "samsung.h" 55#include "samsung.h"
54 56
@@ -190,10 +192,13 @@ static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *p
190 192
191static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) 193static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port)
192{ 194{
195 struct s3c24xx_uart_port *ourport;
196
193 if (port->dev == NULL) 197 if (port->dev == NULL)
194 return NULL; 198 return NULL;
195 199
196 return (struct s3c2410_uartcfg *)port->dev->platform_data; 200 ourport = container_of(port, struct s3c24xx_uart_port, port);
201 return ourport->cfg;
197} 202}
198 203
199static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, 204static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
@@ -202,7 +207,7 @@ static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport,
202 struct s3c24xx_uart_info *info = ourport->info; 207 struct s3c24xx_uart_info *info = ourport->info;
203 208
204 if (ufstat & info->rx_fifofull) 209 if (ufstat & info->rx_fifofull)
205 return info->fifosize; 210 return ourport->port.fifosize;
206 211
207 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; 212 return (ufstat & info->rx_fifomask) >> info->rx_fifoshift;
208} 213}
@@ -555,154 +560,98 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
555 * 560 *
556*/ 561*/
557 562
563#define MAX_CLK_NAME_LENGTH 15
558 564
559#define MAX_CLKS (8) 565static inline int s3c24xx_serial_getsource(struct uart_port *port)
560
561static struct s3c24xx_uart_clksrc tmp_clksrc = {
562 .name = "pclk",
563 .min_baud = 0,
564 .max_baud = 0,
565 .divisor = 1,
566};
567
568static inline int
569s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
570{ 566{
571 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); 567 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
568 unsigned int ucon;
572 569
573 return (info->get_clksrc)(port, c); 570 if (info->num_clks == 1)
574} 571 return 0;
575
576static inline int
577s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
578{
579 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
580 572
581 return (info->set_clksrc)(port, c); 573 ucon = rd_regl(port, S3C2410_UCON);
574 ucon &= info->clksel_mask;
575 return ucon >> info->clksel_shift;
582} 576}
583 577
584struct baud_calc { 578static void s3c24xx_serial_setsource(struct uart_port *port,
585 struct s3c24xx_uart_clksrc *clksrc; 579 unsigned int clk_sel)
586 unsigned int calc;
587 unsigned int divslot;
588 unsigned int quot;
589 struct clk *src;
590};
591
592static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
593 struct uart_port *port,
594 struct s3c24xx_uart_clksrc *clksrc,
595 unsigned int baud)
596{ 580{
597 struct s3c24xx_uart_port *ourport = to_ourport(port); 581 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
598 unsigned long rate; 582 unsigned int ucon;
599
600 calc->src = clk_get(port->dev, clksrc->name);
601 if (calc->src == NULL || IS_ERR(calc->src))
602 return 0;
603
604 rate = clk_get_rate(calc->src);
605 rate /= clksrc->divisor;
606 583
607 calc->clksrc = clksrc; 584 if (info->num_clks == 1)
585 return;
608 586
609 if (ourport->info->has_divslot) { 587 ucon = rd_regl(port, S3C2410_UCON);
610 unsigned long div = rate / baud; 588 if ((ucon & info->clksel_mask) >> info->clksel_shift == clk_sel)
611 589 return;
612 /* The UDIVSLOT register on the newer UARTs allows us to
613 * get a divisor adjustment of 1/16th on the baud clock.
614 *
615 * We don't keep the UDIVSLOT value (the 16ths we calculated
616 * by not multiplying the baud by 16) as it is easy enough
617 * to recalculate.
618 */
619
620 calc->quot = div / 16;
621 calc->calc = rate / div;
622 } else {
623 calc->quot = (rate + (8 * baud)) / (16 * baud);
624 calc->calc = (rate / (calc->quot * 16));
625 }
626 590
627 calc->quot--; 591 ucon &= ~info->clksel_mask;
628 return 1; 592 ucon |= clk_sel << info->clksel_shift;
593 wr_regl(port, S3C2410_UCON, ucon);
629} 594}
630 595
631static unsigned int s3c24xx_serial_getclk(struct uart_port *port, 596static unsigned int s3c24xx_serial_getclk(struct s3c24xx_uart_port *ourport,
632 struct s3c24xx_uart_clksrc **clksrc, 597 unsigned int req_baud, struct clk **best_clk,
633 struct clk **clk, 598 unsigned int *clk_num)
634 unsigned int baud)
635{ 599{
636 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); 600 struct s3c24xx_uart_info *info = ourport->info;
637 struct s3c24xx_uart_clksrc *clkp; 601 struct clk *clk;
638 struct baud_calc res[MAX_CLKS]; 602 unsigned long rate;
639 struct baud_calc *resptr, *best, *sptr; 603 unsigned int cnt, baud, quot, clk_sel, best_quot = 0;
640 int i; 604 char clkname[MAX_CLK_NAME_LENGTH];
641 605 int calc_deviation, deviation = (1 << 30) - 1;
642 clkp = cfg->clocks; 606
643 best = NULL; 607 *best_clk = NULL;
644 608 clk_sel = (ourport->cfg->clk_sel) ? ourport->cfg->clk_sel :
645 if (cfg->clocks_size < 2) { 609 ourport->info->def_clk_sel;
646 if (cfg->clocks_size == 0) 610 for (cnt = 0; cnt < info->num_clks; cnt++) {
647 clkp = &tmp_clksrc; 611 if (!(clk_sel & (1 << cnt)))
648 612 continue;
649 /* check to see if we're sourcing fclk, and if so we're 613
650 * going to have to update the clock source 614 sprintf(clkname, "clk_uart_baud%d", cnt);
651 */ 615 clk = clk_get(ourport->port.dev, clkname);
652 616 if (IS_ERR_OR_NULL(clk))
653 if (strcmp(clkp->name, "fclk") == 0) { 617 continue;
654 struct s3c24xx_uart_clksrc src; 618
655 619 rate = clk_get_rate(clk);
656 s3c24xx_serial_getsource(port, &src); 620 if (!rate)
657 621 continue;
658 /* check that the port already using fclk, and if 622
659 * not, then re-select fclk 623 if (ourport->info->has_divslot) {
624 unsigned long div = rate / req_baud;
625
626 /* The UDIVSLOT register on the newer UARTs allows us to
627 * get a divisor adjustment of 1/16th on the baud clock.
628 *
629 * We don't keep the UDIVSLOT value (the 16ths we
630 * calculated by not multiplying the baud by 16) as it
631 * is easy enough to recalculate.
660 */ 632 */
661 633
662 if (strcmp(src.name, clkp->name) == 0) { 634 quot = div / 16;
663 s3c24xx_serial_setsource(port, clkp); 635 baud = rate / div;
664 s3c24xx_serial_getsource(port, &src); 636 } else {
665 } 637 quot = (rate + (8 * req_baud)) / (16 * req_baud);
666 638 baud = rate / (quot * 16);
667 clkp->divisor = src.divisor;
668 }
669
670 s3c24xx_serial_calcbaud(res, port, clkp, baud);
671 best = res;
672 resptr = best + 1;
673 } else {
674 resptr = res;
675
676 for (i = 0; i < cfg->clocks_size; i++, clkp++) {
677 if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud))
678 resptr++;
679 } 639 }
680 } 640 quot--;
681
682 /* ok, we now need to select the best clock we found */
683
684 if (!best) {
685 unsigned int deviation = (1<<30)|((1<<30)-1);
686 int calc_deviation;
687 641
688 for (sptr = res; sptr < resptr; sptr++) { 642 calc_deviation = req_baud - baud;
689 calc_deviation = baud - sptr->calc; 643 if (calc_deviation < 0)
690 if (calc_deviation < 0) 644 calc_deviation = -calc_deviation;
691 calc_deviation = -calc_deviation;
692 645
693 if (calc_deviation < deviation) { 646 if (calc_deviation < deviation) {
694 best = sptr; 647 *best_clk = clk;
695 deviation = calc_deviation; 648 best_quot = quot;
696 } 649 *clk_num = cnt;
650 deviation = calc_deviation;
697 } 651 }
698 } 652 }
699 653
700 /* store results to pass back */ 654 return best_quot;
701
702 *clksrc = best->clksrc;
703 *clk = best->src;
704
705 return best->quot;
706} 655}
707 656
708/* udivslot_table[] 657/* udivslot_table[]
@@ -735,10 +684,9 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
735{ 684{
736 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); 685 struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port);
737 struct s3c24xx_uart_port *ourport = to_ourport(port); 686 struct s3c24xx_uart_port *ourport = to_ourport(port);
738 struct s3c24xx_uart_clksrc *clksrc = NULL;
739 struct clk *clk = NULL; 687 struct clk *clk = NULL;
740 unsigned long flags; 688 unsigned long flags;
741 unsigned int baud, quot; 689 unsigned int baud, quot, clk_sel = 0;
742 unsigned int ulcon; 690 unsigned int ulcon;
743 unsigned int umcon; 691 unsigned int umcon;
744 unsigned int udivslot = 0; 692 unsigned int udivslot = 0;
@@ -754,17 +702,16 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
754 */ 702 */
755 703
756 baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); 704 baud = uart_get_baud_rate(port, termios, old, 0, 115200*8);
757 705 quot = s3c24xx_serial_getclk(ourport, baud, &clk, &clk_sel);
758 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) 706 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
759 quot = port->custom_divisor; 707 quot = port->custom_divisor;
760 else 708 if (!clk)
761 quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud); 709 return;
762 710
763 /* check to see if we need to change clock source */ 711 /* check to see if we need to change clock source */
764 712
765 if (ourport->clksrc != clksrc || ourport->baudclk != clk) { 713 if (ourport->baudclk != clk) {
766 dbg("selecting clock %p\n", clk); 714 s3c24xx_serial_setsource(port, clk_sel);
767 s3c24xx_serial_setsource(port, clksrc);
768 715
769 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { 716 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
770 clk_disable(ourport->baudclk); 717 clk_disable(ourport->baudclk);
@@ -773,7 +720,6 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
773 720
774 clk_enable(clk); 721 clk_enable(clk);
775 722
776 ourport->clksrc = clksrc;
777 ourport->baudclk = clk; 723 ourport->baudclk = clk;
778 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; 724 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
779 } 725 }
@@ -1020,16 +966,29 @@ static struct s3c24xx_uart_port s3c24xx_serial_ports[CONFIG_SERIAL_SAMSUNG_UARTS
1020 966
1021/* s3c24xx_serial_resetport 967/* s3c24xx_serial_resetport
1022 * 968 *
1023 * wrapper to call the specific reset for this port (reset the fifos 969 * reset the fifos and other the settings.
1024 * and the settings)
1025*/ 970*/
1026 971
1027static inline int s3c24xx_serial_resetport(struct uart_port *port, 972static void s3c24xx_serial_resetport(struct uart_port *port,
1028 struct s3c2410_uartcfg *cfg) 973 struct s3c2410_uartcfg *cfg)
1029{ 974{
1030 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); 975 struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port);
976 unsigned long ucon = rd_regl(port, S3C2410_UCON);
977 unsigned int ucon_mask;
978
979 ucon_mask = info->clksel_mask;
980 if (info->type == PORT_S3C2440)
981 ucon_mask |= S3C2440_UCON0_DIVMASK;
1031 982
1032 return (info->reset_port)(port, cfg); 983 ucon &= ucon_mask;
984 wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
985
986 /* reset both fifos */
987 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
988 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
989
990 /* some delay is required after fifo reset */
991 udelay(1);
1033} 992}
1034 993
1035 994
@@ -1121,11 +1080,10 @@ static inline void s3c24xx_serial_cpufreq_deregister(struct s3c24xx_uart_port *p
1121 */ 1080 */
1122 1081
1123static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, 1082static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1124 struct s3c24xx_uart_info *info,
1125 struct platform_device *platdev) 1083 struct platform_device *platdev)
1126{ 1084{
1127 struct uart_port *port = &ourport->port; 1085 struct uart_port *port = &ourport->port;
1128 struct s3c2410_uartcfg *cfg; 1086 struct s3c2410_uartcfg *cfg = ourport->cfg;
1129 struct resource *res; 1087 struct resource *res;
1130 int ret; 1088 int ret;
1131 1089
@@ -1134,30 +1092,16 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
1134 if (platdev == NULL) 1092 if (platdev == NULL)
1135 return -ENODEV; 1093 return -ENODEV;
1136 1094
1137 cfg = s3c24xx_dev_to_cfg(&platdev->dev);
1138
1139 if (port->mapbase != 0) 1095 if (port->mapbase != 0)
1140 return 0; 1096 return 0;
1141 1097
1142 if (cfg->hwport > CONFIG_SERIAL_SAMSUNG_UARTS) {
1143 printk(KERN_ERR "%s: port %d bigger than %d\n", __func__,
1144 cfg->hwport, CONFIG_SERIAL_SAMSUNG_UARTS);
1145 return -ERANGE;
1146 }
1147
1148 /* setup info for port */ 1098 /* setup info for port */
1149 port->dev = &platdev->dev; 1099 port->dev = &platdev->dev;
1150 ourport->info = info;
1151 1100
1152 /* Startup sequence is different for s3c64xx and higher SoC's */ 1101 /* Startup sequence is different for s3c64xx and higher SoC's */
1153 if (s3c24xx_serial_has_interrupt_mask(port)) 1102 if (s3c24xx_serial_has_interrupt_mask(port))
1154 s3c24xx_serial_ops.startup = s3c64xx_serial_startup; 1103 s3c24xx_serial_ops.startup = s3c64xx_serial_startup;
1155 1104
1156 /* copy the info in from provided structure */
1157 ourport->port.fifosize = info->fifosize;
1158
1159 dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport);
1160
1161 port->uartclk = 1; 1105 port->uartclk = 1;
1162 1106
1163 if (cfg->uart_flags & UPF_CONS_FLOW) { 1107 if (cfg->uart_flags & UPF_CONS_FLOW) {
@@ -1215,43 +1159,74 @@ static ssize_t s3c24xx_serial_show_clksrc(struct device *dev,
1215 struct uart_port *port = s3c24xx_dev_to_port(dev); 1159 struct uart_port *port = s3c24xx_dev_to_port(dev);
1216 struct s3c24xx_uart_port *ourport = to_ourport(port); 1160 struct s3c24xx_uart_port *ourport = to_ourport(port);
1217 1161
1218 return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->clksrc->name); 1162 return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->baudclk->name);
1219} 1163}
1220 1164
1221static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL); 1165static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL);
1222 1166
1167
1223/* Device driver serial port probe */ 1168/* Device driver serial port probe */
1224 1169
1170static const struct of_device_id s3c24xx_uart_dt_match[];
1225static int probe_index; 1171static int probe_index;
1226 1172
1227int s3c24xx_serial_probe(struct platform_device *dev, 1173static inline struct s3c24xx_serial_drv_data *s3c24xx_get_driver_data(
1228 struct s3c24xx_uart_info *info) 1174 struct platform_device *pdev)
1175{
1176#ifdef CONFIG_OF
1177 if (pdev->dev.of_node) {
1178 const struct of_device_id *match;
1179 match = of_match_node(s3c24xx_uart_dt_match, pdev->dev.of_node);
1180 return (struct s3c24xx_serial_drv_data *)match->data;
1181 }
1182#endif
1183 return (struct s3c24xx_serial_drv_data *)
1184 platform_get_device_id(pdev)->driver_data;
1185}
1186
1187static int s3c24xx_serial_probe(struct platform_device *pdev)
1229{ 1188{
1230 struct s3c24xx_uart_port *ourport; 1189 struct s3c24xx_uart_port *ourport;
1231 int ret; 1190 int ret;
1232 1191
1233 dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); 1192 dbg("s3c24xx_serial_probe(%p) %d\n", pdev, probe_index);
1234 1193
1235 ourport = &s3c24xx_serial_ports[probe_index]; 1194 ourport = &s3c24xx_serial_ports[probe_index];
1195
1196 ourport->drv_data = s3c24xx_get_driver_data(pdev);
1197 if (!ourport->drv_data) {
1198 dev_err(&pdev->dev, "could not find driver data\n");
1199 return -ENODEV;
1200 }
1201
1202 ourport->info = ourport->drv_data->info;
1203 ourport->cfg = (pdev->dev.platform_data) ?
1204 (struct s3c2410_uartcfg *)pdev->dev.platform_data :
1205 ourport->drv_data->def_cfg;
1206
1207 ourport->port.fifosize = (ourport->info->fifosize) ?
1208 ourport->info->fifosize :
1209 ourport->drv_data->fifosize[probe_index];
1210
1236 probe_index++; 1211 probe_index++;
1237 1212
1238 dbg("%s: initialising port %p...\n", __func__, ourport); 1213 dbg("%s: initialising port %p...\n", __func__, ourport);
1239 1214
1240 ret = s3c24xx_serial_init_port(ourport, info, dev); 1215 ret = s3c24xx_serial_init_port(ourport, pdev);
1241 if (ret < 0) 1216 if (ret < 0)
1242 goto probe_err; 1217 goto probe_err;
1243 1218
1244 dbg("%s: adding port\n", __func__); 1219 dbg("%s: adding port\n", __func__);
1245 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); 1220 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1246 platform_set_drvdata(dev, &ourport->port); 1221 platform_set_drvdata(pdev, &ourport->port);
1247 1222
1248 ret = device_create_file(&dev->dev, &dev_attr_clock_source); 1223 ret = device_create_file(&pdev->dev, &dev_attr_clock_source);
1249 if (ret < 0) 1224 if (ret < 0)
1250 printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__); 1225 dev_err(&pdev->dev, "failed to add clock source attr.\n");
1251 1226
1252 ret = s3c24xx_serial_cpufreq_register(ourport); 1227 ret = s3c24xx_serial_cpufreq_register(ourport);
1253 if (ret < 0) 1228 if (ret < 0)
1254 dev_err(&dev->dev, "failed to add cpufreq notifier\n"); 1229 dev_err(&pdev->dev, "failed to add cpufreq notifier\n");
1255 1230
1256 return 0; 1231 return 0;
1257 1232
@@ -1259,9 +1234,7 @@ int s3c24xx_serial_probe(struct platform_device *dev,
1259 return ret; 1234 return ret;
1260} 1235}
1261 1236
1262EXPORT_SYMBOL_GPL(s3c24xx_serial_probe); 1237static int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1263
1264int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1265{ 1238{
1266 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); 1239 struct uart_port *port = s3c24xx_dev_to_port(&dev->dev);
1267 1240
@@ -1274,8 +1247,6 @@ int __devexit s3c24xx_serial_remove(struct platform_device *dev)
1274 return 0; 1247 return 0;
1275} 1248}
1276 1249
1277EXPORT_SYMBOL_GPL(s3c24xx_serial_remove);
1278
1279/* UART power management code */ 1250/* UART power management code */
1280#ifdef CONFIG_PM_SLEEP 1251#ifdef CONFIG_PM_SLEEP
1281static int s3c24xx_serial_suspend(struct device *dev) 1252static int s3c24xx_serial_suspend(struct device *dev)
@@ -1315,41 +1286,6 @@ static const struct dev_pm_ops s3c24xx_serial_pm_ops = {
1315#define SERIAL_SAMSUNG_PM_OPS NULL 1286#define SERIAL_SAMSUNG_PM_OPS NULL
1316#endif /* CONFIG_PM_SLEEP */ 1287#endif /* CONFIG_PM_SLEEP */
1317 1288
1318int s3c24xx_serial_init(struct platform_driver *drv,
1319 struct s3c24xx_uart_info *info)
1320{
1321 dbg("s3c24xx_serial_init(%p,%p)\n", drv, info);
1322
1323 drv->driver.pm = SERIAL_SAMSUNG_PM_OPS;
1324
1325 return platform_driver_register(drv);
1326}
1327
1328EXPORT_SYMBOL_GPL(s3c24xx_serial_init);
1329
1330/* module initialisation code */
1331
1332static int __init s3c24xx_serial_modinit(void)
1333{
1334 int ret;
1335
1336 ret = uart_register_driver(&s3c24xx_uart_drv);
1337 if (ret < 0) {
1338 printk(KERN_ERR "failed to register UART driver\n");
1339 return -1;
1340 }
1341
1342 return 0;
1343}
1344
1345static void __exit s3c24xx_serial_modexit(void)
1346{
1347 uart_unregister_driver(&s3c24xx_uart_drv);
1348}
1349
1350module_init(s3c24xx_serial_modinit);
1351module_exit(s3c24xx_serial_modexit);
1352
1353/* Console code */ 1289/* Console code */
1354 1290
1355#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE 1291#ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
@@ -1395,12 +1331,13 @@ static void __init
1395s3c24xx_serial_get_options(struct uart_port *port, int *baud, 1331s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1396 int *parity, int *bits) 1332 int *parity, int *bits)
1397{ 1333{
1398 struct s3c24xx_uart_clksrc clksrc;
1399 struct clk *clk; 1334 struct clk *clk;
1400 unsigned int ulcon; 1335 unsigned int ulcon;
1401 unsigned int ucon; 1336 unsigned int ucon;
1402 unsigned int ubrdiv; 1337 unsigned int ubrdiv;
1403 unsigned long rate; 1338 unsigned long rate;
1339 unsigned int clk_sel;
1340 char clk_name[MAX_CLK_NAME_LENGTH];
1404 1341
1405 ulcon = rd_regl(port, S3C2410_ULCON); 1342 ulcon = rd_regl(port, S3C2410_ULCON);
1406 ucon = rd_regl(port, S3C2410_UCON); 1343 ucon = rd_regl(port, S3C2410_UCON);
@@ -1445,44 +1382,21 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
1445 1382
1446 /* now calculate the baud rate */ 1383 /* now calculate the baud rate */
1447 1384
1448 s3c24xx_serial_getsource(port, &clksrc); 1385 clk_sel = s3c24xx_serial_getsource(port);
1386 sprintf(clk_name, "clk_uart_baud%d", clk_sel);
1449 1387
1450 clk = clk_get(port->dev, clksrc.name); 1388 clk = clk_get(port->dev, clk_name);
1451 if (!IS_ERR(clk) && clk != NULL) 1389 if (!IS_ERR(clk) && clk != NULL)
1452 rate = clk_get_rate(clk) / clksrc.divisor; 1390 rate = clk_get_rate(clk);
1453 else 1391 else
1454 rate = 1; 1392 rate = 1;
1455 1393
1456
1457 *baud = rate / (16 * (ubrdiv + 1)); 1394 *baud = rate / (16 * (ubrdiv + 1));
1458 dbg("calculated baud %d\n", *baud); 1395 dbg("calculated baud %d\n", *baud);
1459 } 1396 }
1460 1397
1461} 1398}
1462 1399
1463/* s3c24xx_serial_init_ports
1464 *
1465 * initialise the serial ports from the machine provided initialisation
1466 * data.
1467*/
1468
1469static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info)
1470{
1471 struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
1472 struct platform_device **platdev_ptr;
1473 int i;
1474
1475 dbg("s3c24xx_serial_init_ports: initialising ports...\n");
1476
1477 platdev_ptr = s3c24xx_uart_devs;
1478
1479 for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) {
1480 s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr);
1481 }
1482
1483 return 0;
1484}
1485
1486static int __init 1400static int __init
1487s3c24xx_serial_console_setup(struct console *co, char *options) 1401s3c24xx_serial_console_setup(struct console *co, char *options)
1488{ 1402{
@@ -1526,11 +1440,6 @@ s3c24xx_serial_console_setup(struct console *co, char *options)
1526 return uart_set_options(port, co, baud, parity, bits, flow); 1440 return uart_set_options(port, co, baud, parity, bits, flow);
1527} 1441}
1528 1442
1529/* s3c24xx_serial_initconsole
1530 *
1531 * initialise the console from one of the uart drivers
1532*/
1533
1534static struct console s3c24xx_serial_console = { 1443static struct console s3c24xx_serial_console = {
1535 .name = S3C24XX_SERIAL_NAME, 1444 .name = S3C24XX_SERIAL_NAME,
1536 .device = uart_console_device, 1445 .device = uart_console_device,
@@ -1540,34 +1449,250 @@ static struct console s3c24xx_serial_console = {
1540 .setup = s3c24xx_serial_console_setup, 1449 .setup = s3c24xx_serial_console_setup,
1541 .data = &s3c24xx_uart_drv, 1450 .data = &s3c24xx_uart_drv,
1542}; 1451};
1452#endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */
1543 1453
1544int s3c24xx_serial_initconsole(struct platform_driver *drv, 1454#ifdef CONFIG_CPU_S3C2410
1545 struct s3c24xx_uart_info **info) 1455static struct s3c24xx_serial_drv_data s3c2410_serial_drv_data = {
1456 .info = &(struct s3c24xx_uart_info) {
1457 .name = "Samsung S3C2410 UART",
1458 .type = PORT_S3C2410,
1459 .fifosize = 16,
1460 .rx_fifomask = S3C2410_UFSTAT_RXMASK,
1461 .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT,
1462 .rx_fifofull = S3C2410_UFSTAT_RXFULL,
1463 .tx_fifofull = S3C2410_UFSTAT_TXFULL,
1464 .tx_fifomask = S3C2410_UFSTAT_TXMASK,
1465 .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT,
1466 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1467 .num_clks = 2,
1468 .clksel_mask = S3C2410_UCON_CLKMASK,
1469 .clksel_shift = S3C2410_UCON_CLKSHIFT,
1470 },
1471 .def_cfg = &(struct s3c2410_uartcfg) {
1472 .ucon = S3C2410_UCON_DEFAULT,
1473 .ufcon = S3C2410_UFCON_DEFAULT,
1474 },
1475};
1476#define S3C2410_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2410_serial_drv_data)
1477#else
1478#define S3C2410_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1479#endif
1546 1480
1547{ 1481#ifdef CONFIG_CPU_S3C2412
1548 struct platform_device *dev = s3c24xx_uart_devs[0]; 1482static struct s3c24xx_serial_drv_data s3c2412_serial_drv_data = {
1483 .info = &(struct s3c24xx_uart_info) {
1484 .name = "Samsung S3C2412 UART",
1485 .type = PORT_S3C2412,
1486 .fifosize = 64,
1487 .has_divslot = 1,
1488 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1489 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1490 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1491 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1492 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1493 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1494 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1495 .num_clks = 4,
1496 .clksel_mask = S3C2412_UCON_CLKMASK,
1497 .clksel_shift = S3C2412_UCON_CLKSHIFT,
1498 },
1499 .def_cfg = &(struct s3c2410_uartcfg) {
1500 .ucon = S3C2410_UCON_DEFAULT,
1501 .ufcon = S3C2410_UFCON_DEFAULT,
1502 },
1503};
1504#define S3C2412_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2412_serial_drv_data)
1505#else
1506#define S3C2412_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1507#endif
1549 1508
1550 dbg("s3c24xx_serial_initconsole\n"); 1509#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2416) || \
1510 defined(CONFIG_CPU_S3C2443)
1511static struct s3c24xx_serial_drv_data s3c2440_serial_drv_data = {
1512 .info = &(struct s3c24xx_uart_info) {
1513 .name = "Samsung S3C2440 UART",
1514 .type = PORT_S3C2440,
1515 .fifosize = 64,
1516 .has_divslot = 1,
1517 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1518 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1519 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1520 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1521 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1522 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1523 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1524 .num_clks = 4,
1525 .clksel_mask = S3C2412_UCON_CLKMASK,
1526 .clksel_shift = S3C2412_UCON_CLKSHIFT,
1527 },
1528 .def_cfg = &(struct s3c2410_uartcfg) {
1529 .ucon = S3C2410_UCON_DEFAULT,
1530 .ufcon = S3C2410_UFCON_DEFAULT,
1531 },
1532};
1533#define S3C2440_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c2440_serial_drv_data)
1534#else
1535#define S3C2440_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1536#endif
1551 1537
1552 /* select driver based on the cpu */ 1538#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) || \
1539 defined(CONFIG_CPU_S5P6440) || defined(CONFIG_CPU_S5P6450) || \
1540 defined(CONFIG_CPU_S5PC100)
1541static struct s3c24xx_serial_drv_data s3c6400_serial_drv_data = {
1542 .info = &(struct s3c24xx_uart_info) {
1543 .name = "Samsung S3C6400 UART",
1544 .type = PORT_S3C6400,
1545 .fifosize = 64,
1546 .has_divslot = 1,
1547 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
1548 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
1549 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
1550 .tx_fifofull = S3C2440_UFSTAT_TXFULL,
1551 .tx_fifomask = S3C2440_UFSTAT_TXMASK,
1552 .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT,
1553 .def_clk_sel = S3C2410_UCON_CLKSEL2,
1554 .num_clks = 4,
1555 .clksel_mask = S3C6400_UCON_CLKMASK,
1556 .clksel_shift = S3C6400_UCON_CLKSHIFT,
1557 },
1558 .def_cfg = &(struct s3c2410_uartcfg) {
1559 .ucon = S3C2410_UCON_DEFAULT,
1560 .ufcon = S3C2410_UFCON_DEFAULT,
1561 },
1562};
1563#define S3C6400_SERIAL_DRV_DATA ((kernel_ulong_t)&s3c6400_serial_drv_data)
1564#else
1565#define S3C6400_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1566#endif
1553 1567
1554 if (dev == NULL) { 1568#ifdef CONFIG_CPU_S5PV210
1555 printk(KERN_ERR "s3c24xx: no devices for console init\n"); 1569static struct s3c24xx_serial_drv_data s5pv210_serial_drv_data = {
1556 return 0; 1570 .info = &(struct s3c24xx_uart_info) {
1557 } 1571 .name = "Samsung S5PV210 UART",
1572 .type = PORT_S3C6400,
1573 .has_divslot = 1,
1574 .rx_fifomask = S5PV210_UFSTAT_RXMASK,
1575 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
1576 .rx_fifofull = S5PV210_UFSTAT_RXFULL,
1577 .tx_fifofull = S5PV210_UFSTAT_TXFULL,
1578 .tx_fifomask = S5PV210_UFSTAT_TXMASK,
1579 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT,
1580 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1581 .num_clks = 2,
1582 .clksel_mask = S5PV210_UCON_CLKMASK,
1583 .clksel_shift = S5PV210_UCON_CLKSHIFT,
1584 },
1585 .def_cfg = &(struct s3c2410_uartcfg) {
1586 .ucon = S5PV210_UCON_DEFAULT,
1587 .ufcon = S5PV210_UFCON_DEFAULT,
1588 },
1589 .fifosize = { 256, 64, 16, 16 },
1590};
1591#define S5PV210_SERIAL_DRV_DATA ((kernel_ulong_t)&s5pv210_serial_drv_data)
1592#else
1593#define S5PV210_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1594#endif
1558 1595
1559 if (strcmp(dev->name, drv->driver.name) != 0) 1596#ifdef CONFIG_CPU_EXYNOS4210
1560 return 0; 1597static struct s3c24xx_serial_drv_data exynos4210_serial_drv_data = {
1598 .info = &(struct s3c24xx_uart_info) {
1599 .name = "Samsung Exynos4 UART",
1600 .type = PORT_S3C6400,
1601 .has_divslot = 1,
1602 .rx_fifomask = S5PV210_UFSTAT_RXMASK,
1603 .rx_fifoshift = S5PV210_UFSTAT_RXSHIFT,
1604 .rx_fifofull = S5PV210_UFSTAT_RXFULL,
1605 .tx_fifofull = S5PV210_UFSTAT_TXFULL,
1606 .tx_fifomask = S5PV210_UFSTAT_TXMASK,
1607 .tx_fifoshift = S5PV210_UFSTAT_TXSHIFT,
1608 .def_clk_sel = S3C2410_UCON_CLKSEL0,
1609 .num_clks = 1,
1610 .clksel_mask = 0,
1611 .clksel_shift = 0,
1612 },
1613 .def_cfg = &(struct s3c2410_uartcfg) {
1614 .ucon = S5PV210_UCON_DEFAULT,
1615 .ufcon = S5PV210_UFCON_DEFAULT,
1616 .has_fracval = 1,
1617 },
1618 .fifosize = { 256, 64, 16, 16 },
1619};
1620#define EXYNOS4210_SERIAL_DRV_DATA ((kernel_ulong_t)&exynos4210_serial_drv_data)
1621#else
1622#define EXYNOS4210_SERIAL_DRV_DATA (kernel_ulong_t)NULL
1623#endif
1561 1624
1562 s3c24xx_serial_console.data = &s3c24xx_uart_drv; 1625static struct platform_device_id s3c24xx_serial_driver_ids[] = {
1563 s3c24xx_serial_init_ports(info); 1626 {
1627 .name = "s3c2410-uart",
1628 .driver_data = S3C2410_SERIAL_DRV_DATA,
1629 }, {
1630 .name = "s3c2412-uart",
1631 .driver_data = S3C2412_SERIAL_DRV_DATA,
1632 }, {
1633 .name = "s3c2440-uart",
1634 .driver_data = S3C2440_SERIAL_DRV_DATA,
1635 }, {
1636 .name = "s3c6400-uart",
1637 .driver_data = S3C6400_SERIAL_DRV_DATA,
1638 }, {
1639 .name = "s5pv210-uart",
1640 .driver_data = S5PV210_SERIAL_DRV_DATA,
1641 }, {
1642 .name = "exynos4210-uart",
1643 .driver_data = EXYNOS4210_SERIAL_DRV_DATA,
1644 },
1645 { },
1646};
1647MODULE_DEVICE_TABLE(platform, s3c24xx_serial_driver_ids);
1564 1648
1565 register_console(&s3c24xx_serial_console); 1649#ifdef CONFIG_OF
1566 return 0; 1650static const struct of_device_id s3c24xx_uart_dt_match[] = {
1651 { .compatible = "samsung,exynos4210-uart",
1652 .data = (void *)EXYNOS4210_SERIAL_DRV_DATA },
1653 {},
1654};
1655MODULE_DEVICE_TABLE(of, s3c24xx_uart_dt_match);
1656#else
1657#define s3c24xx_uart_dt_match NULL
1658#endif
1659
1660static struct platform_driver samsung_serial_driver = {
1661 .probe = s3c24xx_serial_probe,
1662 .remove = __devexit_p(s3c24xx_serial_remove),
1663 .id_table = s3c24xx_serial_driver_ids,
1664 .driver = {
1665 .name = "samsung-uart",
1666 .owner = THIS_MODULE,
1667 .pm = SERIAL_SAMSUNG_PM_OPS,
1668 .of_match_table = s3c24xx_uart_dt_match,
1669 },
1670};
1671
1672/* module initialisation code */
1673
1674static int __init s3c24xx_serial_modinit(void)
1675{
1676 int ret;
1677
1678 ret = uart_register_driver(&s3c24xx_uart_drv);
1679 if (ret < 0) {
1680 printk(KERN_ERR "failed to register UART driver\n");
1681 return -1;
1682 }
1683
1684 return platform_driver_register(&samsung_serial_driver);
1567} 1685}
1568 1686
1569#endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */ 1687static void __exit s3c24xx_serial_modexit(void)
1688{
1689 uart_unregister_driver(&s3c24xx_uart_drv);
1690}
1691
1692module_init(s3c24xx_serial_modinit);
1693module_exit(s3c24xx_serial_modexit);
1570 1694
1695MODULE_ALIAS("platform:samsung-uart");
1571MODULE_DESCRIPTION("Samsung SoC Serial port driver"); 1696MODULE_DESCRIPTION("Samsung SoC Serial port driver");
1572MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 1697MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
1573MODULE_LICENSE("GPL v2"); 1698MODULE_LICENSE("GPL v2");
diff --git a/drivers/tty/serial/samsung.h b/drivers/tty/serial/samsung.h
index 8e87b788e5c6..1a4bca3e4179 100644
--- a/drivers/tty/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
@@ -19,20 +19,25 @@ struct s3c24xx_uart_info {
19 unsigned long tx_fifomask; 19 unsigned long tx_fifomask;
20 unsigned long tx_fifoshift; 20 unsigned long tx_fifoshift;
21 unsigned long tx_fifofull; 21 unsigned long tx_fifofull;
22 unsigned int def_clk_sel;
23 unsigned long num_clks;
24 unsigned long clksel_mask;
25 unsigned long clksel_shift;
22 26
23 /* uart port features */ 27 /* uart port features */
24 28
25 unsigned int has_divslot:1; 29 unsigned int has_divslot:1;
26 30
27 /* clock source control */
28
29 int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);
30 int (*set_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);
31
32 /* uart controls */ 31 /* uart controls */
33 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); 32 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *);
34}; 33};
35 34
35struct s3c24xx_serial_drv_data {
36 struct s3c24xx_uart_info *info;
37 struct s3c2410_uartcfg *def_cfg;
38 unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS];
39};
40
36struct s3c24xx_uart_port { 41struct s3c24xx_uart_port {
37 unsigned char rx_claimed; 42 unsigned char rx_claimed;
38 unsigned char tx_claimed; 43 unsigned char tx_claimed;
@@ -43,10 +48,13 @@ struct s3c24xx_uart_port {
43 unsigned int tx_irq; 48 unsigned int tx_irq;
44 49
45 struct s3c24xx_uart_info *info; 50 struct s3c24xx_uart_info *info;
46 struct s3c24xx_uart_clksrc *clksrc;
47 struct clk *clk; 51 struct clk *clk;
48 struct clk *baudclk; 52 struct clk *baudclk;
49 struct uart_port port; 53 struct uart_port port;
54 struct s3c24xx_serial_drv_data *drv_data;
55
56 /* reference to platform data */
57 struct s3c2410_uartcfg *cfg;
50 58
51#ifdef CONFIG_CPU_FREQ 59#ifdef CONFIG_CPU_FREQ
52 struct notifier_block freq_transition; 60 struct notifier_block freq_transition;
@@ -56,7 +64,6 @@ struct s3c24xx_uart_port {
56/* conversion functions */ 64/* conversion functions */
57 65
58#define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) 66#define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev)
59#define s3c24xx_dev_to_cfg(__dev) (struct s3c2410_uartcfg *)((__dev)->platform_data)
60 67
61/* register access controls */ 68/* register access controls */
62 69
@@ -69,17 +76,6 @@ struct s3c24xx_uart_port {
69#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) 76#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg))
70#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) 77#define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg))
71 78
72extern int s3c24xx_serial_probe(struct platform_device *dev,
73 struct s3c24xx_uart_info *uart);
74
75extern int __devexit s3c24xx_serial_remove(struct platform_device *dev);
76
77extern int s3c24xx_serial_initconsole(struct platform_driver *drv,
78 struct s3c24xx_uart_info **uart);
79
80extern int s3c24xx_serial_init(struct platform_driver *drv,
81 struct s3c24xx_uart_info *info);
82
83#ifdef CONFIG_SERIAL_SAMSUNG_DEBUG 79#ifdef CONFIG_SERIAL_SAMSUNG_DEBUG
84 80
85extern void printascii(const char *); 81extern void printascii(const char *);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-25 06:25:35 -0500