diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/usb/host/xhci.c | 6 | ||||
| -rw-r--r-- | drivers/usb/host/xhci.h | 66 |
2 files changed, 36 insertions, 36 deletions
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index 02e2697b727c..02b5ea790a90 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c | |||
| @@ -33,8 +33,8 @@ static int link_quirk; | |||
| 33 | module_param(link_quirk, int, S_IRUGO | S_IWUSR); | 33 | module_param(link_quirk, int, S_IRUGO | S_IWUSR); |
| 34 | MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB"); | 34 | MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB"); |
| 35 | 35 | ||
| 36 | static unsigned int quirks; | 36 | static unsigned long long quirks; |
| 37 | module_param(quirks, uint, S_IRUGO); | 37 | module_param(quirks, ullong, S_IRUGO); |
| 38 | MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default"); | 38 | MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default"); |
| 39 | 39 | ||
| 40 | /* TODO: copied from ehci-hcd.c - can this be refactored? */ | 40 | /* TODO: copied from ehci-hcd.c - can this be refactored? */ |
| @@ -4959,7 +4959,7 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) | |||
| 4959 | return retval; | 4959 | return retval; |
| 4960 | xhci_dbg(xhci, "Called HCD init\n"); | 4960 | xhci_dbg(xhci, "Called HCD init\n"); |
| 4961 | 4961 | ||
| 4962 | xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%08x\n", | 4962 | xhci_info(xhci, "hcc params 0x%08x hci version 0x%x quirks 0x%016llx\n", |
| 4963 | xhci->hcc_params, xhci->hci_version, xhci->quirks); | 4963 | xhci->hcc_params, xhci->hci_version, xhci->quirks); |
| 4964 | 4964 | ||
| 4965 | return 0; | 4965 | return 0; |
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 6c5f00178d09..2303ee4307af 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h | |||
| @@ -1797,12 +1797,12 @@ struct xhci_hcd { | |||
| 1797 | #define XHCI_STATE_DYING (1 << 0) | 1797 | #define XHCI_STATE_DYING (1 << 0) |
| 1798 | #define XHCI_STATE_HALTED (1 << 1) | 1798 | #define XHCI_STATE_HALTED (1 << 1) |
| 1799 | #define XHCI_STATE_REMOVING (1 << 2) | 1799 | #define XHCI_STATE_REMOVING (1 << 2) |
| 1800 | unsigned int quirks; | 1800 | unsigned long long quirks; |
| 1801 | #define XHCI_LINK_TRB_QUIRK (1 << 0) | 1801 | #define XHCI_LINK_TRB_QUIRK BIT_ULL(0) |
| 1802 | #define XHCI_RESET_EP_QUIRK (1 << 1) | 1802 | #define XHCI_RESET_EP_QUIRK BIT_ULL(1) |
| 1803 | #define XHCI_NEC_HOST (1 << 2) | 1803 | #define XHCI_NEC_HOST BIT_ULL(2) |
| 1804 | #define XHCI_AMD_PLL_FIX (1 << 3) | 1804 | #define XHCI_AMD_PLL_FIX BIT_ULL(3) |
| 1805 | #define XHCI_SPURIOUS_SUCCESS (1 << 4) | 1805 | #define XHCI_SPURIOUS_SUCCESS BIT_ULL(4) |
| 1806 | /* | 1806 | /* |
| 1807 | * Certain Intel host controllers have a limit to the number of endpoint | 1807 | * Certain Intel host controllers have a limit to the number of endpoint |
| 1808 | * contexts they can handle. Ideally, they would signal that they can't handle | 1808 | * contexts they can handle. Ideally, they would signal that they can't handle |
| @@ -1812,35 +1812,35 @@ struct xhci_hcd { | |||
| 1812 | * commands, reset device commands, disable slot commands, and address device | 1812 | * commands, reset device commands, disable slot commands, and address device |
| 1813 | * commands. | 1813 | * commands. |
| 1814 | */ | 1814 | */ |
| 1815 | #define XHCI_EP_LIMIT_QUIRK (1 << 5) | 1815 | #define XHCI_EP_LIMIT_QUIRK BIT_ULL(5) |
| 1816 | #define XHCI_BROKEN_MSI (1 << 6) | 1816 | #define XHCI_BROKEN_MSI BIT_ULL(6) |
| 1817 | #define XHCI_RESET_ON_RESUME (1 << 7) | 1817 | #define XHCI_RESET_ON_RESUME BIT_ULL(7) |
| 1818 | #define XHCI_SW_BW_CHECKING (1 << 8) | 1818 | #define XHCI_SW_BW_CHECKING BIT_ULL(8) |
| 1819 | #define XHCI_AMD_0x96_HOST (1 << 9) | 1819 | #define XHCI_AMD_0x96_HOST BIT_ULL(9) |
| 1820 | #define XHCI_TRUST_TX_LENGTH (1 << 10) | 1820 | #define XHCI_TRUST_TX_LENGTH BIT_ULL(10) |
| 1821 | #define XHCI_LPM_SUPPORT (1 << 11) | 1821 | #define XHCI_LPM_SUPPORT BIT_ULL(11) |
| 1822 | #define XHCI_INTEL_HOST (1 << 12) | 1822 | #define XHCI_INTEL_HOST BIT_ULL(12) |
| 1823 | #define XHCI_SPURIOUS_REBOOT (1 << 13) | 1823 | #define XHCI_SPURIOUS_REBOOT BIT_ULL(13) |
| 1824 | #define XHCI_COMP_MODE_QUIRK (1 << 14) | 1824 | #define XHCI_COMP_MODE_QUIRK BIT_ULL(14) |
| 1825 | #define XHCI_AVOID_BEI (1 << 15) | 1825 | #define XHCI_AVOID_BEI BIT_ULL(15) |
| 1826 | #define XHCI_PLAT (1 << 16) | 1826 | #define XHCI_PLAT BIT_ULL(16) |
| 1827 | #define XHCI_SLOW_SUSPEND (1 << 17) | 1827 | #define XHCI_SLOW_SUSPEND BIT_ULL(17) |
| 1828 | #define XHCI_SPURIOUS_WAKEUP (1 << 18) | 1828 | #define XHCI_SPURIOUS_WAKEUP BIT_ULL(18) |
| 1829 | /* For controllers with a broken beyond repair streams implementation */ | 1829 | /* For controllers with a broken beyond repair streams implementation */ |
| 1830 | #define XHCI_BROKEN_STREAMS (1 << 19) | 1830 | #define XHCI_BROKEN_STREAMS BIT_ULL(19) |
| 1831 | #define XHCI_PME_STUCK_QUIRK (1 << 20) | 1831 | #define XHCI_PME_STUCK_QUIRK BIT_ULL(20) |
| 1832 | #define XHCI_MTK_HOST (1 << 21) | 1832 | #define XHCI_MTK_HOST BIT_ULL(21) |
| 1833 | #define XHCI_SSIC_PORT_UNUSED (1 << 22) | 1833 | #define XHCI_SSIC_PORT_UNUSED BIT_ULL(22) |
| 1834 | #define XHCI_NO_64BIT_SUPPORT (1 << 23) | 1834 | #define XHCI_NO_64BIT_SUPPORT BIT_ULL(23) |
| 1835 | #define XHCI_MISSING_CAS (1 << 24) | 1835 | #define XHCI_MISSING_CAS BIT_ULL(24) |
| 1836 | /* For controller with a broken Port Disable implementation */ | 1836 | /* For controller with a broken Port Disable implementation */ |
| 1837 | #define XHCI_BROKEN_PORT_PED (1 << 25) | 1837 | #define XHCI_BROKEN_PORT_PED BIT_ULL(25) |
| 1838 | #define XHCI_LIMIT_ENDPOINT_INTERVAL_7 (1 << 26) | 1838 | #define XHCI_LIMIT_ENDPOINT_INTERVAL_7 BIT_ULL(26) |
| 1839 | #define XHCI_U2_DISABLE_WAKE (1 << 27) | 1839 | #define XHCI_U2_DISABLE_WAKE BIT_ULL(27) |
| 1840 | #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL (1 << 28) | 1840 | #define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28) |
| 1841 | #define XHCI_HW_LPM_DISABLE (1 << 29) | 1841 | #define XHCI_HW_LPM_DISABLE BIT_ULL(29) |
| 1842 | #define XHCI_SUSPEND_DELAY (1 << 30) | 1842 | #define XHCI_SUSPEND_DELAY BIT_ULL(30) |
| 1843 | #define XHCI_INTEL_USB_ROLE_SW (1 << 31) | 1843 | #define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31) |
| 1844 | 1844 | ||
| 1845 | unsigned int num_active_eps; | 1845 | unsigned int num_active_eps; |
| 1846 | unsigned int limit_active_eps; | 1846 | unsigned int limit_active_eps; |
