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path: root/drivers/video/fbdev/omap2/dss/hdmi5.c
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Diffstat (limited to 'drivers/video/fbdev/omap2/dss/hdmi5.c')
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi5.c9
1 files changed, 3 insertions, 6 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5.c b/drivers/video/fbdev/omap2/dss/hdmi5.c
index c053d692ec16..e8ca9106c8af 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi5.c
@@ -198,7 +198,6 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
198 int r; 198 int r;
199 struct omap_video_timings *p; 199 struct omap_video_timings *p;
200 struct omap_overlay_manager *mgr = hdmi.output.manager; 200 struct omap_overlay_manager *mgr = hdmi.output.manager;
201 unsigned long phy;
202 201
203 r = hdmi_power_on_core(dssdev); 202 r = hdmi_power_on_core(dssdev);
204 if (r) 203 if (r)
@@ -208,10 +207,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
208 207
209 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res); 208 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
210 209
211 /* the functions below use kHz pixel clock. TODO: change to Hz */ 210 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock);
212 phy = p->pixelclock / 1000;
213
214 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy);
215 211
216 /* disable and clear irqs */ 212 /* disable and clear irqs */
217 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); 213 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
@@ -225,7 +221,8 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
225 goto err_pll_enable; 221 goto err_pll_enable;
226 } 222 }
227 223
228 r = hdmi_phy_configure(&hdmi.phy, &hdmi.cfg); 224 r = hdmi_phy_configure(&hdmi.phy, hdmi.pll.info.clkdco,
225 hdmi.pll.info.clkout);
229 if (r) { 226 if (r) {
230 DSSDBG("Failed to start PHY\n"); 227 DSSDBG("Failed to start PHY\n");
231 goto err_phy_cfg; 228 goto err_phy_cfg;