diff options
Diffstat (limited to 'drivers/usb/phy')
26 files changed, 248 insertions, 1740 deletions
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig index e253fa05be68..c6d0c8e745b9 100644 --- a/drivers/usb/phy/Kconfig +++ b/drivers/usb/phy/Kconfig | |||
| @@ -20,7 +20,7 @@ config AB8500_USB | |||
| 20 | 20 | ||
| 21 | config FSL_USB2_OTG | 21 | config FSL_USB2_OTG |
| 22 | bool "Freescale USB OTG Transceiver Driver" | 22 | bool "Freescale USB OTG Transceiver Driver" |
| 23 | depends on USB_EHCI_FSL && USB_FSL_USB2 && USB_OTG_FSM && PM_RUNTIME | 23 | depends on USB_EHCI_FSL && USB_FSL_USB2 && USB_OTG_FSM && PM |
| 24 | select USB_OTG | 24 | select USB_OTG |
| 25 | select USB_PHY | 25 | select USB_PHY |
| 26 | help | 26 | help |
| @@ -78,22 +78,6 @@ config SAMSUNG_USBPHY | |||
| 78 | This driver provides common interface to interact, for Samsung USB 2.0 PHY | 78 | This driver provides common interface to interact, for Samsung USB 2.0 PHY |
| 79 | driver and later for Samsung USB 3.0 PHY driver. | 79 | driver and later for Samsung USB 3.0 PHY driver. |
| 80 | 80 | ||
| 81 | config SAMSUNG_USB2PHY | ||
| 82 | tristate "Samsung USB 2.0 PHY controller Driver" | ||
| 83 | select SAMSUNG_USBPHY | ||
| 84 | select USB_PHY | ||
| 85 | help | ||
| 86 | Enable this to support Samsung USB 2.0 (High Speed) PHY controller | ||
| 87 | driver for Samsung SoCs. | ||
| 88 | |||
| 89 | config SAMSUNG_USB3PHY | ||
| 90 | tristate "Samsung USB 3.0 PHY controller Driver" | ||
| 91 | select SAMSUNG_USBPHY | ||
| 92 | select USB_PHY | ||
| 93 | help | ||
| 94 | Enable this to support Samsung USB 3.0 (Super Speed) phy controller | ||
| 95 | for samsung SoCs. | ||
| 96 | |||
| 97 | config TWL6030_USB | 81 | config TWL6030_USB |
| 98 | tristate "TWL6030 USB Transceiver Driver" | 82 | tristate "TWL6030 USB Transceiver Driver" |
| 99 | depends on TWL4030_CORE && OMAP_USB2 && USB_MUSB_OMAP2PLUS | 83 | depends on TWL4030_CORE && OMAP_USB2 && USB_MUSB_OMAP2PLUS |
| @@ -169,7 +153,7 @@ config USB_MSM_OTG | |||
| 169 | 153 | ||
| 170 | config USB_MV_OTG | 154 | config USB_MV_OTG |
| 171 | tristate "Marvell USB OTG support" | 155 | tristate "Marvell USB OTG support" |
| 172 | depends on USB_EHCI_MV && USB_MV_UDC && PM_RUNTIME | 156 | depends on USB_EHCI_MV && USB_MV_UDC && PM |
| 173 | select USB_OTG | 157 | select USB_OTG |
| 174 | select USB_PHY | 158 | select USB_PHY |
| 175 | help | 159 | help |
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile index 24a91332d4ad..75f2bba58c84 100644 --- a/drivers/usb/phy/Makefile +++ b/drivers/usb/phy/Makefile | |||
| @@ -15,8 +15,6 @@ obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o | |||
| 15 | obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o | 15 | obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o |
| 16 | obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o | 16 | obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o |
| 17 | obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o | 17 | obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o |
| 18 | obj-$(CONFIG_SAMSUNG_USB2PHY) += phy-samsung-usb2.o | ||
| 19 | obj-$(CONFIG_SAMSUNG_USB3PHY) += phy-samsung-usb3.o | ||
| 20 | obj-$(CONFIG_TWL6030_USB) += phy-twl6030-usb.o | 18 | obj-$(CONFIG_TWL6030_USB) += phy-twl6030-usb.o |
| 21 | obj-$(CONFIG_USB_EHCI_TEGRA) += phy-tegra-usb.o | 19 | obj-$(CONFIG_USB_EHCI_TEGRA) += phy-tegra-usb.o |
| 22 | obj-$(CONFIG_USB_GPIO_VBUS) += phy-gpio-vbus-usb.o | 20 | obj-$(CONFIG_USB_GPIO_VBUS) += phy-gpio-vbus-usb.o |
diff --git a/drivers/usb/phy/phy-ab8500-usb.c b/drivers/usb/phy/phy-ab8500-usb.c index 11ab2c45e462..0b1bd2369293 100644 --- a/drivers/usb/phy/phy-ab8500-usb.c +++ b/drivers/usb/phy/phy-ab8500-usb.c | |||
| @@ -1,6 +1,4 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * drivers/usb/otg/ab8500_usb.c | ||
| 3 | * | ||
| 4 | * USB transceiver driver for AB8500 family chips | 2 | * USB transceiver driver for AB8500 family chips |
| 5 | * | 3 | * |
| 6 | * Copyright (C) 2010-2013 ST-Ericsson AB | 4 | * Copyright (C) 2010-2013 ST-Ericsson AB |
| @@ -446,7 +444,8 @@ static int ab9540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 446 | if (event != UX500_MUSB_RIDB) | 444 | if (event != UX500_MUSB_RIDB) |
| 447 | event = UX500_MUSB_NONE; | 445 | event = UX500_MUSB_NONE; |
| 448 | /* Fallback to default B_IDLE as nothing is connected. */ | 446 | /* Fallback to default B_IDLE as nothing is connected. */ |
| 449 | ab->phy.state = OTG_STATE_B_IDLE; | 447 | ab->phy.otg->state = OTG_STATE_B_IDLE; |
| 448 | usb_phy_set_event(&ab->phy, USB_EVENT_NONE); | ||
| 450 | break; | 449 | break; |
| 451 | 450 | ||
| 452 | case USB_LINK_ACA_RID_C_NM_9540: | 451 | case USB_LINK_ACA_RID_C_NM_9540: |
| @@ -461,12 +460,14 @@ static int ab9540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 461 | ab8500_usb_peri_phy_en(ab); | 460 | ab8500_usb_peri_phy_en(ab); |
| 462 | atomic_notifier_call_chain(&ab->phy.notifier, | 461 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 463 | UX500_MUSB_PREPARE, &ab->vbus_draw); | 462 | UX500_MUSB_PREPARE, &ab->vbus_draw); |
| 463 | usb_phy_set_event(&ab->phy, USB_EVENT_ENUMERATED); | ||
| 464 | } | 464 | } |
| 465 | if (ab->mode == USB_IDLE) { | 465 | if (ab->mode == USB_IDLE) { |
| 466 | ab->mode = USB_PERIPHERAL; | 466 | ab->mode = USB_PERIPHERAL; |
| 467 | ab8500_usb_peri_phy_en(ab); | 467 | ab8500_usb_peri_phy_en(ab); |
| 468 | atomic_notifier_call_chain(&ab->phy.notifier, | 468 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 469 | UX500_MUSB_PREPARE, &ab->vbus_draw); | 469 | UX500_MUSB_PREPARE, &ab->vbus_draw); |
| 470 | usb_phy_set_event(&ab->phy, USB_EVENT_ENUMERATED); | ||
| 470 | } | 471 | } |
| 471 | if (event != UX500_MUSB_RIDC) | 472 | if (event != UX500_MUSB_RIDC) |
| 472 | event = UX500_MUSB_VBUS; | 473 | event = UX500_MUSB_VBUS; |
| @@ -502,6 +503,7 @@ static int ab9540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 502 | event = UX500_MUSB_CHARGER; | 503 | event = UX500_MUSB_CHARGER; |
| 503 | atomic_notifier_call_chain(&ab->phy.notifier, | 504 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 504 | event, &ab->vbus_draw); | 505 | event, &ab->vbus_draw); |
| 506 | usb_phy_set_event(&ab->phy, USB_EVENT_CHARGER); | ||
| 505 | break; | 507 | break; |
| 506 | 508 | ||
| 507 | case USB_LINK_PHYEN_NO_VBUS_NO_IDGND_9540: | 509 | case USB_LINK_PHYEN_NO_VBUS_NO_IDGND_9540: |
| @@ -526,6 +528,7 @@ static int ab9540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 526 | ab->mode = USB_IDLE; | 528 | ab->mode = USB_IDLE; |
| 527 | ab->phy.otg->default_a = false; | 529 | ab->phy.otg->default_a = false; |
| 528 | ab->vbus_draw = 0; | 530 | ab->vbus_draw = 0; |
| 531 | usb_phy_set_event(&ab->phy, USB_EVENT_NONE); | ||
| 529 | } | 532 | } |
| 530 | } | 533 | } |
| 531 | break; | 534 | break; |
| @@ -584,7 +587,8 @@ static int ab8540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 584 | * Fallback to default B_IDLE as nothing | 587 | * Fallback to default B_IDLE as nothing |
| 585 | * is connected | 588 | * is connected |
| 586 | */ | 589 | */ |
| 587 | ab->phy.state = OTG_STATE_B_IDLE; | 590 | ab->phy.otg->state = OTG_STATE_B_IDLE; |
| 591 | usb_phy_set_event(&ab->phy, USB_EVENT_NONE); | ||
| 588 | break; | 592 | break; |
| 589 | 593 | ||
| 590 | case USB_LINK_ACA_RID_C_NM_8540: | 594 | case USB_LINK_ACA_RID_C_NM_8540: |
| @@ -598,6 +602,7 @@ static int ab8540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 598 | ab8500_usb_peri_phy_en(ab); | 602 | ab8500_usb_peri_phy_en(ab); |
| 599 | atomic_notifier_call_chain(&ab->phy.notifier, | 603 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 600 | UX500_MUSB_PREPARE, &ab->vbus_draw); | 604 | UX500_MUSB_PREPARE, &ab->vbus_draw); |
| 605 | usb_phy_set_event(&ab->phy, USB_EVENT_ENUMERATED); | ||
| 601 | } | 606 | } |
| 602 | if (event != UX500_MUSB_RIDC) | 607 | if (event != UX500_MUSB_RIDC) |
| 603 | event = UX500_MUSB_VBUS; | 608 | event = UX500_MUSB_VBUS; |
| @@ -626,6 +631,7 @@ static int ab8540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 626 | event = UX500_MUSB_CHARGER; | 631 | event = UX500_MUSB_CHARGER; |
| 627 | atomic_notifier_call_chain(&ab->phy.notifier, | 632 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 628 | event, &ab->vbus_draw); | 633 | event, &ab->vbus_draw); |
| 634 | usb_phy_set_event(&ab->phy, USB_EVENT_CHARGER); | ||
| 629 | break; | 635 | break; |
| 630 | 636 | ||
| 631 | case USB_LINK_PHYEN_NO_VBUS_NO_IDGND_8540: | 637 | case USB_LINK_PHYEN_NO_VBUS_NO_IDGND_8540: |
| @@ -648,6 +654,7 @@ static int ab8540_usb_link_status_update(struct ab8500_usb *ab, | |||
| 648 | ab->mode = USB_IDLE; | 654 | ab->mode = USB_IDLE; |
| 649 | ab->phy.otg->default_a = false; | 655 | ab->phy.otg->default_a = false; |
| 650 | ab->vbus_draw = 0; | 656 | ab->vbus_draw = 0; |
| 657 | usb_phy_set_event(&ab->phy, USB_EVENT_NONE); | ||
| 651 | } | 658 | } |
| 652 | break; | 659 | break; |
| 653 | 660 | ||
| @@ -693,7 +700,8 @@ static int ab8505_usb_link_status_update(struct ab8500_usb *ab, | |||
| 693 | * Fallback to default B_IDLE as nothing | 700 | * Fallback to default B_IDLE as nothing |
| 694 | * is connected | 701 | * is connected |
| 695 | */ | 702 | */ |
| 696 | ab->phy.state = OTG_STATE_B_IDLE; | 703 | ab->phy.otg->state = OTG_STATE_B_IDLE; |
| 704 | usb_phy_set_event(&ab->phy, USB_EVENT_NONE); | ||
| 697 | break; | 705 | break; |
| 698 | 706 | ||
| 699 | case USB_LINK_ACA_RID_C_NM_8505: | 707 | case USB_LINK_ACA_RID_C_NM_8505: |
| @@ -707,6 +715,7 @@ static int ab8505_usb_link_status_update(struct ab8500_usb *ab, | |||
| 707 | ab8500_usb_peri_phy_en(ab); | 715 | ab8500_usb_peri_phy_en(ab); |
| 708 | atomic_notifier_call_chain(&ab->phy.notifier, | 716 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 709 | UX500_MUSB_PREPARE, &ab->vbus_draw); | 717 | UX500_MUSB_PREPARE, &ab->vbus_draw); |
| 718 | usb_phy_set_event(&ab->phy, USB_EVENT_ENUMERATED); | ||
| 710 | } | 719 | } |
| 711 | if (event != UX500_MUSB_RIDC) | 720 | if (event != UX500_MUSB_RIDC) |
| 712 | event = UX500_MUSB_VBUS; | 721 | event = UX500_MUSB_VBUS; |
| @@ -734,6 +743,7 @@ static int ab8505_usb_link_status_update(struct ab8500_usb *ab, | |||
| 734 | event = UX500_MUSB_CHARGER; | 743 | event = UX500_MUSB_CHARGER; |
| 735 | atomic_notifier_call_chain(&ab->phy.notifier, | 744 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 736 | event, &ab->vbus_draw); | 745 | event, &ab->vbus_draw); |
| 746 | usb_phy_set_event(&ab->phy, USB_EVENT_CHARGER); | ||
| 737 | break; | 747 | break; |
| 738 | 748 | ||
| 739 | default: | 749 | default: |
| @@ -776,7 +786,8 @@ static int ab8500_usb_link_status_update(struct ab8500_usb *ab, | |||
| 776 | if (event != UX500_MUSB_RIDB) | 786 | if (event != UX500_MUSB_RIDB) |
| 777 | event = UX500_MUSB_NONE; | 787 | event = UX500_MUSB_NONE; |
| 778 | /* Fallback to default B_IDLE as nothing is connected */ | 788 | /* Fallback to default B_IDLE as nothing is connected */ |
| 779 | ab->phy.state = OTG_STATE_B_IDLE; | 789 | ab->phy.otg->state = OTG_STATE_B_IDLE; |
| 790 | usb_phy_set_event(&ab->phy, USB_EVENT_NONE); | ||
| 780 | break; | 791 | break; |
| 781 | 792 | ||
| 782 | case USB_LINK_ACA_RID_C_NM_8500: | 793 | case USB_LINK_ACA_RID_C_NM_8500: |
| @@ -794,6 +805,7 @@ static int ab8500_usb_link_status_update(struct ab8500_usb *ab, | |||
| 794 | ab8500_usb_peri_phy_en(ab); | 805 | ab8500_usb_peri_phy_en(ab); |
| 795 | atomic_notifier_call_chain(&ab->phy.notifier, | 806 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 796 | UX500_MUSB_PREPARE, &ab->vbus_draw); | 807 | UX500_MUSB_PREPARE, &ab->vbus_draw); |
| 808 | usb_phy_set_event(&ab->phy, USB_EVENT_ENUMERATED); | ||
| 797 | } | 809 | } |
| 798 | if (event != UX500_MUSB_RIDC) | 810 | if (event != UX500_MUSB_RIDC) |
| 799 | event = UX500_MUSB_VBUS; | 811 | event = UX500_MUSB_VBUS; |
| @@ -820,6 +832,7 @@ static int ab8500_usb_link_status_update(struct ab8500_usb *ab, | |||
| 820 | event = UX500_MUSB_CHARGER; | 832 | event = UX500_MUSB_CHARGER; |
| 821 | atomic_notifier_call_chain(&ab->phy.notifier, | 833 | atomic_notifier_call_chain(&ab->phy.notifier, |
| 822 | event, &ab->vbus_draw); | 834 | event, &ab->vbus_draw); |
| 835 | usb_phy_set_event(&ab->phy, USB_EVENT_CHARGER); | ||
| 823 | break; | 836 | break; |
| 824 | 837 | ||
| 825 | case USB_LINK_RESERVED_8500: | 838 | case USB_LINK_RESERVED_8500: |
| @@ -1056,7 +1069,7 @@ static int ab8500_usb_set_peripheral(struct usb_otg *otg, | |||
| 1056 | if (!otg) | 1069 | if (!otg) |
| 1057 | return -ENODEV; | 1070 | return -ENODEV; |
| 1058 | 1071 | ||
| 1059 | ab = phy_to_ab(otg->phy); | 1072 | ab = phy_to_ab(otg->usb_phy); |
| 1060 | 1073 | ||
| 1061 | ab->phy.otg->gadget = gadget; | 1074 | ab->phy.otg->gadget = gadget; |
| 1062 | 1075 | ||
| @@ -1080,7 +1093,7 @@ static int ab8500_usb_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 1080 | if (!otg) | 1093 | if (!otg) |
| 1081 | return -ENODEV; | 1094 | return -ENODEV; |
| 1082 | 1095 | ||
| 1083 | ab = phy_to_ab(otg->phy); | 1096 | ab = phy_to_ab(otg->usb_phy); |
| 1084 | 1097 | ||
| 1085 | ab->phy.otg->host = host; | 1098 | ab->phy.otg->host = host; |
| 1086 | 1099 | ||
| @@ -1380,9 +1393,9 @@ static int ab8500_usb_probe(struct platform_device *pdev) | |||
| 1380 | ab->phy.label = "ab8500"; | 1393 | ab->phy.label = "ab8500"; |
| 1381 | ab->phy.set_suspend = ab8500_usb_set_suspend; | 1394 | ab->phy.set_suspend = ab8500_usb_set_suspend; |
| 1382 | ab->phy.set_power = ab8500_usb_set_power; | 1395 | ab->phy.set_power = ab8500_usb_set_power; |
| 1383 | ab->phy.state = OTG_STATE_UNDEFINED; | 1396 | ab->phy.otg->state = OTG_STATE_UNDEFINED; |
| 1384 | 1397 | ||
| 1385 | otg->phy = &ab->phy; | 1398 | otg->usb_phy = &ab->phy; |
| 1386 | otg->set_host = ab8500_usb_set_host; | 1399 | otg->set_host = ab8500_usb_set_host; |
| 1387 | otg->set_peripheral = ab8500_usb_set_peripheral; | 1400 | otg->set_peripheral = ab8500_usb_set_peripheral; |
| 1388 | 1401 | ||
| @@ -1505,7 +1518,6 @@ static struct platform_driver ab8500_usb_driver = { | |||
| 1505 | .id_table = ab8500_usb_devtype, | 1518 | .id_table = ab8500_usb_devtype, |
| 1506 | .driver = { | 1519 | .driver = { |
| 1507 | .name = "abx5x0-usb", | 1520 | .name = "abx5x0-usb", |
| 1508 | .owner = THIS_MODULE, | ||
| 1509 | }, | 1521 | }, |
| 1510 | }; | 1522 | }; |
| 1511 | 1523 | ||
diff --git a/drivers/usb/phy/phy-am335x-control.c b/drivers/usb/phy/phy-am335x-control.c index 35b6083b7999..403fab772724 100644 --- a/drivers/usb/phy/phy-am335x-control.c +++ b/drivers/usb/phy/phy-am335x-control.c | |||
| @@ -147,10 +147,8 @@ static int am335x_control_usb_probe(struct platform_device *pdev) | |||
| 147 | phy_ctrl = of_id->data; | 147 | phy_ctrl = of_id->data; |
| 148 | 148 | ||
| 149 | ctrl_usb = devm_kzalloc(&pdev->dev, sizeof(*ctrl_usb), GFP_KERNEL); | 149 | ctrl_usb = devm_kzalloc(&pdev->dev, sizeof(*ctrl_usb), GFP_KERNEL); |
| 150 | if (!ctrl_usb) { | 150 | if (!ctrl_usb) |
| 151 | dev_err(&pdev->dev, "unable to alloc memory for control usb\n"); | ||
| 152 | return -ENOMEM; | 151 | return -ENOMEM; |
| 153 | } | ||
| 154 | 152 | ||
| 155 | ctrl_usb->dev = &pdev->dev; | 153 | ctrl_usb->dev = &pdev->dev; |
| 156 | 154 | ||
| @@ -175,7 +173,6 @@ static struct platform_driver am335x_control_driver = { | |||
| 175 | .probe = am335x_control_usb_probe, | 173 | .probe = am335x_control_usb_probe, |
| 176 | .driver = { | 174 | .driver = { |
| 177 | .name = "am335x-control-usb", | 175 | .name = "am335x-control-usb", |
| 178 | .owner = THIS_MODULE, | ||
| 179 | .of_match_table = omap_control_usb_id_table, | 176 | .of_match_table = omap_control_usb_id_table, |
| 180 | }, | 177 | }, |
| 181 | }; | 178 | }; |
diff --git a/drivers/usb/phy/phy-am335x.c b/drivers/usb/phy/phy-am335x.c index b70e05537180..90b67a4ca221 100644 --- a/drivers/usb/phy/phy-am335x.c +++ b/drivers/usb/phy/phy-am335x.c | |||
| @@ -137,7 +137,6 @@ static struct platform_driver am335x_phy_driver = { | |||
| 137 | .remove = am335x_phy_remove, | 137 | .remove = am335x_phy_remove, |
| 138 | .driver = { | 138 | .driver = { |
| 139 | .name = "am335x-phy-driver", | 139 | .name = "am335x-phy-driver", |
| 140 | .owner = THIS_MODULE, | ||
| 141 | .pm = &am335x_pm_ops, | 140 | .pm = &am335x_pm_ops, |
| 142 | .of_match_table = am335x_phy_ids, | 141 | .of_match_table = am335x_phy_ids, |
| 143 | }, | 142 | }, |
diff --git a/drivers/usb/phy/phy-fsl-usb.c b/drivers/usb/phy/phy-fsl-usb.c index 2b0f968d9325..ab38aa32a6c1 100644 --- a/drivers/usb/phy/phy-fsl-usb.c +++ b/drivers/usb/phy/phy-fsl-usb.c | |||
| @@ -274,7 +274,7 @@ void b_srp_end(unsigned long foo) | |||
| 274 | fsl_otg_dischrg_vbus(0); | 274 | fsl_otg_dischrg_vbus(0); |
| 275 | srp_wait_done = 1; | 275 | srp_wait_done = 1; |
| 276 | 276 | ||
| 277 | if ((fsl_otg_dev->phy.state == OTG_STATE_B_SRP_INIT) && | 277 | if ((fsl_otg_dev->phy.otg->state == OTG_STATE_B_SRP_INIT) && |
| 278 | fsl_otg_dev->fsm.b_sess_vld) | 278 | fsl_otg_dev->fsm.b_sess_vld) |
| 279 | fsl_otg_dev->fsm.b_srp_done = 1; | 279 | fsl_otg_dev->fsm.b_srp_done = 1; |
| 280 | } | 280 | } |
| @@ -499,7 +499,8 @@ int fsl_otg_start_host(struct otg_fsm *fsm, int on) | |||
| 499 | { | 499 | { |
| 500 | struct usb_otg *otg = fsm->otg; | 500 | struct usb_otg *otg = fsm->otg; |
| 501 | struct device *dev; | 501 | struct device *dev; |
| 502 | struct fsl_otg *otg_dev = container_of(otg->phy, struct fsl_otg, phy); | 502 | struct fsl_otg *otg_dev = |
| 503 | container_of(otg->usb_phy, struct fsl_otg, phy); | ||
| 503 | u32 retval = 0; | 504 | u32 retval = 0; |
| 504 | 505 | ||
| 505 | if (!otg->host) | 506 | if (!otg->host) |
| @@ -594,7 +595,7 @@ static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 594 | if (!otg) | 595 | if (!otg) |
| 595 | return -ENODEV; | 596 | return -ENODEV; |
| 596 | 597 | ||
| 597 | otg_dev = container_of(otg->phy, struct fsl_otg, phy); | 598 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
| 598 | if (otg_dev != fsl_otg_dev) | 599 | if (otg_dev != fsl_otg_dev) |
| 599 | return -ENODEV; | 600 | return -ENODEV; |
| 600 | 601 | ||
| @@ -609,7 +610,7 @@ static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 609 | otg->host->otg_port = fsl_otg_initdata.otg_port; | 610 | otg->host->otg_port = fsl_otg_initdata.otg_port; |
| 610 | otg->host->is_b_host = otg_dev->fsm.id; | 611 | otg->host->is_b_host = otg_dev->fsm.id; |
| 611 | /* | 612 | /* |
| 612 | * must leave time for khubd to finish its thing | 613 | * must leave time for hub_wq to finish its thing |
| 613 | * before yanking the host driver out from under it, | 614 | * before yanking the host driver out from under it, |
| 614 | * so suspend the host after a short delay. | 615 | * so suspend the host after a short delay. |
| 615 | */ | 616 | */ |
| @@ -623,7 +624,7 @@ static int fsl_otg_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 623 | /* Mini-A cable connected */ | 624 | /* Mini-A cable connected */ |
| 624 | struct otg_fsm *fsm = &otg_dev->fsm; | 625 | struct otg_fsm *fsm = &otg_dev->fsm; |
| 625 | 626 | ||
| 626 | otg->phy->state = OTG_STATE_UNDEFINED; | 627 | otg->state = OTG_STATE_UNDEFINED; |
| 627 | fsm->protocol = PROTO_UNDEF; | 628 | fsm->protocol = PROTO_UNDEF; |
| 628 | } | 629 | } |
| 629 | } | 630 | } |
| @@ -644,7 +645,7 @@ static int fsl_otg_set_peripheral(struct usb_otg *otg, | |||
| 644 | if (!otg) | 645 | if (!otg) |
| 645 | return -ENODEV; | 646 | return -ENODEV; |
| 646 | 647 | ||
| 647 | otg_dev = container_of(otg->phy, struct fsl_otg, phy); | 648 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
| 648 | VDBG("otg_dev 0x%x\n", (int)otg_dev); | 649 | VDBG("otg_dev 0x%x\n", (int)otg_dev); |
| 649 | VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev); | 650 | VDBG("fsl_otg_dev 0x%x\n", (int)fsl_otg_dev); |
| 650 | if (otg_dev != fsl_otg_dev) | 651 | if (otg_dev != fsl_otg_dev) |
| @@ -681,7 +682,7 @@ static int fsl_otg_set_power(struct usb_phy *phy, unsigned mA) | |||
| 681 | { | 682 | { |
| 682 | if (!fsl_otg_dev) | 683 | if (!fsl_otg_dev) |
| 683 | return -ENODEV; | 684 | return -ENODEV; |
| 684 | if (phy->state == OTG_STATE_B_PERIPHERAL) | 685 | if (phy->otg->state == OTG_STATE_B_PERIPHERAL) |
| 685 | pr_info("FSL OTG: Draw %d mA\n", mA); | 686 | pr_info("FSL OTG: Draw %d mA\n", mA); |
| 686 | 687 | ||
| 687 | return 0; | 688 | return 0; |
| @@ -714,10 +715,10 @@ static int fsl_otg_start_srp(struct usb_otg *otg) | |||
| 714 | { | 715 | { |
| 715 | struct fsl_otg *otg_dev; | 716 | struct fsl_otg *otg_dev; |
| 716 | 717 | ||
| 717 | if (!otg || otg->phy->state != OTG_STATE_B_IDLE) | 718 | if (!otg || otg->state != OTG_STATE_B_IDLE) |
| 718 | return -ENODEV; | 719 | return -ENODEV; |
| 719 | 720 | ||
| 720 | otg_dev = container_of(otg->phy, struct fsl_otg, phy); | 721 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
| 721 | if (otg_dev != fsl_otg_dev) | 722 | if (otg_dev != fsl_otg_dev) |
| 722 | return -ENODEV; | 723 | return -ENODEV; |
| 723 | 724 | ||
| @@ -735,7 +736,7 @@ static int fsl_otg_start_hnp(struct usb_otg *otg) | |||
| 735 | if (!otg) | 736 | if (!otg) |
| 736 | return -ENODEV; | 737 | return -ENODEV; |
| 737 | 738 | ||
| 738 | otg_dev = container_of(otg->phy, struct fsl_otg, phy); | 739 | otg_dev = container_of(otg->usb_phy, struct fsl_otg, phy); |
| 739 | if (otg_dev != fsl_otg_dev) | 740 | if (otg_dev != fsl_otg_dev) |
| 740 | return -ENODEV; | 741 | return -ENODEV; |
| 741 | 742 | ||
| @@ -857,7 +858,7 @@ static int fsl_otg_conf(struct platform_device *pdev) | |||
| 857 | fsl_otg_tc->phy.dev = &pdev->dev; | 858 | fsl_otg_tc->phy.dev = &pdev->dev; |
| 858 | fsl_otg_tc->phy.set_power = fsl_otg_set_power; | 859 | fsl_otg_tc->phy.set_power = fsl_otg_set_power; |
| 859 | 860 | ||
| 860 | fsl_otg_tc->phy.otg->phy = &fsl_otg_tc->phy; | 861 | fsl_otg_tc->phy.otg->usb_phy = &fsl_otg_tc->phy; |
| 861 | fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host; | 862 | fsl_otg_tc->phy.otg->set_host = fsl_otg_set_host; |
| 862 | fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral; | 863 | fsl_otg_tc->phy.otg->set_peripheral = fsl_otg_set_peripheral; |
| 863 | fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp; | 864 | fsl_otg_tc->phy.otg->start_hnp = fsl_otg_start_hnp; |
| @@ -989,10 +990,10 @@ int usb_otg_start(struct platform_device *pdev) | |||
| 989 | * Also: record initial state of ID pin | 990 | * Also: record initial state of ID pin |
| 990 | */ | 991 | */ |
| 991 | if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) { | 992 | if (fsl_readl(&p_otg->dr_mem_map->otgsc) & OTGSC_STS_USB_ID) { |
| 992 | p_otg->phy.state = OTG_STATE_UNDEFINED; | 993 | p_otg->phy.otg->state = OTG_STATE_UNDEFINED; |
| 993 | p_otg->fsm.id = 1; | 994 | p_otg->fsm.id = 1; |
| 994 | } else { | 995 | } else { |
| 995 | p_otg->phy.state = OTG_STATE_A_IDLE; | 996 | p_otg->phy.otg->state = OTG_STATE_A_IDLE; |
| 996 | p_otg->fsm.id = 0; | 997 | p_otg->fsm.id = 0; |
| 997 | } | 998 | } |
| 998 | 999 | ||
| @@ -1047,7 +1048,7 @@ static int show_fsl_usb2_otg_state(struct device *dev, | |||
| 1047 | /* State */ | 1048 | /* State */ |
| 1048 | t = scnprintf(next, size, | 1049 | t = scnprintf(next, size, |
| 1049 | "OTG state: %s\n\n", | 1050 | "OTG state: %s\n\n", |
| 1050 | usb_otg_state_string(fsl_otg_dev->phy.state)); | 1051 | usb_otg_state_string(fsl_otg_dev->phy.otg->state)); |
| 1051 | size -= t; | 1052 | size -= t; |
| 1052 | next += t; | 1053 | next += t; |
| 1053 | 1054 | ||
diff --git a/drivers/usb/phy/phy-fsl-usb.h b/drivers/usb/phy/phy-fsl-usb.h index 5986c96354df..23149954a09c 100644 --- a/drivers/usb/phy/phy-fsl-usb.h +++ b/drivers/usb/phy/phy-fsl-usb.h | |||
| @@ -298,7 +298,7 @@ | |||
| 298 | /* SE0 Time Before SRP */ | 298 | /* SE0 Time Before SRP */ |
| 299 | #define TB_SE0_SRP (2) /* b_idle,minimum 2 ms, section:5.3.2 */ | 299 | #define TB_SE0_SRP (2) /* b_idle,minimum 2 ms, section:5.3.2 */ |
| 300 | 300 | ||
| 301 | #define SET_OTG_STATE(otg_ptr, newstate) ((otg_ptr)->state = newstate) | 301 | #define SET_OTG_STATE(phy, newstate) ((phy)->otg->state = newstate) |
| 302 | 302 | ||
| 303 | struct usb_dr_mmap { | 303 | struct usb_dr_mmap { |
| 304 | /* Capability register */ | 304 | /* Capability register */ |
diff --git a/drivers/usb/phy/phy-generic.c b/drivers/usb/phy/phy-generic.c index 7594e5069ae5..f1b719b45a53 100644 --- a/drivers/usb/phy/phy-generic.c +++ b/drivers/usb/phy/phy-generic.c | |||
| @@ -1,6 +1,4 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * drivers/usb/otg/nop-usb-xceiv.c | ||
| 3 | * | ||
| 4 | * NOP USB transceiver for all USB transceiver which are either built-in | 2 | * NOP USB transceiver for all USB transceiver which are either built-in |
| 5 | * into USB IP or which are mostly autonomous. | 3 | * into USB IP or which are mostly autonomous. |
| 6 | * | 4 | * |
| @@ -123,7 +121,7 @@ static int nop_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget) | |||
| 123 | } | 121 | } |
| 124 | 122 | ||
| 125 | otg->gadget = gadget; | 123 | otg->gadget = gadget; |
| 126 | otg->phy->state = OTG_STATE_B_IDLE; | 124 | otg->state = OTG_STATE_B_IDLE; |
| 127 | return 0; | 125 | return 0; |
| 128 | } | 126 | } |
| 129 | 127 | ||
| @@ -225,10 +223,10 @@ int usb_phy_gen_create_phy(struct device *dev, struct usb_phy_generic *nop, | |||
| 225 | nop->phy.dev = nop->dev; | 223 | nop->phy.dev = nop->dev; |
| 226 | nop->phy.label = "nop-xceiv"; | 224 | nop->phy.label = "nop-xceiv"; |
| 227 | nop->phy.set_suspend = nop_set_suspend; | 225 | nop->phy.set_suspend = nop_set_suspend; |
| 228 | nop->phy.state = OTG_STATE_UNDEFINED; | ||
| 229 | nop->phy.type = type; | 226 | nop->phy.type = type; |
| 230 | 227 | ||
| 231 | nop->phy.otg->phy = &nop->phy; | 228 | nop->phy.otg->state = OTG_STATE_UNDEFINED; |
| 229 | nop->phy.otg->usb_phy = &nop->phy; | ||
| 232 | nop->phy.otg->set_host = nop_set_host; | 230 | nop->phy.otg->set_host = nop_set_host; |
| 233 | nop->phy.otg->set_peripheral = nop_set_peripheral; | 231 | nop->phy.otg->set_peripheral = nop_set_peripheral; |
| 234 | 232 | ||
| @@ -286,7 +284,6 @@ static struct platform_driver usb_phy_generic_driver = { | |||
| 286 | .remove = usb_phy_generic_remove, | 284 | .remove = usb_phy_generic_remove, |
| 287 | .driver = { | 285 | .driver = { |
| 288 | .name = "usb_phy_generic", | 286 | .name = "usb_phy_generic", |
| 289 | .owner = THIS_MODULE, | ||
| 290 | .of_match_table = nop_xceiv_dt_ids, | 287 | .of_match_table = nop_xceiv_dt_ids, |
| 291 | }, | 288 | }, |
| 292 | }; | 289 | }; |
diff --git a/drivers/usb/phy/phy-gpio-vbus-usb.c b/drivers/usb/phy/phy-gpio-vbus-usb.c index f4b14bd97e14..f66120db8a41 100644 --- a/drivers/usb/phy/phy-gpio-vbus-usb.c +++ b/drivers/usb/phy/phy-gpio-vbus-usb.c | |||
| @@ -121,7 +121,7 @@ static void gpio_vbus_work(struct work_struct *work) | |||
| 121 | 121 | ||
| 122 | if (vbus) { | 122 | if (vbus) { |
| 123 | status = USB_EVENT_VBUS; | 123 | status = USB_EVENT_VBUS; |
| 124 | gpio_vbus->phy.state = OTG_STATE_B_PERIPHERAL; | 124 | gpio_vbus->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
| 125 | gpio_vbus->phy.last_event = status; | 125 | gpio_vbus->phy.last_event = status; |
| 126 | usb_gadget_vbus_connect(gpio_vbus->phy.otg->gadget); | 126 | usb_gadget_vbus_connect(gpio_vbus->phy.otg->gadget); |
| 127 | 127 | ||
| @@ -134,6 +134,7 @@ static void gpio_vbus_work(struct work_struct *work) | |||
| 134 | 134 | ||
| 135 | atomic_notifier_call_chain(&gpio_vbus->phy.notifier, | 135 | atomic_notifier_call_chain(&gpio_vbus->phy.notifier, |
| 136 | status, gpio_vbus->phy.otg->gadget); | 136 | status, gpio_vbus->phy.otg->gadget); |
| 137 | usb_phy_set_event(&gpio_vbus->phy, USB_EVENT_ENUMERATED); | ||
| 137 | } else { | 138 | } else { |
| 138 | /* optionally disable D+ pullup */ | 139 | /* optionally disable D+ pullup */ |
| 139 | if (gpio_is_valid(gpio)) | 140 | if (gpio_is_valid(gpio)) |
| @@ -143,11 +144,12 @@ static void gpio_vbus_work(struct work_struct *work) | |||
| 143 | 144 | ||
| 144 | usb_gadget_vbus_disconnect(gpio_vbus->phy.otg->gadget); | 145 | usb_gadget_vbus_disconnect(gpio_vbus->phy.otg->gadget); |
| 145 | status = USB_EVENT_NONE; | 146 | status = USB_EVENT_NONE; |
| 146 | gpio_vbus->phy.state = OTG_STATE_B_IDLE; | 147 | gpio_vbus->phy.otg->state = OTG_STATE_B_IDLE; |
| 147 | gpio_vbus->phy.last_event = status; | 148 | gpio_vbus->phy.last_event = status; |
| 148 | 149 | ||
| 149 | atomic_notifier_call_chain(&gpio_vbus->phy.notifier, | 150 | atomic_notifier_call_chain(&gpio_vbus->phy.notifier, |
| 150 | status, gpio_vbus->phy.otg->gadget); | 151 | status, gpio_vbus->phy.otg->gadget); |
| 152 | usb_phy_set_event(&gpio_vbus->phy, USB_EVENT_NONE); | ||
| 151 | } | 153 | } |
| 152 | } | 154 | } |
| 153 | 155 | ||
| @@ -180,7 +182,7 @@ static int gpio_vbus_set_peripheral(struct usb_otg *otg, | |||
| 180 | struct platform_device *pdev; | 182 | struct platform_device *pdev; |
| 181 | int gpio; | 183 | int gpio; |
| 182 | 184 | ||
| 183 | gpio_vbus = container_of(otg->phy, struct gpio_vbus_data, phy); | 185 | gpio_vbus = container_of(otg->usb_phy, struct gpio_vbus_data, phy); |
| 184 | pdev = to_platform_device(gpio_vbus->dev); | 186 | pdev = to_platform_device(gpio_vbus->dev); |
| 185 | pdata = dev_get_platdata(gpio_vbus->dev); | 187 | pdata = dev_get_platdata(gpio_vbus->dev); |
| 186 | gpio = pdata->gpio_pullup; | 188 | gpio = pdata->gpio_pullup; |
| @@ -196,7 +198,7 @@ static int gpio_vbus_set_peripheral(struct usb_otg *otg, | |||
| 196 | set_vbus_draw(gpio_vbus, 0); | 198 | set_vbus_draw(gpio_vbus, 0); |
| 197 | 199 | ||
| 198 | usb_gadget_vbus_disconnect(otg->gadget); | 200 | usb_gadget_vbus_disconnect(otg->gadget); |
| 199 | otg->phy->state = OTG_STATE_UNDEFINED; | 201 | otg->state = OTG_STATE_UNDEFINED; |
| 200 | 202 | ||
| 201 | otg->gadget = NULL; | 203 | otg->gadget = NULL; |
| 202 | return 0; | 204 | return 0; |
| @@ -218,7 +220,7 @@ static int gpio_vbus_set_power(struct usb_phy *phy, unsigned mA) | |||
| 218 | 220 | ||
| 219 | gpio_vbus = container_of(phy, struct gpio_vbus_data, phy); | 221 | gpio_vbus = container_of(phy, struct gpio_vbus_data, phy); |
| 220 | 222 | ||
| 221 | if (phy->state == OTG_STATE_B_PERIPHERAL) | 223 | if (phy->otg->state == OTG_STATE_B_PERIPHERAL) |
| 222 | set_vbus_draw(gpio_vbus, mA); | 224 | set_vbus_draw(gpio_vbus, mA); |
| 223 | return 0; | 225 | return 0; |
| 224 | } | 226 | } |
| @@ -269,9 +271,9 @@ static int gpio_vbus_probe(struct platform_device *pdev) | |||
| 269 | gpio_vbus->phy.dev = gpio_vbus->dev; | 271 | gpio_vbus->phy.dev = gpio_vbus->dev; |
| 270 | gpio_vbus->phy.set_power = gpio_vbus_set_power; | 272 | gpio_vbus->phy.set_power = gpio_vbus_set_power; |
| 271 | gpio_vbus->phy.set_suspend = gpio_vbus_set_suspend; | 273 | gpio_vbus->phy.set_suspend = gpio_vbus_set_suspend; |
| 272 | gpio_vbus->phy.state = OTG_STATE_UNDEFINED; | ||
| 273 | 274 | ||
| 274 | gpio_vbus->phy.otg->phy = &gpio_vbus->phy; | 275 | gpio_vbus->phy.otg->state = OTG_STATE_UNDEFINED; |
| 276 | gpio_vbus->phy.otg->usb_phy = &gpio_vbus->phy; | ||
| 275 | gpio_vbus->phy.otg->set_peripheral = gpio_vbus_set_peripheral; | 277 | gpio_vbus->phy.otg->set_peripheral = gpio_vbus_set_peripheral; |
| 276 | 278 | ||
| 277 | err = devm_gpio_request(&pdev->dev, gpio, "vbus_detect"); | 279 | err = devm_gpio_request(&pdev->dev, gpio, "vbus_detect"); |
| @@ -380,7 +382,6 @@ MODULE_ALIAS("platform:gpio-vbus"); | |||
| 380 | static struct platform_driver gpio_vbus_driver = { | 382 | static struct platform_driver gpio_vbus_driver = { |
| 381 | .driver = { | 383 | .driver = { |
| 382 | .name = "gpio-vbus", | 384 | .name = "gpio-vbus", |
| 383 | .owner = THIS_MODULE, | ||
| 384 | #ifdef CONFIG_PM | 385 | #ifdef CONFIG_PM |
| 385 | .pm = &gpio_vbus_dev_pm_ops, | 386 | .pm = &gpio_vbus_dev_pm_ops, |
| 386 | #endif | 387 | #endif |
diff --git a/drivers/usb/phy/phy-isp1301-omap.c b/drivers/usb/phy/phy-isp1301-omap.c index 69e49be8866b..1e0e10dd6ba5 100644 --- a/drivers/usb/phy/phy-isp1301-omap.c +++ b/drivers/usb/phy/phy-isp1301-omap.c | |||
| @@ -234,7 +234,7 @@ isp1301_clear_bits(struct isp1301 *isp, u8 reg, u8 bits) | |||
| 234 | 234 | ||
| 235 | static inline const char *state_name(struct isp1301 *isp) | 235 | static inline const char *state_name(struct isp1301 *isp) |
| 236 | { | 236 | { |
| 237 | return usb_otg_state_string(isp->phy.state); | 237 | return usb_otg_state_string(isp->phy.otg->state); |
| 238 | } | 238 | } |
| 239 | 239 | ||
| 240 | /*-------------------------------------------------------------------------*/ | 240 | /*-------------------------------------------------------------------------*/ |
| @@ -249,7 +249,7 @@ static inline const char *state_name(struct isp1301 *isp) | |||
| 249 | 249 | ||
| 250 | static void power_down(struct isp1301 *isp) | 250 | static void power_down(struct isp1301 *isp) |
| 251 | { | 251 | { |
| 252 | isp->phy.state = OTG_STATE_UNDEFINED; | 252 | isp->phy.otg->state = OTG_STATE_UNDEFINED; |
| 253 | 253 | ||
| 254 | // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); | 254 | // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); |
| 255 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); | 255 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); |
| @@ -339,7 +339,7 @@ static void a_idle(struct isp1301 *isp, const char *tag) | |||
| 339 | { | 339 | { |
| 340 | u32 l; | 340 | u32 l; |
| 341 | 341 | ||
| 342 | if (isp->phy.state == OTG_STATE_A_IDLE) | 342 | if (isp->phy.otg->state == OTG_STATE_A_IDLE) |
| 343 | return; | 343 | return; |
| 344 | 344 | ||
| 345 | isp->phy.otg->default_a = 1; | 345 | isp->phy.otg->default_a = 1; |
| @@ -351,7 +351,7 @@ static void a_idle(struct isp1301 *isp, const char *tag) | |||
| 351 | isp->phy.otg->gadget->is_a_peripheral = 1; | 351 | isp->phy.otg->gadget->is_a_peripheral = 1; |
| 352 | gadget_suspend(isp); | 352 | gadget_suspend(isp); |
| 353 | } | 353 | } |
| 354 | isp->phy.state = OTG_STATE_A_IDLE; | 354 | isp->phy.otg->state = OTG_STATE_A_IDLE; |
| 355 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; | 355 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
| 356 | omap_writel(l, OTG_CTRL); | 356 | omap_writel(l, OTG_CTRL); |
| 357 | isp->last_otg_ctrl = l; | 357 | isp->last_otg_ctrl = l; |
| @@ -363,7 +363,7 @@ static void b_idle(struct isp1301 *isp, const char *tag) | |||
| 363 | { | 363 | { |
| 364 | u32 l; | 364 | u32 l; |
| 365 | 365 | ||
| 366 | if (isp->phy.state == OTG_STATE_B_IDLE) | 366 | if (isp->phy.otg->state == OTG_STATE_B_IDLE) |
| 367 | return; | 367 | return; |
| 368 | 368 | ||
| 369 | isp->phy.otg->default_a = 0; | 369 | isp->phy.otg->default_a = 0; |
| @@ -375,7 +375,7 @@ static void b_idle(struct isp1301 *isp, const char *tag) | |||
| 375 | isp->phy.otg->gadget->is_a_peripheral = 0; | 375 | isp->phy.otg->gadget->is_a_peripheral = 0; |
| 376 | gadget_suspend(isp); | 376 | gadget_suspend(isp); |
| 377 | } | 377 | } |
| 378 | isp->phy.state = OTG_STATE_B_IDLE; | 378 | isp->phy.otg->state = OTG_STATE_B_IDLE; |
| 379 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; | 379 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
| 380 | omap_writel(l, OTG_CTRL); | 380 | omap_writel(l, OTG_CTRL); |
| 381 | isp->last_otg_ctrl = l; | 381 | isp->last_otg_ctrl = l; |
| @@ -474,7 +474,7 @@ static void check_state(struct isp1301 *isp, const char *tag) | |||
| 474 | default: | 474 | default: |
| 475 | break; | 475 | break; |
| 476 | } | 476 | } |
| 477 | if (isp->phy.state == state && !extra) | 477 | if (isp->phy.otg->state == state && !extra) |
| 478 | return; | 478 | return; |
| 479 | pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, | 479 | pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, |
| 480 | usb_otg_state_string(state), fsm, state_name(isp), | 480 | usb_otg_state_string(state), fsm, state_name(isp), |
| @@ -498,23 +498,23 @@ static void update_otg1(struct isp1301 *isp, u8 int_src) | |||
| 498 | 498 | ||
| 499 | if (int_src & INTR_SESS_VLD) | 499 | if (int_src & INTR_SESS_VLD) |
| 500 | otg_ctrl |= OTG_ASESSVLD; | 500 | otg_ctrl |= OTG_ASESSVLD; |
| 501 | else if (isp->phy.state == OTG_STATE_A_WAIT_VFALL) { | 501 | else if (isp->phy.otg->state == OTG_STATE_A_WAIT_VFALL) { |
| 502 | a_idle(isp, "vfall"); | 502 | a_idle(isp, "vfall"); |
| 503 | otg_ctrl &= ~OTG_CTRL_BITS; | 503 | otg_ctrl &= ~OTG_CTRL_BITS; |
| 504 | } | 504 | } |
| 505 | if (int_src & INTR_VBUS_VLD) | 505 | if (int_src & INTR_VBUS_VLD) |
| 506 | otg_ctrl |= OTG_VBUSVLD; | 506 | otg_ctrl |= OTG_VBUSVLD; |
| 507 | if (int_src & INTR_ID_GND) { /* default-A */ | 507 | if (int_src & INTR_ID_GND) { /* default-A */ |
| 508 | if (isp->phy.state == OTG_STATE_B_IDLE | 508 | if (isp->phy.otg->state == OTG_STATE_B_IDLE |
| 509 | || isp->phy.state | 509 | || isp->phy.otg->state |
| 510 | == OTG_STATE_UNDEFINED) { | 510 | == OTG_STATE_UNDEFINED) { |
| 511 | a_idle(isp, "init"); | 511 | a_idle(isp, "init"); |
| 512 | return; | 512 | return; |
| 513 | } | 513 | } |
| 514 | } else { /* default-B */ | 514 | } else { /* default-B */ |
| 515 | otg_ctrl |= OTG_ID; | 515 | otg_ctrl |= OTG_ID; |
| 516 | if (isp->phy.state == OTG_STATE_A_IDLE | 516 | if (isp->phy.otg->state == OTG_STATE_A_IDLE |
| 517 | || isp->phy.state == OTG_STATE_UNDEFINED) { | 517 | || isp->phy.otg->state == OTG_STATE_UNDEFINED) { |
| 518 | b_idle(isp, "init"); | 518 | b_idle(isp, "init"); |
| 519 | return; | 519 | return; |
| 520 | } | 520 | } |
| @@ -548,14 +548,14 @@ static void otg_update_isp(struct isp1301 *isp) | |||
| 548 | isp->last_otg_ctrl = otg_ctrl; | 548 | isp->last_otg_ctrl = otg_ctrl; |
| 549 | otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS; | 549 | otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS; |
| 550 | 550 | ||
| 551 | switch (isp->phy.state) { | 551 | switch (isp->phy.otg->state) { |
| 552 | case OTG_STATE_B_IDLE: | 552 | case OTG_STATE_B_IDLE: |
| 553 | case OTG_STATE_B_PERIPHERAL: | 553 | case OTG_STATE_B_PERIPHERAL: |
| 554 | case OTG_STATE_B_SRP_INIT: | 554 | case OTG_STATE_B_SRP_INIT: |
| 555 | if (!(otg_ctrl & OTG_PULLUP)) { | 555 | if (!(otg_ctrl & OTG_PULLUP)) { |
| 556 | // if (otg_ctrl & OTG_B_HNPEN) { | 556 | // if (otg_ctrl & OTG_B_HNPEN) { |
| 557 | if (isp->phy.otg->gadget->b_hnp_enable) { | 557 | if (isp->phy.otg->gadget->b_hnp_enable) { |
| 558 | isp->phy.state = OTG_STATE_B_WAIT_ACON; | 558 | isp->phy.otg->state = OTG_STATE_B_WAIT_ACON; |
| 559 | pr_debug(" --> b_wait_acon\n"); | 559 | pr_debug(" --> b_wait_acon\n"); |
| 560 | } | 560 | } |
| 561 | goto pulldown; | 561 | goto pulldown; |
| @@ -585,7 +585,7 @@ pulldown: | |||
| 585 | if (!(isp->phy.otg->host)) | 585 | if (!(isp->phy.otg->host)) |
| 586 | otg_ctrl &= ~OTG_DRV_VBUS; | 586 | otg_ctrl &= ~OTG_DRV_VBUS; |
| 587 | 587 | ||
| 588 | switch (isp->phy.state) { | 588 | switch (isp->phy.otg->state) { |
| 589 | case OTG_STATE_A_SUSPEND: | 589 | case OTG_STATE_A_SUSPEND: |
| 590 | if (otg_ctrl & OTG_DRV_VBUS) { | 590 | if (otg_ctrl & OTG_DRV_VBUS) { |
| 591 | set |= OTG1_VBUS_DRV; | 591 | set |= OTG1_VBUS_DRV; |
| @@ -596,7 +596,7 @@ pulldown: | |||
| 596 | 596 | ||
| 597 | /* FALLTHROUGH */ | 597 | /* FALLTHROUGH */ |
| 598 | case OTG_STATE_A_VBUS_ERR: | 598 | case OTG_STATE_A_VBUS_ERR: |
| 599 | isp->phy.state = OTG_STATE_A_WAIT_VFALL; | 599 | isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL; |
| 600 | pr_debug(" --> a_wait_vfall\n"); | 600 | pr_debug(" --> a_wait_vfall\n"); |
| 601 | /* FALLTHROUGH */ | 601 | /* FALLTHROUGH */ |
| 602 | case OTG_STATE_A_WAIT_VFALL: | 602 | case OTG_STATE_A_WAIT_VFALL: |
| @@ -605,7 +605,7 @@ pulldown: | |||
| 605 | break; | 605 | break; |
| 606 | case OTG_STATE_A_IDLE: | 606 | case OTG_STATE_A_IDLE: |
| 607 | if (otg_ctrl & OTG_DRV_VBUS) { | 607 | if (otg_ctrl & OTG_DRV_VBUS) { |
| 608 | isp->phy.state = OTG_STATE_A_WAIT_VRISE; | 608 | isp->phy.otg->state = OTG_STATE_A_WAIT_VRISE; |
| 609 | pr_debug(" --> a_wait_vrise\n"); | 609 | pr_debug(" --> a_wait_vrise\n"); |
| 610 | } | 610 | } |
| 611 | /* FALLTHROUGH */ | 611 | /* FALLTHROUGH */ |
| @@ -625,17 +625,17 @@ pulldown: | |||
| 625 | if (otg_change & OTG_PULLUP) { | 625 | if (otg_change & OTG_PULLUP) { |
| 626 | u32 l; | 626 | u32 l; |
| 627 | 627 | ||
| 628 | switch (isp->phy.state) { | 628 | switch (isp->phy.otg->state) { |
| 629 | case OTG_STATE_B_IDLE: | 629 | case OTG_STATE_B_IDLE: |
| 630 | if (clr & OTG1_DP_PULLUP) | 630 | if (clr & OTG1_DP_PULLUP) |
| 631 | break; | 631 | break; |
| 632 | isp->phy.state = OTG_STATE_B_PERIPHERAL; | 632 | isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
| 633 | pr_debug(" --> b_peripheral\n"); | 633 | pr_debug(" --> b_peripheral\n"); |
| 634 | break; | 634 | break; |
| 635 | case OTG_STATE_A_SUSPEND: | 635 | case OTG_STATE_A_SUSPEND: |
| 636 | if (clr & OTG1_DP_PULLUP) | 636 | if (clr & OTG1_DP_PULLUP) |
| 637 | break; | 637 | break; |
| 638 | isp->phy.state = OTG_STATE_A_PERIPHERAL; | 638 | isp->phy.otg->state = OTG_STATE_A_PERIPHERAL; |
| 639 | pr_debug(" --> a_peripheral\n"); | 639 | pr_debug(" --> a_peripheral\n"); |
| 640 | break; | 640 | break; |
| 641 | default: | 641 | default: |
| @@ -673,7 +673,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
| 673 | * remote wakeup (SRP, normal) using their own timer | 673 | * remote wakeup (SRP, normal) using their own timer |
| 674 | * to give "check cable and A-device" messages. | 674 | * to give "check cable and A-device" messages. |
| 675 | */ | 675 | */ |
| 676 | if (isp->phy.state == OTG_STATE_B_SRP_INIT) | 676 | if (isp->phy.otg->state == OTG_STATE_B_SRP_INIT) |
| 677 | b_idle(isp, "srp_timeout"); | 677 | b_idle(isp, "srp_timeout"); |
| 678 | 678 | ||
| 679 | omap_writew(B_SRP_TMROUT, OTG_IRQ_SRC); | 679 | omap_writew(B_SRP_TMROUT, OTG_IRQ_SRC); |
| @@ -691,7 +691,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
| 691 | omap_writel(otg_ctrl, OTG_CTRL); | 691 | omap_writel(otg_ctrl, OTG_CTRL); |
| 692 | 692 | ||
| 693 | /* subset of b_peripheral()... */ | 693 | /* subset of b_peripheral()... */ |
| 694 | isp->phy.state = OTG_STATE_B_PERIPHERAL; | 694 | isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
| 695 | pr_debug(" --> b_peripheral\n"); | 695 | pr_debug(" --> b_peripheral\n"); |
| 696 | 696 | ||
| 697 | omap_writew(B_HNP_FAIL, OTG_IRQ_SRC); | 697 | omap_writew(B_HNP_FAIL, OTG_IRQ_SRC); |
| @@ -703,7 +703,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
| 703 | state_name(isp), omap_readl(OTG_CTRL)); | 703 | state_name(isp), omap_readl(OTG_CTRL)); |
| 704 | 704 | ||
| 705 | isp1301_defer_work(isp, WORK_UPDATE_OTG); | 705 | isp1301_defer_work(isp, WORK_UPDATE_OTG); |
| 706 | switch (isp->phy.state) { | 706 | switch (isp->phy.otg->state) { |
| 707 | case OTG_STATE_A_IDLE: | 707 | case OTG_STATE_A_IDLE: |
| 708 | if (!otg->host) | 708 | if (!otg->host) |
| 709 | break; | 709 | break; |
| @@ -734,7 +734,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
| 734 | otg_ctrl |= OTG_BUSDROP; | 734 | otg_ctrl |= OTG_BUSDROP; |
| 735 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 735 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
| 736 | omap_writel(otg_ctrl, OTG_CTRL); | 736 | omap_writel(otg_ctrl, OTG_CTRL); |
| 737 | isp->phy.state = OTG_STATE_A_WAIT_VFALL; | 737 | isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL; |
| 738 | 738 | ||
| 739 | omap_writew(A_REQ_TMROUT, OTG_IRQ_SRC); | 739 | omap_writew(A_REQ_TMROUT, OTG_IRQ_SRC); |
| 740 | ret = IRQ_HANDLED; | 740 | ret = IRQ_HANDLED; |
| @@ -748,7 +748,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
| 748 | otg_ctrl |= OTG_BUSDROP; | 748 | otg_ctrl |= OTG_BUSDROP; |
| 749 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 749 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
| 750 | omap_writel(otg_ctrl, OTG_CTRL); | 750 | omap_writel(otg_ctrl, OTG_CTRL); |
| 751 | isp->phy.state = OTG_STATE_A_VBUS_ERR; | 751 | isp->phy.otg->state = OTG_STATE_A_VBUS_ERR; |
| 752 | 752 | ||
| 753 | omap_writew(A_VBUS_ERR, OTG_IRQ_SRC); | 753 | omap_writew(A_VBUS_ERR, OTG_IRQ_SRC); |
| 754 | ret = IRQ_HANDLED; | 754 | ret = IRQ_HANDLED; |
| @@ -769,7 +769,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
| 769 | 769 | ||
| 770 | /* role is peripheral */ | 770 | /* role is peripheral */ |
| 771 | if (otg_ctrl & OTG_DRIVER_SEL) { | 771 | if (otg_ctrl & OTG_DRIVER_SEL) { |
| 772 | switch (isp->phy.state) { | 772 | switch (isp->phy.otg->state) { |
| 773 | case OTG_STATE_A_IDLE: | 773 | case OTG_STATE_A_IDLE: |
| 774 | b_idle(isp, __func__); | 774 | b_idle(isp, __func__); |
| 775 | break; | 775 | break; |
| @@ -786,18 +786,18 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
| 786 | } | 786 | } |
| 787 | 787 | ||
| 788 | if (otg->host) { | 788 | if (otg->host) { |
| 789 | switch (isp->phy.state) { | 789 | switch (isp->phy.otg->state) { |
| 790 | case OTG_STATE_B_WAIT_ACON: | 790 | case OTG_STATE_B_WAIT_ACON: |
| 791 | isp->phy.state = OTG_STATE_B_HOST; | 791 | isp->phy.otg->state = OTG_STATE_B_HOST; |
| 792 | pr_debug(" --> b_host\n"); | 792 | pr_debug(" --> b_host\n"); |
| 793 | kick = 1; | 793 | kick = 1; |
| 794 | break; | 794 | break; |
| 795 | case OTG_STATE_A_WAIT_BCON: | 795 | case OTG_STATE_A_WAIT_BCON: |
| 796 | isp->phy.state = OTG_STATE_A_HOST; | 796 | isp->phy.otg->state = OTG_STATE_A_HOST; |
| 797 | pr_debug(" --> a_host\n"); | 797 | pr_debug(" --> a_host\n"); |
| 798 | break; | 798 | break; |
| 799 | case OTG_STATE_A_PERIPHERAL: | 799 | case OTG_STATE_A_PERIPHERAL: |
| 800 | isp->phy.state = OTG_STATE_A_WAIT_BCON; | 800 | isp->phy.otg->state = OTG_STATE_A_WAIT_BCON; |
| 801 | pr_debug(" --> a_wait_bcon\n"); | 801 | pr_debug(" --> a_wait_bcon\n"); |
| 802 | break; | 802 | break; |
| 803 | default: | 803 | default: |
| @@ -878,7 +878,6 @@ static struct platform_driver omap_otg_driver = { | |||
| 878 | .probe = otg_probe, | 878 | .probe = otg_probe, |
| 879 | .remove = otg_remove, | 879 | .remove = otg_remove, |
| 880 | .driver = { | 880 | .driver = { |
| 881 | .owner = THIS_MODULE, | ||
| 882 | .name = "omap_otg", | 881 | .name = "omap_otg", |
| 883 | }, | 882 | }, |
| 884 | }; | 883 | }; |
| @@ -937,7 +936,7 @@ static void b_peripheral(struct isp1301 *isp) | |||
| 937 | /* UDC driver just set OTG_BSESSVLD */ | 936 | /* UDC driver just set OTG_BSESSVLD */ |
| 938 | isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLUP); | 937 | isp1301_set_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLUP); |
| 939 | isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLDOWN); | 938 | isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_DP_PULLDOWN); |
| 940 | isp->phy.state = OTG_STATE_B_PERIPHERAL; | 939 | isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
| 941 | pr_debug(" --> b_peripheral\n"); | 940 | pr_debug(" --> b_peripheral\n"); |
| 942 | dump_regs(isp, "2periph"); | 941 | dump_regs(isp, "2periph"); |
| 943 | #endif | 942 | #endif |
| @@ -947,7 +946,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
| 947 | { | 946 | { |
| 948 | struct usb_otg *otg = isp->phy.otg; | 947 | struct usb_otg *otg = isp->phy.otg; |
| 949 | u8 isp_stat, isp_bstat; | 948 | u8 isp_stat, isp_bstat; |
| 950 | enum usb_otg_state state = isp->phy.state; | 949 | enum usb_otg_state state = isp->phy.otg->state; |
| 951 | 950 | ||
| 952 | if (stat & INTR_BDIS_ACON) | 951 | if (stat & INTR_BDIS_ACON) |
| 953 | pr_debug("OTG: BDIS_ACON, %s\n", state_name(isp)); | 952 | pr_debug("OTG: BDIS_ACON, %s\n", state_name(isp)); |
| @@ -970,7 +969,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
| 970 | * when HNP is used. | 969 | * when HNP is used. |
| 971 | */ | 970 | */ |
| 972 | if (isp_stat & INTR_VBUS_VLD) | 971 | if (isp_stat & INTR_VBUS_VLD) |
| 973 | isp->phy.state = OTG_STATE_A_HOST; | 972 | isp->phy.otg->state = OTG_STATE_A_HOST; |
| 974 | break; | 973 | break; |
| 975 | case OTG_STATE_A_WAIT_VFALL: | 974 | case OTG_STATE_A_WAIT_VFALL: |
| 976 | if (!(isp_stat & INTR_SESS_VLD)) | 975 | if (!(isp_stat & INTR_SESS_VLD)) |
| @@ -978,7 +977,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
| 978 | break; | 977 | break; |
| 979 | default: | 978 | default: |
| 980 | if (!(isp_stat & INTR_VBUS_VLD)) | 979 | if (!(isp_stat & INTR_VBUS_VLD)) |
| 981 | isp->phy.state = OTG_STATE_A_VBUS_ERR; | 980 | isp->phy.otg->state = OTG_STATE_A_VBUS_ERR; |
| 982 | break; | 981 | break; |
| 983 | } | 982 | } |
| 984 | isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS); | 983 | isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS); |
| @@ -1007,11 +1006,11 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
| 1007 | if (otg->default_a) { | 1006 | if (otg->default_a) { |
| 1008 | switch (state) { | 1007 | switch (state) { |
| 1009 | default: | 1008 | default: |
| 1010 | isp->phy.state = OTG_STATE_A_WAIT_VFALL; | 1009 | isp->phy.otg->state = OTG_STATE_A_WAIT_VFALL; |
| 1011 | break; | 1010 | break; |
| 1012 | case OTG_STATE_A_WAIT_VFALL: | 1011 | case OTG_STATE_A_WAIT_VFALL: |
| 1013 | state = OTG_STATE_A_IDLE; | 1012 | state = OTG_STATE_A_IDLE; |
| 1014 | /* khubd may take a while to notice and | 1013 | /* hub_wq may take a while to notice and |
| 1015 | * handle this disconnect, so don't go | 1014 | * handle this disconnect, so don't go |
| 1016 | * to B_IDLE quite yet. | 1015 | * to B_IDLE quite yet. |
| 1017 | */ | 1016 | */ |
| @@ -1020,7 +1019,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
| 1020 | host_suspend(isp); | 1019 | host_suspend(isp); |
| 1021 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, | 1020 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, |
| 1022 | MC1_BDIS_ACON_EN); | 1021 | MC1_BDIS_ACON_EN); |
| 1023 | isp->phy.state = OTG_STATE_B_IDLE; | 1022 | isp->phy.otg->state = OTG_STATE_B_IDLE; |
| 1024 | l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; | 1023 | l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
| 1025 | l &= ~OTG_CTRL_BITS; | 1024 | l &= ~OTG_CTRL_BITS; |
| 1026 | omap_writel(l, OTG_CTRL); | 1025 | omap_writel(l, OTG_CTRL); |
| @@ -1031,7 +1030,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
| 1031 | } | 1030 | } |
| 1032 | isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS); | 1031 | isp_bstat = isp1301_get_u8(isp, ISP1301_OTG_STATUS); |
| 1033 | 1032 | ||
| 1034 | switch (isp->phy.state) { | 1033 | switch (isp->phy.otg->state) { |
| 1035 | case OTG_STATE_B_PERIPHERAL: | 1034 | case OTG_STATE_B_PERIPHERAL: |
| 1036 | case OTG_STATE_B_WAIT_ACON: | 1035 | case OTG_STATE_B_WAIT_ACON: |
| 1037 | case OTG_STATE_B_HOST: | 1036 | case OTG_STATE_B_HOST: |
| @@ -1071,7 +1070,7 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
| 1071 | } | 1070 | } |
| 1072 | } | 1071 | } |
| 1073 | 1072 | ||
| 1074 | if (state != isp->phy.state) | 1073 | if (state != isp->phy.otg->state) |
| 1075 | pr_debug(" isp, %s -> %s\n", | 1074 | pr_debug(" isp, %s -> %s\n", |
| 1076 | usb_otg_state_string(state), state_name(isp)); | 1075 | usb_otg_state_string(state), state_name(isp)); |
| 1077 | 1076 | ||
| @@ -1129,10 +1128,10 @@ isp1301_work(struct work_struct *work) | |||
| 1129 | * skip A_WAIT_VRISE; hc transitions invisibly | 1128 | * skip A_WAIT_VRISE; hc transitions invisibly |
| 1130 | * skip A_WAIT_BCON; same. | 1129 | * skip A_WAIT_BCON; same. |
| 1131 | */ | 1130 | */ |
| 1132 | switch (isp->phy.state) { | 1131 | switch (isp->phy.otg->state) { |
| 1133 | case OTG_STATE_A_WAIT_BCON: | 1132 | case OTG_STATE_A_WAIT_BCON: |
| 1134 | case OTG_STATE_A_WAIT_VRISE: | 1133 | case OTG_STATE_A_WAIT_VRISE: |
| 1135 | isp->phy.state = OTG_STATE_A_HOST; | 1134 | isp->phy.otg->state = OTG_STATE_A_HOST; |
| 1136 | pr_debug(" --> a_host\n"); | 1135 | pr_debug(" --> a_host\n"); |
| 1137 | otg_ctrl = omap_readl(OTG_CTRL); | 1136 | otg_ctrl = omap_readl(OTG_CTRL); |
| 1138 | otg_ctrl |= OTG_A_BUSREQ; | 1137 | otg_ctrl |= OTG_A_BUSREQ; |
| @@ -1141,7 +1140,7 @@ isp1301_work(struct work_struct *work) | |||
| 1141 | omap_writel(otg_ctrl, OTG_CTRL); | 1140 | omap_writel(otg_ctrl, OTG_CTRL); |
| 1142 | break; | 1141 | break; |
| 1143 | case OTG_STATE_B_WAIT_ACON: | 1142 | case OTG_STATE_B_WAIT_ACON: |
| 1144 | isp->phy.state = OTG_STATE_B_HOST; | 1143 | isp->phy.otg->state = OTG_STATE_B_HOST; |
| 1145 | pr_debug(" --> b_host (acon)\n"); | 1144 | pr_debug(" --> b_host (acon)\n"); |
| 1146 | break; | 1145 | break; |
| 1147 | case OTG_STATE_B_HOST: | 1146 | case OTG_STATE_B_HOST: |
| @@ -1275,7 +1274,7 @@ static int isp1301_otg_enable(struct isp1301 *isp) | |||
| 1275 | static int | 1274 | static int |
| 1276 | isp1301_set_host(struct usb_otg *otg, struct usb_bus *host) | 1275 | isp1301_set_host(struct usb_otg *otg, struct usb_bus *host) |
| 1277 | { | 1276 | { |
| 1278 | struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy); | 1277 | struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); |
| 1279 | 1278 | ||
| 1280 | if (isp != the_transceiver) | 1279 | if (isp != the_transceiver) |
| 1281 | return -ENODEV; | 1280 | return -ENODEV; |
| @@ -1331,7 +1330,7 @@ isp1301_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 1331 | static int | 1330 | static int |
| 1332 | isp1301_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget) | 1331 | isp1301_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget) |
| 1333 | { | 1332 | { |
| 1334 | struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy); | 1333 | struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); |
| 1335 | 1334 | ||
| 1336 | if (isp != the_transceiver) | 1335 | if (isp != the_transceiver) |
| 1337 | return -ENODEV; | 1336 | return -ENODEV; |
| @@ -1368,7 +1367,7 @@ isp1301_set_peripheral(struct usb_otg *otg, struct usb_gadget *gadget) | |||
| 1368 | } | 1367 | } |
| 1369 | 1368 | ||
| 1370 | power_up(isp); | 1369 | power_up(isp); |
| 1371 | isp->phy.state = OTG_STATE_B_IDLE; | 1370 | isp->phy.otg->state = OTG_STATE_B_IDLE; |
| 1372 | 1371 | ||
| 1373 | if (machine_is_omap_h2() || machine_is_omap_h3()) | 1372 | if (machine_is_omap_h2() || machine_is_omap_h3()) |
| 1374 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); | 1373 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); |
| @@ -1403,7 +1402,7 @@ isp1301_set_power(struct usb_phy *dev, unsigned mA) | |||
| 1403 | { | 1402 | { |
| 1404 | if (!the_transceiver) | 1403 | if (!the_transceiver) |
| 1405 | return -ENODEV; | 1404 | return -ENODEV; |
| 1406 | if (dev->state == OTG_STATE_B_PERIPHERAL) | 1405 | if (dev->otg->state == OTG_STATE_B_PERIPHERAL) |
| 1407 | enable_vbus_draw(the_transceiver, mA); | 1406 | enable_vbus_draw(the_transceiver, mA); |
| 1408 | return 0; | 1407 | return 0; |
| 1409 | } | 1408 | } |
| @@ -1411,10 +1410,10 @@ isp1301_set_power(struct usb_phy *dev, unsigned mA) | |||
| 1411 | static int | 1410 | static int |
| 1412 | isp1301_start_srp(struct usb_otg *otg) | 1411 | isp1301_start_srp(struct usb_otg *otg) |
| 1413 | { | 1412 | { |
| 1414 | struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy); | 1413 | struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); |
| 1415 | u32 otg_ctrl; | 1414 | u32 otg_ctrl; |
| 1416 | 1415 | ||
| 1417 | if (isp != the_transceiver || isp->phy.state != OTG_STATE_B_IDLE) | 1416 | if (isp != the_transceiver || isp->phy.otg->state != OTG_STATE_B_IDLE) |
| 1418 | return -ENODEV; | 1417 | return -ENODEV; |
| 1419 | 1418 | ||
| 1420 | otg_ctrl = omap_readl(OTG_CTRL); | 1419 | otg_ctrl = omap_readl(OTG_CTRL); |
| @@ -1424,7 +1423,7 @@ isp1301_start_srp(struct usb_otg *otg) | |||
| 1424 | otg_ctrl |= OTG_B_BUSREQ; | 1423 | otg_ctrl |= OTG_B_BUSREQ; |
| 1425 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK; | 1424 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK; |
| 1426 | omap_writel(otg_ctrl, OTG_CTRL); | 1425 | omap_writel(otg_ctrl, OTG_CTRL); |
| 1427 | isp->phy.state = OTG_STATE_B_SRP_INIT; | 1426 | isp->phy.otg->state = OTG_STATE_B_SRP_INIT; |
| 1428 | 1427 | ||
| 1429 | pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), | 1428 | pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), |
| 1430 | omap_readl(OTG_CTRL)); | 1429 | omap_readl(OTG_CTRL)); |
| @@ -1438,7 +1437,7 @@ static int | |||
| 1438 | isp1301_start_hnp(struct usb_otg *otg) | 1437 | isp1301_start_hnp(struct usb_otg *otg) |
| 1439 | { | 1438 | { |
| 1440 | #ifdef CONFIG_USB_OTG | 1439 | #ifdef CONFIG_USB_OTG |
| 1441 | struct isp1301 *isp = container_of(otg->phy, struct isp1301, phy); | 1440 | struct isp1301 *isp = container_of(otg->usb_phy, struct isp1301, phy); |
| 1442 | u32 l; | 1441 | u32 l; |
| 1443 | 1442 | ||
| 1444 | if (isp != the_transceiver) | 1443 | if (isp != the_transceiver) |
| @@ -1452,9 +1451,9 @@ isp1301_start_hnp(struct usb_otg *otg) | |||
| 1452 | /* We want hardware to manage most HNP protocol timings. | 1451 | /* We want hardware to manage most HNP protocol timings. |
| 1453 | * So do this part as early as possible... | 1452 | * So do this part as early as possible... |
| 1454 | */ | 1453 | */ |
| 1455 | switch (isp->phy.state) { | 1454 | switch (isp->phy.otg->state) { |
| 1456 | case OTG_STATE_B_HOST: | 1455 | case OTG_STATE_B_HOST: |
| 1457 | isp->phy.state = OTG_STATE_B_PERIPHERAL; | 1456 | isp->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
| 1458 | /* caller will suspend next */ | 1457 | /* caller will suspend next */ |
| 1459 | break; | 1458 | break; |
| 1460 | case OTG_STATE_A_HOST: | 1459 | case OTG_STATE_A_HOST: |
| @@ -1583,7 +1582,7 @@ isp1301_probe(struct i2c_client *i2c, const struct i2c_device_id *id) | |||
| 1583 | isp->phy.label = DRIVER_NAME; | 1582 | isp->phy.label = DRIVER_NAME; |
| 1584 | isp->phy.set_power = isp1301_set_power, | 1583 | isp->phy.set_power = isp1301_set_power, |
| 1585 | 1584 | ||
| 1586 | isp->phy.otg->phy = &isp->phy; | 1585 | isp->phy.otg->usb_phy = &isp->phy; |
| 1587 | isp->phy.otg->set_host = isp1301_set_host, | 1586 | isp->phy.otg->set_host = isp1301_set_host, |
| 1588 | isp->phy.otg->set_peripheral = isp1301_set_peripheral, | 1587 | isp->phy.otg->set_peripheral = isp1301_set_peripheral, |
| 1589 | isp->phy.otg->start_srp = isp1301_start_srp, | 1588 | isp->phy.otg->start_srp = isp1301_start_srp, |
diff --git a/drivers/usb/phy/phy-keystone.c b/drivers/usb/phy/phy-keystone.c index f4d722de912b..e0556f7832b5 100644 --- a/drivers/usb/phy/phy-keystone.c +++ b/drivers/usb/phy/phy-keystone.c | |||
| @@ -123,7 +123,6 @@ static struct platform_driver keystone_usbphy_driver = { | |||
| 123 | .remove = keystone_usbphy_remove, | 123 | .remove = keystone_usbphy_remove, |
| 124 | .driver = { | 124 | .driver = { |
| 125 | .name = "keystone-usbphy", | 125 | .name = "keystone-usbphy", |
| 126 | .owner = THIS_MODULE, | ||
| 127 | .of_match_table = keystone_usbphy_ids, | 126 | .of_match_table = keystone_usbphy_ids, |
| 128 | }, | 127 | }, |
| 129 | }; | 128 | }; |
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c index afc09087ec36..000fd892455f 100644 --- a/drivers/usb/phy/phy-msm-usb.c +++ b/drivers/usb/phy/phy-msm-usb.c | |||
| @@ -281,7 +281,7 @@ static int msm_otg_phy_clk_reset(struct msm_otg *motg) | |||
| 281 | { | 281 | { |
| 282 | int ret = 0; | 282 | int ret = 0; |
| 283 | 283 | ||
| 284 | if (motg->pdata->phy_clk_reset && motg->phy_reset_clk) | 284 | if (motg->pdata->phy_clk_reset) |
| 285 | ret = motg->pdata->phy_clk_reset(motg->phy_reset_clk); | 285 | ret = motg->pdata->phy_clk_reset(motg->phy_reset_clk); |
| 286 | else if (motg->phy_rst) | 286 | else if (motg->phy_rst) |
| 287 | ret = reset_control_reset(motg->phy_rst); | 287 | ret = reset_control_reset(motg->phy_rst); |
| @@ -708,7 +708,7 @@ static void msm_otg_start_host(struct usb_phy *phy, int on) | |||
| 708 | 708 | ||
| 709 | static int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host) | 709 | static int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host) |
| 710 | { | 710 | { |
| 711 | struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy); | 711 | struct msm_otg *motg = container_of(otg->usb_phy, struct msm_otg, phy); |
| 712 | struct usb_hcd *hcd; | 712 | struct usb_hcd *hcd; |
| 713 | 713 | ||
| 714 | /* | 714 | /* |
| @@ -716,16 +716,16 @@ static int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 716 | * only peripheral configuration. | 716 | * only peripheral configuration. |
| 717 | */ | 717 | */ |
| 718 | if (motg->pdata->mode == USB_DR_MODE_PERIPHERAL) { | 718 | if (motg->pdata->mode == USB_DR_MODE_PERIPHERAL) { |
| 719 | dev_info(otg->phy->dev, "Host mode is not supported\n"); | 719 | dev_info(otg->usb_phy->dev, "Host mode is not supported\n"); |
| 720 | return -ENODEV; | 720 | return -ENODEV; |
| 721 | } | 721 | } |
| 722 | 722 | ||
| 723 | if (!host) { | 723 | if (!host) { |
| 724 | if (otg->phy->state == OTG_STATE_A_HOST) { | 724 | if (otg->state == OTG_STATE_A_HOST) { |
| 725 | pm_runtime_get_sync(otg->phy->dev); | 725 | pm_runtime_get_sync(otg->usb_phy->dev); |
| 726 | msm_otg_start_host(otg->phy, 0); | 726 | msm_otg_start_host(otg->usb_phy, 0); |
| 727 | otg->host = NULL; | 727 | otg->host = NULL; |
| 728 | otg->phy->state = OTG_STATE_UNDEFINED; | 728 | otg->state = OTG_STATE_UNDEFINED; |
| 729 | schedule_work(&motg->sm_work); | 729 | schedule_work(&motg->sm_work); |
| 730 | } else { | 730 | } else { |
| 731 | otg->host = NULL; | 731 | otg->host = NULL; |
| @@ -738,14 +738,14 @@ static int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 738 | hcd->power_budget = motg->pdata->power_budget; | 738 | hcd->power_budget = motg->pdata->power_budget; |
| 739 | 739 | ||
| 740 | otg->host = host; | 740 | otg->host = host; |
| 741 | dev_dbg(otg->phy->dev, "host driver registered w/ tranceiver\n"); | 741 | dev_dbg(otg->usb_phy->dev, "host driver registered w/ tranceiver\n"); |
| 742 | 742 | ||
| 743 | /* | 743 | /* |
| 744 | * Kick the state machine work, if peripheral is not supported | 744 | * Kick the state machine work, if peripheral is not supported |
| 745 | * or peripheral is already registered with us. | 745 | * or peripheral is already registered with us. |
| 746 | */ | 746 | */ |
| 747 | if (motg->pdata->mode == USB_DR_MODE_HOST || otg->gadget) { | 747 | if (motg->pdata->mode == USB_DR_MODE_HOST || otg->gadget) { |
| 748 | pm_runtime_get_sync(otg->phy->dev); | 748 | pm_runtime_get_sync(otg->usb_phy->dev); |
| 749 | schedule_work(&motg->sm_work); | 749 | schedule_work(&motg->sm_work); |
| 750 | } | 750 | } |
| 751 | 751 | ||
| @@ -782,23 +782,23 @@ static void msm_otg_start_peripheral(struct usb_phy *phy, int on) | |||
| 782 | static int msm_otg_set_peripheral(struct usb_otg *otg, | 782 | static int msm_otg_set_peripheral(struct usb_otg *otg, |
| 783 | struct usb_gadget *gadget) | 783 | struct usb_gadget *gadget) |
| 784 | { | 784 | { |
| 785 | struct msm_otg *motg = container_of(otg->phy, struct msm_otg, phy); | 785 | struct msm_otg *motg = container_of(otg->usb_phy, struct msm_otg, phy); |
| 786 | 786 | ||
| 787 | /* | 787 | /* |
| 788 | * Fail peripheral registration if this board can support | 788 | * Fail peripheral registration if this board can support |
| 789 | * only host configuration. | 789 | * only host configuration. |
| 790 | */ | 790 | */ |
| 791 | if (motg->pdata->mode == USB_DR_MODE_HOST) { | 791 | if (motg->pdata->mode == USB_DR_MODE_HOST) { |
| 792 | dev_info(otg->phy->dev, "Peripheral mode is not supported\n"); | 792 | dev_info(otg->usb_phy->dev, "Peripheral mode is not supported\n"); |
| 793 | return -ENODEV; | 793 | return -ENODEV; |
| 794 | } | 794 | } |
| 795 | 795 | ||
| 796 | if (!gadget) { | 796 | if (!gadget) { |
| 797 | if (otg->phy->state == OTG_STATE_B_PERIPHERAL) { | 797 | if (otg->state == OTG_STATE_B_PERIPHERAL) { |
| 798 | pm_runtime_get_sync(otg->phy->dev); | 798 | pm_runtime_get_sync(otg->usb_phy->dev); |
| 799 | msm_otg_start_peripheral(otg->phy, 0); | 799 | msm_otg_start_peripheral(otg->usb_phy, 0); |
| 800 | otg->gadget = NULL; | 800 | otg->gadget = NULL; |
| 801 | otg->phy->state = OTG_STATE_UNDEFINED; | 801 | otg->state = OTG_STATE_UNDEFINED; |
| 802 | schedule_work(&motg->sm_work); | 802 | schedule_work(&motg->sm_work); |
| 803 | } else { | 803 | } else { |
| 804 | otg->gadget = NULL; | 804 | otg->gadget = NULL; |
| @@ -807,14 +807,15 @@ static int msm_otg_set_peripheral(struct usb_otg *otg, | |||
| 807 | return 0; | 807 | return 0; |
| 808 | } | 808 | } |
| 809 | otg->gadget = gadget; | 809 | otg->gadget = gadget; |
| 810 | dev_dbg(otg->phy->dev, "peripheral driver registered w/ tranceiver\n"); | 810 | dev_dbg(otg->usb_phy->dev, |
| 811 | "peripheral driver registered w/ tranceiver\n"); | ||
| 811 | 812 | ||
| 812 | /* | 813 | /* |
| 813 | * Kick the state machine work, if host is not supported | 814 | * Kick the state machine work, if host is not supported |
| 814 | * or host is already registered with us. | 815 | * or host is already registered with us. |
| 815 | */ | 816 | */ |
| 816 | if (motg->pdata->mode == USB_DR_MODE_PERIPHERAL || otg->host) { | 817 | if (motg->pdata->mode == USB_DR_MODE_PERIPHERAL || otg->host) { |
| 817 | pm_runtime_get_sync(otg->phy->dev); | 818 | pm_runtime_get_sync(otg->usb_phy->dev); |
| 818 | schedule_work(&motg->sm_work); | 819 | schedule_work(&motg->sm_work); |
| 819 | } | 820 | } |
| 820 | 821 | ||
| @@ -1170,20 +1171,20 @@ static void msm_otg_sm_work(struct work_struct *w) | |||
| 1170 | struct msm_otg *motg = container_of(w, struct msm_otg, sm_work); | 1171 | struct msm_otg *motg = container_of(w, struct msm_otg, sm_work); |
| 1171 | struct usb_otg *otg = motg->phy.otg; | 1172 | struct usb_otg *otg = motg->phy.otg; |
| 1172 | 1173 | ||
| 1173 | switch (otg->phy->state) { | 1174 | switch (otg->state) { |
| 1174 | case OTG_STATE_UNDEFINED: | 1175 | case OTG_STATE_UNDEFINED: |
| 1175 | dev_dbg(otg->phy->dev, "OTG_STATE_UNDEFINED state\n"); | 1176 | dev_dbg(otg->usb_phy->dev, "OTG_STATE_UNDEFINED state\n"); |
| 1176 | msm_otg_reset(otg->phy); | 1177 | msm_otg_reset(otg->usb_phy); |
| 1177 | msm_otg_init_sm(motg); | 1178 | msm_otg_init_sm(motg); |
| 1178 | otg->phy->state = OTG_STATE_B_IDLE; | 1179 | otg->state = OTG_STATE_B_IDLE; |
| 1179 | /* FALL THROUGH */ | 1180 | /* FALL THROUGH */ |
| 1180 | case OTG_STATE_B_IDLE: | 1181 | case OTG_STATE_B_IDLE: |
| 1181 | dev_dbg(otg->phy->dev, "OTG_STATE_B_IDLE state\n"); | 1182 | dev_dbg(otg->usb_phy->dev, "OTG_STATE_B_IDLE state\n"); |
| 1182 | if (!test_bit(ID, &motg->inputs) && otg->host) { | 1183 | if (!test_bit(ID, &motg->inputs) && otg->host) { |
| 1183 | /* disable BSV bit */ | 1184 | /* disable BSV bit */ |
| 1184 | writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); | 1185 | writel(readl(USB_OTGSC) & ~OTGSC_BSVIE, USB_OTGSC); |
| 1185 | msm_otg_start_host(otg->phy, 1); | 1186 | msm_otg_start_host(otg->usb_phy, 1); |
| 1186 | otg->phy->state = OTG_STATE_A_HOST; | 1187 | otg->state = OTG_STATE_A_HOST; |
| 1187 | } else if (test_bit(B_SESS_VLD, &motg->inputs)) { | 1188 | } else if (test_bit(B_SESS_VLD, &motg->inputs)) { |
| 1188 | switch (motg->chg_state) { | 1189 | switch (motg->chg_state) { |
| 1189 | case USB_CHG_STATE_UNDEFINED: | 1190 | case USB_CHG_STATE_UNDEFINED: |
| @@ -1198,14 +1199,16 @@ static void msm_otg_sm_work(struct work_struct *w) | |||
| 1198 | case USB_CDP_CHARGER: | 1199 | case USB_CDP_CHARGER: |
| 1199 | msm_otg_notify_charger(motg, | 1200 | msm_otg_notify_charger(motg, |
| 1200 | IDEV_CHG_MAX); | 1201 | IDEV_CHG_MAX); |
| 1201 | msm_otg_start_peripheral(otg->phy, 1); | 1202 | msm_otg_start_peripheral(otg->usb_phy, |
| 1202 | otg->phy->state | 1203 | 1); |
| 1204 | otg->state | ||
| 1203 | = OTG_STATE_B_PERIPHERAL; | 1205 | = OTG_STATE_B_PERIPHERAL; |
| 1204 | break; | 1206 | break; |
| 1205 | case USB_SDP_CHARGER: | 1207 | case USB_SDP_CHARGER: |
| 1206 | msm_otg_notify_charger(motg, IUNIT); | 1208 | msm_otg_notify_charger(motg, IUNIT); |
| 1207 | msm_otg_start_peripheral(otg->phy, 1); | 1209 | msm_otg_start_peripheral(otg->usb_phy, |
| 1208 | otg->phy->state | 1210 | 1); |
| 1211 | otg->state | ||
| 1209 | = OTG_STATE_B_PERIPHERAL; | 1212 | = OTG_STATE_B_PERIPHERAL; |
| 1210 | break; | 1213 | break; |
| 1211 | default: | 1214 | default: |
| @@ -1222,36 +1225,36 @@ static void msm_otg_sm_work(struct work_struct *w) | |||
| 1222 | * is incremented in charger detection work. | 1225 | * is incremented in charger detection work. |
| 1223 | */ | 1226 | */ |
| 1224 | if (cancel_delayed_work_sync(&motg->chg_work)) { | 1227 | if (cancel_delayed_work_sync(&motg->chg_work)) { |
| 1225 | pm_runtime_put_sync(otg->phy->dev); | 1228 | pm_runtime_put_sync(otg->usb_phy->dev); |
| 1226 | msm_otg_reset(otg->phy); | 1229 | msm_otg_reset(otg->usb_phy); |
| 1227 | } | 1230 | } |
| 1228 | msm_otg_notify_charger(motg, 0); | 1231 | msm_otg_notify_charger(motg, 0); |
| 1229 | motg->chg_state = USB_CHG_STATE_UNDEFINED; | 1232 | motg->chg_state = USB_CHG_STATE_UNDEFINED; |
| 1230 | motg->chg_type = USB_INVALID_CHARGER; | 1233 | motg->chg_type = USB_INVALID_CHARGER; |
| 1231 | } | 1234 | } |
| 1232 | 1235 | ||
| 1233 | if (otg->phy->state == OTG_STATE_B_IDLE) | 1236 | if (otg->state == OTG_STATE_B_IDLE) |
| 1234 | pm_runtime_put_sync(otg->phy->dev); | 1237 | pm_runtime_put_sync(otg->usb_phy->dev); |
| 1235 | break; | 1238 | break; |
| 1236 | case OTG_STATE_B_PERIPHERAL: | 1239 | case OTG_STATE_B_PERIPHERAL: |
| 1237 | dev_dbg(otg->phy->dev, "OTG_STATE_B_PERIPHERAL state\n"); | 1240 | dev_dbg(otg->usb_phy->dev, "OTG_STATE_B_PERIPHERAL state\n"); |
| 1238 | if (!test_bit(B_SESS_VLD, &motg->inputs) || | 1241 | if (!test_bit(B_SESS_VLD, &motg->inputs) || |
| 1239 | !test_bit(ID, &motg->inputs)) { | 1242 | !test_bit(ID, &motg->inputs)) { |
| 1240 | msm_otg_notify_charger(motg, 0); | 1243 | msm_otg_notify_charger(motg, 0); |
| 1241 | msm_otg_start_peripheral(otg->phy, 0); | 1244 | msm_otg_start_peripheral(otg->usb_phy, 0); |
| 1242 | motg->chg_state = USB_CHG_STATE_UNDEFINED; | 1245 | motg->chg_state = USB_CHG_STATE_UNDEFINED; |
| 1243 | motg->chg_type = USB_INVALID_CHARGER; | 1246 | motg->chg_type = USB_INVALID_CHARGER; |
| 1244 | otg->phy->state = OTG_STATE_B_IDLE; | 1247 | otg->state = OTG_STATE_B_IDLE; |
| 1245 | msm_otg_reset(otg->phy); | 1248 | msm_otg_reset(otg->usb_phy); |
| 1246 | schedule_work(w); | 1249 | schedule_work(w); |
| 1247 | } | 1250 | } |
| 1248 | break; | 1251 | break; |
| 1249 | case OTG_STATE_A_HOST: | 1252 | case OTG_STATE_A_HOST: |
| 1250 | dev_dbg(otg->phy->dev, "OTG_STATE_A_HOST state\n"); | 1253 | dev_dbg(otg->usb_phy->dev, "OTG_STATE_A_HOST state\n"); |
| 1251 | if (test_bit(ID, &motg->inputs)) { | 1254 | if (test_bit(ID, &motg->inputs)) { |
| 1252 | msm_otg_start_host(otg->phy, 0); | 1255 | msm_otg_start_host(otg->usb_phy, 0); |
| 1253 | otg->phy->state = OTG_STATE_B_IDLE; | 1256 | otg->state = OTG_STATE_B_IDLE; |
| 1254 | msm_otg_reset(otg->phy); | 1257 | msm_otg_reset(otg->usb_phy); |
| 1255 | schedule_work(w); | 1258 | schedule_work(w); |
| 1256 | } | 1259 | } |
| 1257 | break; | 1260 | break; |
| @@ -1303,7 +1306,7 @@ static int msm_otg_mode_show(struct seq_file *s, void *unused) | |||
| 1303 | struct msm_otg *motg = s->private; | 1306 | struct msm_otg *motg = s->private; |
| 1304 | struct usb_otg *otg = motg->phy.otg; | 1307 | struct usb_otg *otg = motg->phy.otg; |
| 1305 | 1308 | ||
| 1306 | switch (otg->phy->state) { | 1309 | switch (otg->state) { |
| 1307 | case OTG_STATE_A_HOST: | 1310 | case OTG_STATE_A_HOST: |
| 1308 | seq_puts(s, "host\n"); | 1311 | seq_puts(s, "host\n"); |
| 1309 | break; | 1312 | break; |
| @@ -1353,7 +1356,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf, | |||
| 1353 | 1356 | ||
| 1354 | switch (req_mode) { | 1357 | switch (req_mode) { |
| 1355 | case USB_DR_MODE_UNKNOWN: | 1358 | case USB_DR_MODE_UNKNOWN: |
| 1356 | switch (otg->phy->state) { | 1359 | switch (otg->state) { |
| 1357 | case OTG_STATE_A_HOST: | 1360 | case OTG_STATE_A_HOST: |
| 1358 | case OTG_STATE_B_PERIPHERAL: | 1361 | case OTG_STATE_B_PERIPHERAL: |
| 1359 | set_bit(ID, &motg->inputs); | 1362 | set_bit(ID, &motg->inputs); |
| @@ -1364,7 +1367,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf, | |||
| 1364 | } | 1367 | } |
| 1365 | break; | 1368 | break; |
| 1366 | case USB_DR_MODE_PERIPHERAL: | 1369 | case USB_DR_MODE_PERIPHERAL: |
| 1367 | switch (otg->phy->state) { | 1370 | switch (otg->state) { |
| 1368 | case OTG_STATE_B_IDLE: | 1371 | case OTG_STATE_B_IDLE: |
| 1369 | case OTG_STATE_A_HOST: | 1372 | case OTG_STATE_A_HOST: |
| 1370 | set_bit(ID, &motg->inputs); | 1373 | set_bit(ID, &motg->inputs); |
| @@ -1375,7 +1378,7 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf, | |||
| 1375 | } | 1378 | } |
| 1376 | break; | 1379 | break; |
| 1377 | case USB_DR_MODE_HOST: | 1380 | case USB_DR_MODE_HOST: |
| 1378 | switch (otg->phy->state) { | 1381 | switch (otg->state) { |
| 1379 | case OTG_STATE_B_IDLE: | 1382 | case OTG_STATE_B_IDLE: |
| 1380 | case OTG_STATE_B_PERIPHERAL: | 1383 | case OTG_STATE_B_PERIPHERAL: |
| 1381 | clear_bit(ID, &motg->inputs); | 1384 | clear_bit(ID, &motg->inputs); |
| @@ -1388,13 +1391,13 @@ static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf, | |||
| 1388 | goto out; | 1391 | goto out; |
| 1389 | } | 1392 | } |
| 1390 | 1393 | ||
| 1391 | pm_runtime_get_sync(otg->phy->dev); | 1394 | pm_runtime_get_sync(otg->usb_phy->dev); |
| 1392 | schedule_work(&motg->sm_work); | 1395 | schedule_work(&motg->sm_work); |
| 1393 | out: | 1396 | out: |
| 1394 | return status; | 1397 | return status; |
| 1395 | } | 1398 | } |
| 1396 | 1399 | ||
| 1397 | const struct file_operations msm_otg_mode_fops = { | 1400 | static const struct file_operations msm_otg_mode_fops = { |
| 1398 | .open = msm_otg_mode_open, | 1401 | .open = msm_otg_mode_open, |
| 1399 | .read = seq_read, | 1402 | .read = seq_read, |
| 1400 | .write = msm_otg_mode_write, | 1403 | .write = msm_otg_mode_write, |
| @@ -1505,10 +1508,8 @@ static int msm_otg_read_dt(struct platform_device *pdev, struct msm_otg *motg) | |||
| 1505 | } | 1508 | } |
| 1506 | 1509 | ||
| 1507 | pdata->phy_init_seq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); | 1510 | pdata->phy_init_seq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL); |
| 1508 | if (!pdata->phy_init_seq) { | 1511 | if (!pdata->phy_init_seq) |
| 1509 | dev_warn(&pdev->dev, "No space for PHY init sequence\n"); | ||
| 1510 | return 0; | 1512 | return 0; |
| 1511 | } | ||
| 1512 | 1513 | ||
| 1513 | ret = of_property_read_u32_array(node, "qcom,phy-init-sequence", | 1514 | ret = of_property_read_u32_array(node, "qcom,phy-init-sequence", |
| 1514 | pdata->phy_init_seq, words); | 1515 | pdata->phy_init_seq, words); |
| @@ -1530,10 +1531,8 @@ static int msm_otg_probe(struct platform_device *pdev) | |||
| 1530 | void __iomem *phy_select; | 1531 | void __iomem *phy_select; |
| 1531 | 1532 | ||
| 1532 | motg = devm_kzalloc(&pdev->dev, sizeof(struct msm_otg), GFP_KERNEL); | 1533 | motg = devm_kzalloc(&pdev->dev, sizeof(struct msm_otg), GFP_KERNEL); |
| 1533 | if (!motg) { | 1534 | if (!motg) |
| 1534 | dev_err(&pdev->dev, "unable to allocate msm_otg\n"); | ||
| 1535 | return -ENOMEM; | 1535 | return -ENOMEM; |
| 1536 | } | ||
| 1537 | 1536 | ||
| 1538 | pdata = dev_get_platdata(&pdev->dev); | 1537 | pdata = dev_get_platdata(&pdev->dev); |
| 1539 | if (!pdata) { | 1538 | if (!pdata) { |
| @@ -1546,19 +1545,20 @@ static int msm_otg_probe(struct platform_device *pdev) | |||
| 1546 | 1545 | ||
| 1547 | motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg), | 1546 | motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg), |
| 1548 | GFP_KERNEL); | 1547 | GFP_KERNEL); |
| 1549 | if (!motg->phy.otg) { | 1548 | if (!motg->phy.otg) |
| 1550 | dev_err(&pdev->dev, "unable to allocate msm_otg\n"); | ||
| 1551 | return -ENOMEM; | 1549 | return -ENOMEM; |
| 1552 | } | ||
| 1553 | 1550 | ||
| 1554 | phy = &motg->phy; | 1551 | phy = &motg->phy; |
| 1555 | phy->dev = &pdev->dev; | 1552 | phy->dev = &pdev->dev; |
| 1556 | 1553 | ||
| 1557 | motg->phy_reset_clk = devm_clk_get(&pdev->dev, | 1554 | if (motg->pdata->phy_clk_reset) { |
| 1555 | motg->phy_reset_clk = devm_clk_get(&pdev->dev, | ||
| 1558 | np ? "phy" : "usb_phy_clk"); | 1556 | np ? "phy" : "usb_phy_clk"); |
| 1559 | if (IS_ERR(motg->phy_reset_clk)) { | 1557 | |
| 1560 | dev_err(&pdev->dev, "failed to get usb_phy_clk\n"); | 1558 | if (IS_ERR(motg->phy_reset_clk)) { |
| 1561 | motg->phy_reset_clk = NULL; | 1559 | dev_err(&pdev->dev, "failed to get usb_phy_clk\n"); |
| 1560 | return PTR_ERR(motg->phy_reset_clk); | ||
| 1561 | } | ||
| 1562 | } | 1562 | } |
| 1563 | 1563 | ||
| 1564 | motg->clk = devm_clk_get(&pdev->dev, np ? "core" : "usb_hs_clk"); | 1564 | motg->clk = devm_clk_get(&pdev->dev, np ? "core" : "usb_hs_clk"); |
| @@ -1671,7 +1671,7 @@ static int msm_otg_probe(struct platform_device *pdev) | |||
| 1671 | 1671 | ||
| 1672 | phy->io_ops = &msm_otg_io_ops; | 1672 | phy->io_ops = &msm_otg_io_ops; |
| 1673 | 1673 | ||
| 1674 | phy->otg->phy = &motg->phy; | 1674 | phy->otg->usb_phy = &motg->phy; |
| 1675 | phy->otg->set_host = msm_otg_set_host; | 1675 | phy->otg->set_host = msm_otg_set_host; |
| 1676 | phy->otg->set_peripheral = msm_otg_set_peripheral; | 1676 | phy->otg->set_peripheral = msm_otg_set_peripheral; |
| 1677 | 1677 | ||
| @@ -1758,7 +1758,7 @@ static int msm_otg_remove(struct platform_device *pdev) | |||
| 1758 | return 0; | 1758 | return 0; |
| 1759 | } | 1759 | } |
| 1760 | 1760 | ||
| 1761 | #ifdef CONFIG_PM_RUNTIME | 1761 | #ifdef CONFIG_PM |
| 1762 | static int msm_otg_runtime_idle(struct device *dev) | 1762 | static int msm_otg_runtime_idle(struct device *dev) |
| 1763 | { | 1763 | { |
| 1764 | struct msm_otg *motg = dev_get_drvdata(dev); | 1764 | struct msm_otg *motg = dev_get_drvdata(dev); |
| @@ -1772,7 +1772,7 @@ static int msm_otg_runtime_idle(struct device *dev) | |||
| 1772 | * This 1 sec delay also prevents entering into LPM immediately | 1772 | * This 1 sec delay also prevents entering into LPM immediately |
| 1773 | * after asynchronous interrupt. | 1773 | * after asynchronous interrupt. |
| 1774 | */ | 1774 | */ |
| 1775 | if (otg->phy->state != OTG_STATE_UNDEFINED) | 1775 | if (otg->state != OTG_STATE_UNDEFINED) |
| 1776 | pm_schedule_suspend(dev, 1000); | 1776 | pm_schedule_suspend(dev, 1000); |
| 1777 | 1777 | ||
| 1778 | return -EAGAIN; | 1778 | return -EAGAIN; |
| @@ -1838,7 +1838,6 @@ static struct platform_driver msm_otg_driver = { | |||
| 1838 | .remove = msm_otg_remove, | 1838 | .remove = msm_otg_remove, |
| 1839 | .driver = { | 1839 | .driver = { |
| 1840 | .name = DRIVER_NAME, | 1840 | .name = DRIVER_NAME, |
| 1841 | .owner = THIS_MODULE, | ||
| 1842 | .pm = &msm_otg_dev_pm_ops, | 1841 | .pm = &msm_otg_dev_pm_ops, |
| 1843 | .of_match_table = msm_otg_dt_match, | 1842 | .of_match_table = msm_otg_dt_match, |
| 1844 | }, | 1843 | }, |
diff --git a/drivers/usb/phy/phy-mv-usb.c b/drivers/usb/phy/phy-mv-usb.c index 7d80c54f0ac6..699e38c73d82 100644 --- a/drivers/usb/phy/phy-mv-usb.c +++ b/drivers/usb/phy/phy-mv-usb.c | |||
| @@ -56,7 +56,7 @@ static char *state_string[] = { | |||
| 56 | 56 | ||
| 57 | static int mv_otg_set_vbus(struct usb_otg *otg, bool on) | 57 | static int mv_otg_set_vbus(struct usb_otg *otg, bool on) |
| 58 | { | 58 | { |
| 59 | struct mv_otg *mvotg = container_of(otg->phy, struct mv_otg, phy); | 59 | struct mv_otg *mvotg = container_of(otg->usb_phy, struct mv_otg, phy); |
| 60 | if (mvotg->pdata->set_vbus == NULL) | 60 | if (mvotg->pdata->set_vbus == NULL) |
| 61 | return -ENODEV; | 61 | return -ENODEV; |
| 62 | 62 | ||
| @@ -339,68 +339,68 @@ static void mv_otg_update_state(struct mv_otg *mvotg) | |||
| 339 | { | 339 | { |
| 340 | struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl; | 340 | struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl; |
| 341 | struct usb_phy *phy = &mvotg->phy; | 341 | struct usb_phy *phy = &mvotg->phy; |
| 342 | int old_state = phy->state; | 342 | int old_state = mvotg->phy.otg->state; |
| 343 | 343 | ||
| 344 | switch (old_state) { | 344 | switch (old_state) { |
| 345 | case OTG_STATE_UNDEFINED: | 345 | case OTG_STATE_UNDEFINED: |
| 346 | phy->state = OTG_STATE_B_IDLE; | 346 | mvotg->phy.otg->state = OTG_STATE_B_IDLE; |
| 347 | /* FALL THROUGH */ | 347 | /* FALL THROUGH */ |
| 348 | case OTG_STATE_B_IDLE: | 348 | case OTG_STATE_B_IDLE: |
| 349 | if (otg_ctrl->id == 0) | 349 | if (otg_ctrl->id == 0) |
| 350 | phy->state = OTG_STATE_A_IDLE; | 350 | mvotg->phy.otg->state = OTG_STATE_A_IDLE; |
| 351 | else if (otg_ctrl->b_sess_vld) | 351 | else if (otg_ctrl->b_sess_vld) |
| 352 | phy->state = OTG_STATE_B_PERIPHERAL; | 352 | mvotg->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
| 353 | break; | 353 | break; |
| 354 | case OTG_STATE_B_PERIPHERAL: | 354 | case OTG_STATE_B_PERIPHERAL: |
| 355 | if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0) | 355 | if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0) |
| 356 | phy->state = OTG_STATE_B_IDLE; | 356 | mvotg->phy.otg->state = OTG_STATE_B_IDLE; |
| 357 | break; | 357 | break; |
| 358 | case OTG_STATE_A_IDLE: | 358 | case OTG_STATE_A_IDLE: |
| 359 | if (otg_ctrl->id) | 359 | if (otg_ctrl->id) |
| 360 | phy->state = OTG_STATE_B_IDLE; | 360 | mvotg->phy.otg->state = OTG_STATE_B_IDLE; |
| 361 | else if (!(otg_ctrl->a_bus_drop) && | 361 | else if (!(otg_ctrl->a_bus_drop) && |
| 362 | (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det)) | 362 | (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det)) |
| 363 | phy->state = OTG_STATE_A_WAIT_VRISE; | 363 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_VRISE; |
| 364 | break; | 364 | break; |
| 365 | case OTG_STATE_A_WAIT_VRISE: | 365 | case OTG_STATE_A_WAIT_VRISE: |
| 366 | if (otg_ctrl->a_vbus_vld) | 366 | if (otg_ctrl->a_vbus_vld) |
| 367 | phy->state = OTG_STATE_A_WAIT_BCON; | 367 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON; |
| 368 | break; | 368 | break; |
| 369 | case OTG_STATE_A_WAIT_BCON: | 369 | case OTG_STATE_A_WAIT_BCON: |
| 370 | if (otg_ctrl->id || otg_ctrl->a_bus_drop | 370 | if (otg_ctrl->id || otg_ctrl->a_bus_drop |
| 371 | || otg_ctrl->a_wait_bcon_timeout) { | 371 | || otg_ctrl->a_wait_bcon_timeout) { |
| 372 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | 372 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); |
| 373 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | 373 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; |
| 374 | phy->state = OTG_STATE_A_WAIT_VFALL; | 374 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL; |
| 375 | otg_ctrl->a_bus_req = 0; | 375 | otg_ctrl->a_bus_req = 0; |
| 376 | } else if (!otg_ctrl->a_vbus_vld) { | 376 | } else if (!otg_ctrl->a_vbus_vld) { |
| 377 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | 377 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); |
| 378 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | 378 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; |
| 379 | phy->state = OTG_STATE_A_VBUS_ERR; | 379 | mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR; |
| 380 | } else if (otg_ctrl->b_conn) { | 380 | } else if (otg_ctrl->b_conn) { |
| 381 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); | 381 | mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER); |
| 382 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; | 382 | mvotg->otg_ctrl.a_wait_bcon_timeout = 0; |
| 383 | phy->state = OTG_STATE_A_HOST; | 383 | mvotg->phy.otg->state = OTG_STATE_A_HOST; |
| 384 | } | 384 | } |
| 385 | break; | 385 | break; |
| 386 | case OTG_STATE_A_HOST: | 386 | case OTG_STATE_A_HOST: |
| 387 | if (otg_ctrl->id || !otg_ctrl->b_conn | 387 | if (otg_ctrl->id || !otg_ctrl->b_conn |
| 388 | || otg_ctrl->a_bus_drop) | 388 | || otg_ctrl->a_bus_drop) |
| 389 | phy->state = OTG_STATE_A_WAIT_BCON; | 389 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON; |
| 390 | else if (!otg_ctrl->a_vbus_vld) | 390 | else if (!otg_ctrl->a_vbus_vld) |
| 391 | phy->state = OTG_STATE_A_VBUS_ERR; | 391 | mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR; |
| 392 | break; | 392 | break; |
| 393 | case OTG_STATE_A_WAIT_VFALL: | 393 | case OTG_STATE_A_WAIT_VFALL: |
| 394 | if (otg_ctrl->id | 394 | if (otg_ctrl->id |
| 395 | || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld) | 395 | || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld) |
| 396 | || otg_ctrl->a_bus_req) | 396 | || otg_ctrl->a_bus_req) |
| 397 | phy->state = OTG_STATE_A_IDLE; | 397 | mvotg->phy.otg->state = OTG_STATE_A_IDLE; |
| 398 | break; | 398 | break; |
| 399 | case OTG_STATE_A_VBUS_ERR: | 399 | case OTG_STATE_A_VBUS_ERR: |
| 400 | if (otg_ctrl->id || otg_ctrl->a_clr_err | 400 | if (otg_ctrl->id || otg_ctrl->a_clr_err |
| 401 | || otg_ctrl->a_bus_drop) { | 401 | || otg_ctrl->a_bus_drop) { |
| 402 | otg_ctrl->a_clr_err = 0; | 402 | otg_ctrl->a_clr_err = 0; |
| 403 | phy->state = OTG_STATE_A_WAIT_VFALL; | 403 | mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL; |
| 404 | } | 404 | } |
| 405 | break; | 405 | break; |
| 406 | default: | 406 | default: |
| @@ -420,8 +420,8 @@ static void mv_otg_work(struct work_struct *work) | |||
| 420 | run: | 420 | run: |
| 421 | /* work queue is single thread, or we need spin_lock to protect */ | 421 | /* work queue is single thread, or we need spin_lock to protect */ |
| 422 | phy = &mvotg->phy; | 422 | phy = &mvotg->phy; |
| 423 | otg = phy->otg; | 423 | otg = mvotg->phy.otg; |
| 424 | old_state = phy->state; | 424 | old_state = otg->state; |
| 425 | 425 | ||
| 426 | if (!mvotg->active) | 426 | if (!mvotg->active) |
| 427 | return; | 427 | return; |
| @@ -429,22 +429,24 @@ run: | |||
| 429 | mv_otg_update_inputs(mvotg); | 429 | mv_otg_update_inputs(mvotg); |
| 430 | mv_otg_update_state(mvotg); | 430 | mv_otg_update_state(mvotg); |
| 431 | 431 | ||
| 432 | if (old_state != phy->state) { | 432 | if (old_state != mvotg->phy.otg->state) { |
| 433 | dev_info(&mvotg->pdev->dev, "change from state %s to %s\n", | 433 | dev_info(&mvotg->pdev->dev, "change from state %s to %s\n", |
| 434 | state_string[old_state], | 434 | state_string[old_state], |
| 435 | state_string[phy->state]); | 435 | state_string[mvotg->phy.otg->state]); |
| 436 | 436 | ||
| 437 | switch (phy->state) { | 437 | switch (mvotg->phy.otg->state) { |
| 438 | case OTG_STATE_B_IDLE: | 438 | case OTG_STATE_B_IDLE: |
| 439 | otg->default_a = 0; | 439 | otg->default_a = 0; |
| 440 | if (old_state == OTG_STATE_B_PERIPHERAL) | 440 | if (old_state == OTG_STATE_B_PERIPHERAL) |
| 441 | mv_otg_start_periphrals(mvotg, 0); | 441 | mv_otg_start_periphrals(mvotg, 0); |
| 442 | mv_otg_reset(mvotg); | 442 | mv_otg_reset(mvotg); |
| 443 | mv_otg_disable(mvotg); | 443 | mv_otg_disable(mvotg); |
| 444 | usb_phy_set_event(&mvotg->phy, USB_EVENT_NONE); | ||
| 444 | break; | 445 | break; |
| 445 | case OTG_STATE_B_PERIPHERAL: | 446 | case OTG_STATE_B_PERIPHERAL: |
| 446 | mv_otg_enable(mvotg); | 447 | mv_otg_enable(mvotg); |
| 447 | mv_otg_start_periphrals(mvotg, 1); | 448 | mv_otg_start_periphrals(mvotg, 1); |
| 449 | usb_phy_set_event(&mvotg->phy, USB_EVENT_ENUMERATED); | ||
| 448 | break; | 450 | break; |
| 449 | case OTG_STATE_A_IDLE: | 451 | case OTG_STATE_A_IDLE: |
| 450 | otg->default_a = 1; | 452 | otg->default_a = 1; |
| @@ -545,8 +547,8 @@ set_a_bus_req(struct device *dev, struct device_attribute *attr, | |||
| 545 | return -1; | 547 | return -1; |
| 546 | 548 | ||
| 547 | /* We will use this interface to change to A device */ | 549 | /* We will use this interface to change to A device */ |
| 548 | if (mvotg->phy.state != OTG_STATE_B_IDLE | 550 | if (mvotg->phy.otg->state != OTG_STATE_B_IDLE |
| 549 | && mvotg->phy.state != OTG_STATE_A_IDLE) | 551 | && mvotg->phy.otg->state != OTG_STATE_A_IDLE) |
| 550 | return -1; | 552 | return -1; |
| 551 | 553 | ||
| 552 | /* The clock may disabled and we need to set irq for ID detected */ | 554 | /* The clock may disabled and we need to set irq for ID detected */ |
| @@ -686,10 +688,8 @@ static int mv_otg_probe(struct platform_device *pdev) | |||
| 686 | } | 688 | } |
| 687 | 689 | ||
| 688 | mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL); | 690 | mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL); |
| 689 | if (!mvotg) { | 691 | if (!mvotg) |
| 690 | dev_err(&pdev->dev, "failed to allocate memory!\n"); | ||
| 691 | return -ENOMEM; | 692 | return -ENOMEM; |
| 692 | } | ||
| 693 | 693 | ||
| 694 | otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL); | 694 | otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL); |
| 695 | if (!otg) | 695 | if (!otg) |
| @@ -717,9 +717,9 @@ static int mv_otg_probe(struct platform_device *pdev) | |||
| 717 | mvotg->phy.dev = &pdev->dev; | 717 | mvotg->phy.dev = &pdev->dev; |
| 718 | mvotg->phy.otg = otg; | 718 | mvotg->phy.otg = otg; |
| 719 | mvotg->phy.label = driver_name; | 719 | mvotg->phy.label = driver_name; |
| 720 | mvotg->phy.state = OTG_STATE_UNDEFINED; | ||
| 721 | 720 | ||
| 722 | otg->phy = &mvotg->phy; | 721 | otg->state = OTG_STATE_UNDEFINED; |
| 722 | otg->usb_phy = &mvotg->phy; | ||
| 723 | otg->set_host = mv_otg_set_host; | 723 | otg->set_host = mv_otg_set_host; |
| 724 | otg->set_peripheral = mv_otg_set_peripheral; | 724 | otg->set_peripheral = mv_otg_set_peripheral; |
| 725 | otg->set_vbus = mv_otg_set_vbus; | 725 | otg->set_vbus = mv_otg_set_vbus; |
| @@ -896,7 +896,6 @@ static struct platform_driver mv_otg_driver = { | |||
| 896 | .probe = mv_otg_probe, | 896 | .probe = mv_otg_probe, |
| 897 | .remove = mv_otg_remove, | 897 | .remove = mv_otg_remove, |
| 898 | .driver = { | 898 | .driver = { |
| 899 | .owner = THIS_MODULE, | ||
| 900 | .name = driver_name, | 899 | .name = driver_name, |
| 901 | }, | 900 | }, |
| 902 | #ifdef CONFIG_PM | 901 | #ifdef CONFIG_PM |
diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c index 00972eca04e7..b9589f663683 100644 --- a/drivers/usb/phy/phy-mxs-usb.c +++ b/drivers/usb/phy/phy-mxs-usb.c | |||
| @@ -125,6 +125,11 @@ static const struct mxs_phy_data imx6sl_phy_data = { | |||
| 125 | MXS_PHY_NEED_IP_FIX, | 125 | MXS_PHY_NEED_IP_FIX, |
| 126 | }; | 126 | }; |
| 127 | 127 | ||
| 128 | static const struct mxs_phy_data vf610_phy_data = { | ||
| 129 | .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS | | ||
| 130 | MXS_PHY_NEED_IP_FIX, | ||
| 131 | }; | ||
| 132 | |||
| 128 | static const struct mxs_phy_data imx6sx_phy_data = { | 133 | static const struct mxs_phy_data imx6sx_phy_data = { |
| 129 | .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS | | 134 | .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS | |
| 130 | MXS_PHY_NEED_IP_FIX, | 135 | MXS_PHY_NEED_IP_FIX, |
| @@ -135,6 +140,7 @@ static const struct of_device_id mxs_phy_dt_ids[] = { | |||
| 135 | { .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, }, | 140 | { .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, }, |
| 136 | { .compatible = "fsl,imx6q-usbphy", .data = &imx6q_phy_data, }, | 141 | { .compatible = "fsl,imx6q-usbphy", .data = &imx6q_phy_data, }, |
| 137 | { .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, }, | 142 | { .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, }, |
| 143 | { .compatible = "fsl,vf610-usbphy", .data = &vf610_phy_data, }, | ||
| 138 | { /* sentinel */ } | 144 | { /* sentinel */ } |
| 139 | }; | 145 | }; |
| 140 | MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids); | 146 | MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids); |
| @@ -384,10 +390,8 @@ static int mxs_phy_probe(struct platform_device *pdev) | |||
| 384 | } | 390 | } |
| 385 | 391 | ||
| 386 | mxs_phy = devm_kzalloc(&pdev->dev, sizeof(*mxs_phy), GFP_KERNEL); | 392 | mxs_phy = devm_kzalloc(&pdev->dev, sizeof(*mxs_phy), GFP_KERNEL); |
| 387 | if (!mxs_phy) { | 393 | if (!mxs_phy) |
| 388 | dev_err(&pdev->dev, "Failed to allocate USB PHY structure!\n"); | ||
| 389 | return -ENOMEM; | 394 | return -ENOMEM; |
| 390 | } | ||
| 391 | 395 | ||
| 392 | /* Some SoCs don't have anatop registers */ | 396 | /* Some SoCs don't have anatop registers */ |
| 393 | if (of_get_property(np, "fsl,anatop", NULL)) { | 397 | if (of_get_property(np, "fsl,anatop", NULL)) { |
| @@ -485,7 +489,6 @@ static struct platform_driver mxs_phy_driver = { | |||
| 485 | .remove = mxs_phy_remove, | 489 | .remove = mxs_phy_remove, |
| 486 | .driver = { | 490 | .driver = { |
| 487 | .name = DRIVER_NAME, | 491 | .name = DRIVER_NAME, |
| 488 | .owner = THIS_MODULE, | ||
| 489 | .of_match_table = mxs_phy_dt_ids, | 492 | .of_match_table = mxs_phy_dt_ids, |
| 490 | .pm = &mxs_phy_pm, | 493 | .pm = &mxs_phy_pm, |
| 491 | }, | 494 | }, |
diff --git a/drivers/usb/phy/phy-omap-otg.c b/drivers/usb/phy/phy-omap-otg.c index 11598cdb3189..56ee7603034b 100644 --- a/drivers/usb/phy/phy-omap-otg.c +++ b/drivers/usb/phy/phy-omap-otg.c | |||
| @@ -158,7 +158,6 @@ static struct platform_driver omap_otg_driver = { | |||
| 158 | .probe = omap_otg_probe, | 158 | .probe = omap_otg_probe, |
| 159 | .remove = omap_otg_remove, | 159 | .remove = omap_otg_remove, |
| 160 | .driver = { | 160 | .driver = { |
| 161 | .owner = THIS_MODULE, | ||
| 162 | .name = "omap_otg", | 161 | .name = "omap_otg", |
| 163 | }, | 162 | }, |
| 164 | }; | 163 | }; |
diff --git a/drivers/usb/phy/phy-rcar-gen2-usb.c b/drivers/usb/phy/phy-rcar-gen2-usb.c index 388d89f6b141..f83808413ba2 100644 --- a/drivers/usb/phy/phy-rcar-gen2-usb.c +++ b/drivers/usb/phy/phy-rcar-gen2-usb.c | |||
| @@ -195,10 +195,8 @@ static int rcar_gen2_usb_phy_probe(struct platform_device *pdev) | |||
| 195 | return PTR_ERR(base); | 195 | return PTR_ERR(base); |
| 196 | 196 | ||
| 197 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | 197 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
| 198 | if (!priv) { | 198 | if (!priv) |
| 199 | dev_err(dev, "Memory allocation failed\n"); | ||
| 200 | return -ENOMEM; | 199 | return -ENOMEM; |
| 201 | } | ||
| 202 | 200 | ||
| 203 | spin_lock_init(&priv->lock); | 201 | spin_lock_init(&priv->lock); |
| 204 | priv->clk = clk; | 202 | priv->clk = clk; |
diff --git a/drivers/usb/phy/phy-rcar-usb.c b/drivers/usb/phy/phy-rcar-usb.c index 33265a5b2cdf..1e09b8377885 100644 --- a/drivers/usb/phy/phy-rcar-usb.c +++ b/drivers/usb/phy/phy-rcar-usb.c | |||
| @@ -195,17 +195,13 @@ static int rcar_usb_phy_probe(struct platform_device *pdev) | |||
| 195 | return PTR_ERR(reg0); | 195 | return PTR_ERR(reg0); |
| 196 | 196 | ||
| 197 | res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 197 | res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 198 | if (res1) { | 198 | reg1 = devm_ioremap_resource(dev, res1); |
| 199 | reg1 = devm_ioremap_resource(dev, res1); | 199 | if (IS_ERR(reg1)) |
| 200 | if (IS_ERR(reg1)) | 200 | return PTR_ERR(reg1); |
| 201 | return PTR_ERR(reg1); | ||
| 202 | } | ||
| 203 | 201 | ||
| 204 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | 202 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
| 205 | if (!priv) { | 203 | if (!priv) |
| 206 | dev_err(dev, "priv data allocation error\n"); | ||
| 207 | return -ENOMEM; | 204 | return -ENOMEM; |
| 208 | } | ||
| 209 | 205 | ||
| 210 | priv->reg0 = reg0; | 206 | priv->reg0 = reg0; |
| 211 | priv->reg1 = reg1; | 207 | priv->reg1 = reg1; |
diff --git a/drivers/usb/phy/phy-samsung-usb.c b/drivers/usb/phy/phy-samsung-usb.c deleted file mode 100644 index ac025ca08425..000000000000 --- a/drivers/usb/phy/phy-samsung-usb.c +++ /dev/null | |||
| @@ -1,241 +0,0 @@ | |||
| 1 | /* linux/drivers/usb/phy/phy-samsung-usb.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * Author: Praveen Paneri <p.paneri@samsung.com> | ||
| 7 | * | ||
| 8 | * Samsung USB-PHY helper driver with common function calls; | ||
| 9 | * interacts with Samsung USB 2.0 PHY controller driver and later | ||
| 10 | * with Samsung USB 3.0 PHY driver. | ||
| 11 | * | ||
| 12 | * This program is free software; you can redistribute it and/or modify | ||
| 13 | * it under the terms of the GNU General Public License version 2 as | ||
| 14 | * published by the Free Software Foundation. | ||
| 15 | * | ||
| 16 | * This program is distributed in the hope that it will be useful, | ||
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 19 | * GNU General Public License for more details. | ||
| 20 | */ | ||
| 21 | |||
| 22 | #include <linux/module.h> | ||
| 23 | #include <linux/platform_device.h> | ||
| 24 | #include <linux/clk.h> | ||
| 25 | #include <linux/device.h> | ||
| 26 | #include <linux/err.h> | ||
| 27 | #include <linux/io.h> | ||
| 28 | #include <linux/of.h> | ||
| 29 | #include <linux/of_address.h> | ||
| 30 | #include <linux/usb/samsung_usb_phy.h> | ||
| 31 | |||
| 32 | #include "phy-samsung-usb.h" | ||
| 33 | |||
| 34 | int samsung_usbphy_parse_dt(struct samsung_usbphy *sphy) | ||
| 35 | { | ||
| 36 | struct device_node *usbphy_sys; | ||
| 37 | |||
| 38 | /* Getting node for system controller interface for usb-phy */ | ||
| 39 | usbphy_sys = of_get_child_by_name(sphy->dev->of_node, "usbphy-sys"); | ||
| 40 | if (!usbphy_sys) { | ||
| 41 | dev_err(sphy->dev, "No sys-controller interface for usb-phy\n"); | ||
| 42 | return -ENODEV; | ||
| 43 | } | ||
| 44 | |||
| 45 | sphy->pmuregs = of_iomap(usbphy_sys, 0); | ||
| 46 | |||
| 47 | if (sphy->pmuregs == NULL) { | ||
| 48 | dev_err(sphy->dev, "Can't get usb-phy pmu control register\n"); | ||
| 49 | goto err0; | ||
| 50 | } | ||
| 51 | |||
| 52 | sphy->sysreg = of_iomap(usbphy_sys, 1); | ||
| 53 | |||
| 54 | /* | ||
| 55 | * Not returning error code here, since this situation is not fatal. | ||
| 56 | * Few SoCs may not have this switch available | ||
| 57 | */ | ||
| 58 | if (sphy->sysreg == NULL) | ||
| 59 | dev_warn(sphy->dev, "Can't get usb-phy sysreg cfg register\n"); | ||
| 60 | |||
| 61 | of_node_put(usbphy_sys); | ||
| 62 | |||
| 63 | return 0; | ||
| 64 | |||
| 65 | err0: | ||
| 66 | of_node_put(usbphy_sys); | ||
| 67 | return -ENXIO; | ||
| 68 | } | ||
| 69 | EXPORT_SYMBOL_GPL(samsung_usbphy_parse_dt); | ||
| 70 | |||
| 71 | /* | ||
| 72 | * Set isolation here for phy. | ||
| 73 | * Here 'on = true' would mean USB PHY block is isolated, hence | ||
| 74 | * de-activated and vice-versa. | ||
| 75 | */ | ||
| 76 | void samsung_usbphy_set_isolation_4210(struct samsung_usbphy *sphy, bool on) | ||
| 77 | { | ||
| 78 | void __iomem *reg = NULL; | ||
| 79 | u32 reg_val; | ||
| 80 | u32 en_mask = 0; | ||
| 81 | |||
| 82 | if (!sphy->pmuregs) { | ||
| 83 | dev_warn(sphy->dev, "Can't set pmu isolation\n"); | ||
| 84 | return; | ||
| 85 | } | ||
| 86 | |||
| 87 | if (sphy->phy_type == USB_PHY_TYPE_DEVICE) { | ||
| 88 | reg = sphy->pmuregs + sphy->drv_data->devphy_reg_offset; | ||
| 89 | en_mask = sphy->drv_data->devphy_en_mask; | ||
| 90 | } else if (sphy->phy_type == USB_PHY_TYPE_HOST) { | ||
| 91 | reg = sphy->pmuregs + sphy->drv_data->hostphy_reg_offset; | ||
| 92 | en_mask = sphy->drv_data->hostphy_en_mask; | ||
| 93 | } | ||
| 94 | |||
| 95 | reg_val = readl(reg); | ||
| 96 | |||
| 97 | if (on) | ||
| 98 | reg_val &= ~en_mask; | ||
| 99 | else | ||
| 100 | reg_val |= en_mask; | ||
| 101 | |||
| 102 | writel(reg_val, reg); | ||
| 103 | |||
| 104 | if (sphy->drv_data->cpu_type == TYPE_EXYNOS4X12) { | ||
| 105 | writel(reg_val, sphy->pmuregs + EXYNOS4X12_PHY_HSIC_CTRL0); | ||
| 106 | writel(reg_val, sphy->pmuregs + EXYNOS4X12_PHY_HSIC_CTRL1); | ||
| 107 | } | ||
| 108 | } | ||
| 109 | EXPORT_SYMBOL_GPL(samsung_usbphy_set_isolation_4210); | ||
| 110 | |||
| 111 | /* | ||
| 112 | * Configure the mode of working of usb-phy here: HOST/DEVICE. | ||
| 113 | */ | ||
| 114 | void samsung_usbphy_cfg_sel(struct samsung_usbphy *sphy) | ||
| 115 | { | ||
| 116 | u32 reg; | ||
| 117 | |||
| 118 | if (!sphy->sysreg) { | ||
| 119 | dev_warn(sphy->dev, "Can't configure specified phy mode\n"); | ||
| 120 | return; | ||
| 121 | } | ||
| 122 | |||
| 123 | reg = readl(sphy->sysreg); | ||
| 124 | |||
| 125 | if (sphy->phy_type == USB_PHY_TYPE_DEVICE) | ||
| 126 | reg &= ~EXYNOS_USB20PHY_CFG_HOST_LINK; | ||
| 127 | else if (sphy->phy_type == USB_PHY_TYPE_HOST) | ||
| 128 | reg |= EXYNOS_USB20PHY_CFG_HOST_LINK; | ||
| 129 | |||
| 130 | writel(reg, sphy->sysreg); | ||
| 131 | } | ||
| 132 | EXPORT_SYMBOL_GPL(samsung_usbphy_cfg_sel); | ||
| 133 | |||
| 134 | /* | ||
| 135 | * PHYs are different for USB Device and USB Host. | ||
| 136 | * This make sure that correct PHY type is selected before | ||
| 137 | * any operation on PHY. | ||
| 138 | */ | ||
| 139 | int samsung_usbphy_set_type(struct usb_phy *phy, | ||
| 140 | enum samsung_usb_phy_type phy_type) | ||
| 141 | { | ||
| 142 | struct samsung_usbphy *sphy = phy_to_sphy(phy); | ||
| 143 | |||
| 144 | sphy->phy_type = phy_type; | ||
| 145 | |||
| 146 | return 0; | ||
| 147 | } | ||
| 148 | EXPORT_SYMBOL_GPL(samsung_usbphy_set_type); | ||
| 149 | |||
| 150 | int samsung_usbphy_rate_to_clksel_64xx(struct samsung_usbphy *sphy, | ||
| 151 | unsigned long rate) | ||
| 152 | { | ||
| 153 | unsigned int clksel; | ||
| 154 | |||
| 155 | switch (rate) { | ||
| 156 | case 12 * MHZ: | ||
| 157 | clksel = PHYCLK_CLKSEL_12M; | ||
| 158 | break; | ||
| 159 | case 24 * MHZ: | ||
| 160 | clksel = PHYCLK_CLKSEL_24M; | ||
| 161 | break; | ||
| 162 | case 48 * MHZ: | ||
| 163 | clksel = PHYCLK_CLKSEL_48M; | ||
| 164 | break; | ||
| 165 | default: | ||
| 166 | dev_err(sphy->dev, | ||
| 167 | "Invalid reference clock frequency: %lu\n", rate); | ||
| 168 | return -EINVAL; | ||
| 169 | } | ||
| 170 | |||
| 171 | return clksel; | ||
| 172 | } | ||
| 173 | EXPORT_SYMBOL_GPL(samsung_usbphy_rate_to_clksel_64xx); | ||
| 174 | |||
| 175 | int samsung_usbphy_rate_to_clksel_4x12(struct samsung_usbphy *sphy, | ||
| 176 | unsigned long rate) | ||
| 177 | { | ||
| 178 | unsigned int clksel; | ||
| 179 | |||
| 180 | switch (rate) { | ||
| 181 | case 9600 * KHZ: | ||
| 182 | clksel = FSEL_CLKSEL_9600K; | ||
| 183 | break; | ||
| 184 | case 10 * MHZ: | ||
| 185 | clksel = FSEL_CLKSEL_10M; | ||
| 186 | break; | ||
| 187 | case 12 * MHZ: | ||
| 188 | clksel = FSEL_CLKSEL_12M; | ||
| 189 | break; | ||
| 190 | case 19200 * KHZ: | ||
| 191 | clksel = FSEL_CLKSEL_19200K; | ||
| 192 | break; | ||
| 193 | case 20 * MHZ: | ||
| 194 | clksel = FSEL_CLKSEL_20M; | ||
| 195 | break; | ||
| 196 | case 24 * MHZ: | ||
| 197 | clksel = FSEL_CLKSEL_24M; | ||
| 198 | break; | ||
| 199 | case 50 * MHZ: | ||
| 200 | clksel = FSEL_CLKSEL_50M; | ||
| 201 | break; | ||
| 202 | default: | ||
| 203 | dev_err(sphy->dev, | ||
| 204 | "Invalid reference clock frequency: %lu\n", rate); | ||
| 205 | return -EINVAL; | ||
| 206 | } | ||
| 207 | |||
| 208 | return clksel; | ||
| 209 | } | ||
| 210 | EXPORT_SYMBOL_GPL(samsung_usbphy_rate_to_clksel_4x12); | ||
| 211 | |||
| 212 | /* | ||
| 213 | * Returns reference clock frequency selection value | ||
| 214 | */ | ||
| 215 | int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy) | ||
| 216 | { | ||
| 217 | struct clk *ref_clk; | ||
| 218 | unsigned long rate; | ||
| 219 | int refclk_freq; | ||
| 220 | |||
| 221 | /* | ||
| 222 | * In exynos5250 USB host and device PHY use | ||
| 223 | * external crystal clock XXTI | ||
| 224 | */ | ||
| 225 | if (sphy->drv_data->cpu_type == TYPE_EXYNOS5250) | ||
| 226 | ref_clk = clk_get(sphy->dev, "ext_xtal"); | ||
| 227 | else | ||
| 228 | ref_clk = clk_get(sphy->dev, "xusbxti"); | ||
| 229 | if (IS_ERR(ref_clk)) { | ||
| 230 | dev_err(sphy->dev, "Failed to get reference clock\n"); | ||
| 231 | return PTR_ERR(ref_clk); | ||
| 232 | } | ||
| 233 | |||
| 234 | rate = clk_get_rate(ref_clk); | ||
| 235 | refclk_freq = sphy->drv_data->rate_to_clksel(sphy, rate); | ||
| 236 | |||
| 237 | clk_put(ref_clk); | ||
| 238 | |||
| 239 | return refclk_freq; | ||
| 240 | } | ||
| 241 | EXPORT_SYMBOL_GPL(samsung_usbphy_get_refclk_freq); | ||
diff --git a/drivers/usb/phy/phy-samsung-usb.h b/drivers/usb/phy/phy-samsung-usb.h deleted file mode 100644 index 80eedd45a20a..000000000000 --- a/drivers/usb/phy/phy-samsung-usb.h +++ /dev/null | |||
| @@ -1,349 +0,0 @@ | |||
| 1 | /* linux/drivers/usb/phy/phy-samsung-usb.h | ||
| 2 | * | ||
| 3 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * Samsung USB-PHY transceiver; talks to S3C HS OTG controller, EHCI-S5P and | ||
| 7 | * OHCI-EXYNOS controllers. | ||
| 8 | * | ||
| 9 | * This program is free software; you can redistribute it and/or modify | ||
| 10 | * it under the terms of the GNU General Public License version 2 as | ||
| 11 | * published by the Free Software Foundation. | ||
| 12 | * | ||
| 13 | * This program is distributed in the hope that it will be useful, | ||
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 16 | * GNU General Public License for more details. | ||
| 17 | */ | ||
| 18 | |||
| 19 | #include <linux/usb/phy.h> | ||
| 20 | |||
| 21 | /* Register definitions */ | ||
| 22 | |||
| 23 | #define SAMSUNG_PHYPWR (0x00) | ||
| 24 | |||
| 25 | #define PHYPWR_NORMAL_MASK (0x19 << 0) | ||
| 26 | #define PHYPWR_OTG_DISABLE (0x1 << 4) | ||
| 27 | #define PHYPWR_ANALOG_POWERDOWN (0x1 << 3) | ||
| 28 | #define PHYPWR_FORCE_SUSPEND (0x1 << 1) | ||
| 29 | /* For Exynos4 */ | ||
| 30 | #define PHYPWR_NORMAL_MASK_PHY0 (0x39 << 0) | ||
| 31 | #define PHYPWR_SLEEP_PHY0 (0x1 << 5) | ||
| 32 | |||
| 33 | #define SAMSUNG_PHYCLK (0x04) | ||
| 34 | |||
| 35 | #define PHYCLK_MODE_USB11 (0x1 << 6) | ||
| 36 | #define PHYCLK_EXT_OSC (0x1 << 5) | ||
| 37 | #define PHYCLK_COMMON_ON_N (0x1 << 4) | ||
| 38 | #define PHYCLK_ID_PULL (0x1 << 2) | ||
| 39 | #define PHYCLK_CLKSEL_MASK (0x3 << 0) | ||
| 40 | #define PHYCLK_CLKSEL_48M (0x0 << 0) | ||
| 41 | #define PHYCLK_CLKSEL_12M (0x2 << 0) | ||
| 42 | #define PHYCLK_CLKSEL_24M (0x3 << 0) | ||
| 43 | |||
| 44 | #define SAMSUNG_RSTCON (0x08) | ||
| 45 | |||
| 46 | #define RSTCON_PHYLINK_SWRST (0x1 << 2) | ||
| 47 | #define RSTCON_HLINK_SWRST (0x1 << 1) | ||
| 48 | #define RSTCON_SWRST (0x1 << 0) | ||
| 49 | |||
| 50 | /* EXYNOS4X12 */ | ||
| 51 | #define EXYNOS4X12_PHY_HSIC_CTRL0 (0x04) | ||
| 52 | #define EXYNOS4X12_PHY_HSIC_CTRL1 (0x08) | ||
| 53 | |||
| 54 | #define PHYPWR_NORMAL_MASK_HSIC1 (0x7 << 12) | ||
| 55 | #define PHYPWR_NORMAL_MASK_HSIC0 (0x7 << 9) | ||
| 56 | #define PHYPWR_NORMAL_MASK_PHY1 (0x7 << 6) | ||
| 57 | |||
| 58 | #define RSTCON_HOSTPHY_SWRST (0xf << 3) | ||
| 59 | |||
| 60 | /* EXYNOS5 */ | ||
| 61 | #define EXYNOS5_PHY_HOST_CTRL0 (0x00) | ||
| 62 | |||
| 63 | #define HOST_CTRL0_PHYSWRSTALL (0x1 << 31) | ||
| 64 | |||
| 65 | #define HOST_CTRL0_REFCLKSEL_MASK (0x3 << 19) | ||
| 66 | #define HOST_CTRL0_REFCLKSEL_XTAL (0x0 << 19) | ||
| 67 | #define HOST_CTRL0_REFCLKSEL_EXTL (0x1 << 19) | ||
| 68 | #define HOST_CTRL0_REFCLKSEL_CLKCORE (0x2 << 19) | ||
| 69 | |||
| 70 | #define HOST_CTRL0_FSEL_MASK (0x7 << 16) | ||
| 71 | #define HOST_CTRL0_FSEL(_x) ((_x) << 16) | ||
| 72 | |||
| 73 | #define FSEL_CLKSEL_50M (0x7) | ||
| 74 | #define FSEL_CLKSEL_24M (0x5) | ||
| 75 | #define FSEL_CLKSEL_20M (0x4) | ||
| 76 | #define FSEL_CLKSEL_19200K (0x3) | ||
| 77 | #define FSEL_CLKSEL_12M (0x2) | ||
| 78 | #define FSEL_CLKSEL_10M (0x1) | ||
| 79 | #define FSEL_CLKSEL_9600K (0x0) | ||
| 80 | |||
| 81 | #define HOST_CTRL0_TESTBURNIN (0x1 << 11) | ||
| 82 | #define HOST_CTRL0_RETENABLE (0x1 << 10) | ||
| 83 | #define HOST_CTRL0_COMMONON_N (0x1 << 9) | ||
| 84 | #define HOST_CTRL0_SIDDQ (0x1 << 6) | ||
| 85 | #define HOST_CTRL0_FORCESLEEP (0x1 << 5) | ||
| 86 | #define HOST_CTRL0_FORCESUSPEND (0x1 << 4) | ||
| 87 | #define HOST_CTRL0_WORDINTERFACE (0x1 << 3) | ||
| 88 | #define HOST_CTRL0_UTMISWRST (0x1 << 2) | ||
| 89 | #define HOST_CTRL0_LINKSWRST (0x1 << 1) | ||
| 90 | #define HOST_CTRL0_PHYSWRST (0x1 << 0) | ||
| 91 | |||
| 92 | #define EXYNOS5_PHY_HOST_TUNE0 (0x04) | ||
| 93 | |||
| 94 | #define EXYNOS5_PHY_HSIC_CTRL1 (0x10) | ||
| 95 | |||
| 96 | #define EXYNOS5_PHY_HSIC_TUNE1 (0x14) | ||
| 97 | |||
| 98 | #define EXYNOS5_PHY_HSIC_CTRL2 (0x20) | ||
| 99 | |||
| 100 | #define EXYNOS5_PHY_HSIC_TUNE2 (0x24) | ||
| 101 | |||
| 102 | #define HSIC_CTRL_REFCLKSEL_MASK (0x3 << 23) | ||
| 103 | #define HSIC_CTRL_REFCLKSEL (0x2 << 23) | ||
| 104 | |||
| 105 | #define HSIC_CTRL_REFCLKDIV_MASK (0x7f << 16) | ||
| 106 | #define HSIC_CTRL_REFCLKDIV(_x) ((_x) << 16) | ||
| 107 | #define HSIC_CTRL_REFCLKDIV_12 (0x24 << 16) | ||
| 108 | #define HSIC_CTRL_REFCLKDIV_15 (0x1c << 16) | ||
| 109 | #define HSIC_CTRL_REFCLKDIV_16 (0x1a << 16) | ||
| 110 | #define HSIC_CTRL_REFCLKDIV_19_2 (0x15 << 16) | ||
| 111 | #define HSIC_CTRL_REFCLKDIV_20 (0x14 << 16) | ||
| 112 | |||
| 113 | #define HSIC_CTRL_SIDDQ (0x1 << 6) | ||
| 114 | #define HSIC_CTRL_FORCESLEEP (0x1 << 5) | ||
| 115 | #define HSIC_CTRL_FORCESUSPEND (0x1 << 4) | ||
| 116 | #define HSIC_CTRL_WORDINTERFACE (0x1 << 3) | ||
| 117 | #define HSIC_CTRL_UTMISWRST (0x1 << 2) | ||
| 118 | #define HSIC_CTRL_PHYSWRST (0x1 << 0) | ||
| 119 | |||
| 120 | #define EXYNOS5_PHY_HOST_EHCICTRL (0x30) | ||
| 121 | |||
| 122 | #define HOST_EHCICTRL_ENAINCRXALIGN (0x1 << 29) | ||
| 123 | #define HOST_EHCICTRL_ENAINCR4 (0x1 << 28) | ||
| 124 | #define HOST_EHCICTRL_ENAINCR8 (0x1 << 27) | ||
| 125 | #define HOST_EHCICTRL_ENAINCR16 (0x1 << 26) | ||
| 126 | |||
| 127 | #define EXYNOS5_PHY_HOST_OHCICTRL (0x34) | ||
| 128 | |||
| 129 | #define HOST_OHCICTRL_SUSPLGCY (0x1 << 3) | ||
| 130 | #define HOST_OHCICTRL_APPSTARTCLK (0x1 << 2) | ||
| 131 | #define HOST_OHCICTRL_CNTSEL (0x1 << 1) | ||
| 132 | #define HOST_OHCICTRL_CLKCKTRST (0x1 << 0) | ||
| 133 | |||
| 134 | #define EXYNOS5_PHY_OTG_SYS (0x38) | ||
| 135 | |||
| 136 | #define OTG_SYS_PHYLINK_SWRESET (0x1 << 14) | ||
| 137 | #define OTG_SYS_LINKSWRST_UOTG (0x1 << 13) | ||
| 138 | #define OTG_SYS_PHY0_SWRST (0x1 << 12) | ||
| 139 | |||
| 140 | #define OTG_SYS_REFCLKSEL_MASK (0x3 << 9) | ||
| 141 | #define OTG_SYS_REFCLKSEL_XTAL (0x0 << 9) | ||
| 142 | #define OTG_SYS_REFCLKSEL_EXTL (0x1 << 9) | ||
| 143 | #define OTG_SYS_REFCLKSEL_CLKCORE (0x2 << 9) | ||
| 144 | |||
| 145 | #define OTG_SYS_IDPULLUP_UOTG (0x1 << 8) | ||
| 146 | #define OTG_SYS_COMMON_ON (0x1 << 7) | ||
| 147 | |||
| 148 | #define OTG_SYS_FSEL_MASK (0x7 << 4) | ||
| 149 | #define OTG_SYS_FSEL(_x) ((_x) << 4) | ||
| 150 | |||
| 151 | #define OTG_SYS_FORCESLEEP (0x1 << 3) | ||
| 152 | #define OTG_SYS_OTGDISABLE (0x1 << 2) | ||
| 153 | #define OTG_SYS_SIDDQ_UOTG (0x1 << 1) | ||
| 154 | #define OTG_SYS_FORCESUSPEND (0x1 << 0) | ||
| 155 | |||
| 156 | #define EXYNOS5_PHY_OTG_TUNE (0x40) | ||
| 157 | |||
| 158 | /* EXYNOS5: USB 3.0 DRD */ | ||
| 159 | #define EXYNOS5_DRD_LINKSYSTEM (0x04) | ||
| 160 | |||
| 161 | #define LINKSYSTEM_FLADJ_MASK (0x3f << 1) | ||
| 162 | #define LINKSYSTEM_FLADJ(_x) ((_x) << 1) | ||
| 163 | #define LINKSYSTEM_XHCI_VERSION_CONTROL (0x1 << 27) | ||
| 164 | |||
| 165 | #define EXYNOS5_DRD_PHYUTMI (0x08) | ||
| 166 | |||
| 167 | #define PHYUTMI_OTGDISABLE (0x1 << 6) | ||
| 168 | #define PHYUTMI_FORCESUSPEND (0x1 << 1) | ||
| 169 | #define PHYUTMI_FORCESLEEP (0x1 << 0) | ||
| 170 | |||
| 171 | #define EXYNOS5_DRD_PHYPIPE (0x0c) | ||
| 172 | |||
| 173 | #define EXYNOS5_DRD_PHYCLKRST (0x10) | ||
| 174 | |||
| 175 | #define PHYCLKRST_SSC_REFCLKSEL_MASK (0xff << 23) | ||
| 176 | #define PHYCLKRST_SSC_REFCLKSEL(_x) ((_x) << 23) | ||
| 177 | |||
| 178 | #define PHYCLKRST_SSC_RANGE_MASK (0x03 << 21) | ||
| 179 | #define PHYCLKRST_SSC_RANGE(_x) ((_x) << 21) | ||
| 180 | |||
| 181 | #define PHYCLKRST_SSC_EN (0x1 << 20) | ||
| 182 | #define PHYCLKRST_REF_SSP_EN (0x1 << 19) | ||
| 183 | #define PHYCLKRST_REF_CLKDIV2 (0x1 << 18) | ||
| 184 | |||
| 185 | #define PHYCLKRST_MPLL_MULTIPLIER_MASK (0x7f << 11) | ||
| 186 | #define PHYCLKRST_MPLL_MULTIPLIER_100MHZ_REF (0x19 << 11) | ||
| 187 | #define PHYCLKRST_MPLL_MULTIPLIER_50M_REF (0x02 << 11) | ||
| 188 | #define PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF (0x68 << 11) | ||
| 189 | #define PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF (0x7d << 11) | ||
| 190 | #define PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF (0x02 << 11) | ||
| 191 | |||
| 192 | #define PHYCLKRST_FSEL_MASK (0x3f << 5) | ||
| 193 | #define PHYCLKRST_FSEL(_x) ((_x) << 5) | ||
| 194 | #define PHYCLKRST_FSEL_PAD_100MHZ (0x27 << 5) | ||
| 195 | #define PHYCLKRST_FSEL_PAD_24MHZ (0x2a << 5) | ||
| 196 | #define PHYCLKRST_FSEL_PAD_20MHZ (0x31 << 5) | ||
| 197 | #define PHYCLKRST_FSEL_PAD_19_2MHZ (0x38 << 5) | ||
| 198 | |||
| 199 | #define PHYCLKRST_RETENABLEN (0x1 << 4) | ||
| 200 | |||
| 201 | #define PHYCLKRST_REFCLKSEL_MASK (0x03 << 2) | ||
| 202 | #define PHYCLKRST_REFCLKSEL_PAD_REFCLK (0x2 << 2) | ||
| 203 | #define PHYCLKRST_REFCLKSEL_EXT_REFCLK (0x3 << 2) | ||
| 204 | |||
| 205 | #define PHYCLKRST_PORTRESET (0x1 << 1) | ||
| 206 | #define PHYCLKRST_COMMONONN (0x1 << 0) | ||
| 207 | |||
| 208 | #define EXYNOS5_DRD_PHYREG0 (0x14) | ||
| 209 | #define EXYNOS5_DRD_PHYREG1 (0x18) | ||
| 210 | |||
| 211 | #define EXYNOS5_DRD_PHYPARAM0 (0x1c) | ||
| 212 | |||
| 213 | #define PHYPARAM0_REF_USE_PAD (0x1 << 31) | ||
| 214 | #define PHYPARAM0_REF_LOSLEVEL_MASK (0x1f << 26) | ||
| 215 | #define PHYPARAM0_REF_LOSLEVEL (0x9 << 26) | ||
| 216 | |||
| 217 | #define EXYNOS5_DRD_PHYPARAM1 (0x20) | ||
| 218 | |||
| 219 | #define PHYPARAM1_PCS_TXDEEMPH_MASK (0x3f << 0) | ||
| 220 | #define PHYPARAM1_PCS_TXDEEMPH (0x1c) | ||
| 221 | |||
| 222 | #define EXYNOS5_DRD_PHYTERM (0x24) | ||
| 223 | |||
| 224 | #define EXYNOS5_DRD_PHYTEST (0x28) | ||
| 225 | |||
| 226 | #define PHYTEST_POWERDOWN_SSP (0x1 << 3) | ||
| 227 | #define PHYTEST_POWERDOWN_HSP (0x1 << 2) | ||
| 228 | |||
| 229 | #define EXYNOS5_DRD_PHYADP (0x2c) | ||
| 230 | |||
| 231 | #define EXYNOS5_DRD_PHYBATCHG (0x30) | ||
| 232 | |||
| 233 | #define PHYBATCHG_UTMI_CLKSEL (0x1 << 2) | ||
| 234 | |||
| 235 | #define EXYNOS5_DRD_PHYRESUME (0x34) | ||
| 236 | #define EXYNOS5_DRD_LINKPORT (0x44) | ||
| 237 | |||
| 238 | #ifndef MHZ | ||
| 239 | #define MHZ (1000*1000) | ||
| 240 | #endif | ||
| 241 | |||
| 242 | #ifndef KHZ | ||
| 243 | #define KHZ (1000) | ||
| 244 | #endif | ||
| 245 | |||
| 246 | #define EXYNOS_USBHOST_PHY_CTRL_OFFSET (0x4) | ||
| 247 | #define S3C64XX_USBPHY_ENABLE (0x1 << 16) | ||
| 248 | #define EXYNOS_USBPHY_ENABLE (0x1 << 0) | ||
| 249 | #define EXYNOS_USB20PHY_CFG_HOST_LINK (0x1 << 0) | ||
| 250 | |||
| 251 | enum samsung_cpu_type { | ||
| 252 | TYPE_S3C64XX, | ||
| 253 | TYPE_EXYNOS4210, | ||
| 254 | TYPE_EXYNOS4X12, | ||
| 255 | TYPE_EXYNOS5250, | ||
| 256 | }; | ||
| 257 | |||
| 258 | struct samsung_usbphy; | ||
| 259 | |||
| 260 | /* | ||
| 261 | * struct samsung_usbphy_drvdata - driver data for various SoC variants | ||
| 262 | * @cpu_type: machine identifier | ||
| 263 | * @devphy_en_mask: device phy enable mask for PHY CONTROL register | ||
| 264 | * @hostphy_en_mask: host phy enable mask for PHY CONTROL register | ||
| 265 | * @devphy_reg_offset: offset to DEVICE PHY CONTROL register from | ||
| 266 | * mapped address of system controller. | ||
| 267 | * @hostphy_reg_offset: offset to HOST PHY CONTROL register from | ||
| 268 | * mapped address of system controller. | ||
| 269 | * | ||
| 270 | * Here we have a separate mask for device type phy. | ||
| 271 | * Having different masks for host and device type phy helps | ||
| 272 | * in setting independent masks in case of SoCs like S5PV210, | ||
| 273 | * in which PHY0 and PHY1 enable bits belong to same register | ||
| 274 | * placed at position 0 and 1 respectively. | ||
| 275 | * Although for newer SoCs like exynos these bits belong to | ||
| 276 | * different registers altogether placed at position 0. | ||
| 277 | */ | ||
| 278 | struct samsung_usbphy_drvdata { | ||
| 279 | int cpu_type; | ||
| 280 | int devphy_en_mask; | ||
| 281 | int hostphy_en_mask; | ||
| 282 | u32 devphy_reg_offset; | ||
| 283 | u32 hostphy_reg_offset; | ||
| 284 | int (*rate_to_clksel)(struct samsung_usbphy *, unsigned long); | ||
| 285 | void (*set_isolation)(struct samsung_usbphy *, bool); | ||
| 286 | void (*phy_enable)(struct samsung_usbphy *); | ||
| 287 | void (*phy_disable)(struct samsung_usbphy *); | ||
| 288 | }; | ||
| 289 | |||
| 290 | /* | ||
| 291 | * struct samsung_usbphy - transceiver driver state | ||
| 292 | * @phy: transceiver structure | ||
| 293 | * @plat: platform data | ||
| 294 | * @dev: The parent device supplied to the probe function | ||
| 295 | * @clk: usb phy clock | ||
| 296 | * @regs: usb phy controller registers memory base | ||
| 297 | * @pmuregs: USB device PHY_CONTROL register memory base | ||
| 298 | * @sysreg: USB2.0 PHY_CFG register memory base | ||
| 299 | * @ref_clk_freq: reference clock frequency selection | ||
| 300 | * @drv_data: driver data available for different SoCs | ||
| 301 | * @phy_type: Samsung SoCs specific phy types: #HOST | ||
| 302 | * #DEVICE | ||
| 303 | * @phy_usage: usage count for phy | ||
| 304 | * @lock: lock for phy operations | ||
| 305 | */ | ||
| 306 | struct samsung_usbphy { | ||
| 307 | struct usb_phy phy; | ||
| 308 | struct samsung_usbphy_data *plat; | ||
| 309 | struct device *dev; | ||
| 310 | struct clk *clk; | ||
| 311 | void __iomem *regs; | ||
| 312 | void __iomem *pmuregs; | ||
| 313 | void __iomem *sysreg; | ||
| 314 | int ref_clk_freq; | ||
| 315 | const struct samsung_usbphy_drvdata *drv_data; | ||
| 316 | enum samsung_usb_phy_type phy_type; | ||
| 317 | atomic_t phy_usage; | ||
| 318 | spinlock_t lock; | ||
| 319 | }; | ||
| 320 | |||
| 321 | #define phy_to_sphy(x) container_of((x), struct samsung_usbphy, phy) | ||
| 322 | |||
| 323 | static const struct of_device_id samsung_usbphy_dt_match[]; | ||
| 324 | |||
| 325 | static inline const struct samsung_usbphy_drvdata | ||
| 326 | *samsung_usbphy_get_driver_data(struct platform_device *pdev) | ||
| 327 | { | ||
| 328 | if (pdev->dev.of_node) { | ||
| 329 | const struct of_device_id *match; | ||
| 330 | match = of_match_node(samsung_usbphy_dt_match, | ||
| 331 | pdev->dev.of_node); | ||
| 332 | return match->data; | ||
| 333 | } | ||
| 334 | |||
| 335 | return (struct samsung_usbphy_drvdata *) | ||
| 336 | platform_get_device_id(pdev)->driver_data; | ||
| 337 | } | ||
| 338 | |||
| 339 | extern int samsung_usbphy_parse_dt(struct samsung_usbphy *sphy); | ||
| 340 | extern void samsung_usbphy_set_isolation_4210(struct samsung_usbphy *sphy, | ||
| 341 | bool on); | ||
| 342 | extern void samsung_usbphy_cfg_sel(struct samsung_usbphy *sphy); | ||
| 343 | extern int samsung_usbphy_set_type(struct usb_phy *phy, | ||
| 344 | enum samsung_usb_phy_type phy_type); | ||
| 345 | extern int samsung_usbphy_get_refclk_freq(struct samsung_usbphy *sphy); | ||
| 346 | extern int samsung_usbphy_rate_to_clksel_64xx(struct samsung_usbphy *sphy, | ||
| 347 | unsigned long rate); | ||
| 348 | extern int samsung_usbphy_rate_to_clksel_4x12(struct samsung_usbphy *sphy, | ||
| 349 | unsigned long rate); | ||
diff --git a/drivers/usb/phy/phy-samsung-usb2.c b/drivers/usb/phy/phy-samsung-usb2.c deleted file mode 100644 index b3ba86627b72..000000000000 --- a/drivers/usb/phy/phy-samsung-usb2.c +++ /dev/null | |||
| @@ -1,541 +0,0 @@ | |||
| 1 | /* linux/drivers/usb/phy/phy-samsung-usb2.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * Author: Praveen Paneri <p.paneri@samsung.com> | ||
| 7 | * | ||
| 8 | * Samsung USB2.0 PHY transceiver; talks to S3C HS OTG controller, EHCI-S5P and | ||
| 9 | * OHCI-EXYNOS controllers. | ||
| 10 | * | ||
| 11 | * This program is free software; you can redistribute it and/or modify | ||
| 12 | * it under the terms of the GNU General Public License version 2 as | ||
| 13 | * published by the Free Software Foundation. | ||
| 14 | * | ||
| 15 | * This program is distributed in the hope that it will be useful, | ||
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 18 | * GNU General Public License for more details. | ||
| 19 | */ | ||
| 20 | |||
| 21 | #include <linux/module.h> | ||
| 22 | #include <linux/platform_device.h> | ||
| 23 | #include <linux/clk.h> | ||
| 24 | #include <linux/delay.h> | ||
| 25 | #include <linux/device.h> | ||
| 26 | #include <linux/err.h> | ||
| 27 | #include <linux/io.h> | ||
| 28 | #include <linux/of.h> | ||
| 29 | #include <linux/usb/otg.h> | ||
| 30 | #include <linux/usb/samsung_usb_phy.h> | ||
| 31 | #include <linux/platform_data/samsung-usbphy.h> | ||
| 32 | |||
| 33 | #include "phy-samsung-usb.h" | ||
| 34 | |||
| 35 | static int samsung_usbphy_set_host(struct usb_otg *otg, struct usb_bus *host) | ||
| 36 | { | ||
| 37 | if (!otg) | ||
| 38 | return -ENODEV; | ||
| 39 | |||
| 40 | if (!otg->host) | ||
| 41 | otg->host = host; | ||
| 42 | |||
| 43 | return 0; | ||
| 44 | } | ||
| 45 | |||
| 46 | static bool exynos5_phyhost_is_on(void __iomem *regs) | ||
| 47 | { | ||
| 48 | u32 reg; | ||
| 49 | |||
| 50 | reg = readl(regs + EXYNOS5_PHY_HOST_CTRL0); | ||
| 51 | |||
| 52 | return !(reg & HOST_CTRL0_SIDDQ); | ||
| 53 | } | ||
| 54 | |||
| 55 | static void samsung_exynos5_usb2phy_enable(struct samsung_usbphy *sphy) | ||
| 56 | { | ||
| 57 | void __iomem *regs = sphy->regs; | ||
| 58 | u32 phyclk = sphy->ref_clk_freq; | ||
| 59 | u32 phyhost; | ||
| 60 | u32 phyotg; | ||
| 61 | u32 phyhsic; | ||
| 62 | u32 ehcictrl; | ||
| 63 | u32 ohcictrl; | ||
| 64 | |||
| 65 | /* | ||
| 66 | * phy_usage helps in keeping usage count for phy | ||
| 67 | * so that the first consumer enabling the phy is also | ||
| 68 | * the last consumer to disable it. | ||
| 69 | */ | ||
| 70 | |||
| 71 | atomic_inc(&sphy->phy_usage); | ||
| 72 | |||
| 73 | if (exynos5_phyhost_is_on(regs)) { | ||
| 74 | dev_info(sphy->dev, "Already power on PHY\n"); | ||
| 75 | return; | ||
| 76 | } | ||
| 77 | |||
| 78 | /* Host configuration */ | ||
| 79 | phyhost = readl(regs + EXYNOS5_PHY_HOST_CTRL0); | ||
| 80 | |||
| 81 | /* phy reference clock configuration */ | ||
| 82 | phyhost &= ~HOST_CTRL0_FSEL_MASK; | ||
| 83 | phyhost |= HOST_CTRL0_FSEL(phyclk); | ||
| 84 | |||
| 85 | /* host phy reset */ | ||
| 86 | phyhost &= ~(HOST_CTRL0_PHYSWRST | | ||
| 87 | HOST_CTRL0_PHYSWRSTALL | | ||
| 88 | HOST_CTRL0_SIDDQ | | ||
| 89 | /* Enable normal mode of operation */ | ||
| 90 | HOST_CTRL0_FORCESUSPEND | | ||
| 91 | HOST_CTRL0_FORCESLEEP); | ||
| 92 | |||
| 93 | /* Link reset */ | ||
| 94 | phyhost |= (HOST_CTRL0_LINKSWRST | | ||
| 95 | HOST_CTRL0_UTMISWRST | | ||
| 96 | /* COMMON Block configuration during suspend */ | ||
| 97 | HOST_CTRL0_COMMONON_N); | ||
| 98 | writel(phyhost, regs + EXYNOS5_PHY_HOST_CTRL0); | ||
| 99 | udelay(10); | ||
| 100 | phyhost &= ~(HOST_CTRL0_LINKSWRST | | ||
| 101 | HOST_CTRL0_UTMISWRST); | ||
| 102 | writel(phyhost, regs + EXYNOS5_PHY_HOST_CTRL0); | ||
| 103 | |||
| 104 | /* OTG configuration */ | ||
| 105 | phyotg = readl(regs + EXYNOS5_PHY_OTG_SYS); | ||
| 106 | |||
| 107 | /* phy reference clock configuration */ | ||
| 108 | phyotg &= ~OTG_SYS_FSEL_MASK; | ||
| 109 | phyotg |= OTG_SYS_FSEL(phyclk); | ||
| 110 | |||
| 111 | /* Enable normal mode of operation */ | ||
| 112 | phyotg &= ~(OTG_SYS_FORCESUSPEND | | ||
| 113 | OTG_SYS_SIDDQ_UOTG | | ||
| 114 | OTG_SYS_FORCESLEEP | | ||
| 115 | OTG_SYS_REFCLKSEL_MASK | | ||
| 116 | /* COMMON Block configuration during suspend */ | ||
| 117 | OTG_SYS_COMMON_ON); | ||
| 118 | |||
| 119 | /* OTG phy & link reset */ | ||
| 120 | phyotg |= (OTG_SYS_PHY0_SWRST | | ||
| 121 | OTG_SYS_LINKSWRST_UOTG | | ||
| 122 | OTG_SYS_PHYLINK_SWRESET | | ||
| 123 | OTG_SYS_OTGDISABLE | | ||
| 124 | /* Set phy refclk */ | ||
| 125 | OTG_SYS_REFCLKSEL_CLKCORE); | ||
| 126 | |||
| 127 | writel(phyotg, regs + EXYNOS5_PHY_OTG_SYS); | ||
| 128 | udelay(10); | ||
| 129 | phyotg &= ~(OTG_SYS_PHY0_SWRST | | ||
| 130 | OTG_SYS_LINKSWRST_UOTG | | ||
| 131 | OTG_SYS_PHYLINK_SWRESET); | ||
| 132 | writel(phyotg, regs + EXYNOS5_PHY_OTG_SYS); | ||
| 133 | |||
| 134 | /* HSIC phy configuration */ | ||
| 135 | phyhsic = (HSIC_CTRL_REFCLKDIV_12 | | ||
| 136 | HSIC_CTRL_REFCLKSEL | | ||
| 137 | HSIC_CTRL_PHYSWRST); | ||
| 138 | writel(phyhsic, regs + EXYNOS5_PHY_HSIC_CTRL1); | ||
| 139 | writel(phyhsic, regs + EXYNOS5_PHY_HSIC_CTRL2); | ||
| 140 | udelay(10); | ||
| 141 | phyhsic &= ~HSIC_CTRL_PHYSWRST; | ||
| 142 | writel(phyhsic, regs + EXYNOS5_PHY_HSIC_CTRL1); | ||
| 143 | writel(phyhsic, regs + EXYNOS5_PHY_HSIC_CTRL2); | ||
| 144 | |||
| 145 | udelay(80); | ||
| 146 | |||
| 147 | /* enable EHCI DMA burst */ | ||
| 148 | ehcictrl = readl(regs + EXYNOS5_PHY_HOST_EHCICTRL); | ||
| 149 | ehcictrl |= (HOST_EHCICTRL_ENAINCRXALIGN | | ||
| 150 | HOST_EHCICTRL_ENAINCR4 | | ||
| 151 | HOST_EHCICTRL_ENAINCR8 | | ||
| 152 | HOST_EHCICTRL_ENAINCR16); | ||
| 153 | writel(ehcictrl, regs + EXYNOS5_PHY_HOST_EHCICTRL); | ||
| 154 | |||
| 155 | /* set ohci_suspend_on_n */ | ||
| 156 | ohcictrl = readl(regs + EXYNOS5_PHY_HOST_OHCICTRL); | ||
| 157 | ohcictrl |= HOST_OHCICTRL_SUSPLGCY; | ||
| 158 | writel(ohcictrl, regs + EXYNOS5_PHY_HOST_OHCICTRL); | ||
| 159 | } | ||
| 160 | |||
| 161 | static void samsung_usb2phy_enable(struct samsung_usbphy *sphy) | ||
| 162 | { | ||
| 163 | void __iomem *regs = sphy->regs; | ||
| 164 | u32 phypwr; | ||
| 165 | u32 phyclk; | ||
| 166 | u32 rstcon; | ||
| 167 | |||
| 168 | /* set clock frequency for PLL */ | ||
| 169 | phyclk = sphy->ref_clk_freq; | ||
| 170 | phypwr = readl(regs + SAMSUNG_PHYPWR); | ||
| 171 | rstcon = readl(regs + SAMSUNG_RSTCON); | ||
| 172 | |||
| 173 | switch (sphy->drv_data->cpu_type) { | ||
| 174 | case TYPE_S3C64XX: | ||
| 175 | phyclk &= ~PHYCLK_COMMON_ON_N; | ||
| 176 | phypwr &= ~PHYPWR_NORMAL_MASK; | ||
| 177 | rstcon |= RSTCON_SWRST; | ||
| 178 | break; | ||
| 179 | case TYPE_EXYNOS4X12: | ||
| 180 | phypwr &= ~(PHYPWR_NORMAL_MASK_HSIC0 | | ||
| 181 | PHYPWR_NORMAL_MASK_HSIC1 | | ||
| 182 | PHYPWR_NORMAL_MASK_PHY1); | ||
| 183 | rstcon |= RSTCON_HOSTPHY_SWRST; | ||
| 184 | case TYPE_EXYNOS4210: | ||
| 185 | phypwr &= ~PHYPWR_NORMAL_MASK_PHY0; | ||
| 186 | rstcon |= RSTCON_SWRST; | ||
| 187 | default: | ||
| 188 | break; | ||
| 189 | } | ||
| 190 | |||
| 191 | writel(phyclk, regs + SAMSUNG_PHYCLK); | ||
| 192 | /* Configure PHY0 for normal operation*/ | ||
| 193 | writel(phypwr, regs + SAMSUNG_PHYPWR); | ||
| 194 | /* reset all ports of PHY and Link */ | ||
| 195 | writel(rstcon, regs + SAMSUNG_RSTCON); | ||
| 196 | udelay(10); | ||
| 197 | if (sphy->drv_data->cpu_type == TYPE_EXYNOS4X12) | ||
| 198 | rstcon &= ~RSTCON_HOSTPHY_SWRST; | ||
| 199 | rstcon &= ~RSTCON_SWRST; | ||
| 200 | writel(rstcon, regs + SAMSUNG_RSTCON); | ||
| 201 | } | ||
| 202 | |||
| 203 | static void samsung_exynos5_usb2phy_disable(struct samsung_usbphy *sphy) | ||
| 204 | { | ||
| 205 | void __iomem *regs = sphy->regs; | ||
| 206 | u32 phyhost; | ||
| 207 | u32 phyotg; | ||
| 208 | u32 phyhsic; | ||
| 209 | |||
| 210 | if (atomic_dec_return(&sphy->phy_usage) > 0) { | ||
| 211 | dev_info(sphy->dev, "still being used\n"); | ||
| 212 | return; | ||
| 213 | } | ||
| 214 | |||
| 215 | phyhsic = (HSIC_CTRL_REFCLKDIV_12 | | ||
| 216 | HSIC_CTRL_REFCLKSEL | | ||
| 217 | HSIC_CTRL_SIDDQ | | ||
| 218 | HSIC_CTRL_FORCESLEEP | | ||
| 219 | HSIC_CTRL_FORCESUSPEND); | ||
| 220 | writel(phyhsic, regs + EXYNOS5_PHY_HSIC_CTRL1); | ||
| 221 | writel(phyhsic, regs + EXYNOS5_PHY_HSIC_CTRL2); | ||
| 222 | |||
| 223 | phyhost = readl(regs + EXYNOS5_PHY_HOST_CTRL0); | ||
| 224 | phyhost |= (HOST_CTRL0_SIDDQ | | ||
| 225 | HOST_CTRL0_FORCESUSPEND | | ||
| 226 | HOST_CTRL0_FORCESLEEP | | ||
| 227 | HOST_CTRL0_PHYSWRST | | ||
| 228 | HOST_CTRL0_PHYSWRSTALL); | ||
| 229 | writel(phyhost, regs + EXYNOS5_PHY_HOST_CTRL0); | ||
| 230 | |||
| 231 | phyotg = readl(regs + EXYNOS5_PHY_OTG_SYS); | ||
| 232 | phyotg |= (OTG_SYS_FORCESUSPEND | | ||
| 233 | OTG_SYS_SIDDQ_UOTG | | ||
| 234 | OTG_SYS_FORCESLEEP); | ||
| 235 | writel(phyotg, regs + EXYNOS5_PHY_OTG_SYS); | ||
| 236 | } | ||
| 237 | |||
| 238 | static void samsung_usb2phy_disable(struct samsung_usbphy *sphy) | ||
| 239 | { | ||
| 240 | void __iomem *regs = sphy->regs; | ||
| 241 | u32 phypwr; | ||
| 242 | |||
| 243 | phypwr = readl(regs + SAMSUNG_PHYPWR); | ||
| 244 | |||
| 245 | switch (sphy->drv_data->cpu_type) { | ||
| 246 | case TYPE_S3C64XX: | ||
| 247 | phypwr |= PHYPWR_NORMAL_MASK; | ||
| 248 | break; | ||
| 249 | case TYPE_EXYNOS4X12: | ||
| 250 | phypwr |= (PHYPWR_NORMAL_MASK_HSIC0 | | ||
| 251 | PHYPWR_NORMAL_MASK_HSIC1 | | ||
| 252 | PHYPWR_NORMAL_MASK_PHY1); | ||
| 253 | case TYPE_EXYNOS4210: | ||
| 254 | phypwr |= PHYPWR_NORMAL_MASK_PHY0; | ||
| 255 | default: | ||
| 256 | break; | ||
| 257 | } | ||
| 258 | |||
| 259 | /* Disable analog and otg block power */ | ||
| 260 | writel(phypwr, regs + SAMSUNG_PHYPWR); | ||
| 261 | } | ||
| 262 | |||
| 263 | /* | ||
| 264 | * The function passed to the usb driver for phy initialization | ||
| 265 | */ | ||
| 266 | static int samsung_usb2phy_init(struct usb_phy *phy) | ||
| 267 | { | ||
| 268 | struct samsung_usbphy *sphy; | ||
| 269 | struct usb_bus *host = NULL; | ||
| 270 | unsigned long flags; | ||
| 271 | int ret = 0; | ||
| 272 | |||
| 273 | sphy = phy_to_sphy(phy); | ||
| 274 | |||
| 275 | host = phy->otg->host; | ||
| 276 | |||
| 277 | /* Enable the phy clock */ | ||
| 278 | ret = clk_prepare_enable(sphy->clk); | ||
| 279 | if (ret) { | ||
| 280 | dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__); | ||
| 281 | return ret; | ||
| 282 | } | ||
| 283 | |||
| 284 | spin_lock_irqsave(&sphy->lock, flags); | ||
| 285 | |||
| 286 | if (host) { | ||
| 287 | /* setting default phy-type for USB 2.0 */ | ||
| 288 | if (!strstr(dev_name(host->controller), "ehci") || | ||
| 289 | !strstr(dev_name(host->controller), "ohci")) | ||
| 290 | samsung_usbphy_set_type(&sphy->phy, USB_PHY_TYPE_HOST); | ||
| 291 | } else { | ||
| 292 | samsung_usbphy_set_type(&sphy->phy, USB_PHY_TYPE_DEVICE); | ||
| 293 | } | ||
| 294 | |||
| 295 | /* Disable phy isolation */ | ||
| 296 | if (sphy->plat && sphy->plat->pmu_isolation) | ||
| 297 | sphy->plat->pmu_isolation(false); | ||
| 298 | else if (sphy->drv_data->set_isolation) | ||
| 299 | sphy->drv_data->set_isolation(sphy, false); | ||
| 300 | |||
| 301 | /* Selecting Host/OTG mode; After reset USB2.0PHY_CFG: HOST */ | ||
| 302 | samsung_usbphy_cfg_sel(sphy); | ||
| 303 | |||
| 304 | /* Initialize usb phy registers */ | ||
| 305 | sphy->drv_data->phy_enable(sphy); | ||
| 306 | |||
| 307 | spin_unlock_irqrestore(&sphy->lock, flags); | ||
| 308 | |||
| 309 | /* Disable the phy clock */ | ||
| 310 | clk_disable_unprepare(sphy->clk); | ||
| 311 | |||
| 312 | return ret; | ||
| 313 | } | ||
| 314 | |||
| 315 | /* | ||
| 316 | * The function passed to the usb driver for phy shutdown | ||
| 317 | */ | ||
| 318 | static void samsung_usb2phy_shutdown(struct usb_phy *phy) | ||
| 319 | { | ||
| 320 | struct samsung_usbphy *sphy; | ||
| 321 | struct usb_bus *host = NULL; | ||
| 322 | unsigned long flags; | ||
| 323 | |||
| 324 | sphy = phy_to_sphy(phy); | ||
| 325 | |||
| 326 | host = phy->otg->host; | ||
| 327 | |||
| 328 | if (clk_prepare_enable(sphy->clk)) { | ||
| 329 | dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__); | ||
| 330 | return; | ||
| 331 | } | ||
| 332 | |||
| 333 | spin_lock_irqsave(&sphy->lock, flags); | ||
| 334 | |||
| 335 | if (host) { | ||
| 336 | /* setting default phy-type for USB 2.0 */ | ||
| 337 | if (!strstr(dev_name(host->controller), "ehci") || | ||
| 338 | !strstr(dev_name(host->controller), "ohci")) | ||
| 339 | samsung_usbphy_set_type(&sphy->phy, USB_PHY_TYPE_HOST); | ||
| 340 | } else { | ||
| 341 | samsung_usbphy_set_type(&sphy->phy, USB_PHY_TYPE_DEVICE); | ||
| 342 | } | ||
| 343 | |||
| 344 | /* De-initialize usb phy registers */ | ||
| 345 | sphy->drv_data->phy_disable(sphy); | ||
| 346 | |||
| 347 | /* Enable phy isolation */ | ||
| 348 | if (sphy->plat && sphy->plat->pmu_isolation) | ||
| 349 | sphy->plat->pmu_isolation(true); | ||
| 350 | else if (sphy->drv_data->set_isolation) | ||
| 351 | sphy->drv_data->set_isolation(sphy, true); | ||
| 352 | |||
| 353 | spin_unlock_irqrestore(&sphy->lock, flags); | ||
| 354 | |||
| 355 | clk_disable_unprepare(sphy->clk); | ||
| 356 | } | ||
| 357 | |||
| 358 | static int samsung_usb2phy_probe(struct platform_device *pdev) | ||
| 359 | { | ||
| 360 | struct samsung_usbphy *sphy; | ||
| 361 | struct usb_otg *otg; | ||
| 362 | struct samsung_usbphy_data *pdata = dev_get_platdata(&pdev->dev); | ||
| 363 | const struct samsung_usbphy_drvdata *drv_data; | ||
| 364 | struct device *dev = &pdev->dev; | ||
| 365 | struct resource *phy_mem; | ||
| 366 | void __iomem *phy_base; | ||
| 367 | struct clk *clk; | ||
| 368 | int ret; | ||
| 369 | |||
| 370 | phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 371 | phy_base = devm_ioremap_resource(dev, phy_mem); | ||
| 372 | if (IS_ERR(phy_base)) | ||
| 373 | return PTR_ERR(phy_base); | ||
| 374 | |||
| 375 | sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL); | ||
| 376 | if (!sphy) | ||
| 377 | return -ENOMEM; | ||
| 378 | |||
| 379 | otg = devm_kzalloc(dev, sizeof(*otg), GFP_KERNEL); | ||
| 380 | if (!otg) | ||
| 381 | return -ENOMEM; | ||
| 382 | |||
| 383 | drv_data = samsung_usbphy_get_driver_data(pdev); | ||
| 384 | |||
| 385 | if (drv_data->cpu_type == TYPE_EXYNOS5250) | ||
| 386 | clk = devm_clk_get(dev, "usbhost"); | ||
| 387 | else | ||
| 388 | clk = devm_clk_get(dev, "otg"); | ||
| 389 | |||
| 390 | if (IS_ERR(clk)) { | ||
| 391 | dev_err(dev, "Failed to get usbhost/otg clock\n"); | ||
| 392 | return PTR_ERR(clk); | ||
| 393 | } | ||
| 394 | |||
| 395 | sphy->dev = dev; | ||
| 396 | |||
| 397 | if (dev->of_node) { | ||
| 398 | ret = samsung_usbphy_parse_dt(sphy); | ||
| 399 | if (ret < 0) | ||
| 400 | return ret; | ||
| 401 | } else { | ||
| 402 | if (!pdata) { | ||
| 403 | dev_err(dev, "no platform data specified\n"); | ||
| 404 | return -EINVAL; | ||
| 405 | } | ||
| 406 | } | ||
| 407 | |||
| 408 | sphy->plat = pdata; | ||
| 409 | sphy->regs = phy_base; | ||
| 410 | sphy->clk = clk; | ||
| 411 | sphy->drv_data = drv_data; | ||
| 412 | sphy->phy.dev = sphy->dev; | ||
| 413 | sphy->phy.label = "samsung-usb2phy"; | ||
| 414 | sphy->phy.type = USB_PHY_TYPE_USB2; | ||
| 415 | sphy->phy.init = samsung_usb2phy_init; | ||
| 416 | sphy->phy.shutdown = samsung_usb2phy_shutdown; | ||
| 417 | |||
| 418 | sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy); | ||
| 419 | if (sphy->ref_clk_freq < 0) | ||
| 420 | return -EINVAL; | ||
| 421 | |||
| 422 | sphy->phy.otg = otg; | ||
| 423 | sphy->phy.otg->phy = &sphy->phy; | ||
| 424 | sphy->phy.otg->set_host = samsung_usbphy_set_host; | ||
| 425 | |||
| 426 | spin_lock_init(&sphy->lock); | ||
| 427 | |||
| 428 | platform_set_drvdata(pdev, sphy); | ||
| 429 | |||
| 430 | return usb_add_phy_dev(&sphy->phy); | ||
| 431 | } | ||
| 432 | |||
| 433 | static int samsung_usb2phy_remove(struct platform_device *pdev) | ||
| 434 | { | ||
| 435 | struct samsung_usbphy *sphy = platform_get_drvdata(pdev); | ||
| 436 | |||
| 437 | usb_remove_phy(&sphy->phy); | ||
| 438 | |||
| 439 | if (sphy->pmuregs) | ||
| 440 | iounmap(sphy->pmuregs); | ||
| 441 | if (sphy->sysreg) | ||
| 442 | iounmap(sphy->sysreg); | ||
| 443 | |||
| 444 | return 0; | ||
| 445 | } | ||
| 446 | |||
| 447 | static const struct samsung_usbphy_drvdata usb2phy_s3c64xx = { | ||
| 448 | .cpu_type = TYPE_S3C64XX, | ||
| 449 | .devphy_en_mask = S3C64XX_USBPHY_ENABLE, | ||
| 450 | .rate_to_clksel = samsung_usbphy_rate_to_clksel_64xx, | ||
| 451 | .set_isolation = NULL, /* TODO */ | ||
| 452 | .phy_enable = samsung_usb2phy_enable, | ||
| 453 | .phy_disable = samsung_usb2phy_disable, | ||
| 454 | }; | ||
| 455 | |||
| 456 | static const struct samsung_usbphy_drvdata usb2phy_exynos4 = { | ||
| 457 | .cpu_type = TYPE_EXYNOS4210, | ||
| 458 | .devphy_en_mask = EXYNOS_USBPHY_ENABLE, | ||
| 459 | .hostphy_en_mask = EXYNOS_USBPHY_ENABLE, | ||
| 460 | .rate_to_clksel = samsung_usbphy_rate_to_clksel_64xx, | ||
| 461 | .set_isolation = samsung_usbphy_set_isolation_4210, | ||
| 462 | .phy_enable = samsung_usb2phy_enable, | ||
| 463 | .phy_disable = samsung_usb2phy_disable, | ||
| 464 | }; | ||
| 465 | |||
| 466 | static const struct samsung_usbphy_drvdata usb2phy_exynos4x12 = { | ||
| 467 | .cpu_type = TYPE_EXYNOS4X12, | ||
| 468 | .devphy_en_mask = EXYNOS_USBPHY_ENABLE, | ||
| 469 | .hostphy_en_mask = EXYNOS_USBPHY_ENABLE, | ||
| 470 | .rate_to_clksel = samsung_usbphy_rate_to_clksel_4x12, | ||
| 471 | .set_isolation = samsung_usbphy_set_isolation_4210, | ||
| 472 | .phy_enable = samsung_usb2phy_enable, | ||
| 473 | .phy_disable = samsung_usb2phy_disable, | ||
| 474 | }; | ||
| 475 | |||
| 476 | static struct samsung_usbphy_drvdata usb2phy_exynos5 = { | ||
| 477 | .cpu_type = TYPE_EXYNOS5250, | ||
| 478 | .hostphy_en_mask = EXYNOS_USBPHY_ENABLE, | ||
| 479 | .hostphy_reg_offset = EXYNOS_USBHOST_PHY_CTRL_OFFSET, | ||
| 480 | .rate_to_clksel = samsung_usbphy_rate_to_clksel_4x12, | ||
| 481 | .set_isolation = samsung_usbphy_set_isolation_4210, | ||
| 482 | .phy_enable = samsung_exynos5_usb2phy_enable, | ||
| 483 | .phy_disable = samsung_exynos5_usb2phy_disable, | ||
| 484 | }; | ||
| 485 | |||
| 486 | #ifdef CONFIG_OF | ||
| 487 | static const struct of_device_id samsung_usbphy_dt_match[] = { | ||
| 488 | { | ||
| 489 | .compatible = "samsung,s3c64xx-usb2phy", | ||
| 490 | .data = &usb2phy_s3c64xx, | ||
| 491 | }, { | ||
| 492 | .compatible = "samsung,exynos4210-usb2phy", | ||
| 493 | .data = &usb2phy_exynos4, | ||
| 494 | }, { | ||
| 495 | .compatible = "samsung,exynos4x12-usb2phy", | ||
| 496 | .data = &usb2phy_exynos4x12, | ||
| 497 | }, { | ||
| 498 | .compatible = "samsung,exynos5250-usb2phy", | ||
| 499 | .data = &usb2phy_exynos5 | ||
| 500 | }, | ||
| 501 | {}, | ||
| 502 | }; | ||
| 503 | MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match); | ||
| 504 | #endif | ||
| 505 | |||
| 506 | static struct platform_device_id samsung_usbphy_driver_ids[] = { | ||
| 507 | { | ||
| 508 | .name = "s3c64xx-usb2phy", | ||
| 509 | .driver_data = (unsigned long)&usb2phy_s3c64xx, | ||
| 510 | }, { | ||
| 511 | .name = "exynos4210-usb2phy", | ||
| 512 | .driver_data = (unsigned long)&usb2phy_exynos4, | ||
| 513 | }, { | ||
| 514 | .name = "exynos4x12-usb2phy", | ||
| 515 | .driver_data = (unsigned long)&usb2phy_exynos4x12, | ||
| 516 | }, { | ||
| 517 | .name = "exynos5250-usb2phy", | ||
| 518 | .driver_data = (unsigned long)&usb2phy_exynos5, | ||
| 519 | }, | ||
| 520 | {}, | ||
| 521 | }; | ||
| 522 | |||
| 523 | MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids); | ||
| 524 | |||
| 525 | static struct platform_driver samsung_usb2phy_driver = { | ||
| 526 | .probe = samsung_usb2phy_probe, | ||
| 527 | .remove = samsung_usb2phy_remove, | ||
| 528 | .id_table = samsung_usbphy_driver_ids, | ||
| 529 | .driver = { | ||
| 530 | .name = "samsung-usb2phy", | ||
| 531 | .owner = THIS_MODULE, | ||
| 532 | .of_match_table = of_match_ptr(samsung_usbphy_dt_match), | ||
| 533 | }, | ||
| 534 | }; | ||
| 535 | |||
| 536 | module_platform_driver(samsung_usb2phy_driver); | ||
| 537 | |||
| 538 | MODULE_DESCRIPTION("Samsung USB 2.0 phy controller"); | ||
| 539 | MODULE_AUTHOR("Praveen Paneri <p.paneri@samsung.com>"); | ||
| 540 | MODULE_LICENSE("GPL"); | ||
| 541 | MODULE_ALIAS("platform:samsung-usb2phy"); | ||
diff --git a/drivers/usb/phy/phy-samsung-usb3.c b/drivers/usb/phy/phy-samsung-usb3.c deleted file mode 100644 index cc0819248acf..000000000000 --- a/drivers/usb/phy/phy-samsung-usb3.c +++ /dev/null | |||
| @@ -1,350 +0,0 @@ | |||
| 1 | /* linux/drivers/usb/phy/phy-samsung-usb3.c | ||
| 2 | * | ||
| 3 | * Copyright (c) 2013 Samsung Electronics Co., Ltd. | ||
| 4 | * http://www.samsung.com | ||
| 5 | * | ||
| 6 | * Author: Vivek Gautam <gautam.vivek@samsung.com> | ||
| 7 | * | ||
| 8 | * Samsung USB 3.0 PHY transceiver; talks to DWC3 controller. | ||
| 9 | * | ||
| 10 | * This program is free software; you can redistribute it and/or modify | ||
| 11 | * it under the terms of the GNU General Public License version 2 as | ||
| 12 | * published by the Free Software Foundation. | ||
| 13 | * | ||
| 14 | * This program is distributed in the hope that it will be useful, | ||
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| 17 | * GNU General Public License for more details. | ||
| 18 | */ | ||
| 19 | |||
| 20 | #include <linux/module.h> | ||
| 21 | #include <linux/platform_device.h> | ||
| 22 | #include <linux/clk.h> | ||
| 23 | #include <linux/delay.h> | ||
| 24 | #include <linux/err.h> | ||
| 25 | #include <linux/io.h> | ||
| 26 | #include <linux/of.h> | ||
| 27 | #include <linux/usb/samsung_usb_phy.h> | ||
| 28 | #include <linux/platform_data/samsung-usbphy.h> | ||
| 29 | |||
| 30 | #include "phy-samsung-usb.h" | ||
| 31 | |||
| 32 | /* | ||
| 33 | * Sets the phy clk as EXTREFCLK (XXTI) which is internal clock from clock core. | ||
| 34 | */ | ||
| 35 | static u32 samsung_usb3phy_set_refclk(struct samsung_usbphy *sphy) | ||
| 36 | { | ||
| 37 | u32 reg; | ||
| 38 | u32 refclk; | ||
| 39 | |||
| 40 | refclk = sphy->ref_clk_freq; | ||
| 41 | |||
| 42 | reg = PHYCLKRST_REFCLKSEL_EXT_REFCLK | | ||
| 43 | PHYCLKRST_FSEL(refclk); | ||
| 44 | |||
| 45 | switch (refclk) { | ||
| 46 | case FSEL_CLKSEL_50M: | ||
| 47 | reg |= (PHYCLKRST_MPLL_MULTIPLIER_50M_REF | | ||
| 48 | PHYCLKRST_SSC_REFCLKSEL(0x00)); | ||
| 49 | break; | ||
| 50 | case FSEL_CLKSEL_20M: | ||
| 51 | reg |= (PHYCLKRST_MPLL_MULTIPLIER_20MHZ_REF | | ||
| 52 | PHYCLKRST_SSC_REFCLKSEL(0x00)); | ||
| 53 | break; | ||
| 54 | case FSEL_CLKSEL_19200K: | ||
| 55 | reg |= (PHYCLKRST_MPLL_MULTIPLIER_19200KHZ_REF | | ||
| 56 | PHYCLKRST_SSC_REFCLKSEL(0x88)); | ||
| 57 | break; | ||
| 58 | case FSEL_CLKSEL_24M: | ||
| 59 | default: | ||
| 60 | reg |= (PHYCLKRST_MPLL_MULTIPLIER_24MHZ_REF | | ||
| 61 | PHYCLKRST_SSC_REFCLKSEL(0x88)); | ||
| 62 | break; | ||
| 63 | } | ||
| 64 | |||
| 65 | return reg; | ||
| 66 | } | ||
| 67 | |||
| 68 | static void samsung_exynos5_usb3phy_enable(struct samsung_usbphy *sphy) | ||
| 69 | { | ||
| 70 | void __iomem *regs = sphy->regs; | ||
| 71 | u32 phyparam0; | ||
| 72 | u32 phyparam1; | ||
| 73 | u32 linksystem; | ||
| 74 | u32 phybatchg; | ||
| 75 | u32 phytest; | ||
| 76 | u32 phyclkrst; | ||
| 77 | |||
| 78 | /* Reset USB 3.0 PHY */ | ||
| 79 | writel(0x0, regs + EXYNOS5_DRD_PHYREG0); | ||
| 80 | |||
| 81 | phyparam0 = readl(regs + EXYNOS5_DRD_PHYPARAM0); | ||
| 82 | /* Select PHY CLK source */ | ||
| 83 | phyparam0 &= ~PHYPARAM0_REF_USE_PAD; | ||
| 84 | /* Set Loss-of-Signal Detector sensitivity */ | ||
| 85 | phyparam0 &= ~PHYPARAM0_REF_LOSLEVEL_MASK; | ||
| 86 | phyparam0 |= PHYPARAM0_REF_LOSLEVEL; | ||
| 87 | writel(phyparam0, regs + EXYNOS5_DRD_PHYPARAM0); | ||
| 88 | |||
| 89 | writel(0x0, regs + EXYNOS5_DRD_PHYRESUME); | ||
| 90 | |||
| 91 | /* | ||
| 92 | * Setting the Frame length Adj value[6:1] to default 0x20 | ||
| 93 | * See xHCI 1.0 spec, 5.2.4 | ||
| 94 | */ | ||
| 95 | linksystem = LINKSYSTEM_XHCI_VERSION_CONTROL | | ||
| 96 | LINKSYSTEM_FLADJ(0x20); | ||
| 97 | writel(linksystem, regs + EXYNOS5_DRD_LINKSYSTEM); | ||
| 98 | |||
| 99 | phyparam1 = readl(regs + EXYNOS5_DRD_PHYPARAM1); | ||
| 100 | /* Set Tx De-Emphasis level */ | ||
| 101 | phyparam1 &= ~PHYPARAM1_PCS_TXDEEMPH_MASK; | ||
| 102 | phyparam1 |= PHYPARAM1_PCS_TXDEEMPH; | ||
| 103 | writel(phyparam1, regs + EXYNOS5_DRD_PHYPARAM1); | ||
| 104 | |||
| 105 | phybatchg = readl(regs + EXYNOS5_DRD_PHYBATCHG); | ||
| 106 | phybatchg |= PHYBATCHG_UTMI_CLKSEL; | ||
| 107 | writel(phybatchg, regs + EXYNOS5_DRD_PHYBATCHG); | ||
| 108 | |||
| 109 | /* PHYTEST POWERDOWN Control */ | ||
| 110 | phytest = readl(regs + EXYNOS5_DRD_PHYTEST); | ||
| 111 | phytest &= ~(PHYTEST_POWERDOWN_SSP | | ||
| 112 | PHYTEST_POWERDOWN_HSP); | ||
| 113 | writel(phytest, regs + EXYNOS5_DRD_PHYTEST); | ||
| 114 | |||
| 115 | /* UTMI Power Control */ | ||
| 116 | writel(PHYUTMI_OTGDISABLE, regs + EXYNOS5_DRD_PHYUTMI); | ||
| 117 | |||
| 118 | phyclkrst = samsung_usb3phy_set_refclk(sphy); | ||
| 119 | |||
| 120 | phyclkrst |= PHYCLKRST_PORTRESET | | ||
| 121 | /* Digital power supply in normal operating mode */ | ||
| 122 | PHYCLKRST_RETENABLEN | | ||
| 123 | /* Enable ref clock for SS function */ | ||
| 124 | PHYCLKRST_REF_SSP_EN | | ||
| 125 | /* Enable spread spectrum */ | ||
| 126 | PHYCLKRST_SSC_EN | | ||
| 127 | /* Power down HS Bias and PLL blocks in suspend mode */ | ||
| 128 | PHYCLKRST_COMMONONN; | ||
| 129 | |||
| 130 | writel(phyclkrst, regs + EXYNOS5_DRD_PHYCLKRST); | ||
| 131 | |||
| 132 | udelay(10); | ||
| 133 | |||
| 134 | phyclkrst &= ~(PHYCLKRST_PORTRESET); | ||
| 135 | writel(phyclkrst, regs + EXYNOS5_DRD_PHYCLKRST); | ||
| 136 | } | ||
| 137 | |||
| 138 | static void samsung_exynos5_usb3phy_disable(struct samsung_usbphy *sphy) | ||
| 139 | { | ||
| 140 | u32 phyutmi; | ||
| 141 | u32 phyclkrst; | ||
| 142 | u32 phytest; | ||
| 143 | void __iomem *regs = sphy->regs; | ||
| 144 | |||
| 145 | phyutmi = PHYUTMI_OTGDISABLE | | ||
| 146 | PHYUTMI_FORCESUSPEND | | ||
| 147 | PHYUTMI_FORCESLEEP; | ||
| 148 | writel(phyutmi, regs + EXYNOS5_DRD_PHYUTMI); | ||
| 149 | |||
| 150 | /* Resetting the PHYCLKRST enable bits to reduce leakage current */ | ||
| 151 | phyclkrst = readl(regs + EXYNOS5_DRD_PHYCLKRST); | ||
| 152 | phyclkrst &= ~(PHYCLKRST_REF_SSP_EN | | ||
| 153 | PHYCLKRST_SSC_EN | | ||
| 154 | PHYCLKRST_COMMONONN); | ||
| 155 | writel(phyclkrst, regs + EXYNOS5_DRD_PHYCLKRST); | ||
| 156 | |||
| 157 | /* Control PHYTEST to remove leakage current */ | ||
| 158 | phytest = readl(regs + EXYNOS5_DRD_PHYTEST); | ||
| 159 | phytest |= (PHYTEST_POWERDOWN_SSP | | ||
| 160 | PHYTEST_POWERDOWN_HSP); | ||
| 161 | writel(phytest, regs + EXYNOS5_DRD_PHYTEST); | ||
| 162 | } | ||
| 163 | |||
| 164 | static int samsung_usb3phy_init(struct usb_phy *phy) | ||
| 165 | { | ||
| 166 | struct samsung_usbphy *sphy; | ||
| 167 | unsigned long flags; | ||
| 168 | int ret = 0; | ||
| 169 | |||
| 170 | sphy = phy_to_sphy(phy); | ||
| 171 | |||
| 172 | /* Enable the phy clock */ | ||
| 173 | ret = clk_prepare_enable(sphy->clk); | ||
| 174 | if (ret) { | ||
| 175 | dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__); | ||
| 176 | return ret; | ||
| 177 | } | ||
| 178 | |||
| 179 | spin_lock_irqsave(&sphy->lock, flags); | ||
| 180 | |||
| 181 | /* setting default phy-type for USB 3.0 */ | ||
| 182 | samsung_usbphy_set_type(&sphy->phy, USB_PHY_TYPE_DEVICE); | ||
| 183 | |||
| 184 | /* Disable phy isolation */ | ||
| 185 | if (sphy->drv_data->set_isolation) | ||
| 186 | sphy->drv_data->set_isolation(sphy, false); | ||
| 187 | |||
| 188 | /* Initialize usb phy registers */ | ||
| 189 | sphy->drv_data->phy_enable(sphy); | ||
| 190 | |||
| 191 | spin_unlock_irqrestore(&sphy->lock, flags); | ||
| 192 | |||
| 193 | /* Disable the phy clock */ | ||
| 194 | clk_disable_unprepare(sphy->clk); | ||
| 195 | |||
| 196 | return ret; | ||
| 197 | } | ||
| 198 | |||
| 199 | /* | ||
| 200 | * The function passed to the usb driver for phy shutdown | ||
| 201 | */ | ||
| 202 | static void samsung_usb3phy_shutdown(struct usb_phy *phy) | ||
| 203 | { | ||
| 204 | struct samsung_usbphy *sphy; | ||
| 205 | unsigned long flags; | ||
| 206 | |||
| 207 | sphy = phy_to_sphy(phy); | ||
| 208 | |||
| 209 | if (clk_prepare_enable(sphy->clk)) { | ||
| 210 | dev_err(sphy->dev, "%s: clk_prepare_enable failed\n", __func__); | ||
| 211 | return; | ||
| 212 | } | ||
| 213 | |||
| 214 | spin_lock_irqsave(&sphy->lock, flags); | ||
| 215 | |||
| 216 | /* setting default phy-type for USB 3.0 */ | ||
| 217 | samsung_usbphy_set_type(&sphy->phy, USB_PHY_TYPE_DEVICE); | ||
| 218 | |||
| 219 | /* De-initialize usb phy registers */ | ||
| 220 | sphy->drv_data->phy_disable(sphy); | ||
| 221 | |||
| 222 | /* Enable phy isolation */ | ||
| 223 | if (sphy->drv_data->set_isolation) | ||
| 224 | sphy->drv_data->set_isolation(sphy, true); | ||
| 225 | |||
| 226 | spin_unlock_irqrestore(&sphy->lock, flags); | ||
| 227 | |||
| 228 | clk_disable_unprepare(sphy->clk); | ||
| 229 | } | ||
| 230 | |||
| 231 | static int samsung_usb3phy_probe(struct platform_device *pdev) | ||
| 232 | { | ||
| 233 | struct samsung_usbphy *sphy; | ||
| 234 | struct samsung_usbphy_data *pdata = dev_get_platdata(&pdev->dev); | ||
| 235 | struct device *dev = &pdev->dev; | ||
| 236 | struct resource *phy_mem; | ||
| 237 | void __iomem *phy_base; | ||
| 238 | struct clk *clk; | ||
| 239 | int ret; | ||
| 240 | |||
| 241 | phy_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
| 242 | phy_base = devm_ioremap_resource(dev, phy_mem); | ||
| 243 | if (IS_ERR(phy_base)) | ||
| 244 | return PTR_ERR(phy_base); | ||
| 245 | |||
| 246 | sphy = devm_kzalloc(dev, sizeof(*sphy), GFP_KERNEL); | ||
| 247 | if (!sphy) | ||
| 248 | return -ENOMEM; | ||
| 249 | |||
| 250 | clk = devm_clk_get(dev, "usbdrd30"); | ||
| 251 | if (IS_ERR(clk)) { | ||
| 252 | dev_err(dev, "Failed to get device clock\n"); | ||
| 253 | return PTR_ERR(clk); | ||
| 254 | } | ||
| 255 | |||
| 256 | sphy->dev = dev; | ||
| 257 | |||
| 258 | if (dev->of_node) { | ||
| 259 | ret = samsung_usbphy_parse_dt(sphy); | ||
| 260 | if (ret < 0) | ||
| 261 | return ret; | ||
| 262 | } else { | ||
| 263 | if (!pdata) { | ||
| 264 | dev_err(dev, "no platform data specified\n"); | ||
| 265 | return -EINVAL; | ||
| 266 | } | ||
| 267 | } | ||
| 268 | |||
| 269 | sphy->plat = pdata; | ||
| 270 | sphy->regs = phy_base; | ||
| 271 | sphy->clk = clk; | ||
| 272 | sphy->phy.dev = sphy->dev; | ||
| 273 | sphy->phy.label = "samsung-usb3phy"; | ||
| 274 | sphy->phy.type = USB_PHY_TYPE_USB3; | ||
| 275 | sphy->phy.init = samsung_usb3phy_init; | ||
| 276 | sphy->phy.shutdown = samsung_usb3phy_shutdown; | ||
| 277 | sphy->drv_data = samsung_usbphy_get_driver_data(pdev); | ||
| 278 | |||
| 279 | sphy->ref_clk_freq = samsung_usbphy_get_refclk_freq(sphy); | ||
| 280 | if (sphy->ref_clk_freq < 0) | ||
| 281 | return -EINVAL; | ||
| 282 | |||
| 283 | spin_lock_init(&sphy->lock); | ||
| 284 | |||
| 285 | platform_set_drvdata(pdev, sphy); | ||
| 286 | |||
| 287 | return usb_add_phy_dev(&sphy->phy); | ||
| 288 | } | ||
| 289 | |||
| 290 | static int samsung_usb3phy_remove(struct platform_device *pdev) | ||
| 291 | { | ||
| 292 | struct samsung_usbphy *sphy = platform_get_drvdata(pdev); | ||
| 293 | |||
| 294 | usb_remove_phy(&sphy->phy); | ||
| 295 | |||
| 296 | if (sphy->pmuregs) | ||
| 297 | iounmap(sphy->pmuregs); | ||
| 298 | if (sphy->sysreg) | ||
| 299 | iounmap(sphy->sysreg); | ||
| 300 | |||
| 301 | return 0; | ||
| 302 | } | ||
| 303 | |||
| 304 | static struct samsung_usbphy_drvdata usb3phy_exynos5 = { | ||
| 305 | .cpu_type = TYPE_EXYNOS5250, | ||
| 306 | .devphy_en_mask = EXYNOS_USBPHY_ENABLE, | ||
| 307 | .rate_to_clksel = samsung_usbphy_rate_to_clksel_4x12, | ||
| 308 | .set_isolation = samsung_usbphy_set_isolation_4210, | ||
| 309 | .phy_enable = samsung_exynos5_usb3phy_enable, | ||
| 310 | .phy_disable = samsung_exynos5_usb3phy_disable, | ||
| 311 | }; | ||
| 312 | |||
| 313 | #ifdef CONFIG_OF | ||
| 314 | static const struct of_device_id samsung_usbphy_dt_match[] = { | ||
| 315 | { | ||
| 316 | .compatible = "samsung,exynos5250-usb3phy", | ||
| 317 | .data = &usb3phy_exynos5 | ||
| 318 | }, | ||
| 319 | {}, | ||
| 320 | }; | ||
| 321 | MODULE_DEVICE_TABLE(of, samsung_usbphy_dt_match); | ||
| 322 | #endif | ||
| 323 | |||
| 324 | static struct platform_device_id samsung_usbphy_driver_ids[] = { | ||
| 325 | { | ||
| 326 | .name = "exynos5250-usb3phy", | ||
| 327 | .driver_data = (unsigned long)&usb3phy_exynos5, | ||
| 328 | }, | ||
| 329 | {}, | ||
| 330 | }; | ||
| 331 | |||
| 332 | MODULE_DEVICE_TABLE(platform, samsung_usbphy_driver_ids); | ||
| 333 | |||
| 334 | static struct platform_driver samsung_usb3phy_driver = { | ||
| 335 | .probe = samsung_usb3phy_probe, | ||
| 336 | .remove = samsung_usb3phy_remove, | ||
| 337 | .id_table = samsung_usbphy_driver_ids, | ||
| 338 | .driver = { | ||
| 339 | .name = "samsung-usb3phy", | ||
| 340 | .owner = THIS_MODULE, | ||
| 341 | .of_match_table = of_match_ptr(samsung_usbphy_dt_match), | ||
| 342 | }, | ||
| 343 | }; | ||
| 344 | |||
| 345 | module_platform_driver(samsung_usb3phy_driver); | ||
| 346 | |||
| 347 | MODULE_DESCRIPTION("Samsung USB 3.0 phy controller"); | ||
| 348 | MODULE_AUTHOR("Vivek Gautam <gautam.vivek@samsung.com>"); | ||
| 349 | MODULE_LICENSE("GPL"); | ||
| 350 | MODULE_ALIAS("platform:samsung-usb3phy"); | ||
diff --git a/drivers/usb/phy/phy-tahvo.c b/drivers/usb/phy/phy-tahvo.c index cc61ee44b911..845f658276b1 100644 --- a/drivers/usb/phy/phy-tahvo.c +++ b/drivers/usb/phy/phy-tahvo.c | |||
| @@ -81,33 +81,35 @@ static void check_vbus_state(struct tahvo_usb *tu) | |||
| 81 | 81 | ||
| 82 | reg = retu_read(rdev, TAHVO_REG_IDSR); | 82 | reg = retu_read(rdev, TAHVO_REG_IDSR); |
| 83 | if (reg & TAHVO_STAT_VBUS) { | 83 | if (reg & TAHVO_STAT_VBUS) { |
| 84 | switch (tu->phy.state) { | 84 | switch (tu->phy.otg->state) { |
| 85 | case OTG_STATE_B_IDLE: | 85 | case OTG_STATE_B_IDLE: |
| 86 | /* Enable the gadget driver */ | 86 | /* Enable the gadget driver */ |
| 87 | if (tu->phy.otg->gadget) | 87 | if (tu->phy.otg->gadget) |
| 88 | usb_gadget_vbus_connect(tu->phy.otg->gadget); | 88 | usb_gadget_vbus_connect(tu->phy.otg->gadget); |
| 89 | tu->phy.state = OTG_STATE_B_PERIPHERAL; | 89 | tu->phy.otg->state = OTG_STATE_B_PERIPHERAL; |
| 90 | usb_phy_set_event(&tu->phy, USB_EVENT_ENUMERATED); | ||
| 90 | break; | 91 | break; |
| 91 | case OTG_STATE_A_IDLE: | 92 | case OTG_STATE_A_IDLE: |
| 92 | /* | 93 | /* |
| 93 | * Session is now valid assuming the USB hub is driving | 94 | * Session is now valid assuming the USB hub is driving |
| 94 | * Vbus. | 95 | * Vbus. |
| 95 | */ | 96 | */ |
| 96 | tu->phy.state = OTG_STATE_A_HOST; | 97 | tu->phy.otg->state = OTG_STATE_A_HOST; |
| 97 | break; | 98 | break; |
| 98 | default: | 99 | default: |
| 99 | break; | 100 | break; |
| 100 | } | 101 | } |
| 101 | dev_info(&tu->pt_dev->dev, "USB cable connected\n"); | 102 | dev_info(&tu->pt_dev->dev, "USB cable connected\n"); |
| 102 | } else { | 103 | } else { |
| 103 | switch (tu->phy.state) { | 104 | switch (tu->phy.otg->state) { |
| 104 | case OTG_STATE_B_PERIPHERAL: | 105 | case OTG_STATE_B_PERIPHERAL: |
| 105 | if (tu->phy.otg->gadget) | 106 | if (tu->phy.otg->gadget) |
| 106 | usb_gadget_vbus_disconnect(tu->phy.otg->gadget); | 107 | usb_gadget_vbus_disconnect(tu->phy.otg->gadget); |
| 107 | tu->phy.state = OTG_STATE_B_IDLE; | 108 | tu->phy.otg->state = OTG_STATE_B_IDLE; |
| 109 | usb_phy_set_event(&tu->phy, USB_EVENT_NONE); | ||
| 108 | break; | 110 | break; |
| 109 | case OTG_STATE_A_HOST: | 111 | case OTG_STATE_A_HOST: |
| 110 | tu->phy.state = OTG_STATE_A_IDLE; | 112 | tu->phy.otg->state = OTG_STATE_A_IDLE; |
| 111 | break; | 113 | break; |
| 112 | default: | 114 | default: |
| 113 | break; | 115 | break; |
| @@ -132,14 +134,14 @@ static void tahvo_usb_become_host(struct tahvo_usb *tu) | |||
| 132 | /* Power up the transceiver in USB host mode */ | 134 | /* Power up the transceiver in USB host mode */ |
| 133 | retu_write(rdev, TAHVO_REG_USBR, USBR_REGOUT | USBR_NSUSPEND | | 135 | retu_write(rdev, TAHVO_REG_USBR, USBR_REGOUT | USBR_NSUSPEND | |
| 134 | USBR_MASTER_SW2 | USBR_MASTER_SW1); | 136 | USBR_MASTER_SW2 | USBR_MASTER_SW1); |
| 135 | tu->phy.state = OTG_STATE_A_IDLE; | 137 | tu->phy.otg->state = OTG_STATE_A_IDLE; |
| 136 | 138 | ||
| 137 | check_vbus_state(tu); | 139 | check_vbus_state(tu); |
| 138 | } | 140 | } |
| 139 | 141 | ||
| 140 | static void tahvo_usb_stop_host(struct tahvo_usb *tu) | 142 | static void tahvo_usb_stop_host(struct tahvo_usb *tu) |
| 141 | { | 143 | { |
| 142 | tu->phy.state = OTG_STATE_A_IDLE; | 144 | tu->phy.otg->state = OTG_STATE_A_IDLE; |
| 143 | } | 145 | } |
| 144 | 146 | ||
| 145 | static void tahvo_usb_become_peripheral(struct tahvo_usb *tu) | 147 | static void tahvo_usb_become_peripheral(struct tahvo_usb *tu) |
| @@ -151,7 +153,7 @@ static void tahvo_usb_become_peripheral(struct tahvo_usb *tu) | |||
| 151 | /* Power up transceiver and set it in USB peripheral mode */ | 153 | /* Power up transceiver and set it in USB peripheral mode */ |
| 152 | retu_write(rdev, TAHVO_REG_USBR, USBR_SLAVE_CONTROL | USBR_REGOUT | | 154 | retu_write(rdev, TAHVO_REG_USBR, USBR_SLAVE_CONTROL | USBR_REGOUT | |
| 153 | USBR_NSUSPEND | USBR_SLAVE_SW); | 155 | USBR_NSUSPEND | USBR_SLAVE_SW); |
| 154 | tu->phy.state = OTG_STATE_B_IDLE; | 156 | tu->phy.otg->state = OTG_STATE_B_IDLE; |
| 155 | 157 | ||
| 156 | check_vbus_state(tu); | 158 | check_vbus_state(tu); |
| 157 | } | 159 | } |
| @@ -160,7 +162,7 @@ static void tahvo_usb_stop_peripheral(struct tahvo_usb *tu) | |||
| 160 | { | 162 | { |
| 161 | if (tu->phy.otg->gadget) | 163 | if (tu->phy.otg->gadget) |
| 162 | usb_gadget_vbus_disconnect(tu->phy.otg->gadget); | 164 | usb_gadget_vbus_disconnect(tu->phy.otg->gadget); |
| 163 | tu->phy.state = OTG_STATE_B_IDLE; | 165 | tu->phy.otg->state = OTG_STATE_B_IDLE; |
| 164 | } | 166 | } |
| 165 | 167 | ||
| 166 | static void tahvo_usb_power_off(struct tahvo_usb *tu) | 168 | static void tahvo_usb_power_off(struct tahvo_usb *tu) |
| @@ -173,7 +175,7 @@ static void tahvo_usb_power_off(struct tahvo_usb *tu) | |||
| 173 | 175 | ||
| 174 | /* Power off transceiver */ | 176 | /* Power off transceiver */ |
| 175 | retu_write(rdev, TAHVO_REG_USBR, 0); | 177 | retu_write(rdev, TAHVO_REG_USBR, 0); |
| 176 | tu->phy.state = OTG_STATE_UNDEFINED; | 178 | tu->phy.otg->state = OTG_STATE_UNDEFINED; |
| 177 | } | 179 | } |
| 178 | 180 | ||
| 179 | static int tahvo_usb_set_suspend(struct usb_phy *dev, int suspend) | 181 | static int tahvo_usb_set_suspend(struct usb_phy *dev, int suspend) |
| @@ -196,7 +198,8 @@ static int tahvo_usb_set_suspend(struct usb_phy *dev, int suspend) | |||
| 196 | 198 | ||
| 197 | static int tahvo_usb_set_host(struct usb_otg *otg, struct usb_bus *host) | 199 | static int tahvo_usb_set_host(struct usb_otg *otg, struct usb_bus *host) |
| 198 | { | 200 | { |
| 199 | struct tahvo_usb *tu = container_of(otg->phy, struct tahvo_usb, phy); | 201 | struct tahvo_usb *tu = container_of(otg->usb_phy, struct tahvo_usb, |
| 202 | phy); | ||
| 200 | 203 | ||
| 201 | dev_dbg(&tu->pt_dev->dev, "%s %p\n", __func__, host); | 204 | dev_dbg(&tu->pt_dev->dev, "%s %p\n", __func__, host); |
| 202 | 205 | ||
| @@ -225,7 +228,8 @@ static int tahvo_usb_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 225 | static int tahvo_usb_set_peripheral(struct usb_otg *otg, | 228 | static int tahvo_usb_set_peripheral(struct usb_otg *otg, |
| 226 | struct usb_gadget *gadget) | 229 | struct usb_gadget *gadget) |
| 227 | { | 230 | { |
| 228 | struct tahvo_usb *tu = container_of(otg->phy, struct tahvo_usb, phy); | 231 | struct tahvo_usb *tu = container_of(otg->usb_phy, struct tahvo_usb, |
| 232 | phy); | ||
| 229 | 233 | ||
| 230 | dev_dbg(&tu->pt_dev->dev, "%s %p\n", __func__, gadget); | 234 | dev_dbg(&tu->pt_dev->dev, "%s %p\n", __func__, gadget); |
| 231 | 235 | ||
| @@ -379,11 +383,11 @@ static int tahvo_usb_probe(struct platform_device *pdev) | |||
| 379 | /* Create OTG interface */ | 383 | /* Create OTG interface */ |
| 380 | tahvo_usb_power_off(tu); | 384 | tahvo_usb_power_off(tu); |
| 381 | tu->phy.dev = &pdev->dev; | 385 | tu->phy.dev = &pdev->dev; |
| 382 | tu->phy.state = OTG_STATE_UNDEFINED; | 386 | tu->phy.otg->state = OTG_STATE_UNDEFINED; |
| 383 | tu->phy.label = DRIVER_NAME; | 387 | tu->phy.label = DRIVER_NAME; |
| 384 | tu->phy.set_suspend = tahvo_usb_set_suspend; | 388 | tu->phy.set_suspend = tahvo_usb_set_suspend; |
| 385 | 389 | ||
| 386 | tu->phy.otg->phy = &tu->phy; | 390 | tu->phy.otg->usb_phy = &tu->phy; |
| 387 | tu->phy.otg->set_host = tahvo_usb_set_host; | 391 | tu->phy.otg->set_host = tahvo_usb_set_host; |
| 388 | tu->phy.otg->set_peripheral = tahvo_usb_set_peripheral; | 392 | tu->phy.otg->set_peripheral = tahvo_usb_set_peripheral; |
| 389 | 393 | ||
| @@ -446,7 +450,6 @@ static struct platform_driver tahvo_usb_driver = { | |||
| 446 | .remove = tahvo_usb_remove, | 450 | .remove = tahvo_usb_remove, |
| 447 | .driver = { | 451 | .driver = { |
| 448 | .name = "tahvo-usb", | 452 | .name = "tahvo-usb", |
| 449 | .owner = THIS_MODULE, | ||
| 450 | }, | 453 | }, |
| 451 | }; | 454 | }; |
| 452 | module_platform_driver(tahvo_usb_driver); | 455 | module_platform_driver(tahvo_usb_driver); |
diff --git a/drivers/usb/phy/phy-tegra-usb.c b/drivers/usb/phy/phy-tegra-usb.c index 886f1807a67b..ab025b00964c 100644 --- a/drivers/usb/phy/phy-tegra-usb.c +++ b/drivers/usb/phy/phy-tegra-usb.c | |||
| @@ -880,11 +880,8 @@ static int utmi_phy_probe(struct tegra_usb_phy *tegra_phy, | |||
| 880 | 880 | ||
| 881 | tegra_phy->config = devm_kzalloc(&pdev->dev, sizeof(*config), | 881 | tegra_phy->config = devm_kzalloc(&pdev->dev, sizeof(*config), |
| 882 | GFP_KERNEL); | 882 | GFP_KERNEL); |
| 883 | if (!tegra_phy->config) { | 883 | if (!tegra_phy->config) |
| 884 | dev_err(&pdev->dev, | ||
| 885 | "unable to allocate memory for USB UTMIP config\n"); | ||
| 886 | return -ENOMEM; | 884 | return -ENOMEM; |
| 887 | } | ||
| 888 | 885 | ||
| 889 | config = tegra_phy->config; | 886 | config = tegra_phy->config; |
| 890 | 887 | ||
| @@ -979,10 +976,8 @@ static int tegra_usb_phy_probe(struct platform_device *pdev) | |||
| 979 | int err; | 976 | int err; |
| 980 | 977 | ||
| 981 | tegra_phy = devm_kzalloc(&pdev->dev, sizeof(*tegra_phy), GFP_KERNEL); | 978 | tegra_phy = devm_kzalloc(&pdev->dev, sizeof(*tegra_phy), GFP_KERNEL); |
| 982 | if (!tegra_phy) { | 979 | if (!tegra_phy) |
| 983 | dev_err(&pdev->dev, "unable to allocate memory for USB2 PHY\n"); | ||
| 984 | return -ENOMEM; | 980 | return -ENOMEM; |
| 985 | } | ||
| 986 | 981 | ||
| 987 | match = of_match_device(tegra_usb_phy_id_table, &pdev->dev); | 982 | match = of_match_device(tegra_usb_phy_id_table, &pdev->dev); |
| 988 | if (!match) { | 983 | if (!match) { |
| @@ -1086,7 +1081,6 @@ static struct platform_driver tegra_usb_phy_driver = { | |||
| 1086 | .remove = tegra_usb_phy_remove, | 1081 | .remove = tegra_usb_phy_remove, |
| 1087 | .driver = { | 1082 | .driver = { |
| 1088 | .name = "tegra-phy", | 1083 | .name = "tegra-phy", |
| 1089 | .owner = THIS_MODULE, | ||
| 1090 | .of_match_table = tegra_usb_phy_id_table, | 1084 | .of_match_table = tegra_usb_phy_id_table, |
| 1091 | }, | 1085 | }, |
| 1092 | }; | 1086 | }; |
diff --git a/drivers/usb/phy/phy-twl6030-usb.c b/drivers/usb/phy/phy-twl6030-usb.c index 04778cf80d60..12741856a75c 100644 --- a/drivers/usb/phy/phy-twl6030-usb.c +++ b/drivers/usb/phy/phy-twl6030-usb.c | |||
| @@ -104,7 +104,6 @@ struct twl6030_usb { | |||
| 104 | int irq2; | 104 | int irq2; |
| 105 | enum omap_musb_vbus_id_status linkstat; | 105 | enum omap_musb_vbus_id_status linkstat; |
| 106 | u8 asleep; | 106 | u8 asleep; |
| 107 | bool irq_enabled; | ||
| 108 | bool vbus_enable; | 107 | bool vbus_enable; |
| 109 | const char *regulator; | 108 | const char *regulator; |
| 110 | }; | 109 | }; |
| @@ -373,7 +372,6 @@ static int twl6030_usb_probe(struct platform_device *pdev) | |||
| 373 | 372 | ||
| 374 | INIT_WORK(&twl->set_vbus_work, otg_set_vbus_work); | 373 | INIT_WORK(&twl->set_vbus_work, otg_set_vbus_work); |
| 375 | 374 | ||
| 376 | twl->irq_enabled = true; | ||
| 377 | status = request_threaded_irq(twl->irq1, NULL, twl6030_usbotg_irq, | 375 | status = request_threaded_irq(twl->irq1, NULL, twl6030_usbotg_irq, |
| 378 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING | IRQF_ONESHOT, | 376 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING | IRQF_ONESHOT, |
| 379 | "twl6030_usb", twl); | 377 | "twl6030_usb", twl); |
| @@ -432,7 +430,6 @@ static struct platform_driver twl6030_usb_driver = { | |||
| 432 | .remove = twl6030_usb_remove, | 430 | .remove = twl6030_usb_remove, |
| 433 | .driver = { | 431 | .driver = { |
| 434 | .name = "twl6030_usb", | 432 | .name = "twl6030_usb", |
| 435 | .owner = THIS_MODULE, | ||
| 436 | .of_match_table = of_match_ptr(twl6030_usb_id_table), | 433 | .of_match_table = of_match_ptr(twl6030_usb_id_table), |
| 437 | }, | 434 | }, |
| 438 | }; | 435 | }; |
diff --git a/drivers/usb/phy/phy-ulpi.c b/drivers/usb/phy/phy-ulpi.c index 4e3877c329f2..f48a7a21e3c2 100644 --- a/drivers/usb/phy/phy-ulpi.c +++ b/drivers/usb/phy/phy-ulpi.c | |||
| @@ -211,7 +211,7 @@ static int ulpi_init(struct usb_phy *phy) | |||
| 211 | 211 | ||
| 212 | static int ulpi_set_host(struct usb_otg *otg, struct usb_bus *host) | 212 | static int ulpi_set_host(struct usb_otg *otg, struct usb_bus *host) |
| 213 | { | 213 | { |
| 214 | struct usb_phy *phy = otg->phy; | 214 | struct usb_phy *phy = otg->usb_phy; |
| 215 | unsigned int flags = usb_phy_io_read(phy, ULPI_IFC_CTRL); | 215 | unsigned int flags = usb_phy_io_read(phy, ULPI_IFC_CTRL); |
| 216 | 216 | ||
| 217 | if (!host) { | 217 | if (!host) { |
| @@ -237,7 +237,7 @@ static int ulpi_set_host(struct usb_otg *otg, struct usb_bus *host) | |||
| 237 | 237 | ||
| 238 | static int ulpi_set_vbus(struct usb_otg *otg, bool on) | 238 | static int ulpi_set_vbus(struct usb_otg *otg, bool on) |
| 239 | { | 239 | { |
| 240 | struct usb_phy *phy = otg->phy; | 240 | struct usb_phy *phy = otg->usb_phy; |
| 241 | unsigned int flags = usb_phy_io_read(phy, ULPI_OTG_CTRL); | 241 | unsigned int flags = usb_phy_io_read(phy, ULPI_OTG_CTRL); |
| 242 | 242 | ||
| 243 | flags &= ~(ULPI_OTG_CTRL_DRVVBUS | ULPI_OTG_CTRL_DRVVBUS_EXT); | 243 | flags &= ~(ULPI_OTG_CTRL_DRVVBUS | ULPI_OTG_CTRL_DRVVBUS_EXT); |
| @@ -276,7 +276,7 @@ otg_ulpi_create(struct usb_phy_io_ops *ops, | |||
| 276 | phy->otg = otg; | 276 | phy->otg = otg; |
| 277 | phy->init = ulpi_init; | 277 | phy->init = ulpi_init; |
| 278 | 278 | ||
| 279 | otg->phy = phy; | 279 | otg->usb_phy = phy; |
| 280 | otg->set_host = ulpi_set_host; | 280 | otg->set_host = ulpi_set_host; |
| 281 | otg->set_vbus = ulpi_set_vbus; | 281 | otg->set_vbus = ulpi_set_vbus; |
| 282 | 282 | ||
diff --git a/drivers/usb/phy/phy.c b/drivers/usb/phy/phy.c index 045cd309367a..b4066a001ba0 100644 --- a/drivers/usb/phy/phy.c +++ b/drivers/usb/phy/phy.c | |||
| @@ -191,7 +191,9 @@ struct usb_phy *devm_usb_get_phy_by_phandle(struct device *dev, | |||
| 191 | 191 | ||
| 192 | phy = __of_usb_find_phy(node); | 192 | phy = __of_usb_find_phy(node); |
| 193 | if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) { | 193 | if (IS_ERR(phy) || !try_module_get(phy->dev->driver->owner)) { |
| 194 | phy = ERR_PTR(-EPROBE_DEFER); | 194 | if (!IS_ERR(phy)) |
| 195 | phy = ERR_PTR(-EPROBE_DEFER); | ||
| 196 | |||
| 195 | devres_free(ptr); | 197 | devres_free(ptr); |
| 196 | goto err1; | 198 | goto err1; |
| 197 | } | 199 | } |
| @@ -444,3 +446,15 @@ int usb_bind_phy(const char *dev_name, u8 index, | |||
| 444 | return 0; | 446 | return 0; |
| 445 | } | 447 | } |
| 446 | EXPORT_SYMBOL_GPL(usb_bind_phy); | 448 | EXPORT_SYMBOL_GPL(usb_bind_phy); |
| 449 | |||
| 450 | /** | ||
| 451 | * usb_phy_set_event - set event to phy event | ||
| 452 | * @x: the phy returned by usb_get_phy(); | ||
| 453 | * | ||
| 454 | * This sets event to phy event | ||
| 455 | */ | ||
| 456 | void usb_phy_set_event(struct usb_phy *x, unsigned long event) | ||
| 457 | { | ||
| 458 | x->last_event = event; | ||
| 459 | } | ||
| 460 | EXPORT_SYMBOL_GPL(usb_phy_set_event); | ||
