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path: root/drivers/usb/host/xhci.c
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Diffstat (limited to 'drivers/usb/host/xhci.c')
-rw-r--r--drivers/usb/host/xhci.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 6e7dc6f93978..dfa44d3e8eee 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -175,6 +175,16 @@ int xhci_reset(struct xhci_hcd *xhci)
175 command |= CMD_RESET; 175 command |= CMD_RESET;
176 writel(command, &xhci->op_regs->command); 176 writel(command, &xhci->op_regs->command);
177 177
178 /* Existing Intel xHCI controllers require a delay of 1 mS,
179 * after setting the CMD_RESET bit, and before accessing any
180 * HC registers. This allows the HC to complete the
181 * reset operation and be ready for HC register access.
182 * Without this delay, the subsequent HC register access,
183 * may result in a system hang very rarely.
184 */
185 if (xhci->quirks & XHCI_INTEL_HOST)
186 udelay(1000);
187
178 ret = xhci_handshake(&xhci->op_regs->command, 188 ret = xhci_handshake(&xhci->op_regs->command,
179 CMD_RESET, 0, 10 * 1000 * 1000); 189 CMD_RESET, 0, 10 * 1000 * 1000);
180 if (ret) 190 if (ret)