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path: root/drivers/usb/host/xhci-pci.c
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Diffstat (limited to 'drivers/usb/host/xhci-pci.c')
-rw-r--r--drivers/usb/host/xhci-pci.c108
1 files changed, 27 insertions, 81 deletions
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index cb16de213f64..ef98b38626fb 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/module.h>
25 26
26#include "xhci.h" 27#include "xhci.h"
27 28
@@ -51,61 +52,9 @@ static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
51 return 0; 52 return 0;
52} 53}
53 54
54/* called during probe() after chip reset completes */ 55static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
55static int xhci_pci_setup(struct usb_hcd *hcd)
56{ 56{
57 struct xhci_hcd *xhci; 57 struct pci_dev *pdev = to_pci_dev(dev);
58 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
59 int retval;
60 u32 temp;
61
62 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
63
64 if (usb_hcd_is_primary_hcd(hcd)) {
65 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
66 if (!xhci)
67 return -ENOMEM;
68 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
69 xhci->main_hcd = hcd;
70 /* Mark the first roothub as being USB 2.0.
71 * The xHCI driver will register the USB 3.0 roothub.
72 */
73 hcd->speed = HCD_USB2;
74 hcd->self.root_hub->speed = USB_SPEED_HIGH;
75 /*
76 * USB 2.0 roothub under xHCI has an integrated TT,
77 * (rate matching hub) as opposed to having an OHCI/UHCI
78 * companion controller.
79 */
80 hcd->has_tt = 1;
81 } else {
82 /* xHCI private pointer was set in xhci_pci_probe for the second
83 * registered roothub.
84 */
85 xhci = hcd_to_xhci(hcd);
86 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
87 if (HCC_64BIT_ADDR(temp)) {
88 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
89 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
90 } else {
91 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
92 }
93 return 0;
94 }
95
96 xhci->cap_regs = hcd->regs;
97 xhci->op_regs = hcd->regs +
98 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
99 xhci->run_regs = hcd->regs +
100 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
101 /* Cache read-only capability registers */
102 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
103 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
104 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
105 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
106 xhci->hci_version = HC_VERSION(xhci->hcc_params);
107 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
108 xhci_print_registers(xhci);
109 58
110 /* Look for vendor-specific quirks */ 59 /* Look for vendor-specific quirks */
111 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && 60 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
@@ -128,6 +77,9 @@ static int xhci_pci_setup(struct usb_hcd *hcd)
128 if (pdev->vendor == PCI_VENDOR_ID_NEC) 77 if (pdev->vendor == PCI_VENDOR_ID_NEC)
129 xhci->quirks |= XHCI_NEC_HOST; 78 xhci->quirks |= XHCI_NEC_HOST;
130 79
80 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
81 xhci->quirks |= XHCI_AMD_0x96_HOST;
82
131 /* AMD PLL quirk */ 83 /* AMD PLL quirk */
132 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info()) 84 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
133 xhci->quirks |= XHCI_AMD_PLL_FIX; 85 xhci->quirks |= XHCI_AMD_PLL_FIX;
@@ -136,39 +88,29 @@ static int xhci_pci_setup(struct usb_hcd *hcd)
136 xhci->quirks |= XHCI_SPURIOUS_SUCCESS; 88 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
137 xhci->quirks |= XHCI_EP_LIMIT_QUIRK; 89 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
138 xhci->limit_active_eps = 64; 90 xhci->limit_active_eps = 64;
91 xhci->quirks |= XHCI_SW_BW_CHECKING;
139 } 92 }
140 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 93 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
141 pdev->device == PCI_DEVICE_ID_ASROCK_P67) { 94 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
142 xhci->quirks |= XHCI_RESET_ON_RESUME; 95 xhci->quirks |= XHCI_RESET_ON_RESUME;
143 xhci_dbg(xhci, "QUIRK: Resetting on resume\n"); 96 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
144 } 97 }
98}
145 99
146 /* Make sure the HC is halted. */ 100/* called during probe() after chip reset completes */
147 retval = xhci_halt(xhci); 101static int xhci_pci_setup(struct usb_hcd *hcd)
148 if (retval) 102{
149 goto error; 103 struct xhci_hcd *xhci;
104 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
105 int retval;
150 106
151 xhci_dbg(xhci, "Resetting HCD\n"); 107 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
152 /* Reset the internal HC memory state and registers. */
153 retval = xhci_reset(xhci);
154 if (retval) 108 if (retval)
155 goto error; 109 return retval;
156 xhci_dbg(xhci, "Reset complete\n");
157
158 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
159 if (HCC_64BIT_ADDR(temp)) {
160 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
161 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
162 } else {
163 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
164 }
165 110
166 xhci_dbg(xhci, "Calling HCD init\n"); 111 xhci = hcd_to_xhci(hcd);
167 /* Initialize HCD and host controller data structures. */ 112 if (!usb_hcd_is_primary_hcd(hcd))
168 retval = xhci_init(hcd); 113 return 0;
169 if (retval)
170 goto error;
171 xhci_dbg(xhci, "Called HCD init\n");
172 114
173 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn); 115 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
174 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn); 116 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
@@ -178,7 +120,6 @@ static int xhci_pci_setup(struct usb_hcd *hcd)
178 if (!retval) 120 if (!retval)
179 return retval; 121 return retval;
180 122
181error:
182 kfree(xhci); 123 kfree(xhci);
183 return retval; 124 return retval;
184} 125}
@@ -222,7 +163,7 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
222 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci; 163 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
223 164
224 retval = usb_add_hcd(xhci->shared_hcd, dev->irq, 165 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
225 IRQF_DISABLED | IRQF_SHARED); 166 IRQF_SHARED);
226 if (retval) 167 if (retval)
227 goto put_usb3_hcd; 168 goto put_usb3_hcd;
228 /* Roothub already marked as USB 3.0 speed */ 169 /* Roothub already marked as USB 3.0 speed */
@@ -344,6 +285,11 @@ static const struct hc_driver xhci_pci_hc_driver = {
344 .hub_status_data = xhci_hub_status_data, 285 .hub_status_data = xhci_hub_status_data,
345 .bus_suspend = xhci_bus_suspend, 286 .bus_suspend = xhci_bus_suspend,
346 .bus_resume = xhci_bus_resume, 287 .bus_resume = xhci_bus_resume,
288 /*
289 * call back when device connected and addressed
290 */
291 .update_device = xhci_update_device,
292 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
347}; 293};
348 294
349/*-------------------------------------------------------------------------*/ 295/*-------------------------------------------------------------------------*/
@@ -375,12 +321,12 @@ static struct pci_driver xhci_pci_driver = {
375#endif 321#endif
376}; 322};
377 323
378int xhci_register_pci(void) 324int __init xhci_register_pci(void)
379{ 325{
380 return pci_register_driver(&xhci_pci_driver); 326 return pci_register_driver(&xhci_pci_driver);
381} 327}
382 328
383void xhci_unregister_pci(void) 329void __exit xhci_unregister_pci(void)
384{ 330{
385 pci_unregister_driver(&xhci_pci_driver); 331 pci_unregister_driver(&xhci_pci_driver);
386} 332}