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path: root/drivers/usb/dwc3/core.h
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Diffstat (limited to 'drivers/usb/dwc3/core.h')
-rw-r--r--drivers/usb/dwc3/core.h10
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index de5a8570be04..14b760209680 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -45,9 +45,7 @@
45#define DWC3_XHCI_RESOURCES_NUM 2 45#define DWC3_XHCI_RESOURCES_NUM 2
46 46
47#define DWC3_SCRATCHBUF_SIZE 4096 /* each buffer is assumed to be 4KiB */ 47#define DWC3_SCRATCHBUF_SIZE 4096 /* each buffer is assumed to be 4KiB */
48#define DWC3_EVENT_SIZE 4 /* bytes */ 48#define DWC3_EVENT_BUFFERS_SIZE 4096
49#define DWC3_EVENT_MAX_NUM 64 /* 2 events/endpoint */
50#define DWC3_EVENT_BUFFERS_SIZE (DWC3_EVENT_SIZE * DWC3_EVENT_MAX_NUM)
51#define DWC3_EVENT_TYPE_MASK 0xfe 49#define DWC3_EVENT_TYPE_MASK 0xfe
52 50
53#define DWC3_EVENT_TYPE_DEV 0 51#define DWC3_EVENT_TYPE_DEV 0
@@ -311,9 +309,8 @@
311#define DWC3_DCFG_SUPERSPEED_PLUS (5 << 0) /* DWC_usb31 only */ 309#define DWC3_DCFG_SUPERSPEED_PLUS (5 << 0) /* DWC_usb31 only */
312#define DWC3_DCFG_SUPERSPEED (4 << 0) 310#define DWC3_DCFG_SUPERSPEED (4 << 0)
313#define DWC3_DCFG_HIGHSPEED (0 << 0) 311#define DWC3_DCFG_HIGHSPEED (0 << 0)
314#define DWC3_DCFG_FULLSPEED2 (1 << 0) 312#define DWC3_DCFG_FULLSPEED (1 << 0)
315#define DWC3_DCFG_LOWSPEED (2 << 0) 313#define DWC3_DCFG_LOWSPEED (2 << 0)
316#define DWC3_DCFG_FULLSPEED1 (3 << 0)
317 314
318#define DWC3_DCFG_NUMP_SHIFT 17 315#define DWC3_DCFG_NUMP_SHIFT 17
319#define DWC3_DCFG_NUMP(n) (((n) >> DWC3_DCFG_NUMP_SHIFT) & 0x1f) 316#define DWC3_DCFG_NUMP(n) (((n) >> DWC3_DCFG_NUMP_SHIFT) & 0x1f)
@@ -405,9 +402,8 @@
405#define DWC3_DSTS_SUPERSPEED_PLUS (5 << 0) /* DWC_usb31 only */ 402#define DWC3_DSTS_SUPERSPEED_PLUS (5 << 0) /* DWC_usb31 only */
406#define DWC3_DSTS_SUPERSPEED (4 << 0) 403#define DWC3_DSTS_SUPERSPEED (4 << 0)
407#define DWC3_DSTS_HIGHSPEED (0 << 0) 404#define DWC3_DSTS_HIGHSPEED (0 << 0)
408#define DWC3_DSTS_FULLSPEED2 (1 << 0) 405#define DWC3_DSTS_FULLSPEED (1 << 0)
409#define DWC3_DSTS_LOWSPEED (2 << 0) 406#define DWC3_DSTS_LOWSPEED (2 << 0)
410#define DWC3_DSTS_FULLSPEED1 (3 << 0)
411 407
412/* Device Generic Command Register */ 408/* Device Generic Command Register */
413#define DWC3_DGCMD_SET_LMP 0x01 409#define DWC3_DGCMD_SET_LMP 0x01