diff options
Diffstat (limited to 'drivers/usb/dwc2/gadget.c')
-rw-r--r-- | drivers/usb/dwc2/gadget.c | 696 |
1 files changed, 348 insertions, 348 deletions
diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c index 3ee5b4c77a1f..2ed9ad84d979 100644 --- a/drivers/usb/dwc2/gadget.c +++ b/drivers/usb/dwc2/gadget.c | |||
@@ -39,14 +39,14 @@ | |||
39 | #include "hw.h" | 39 | #include "hw.h" |
40 | 40 | ||
41 | /* conversion functions */ | 41 | /* conversion functions */ |
42 | static inline struct s3c_hsotg_req *our_req(struct usb_request *req) | 42 | static inline struct dwc2_hsotg_req *our_req(struct usb_request *req) |
43 | { | 43 | { |
44 | return container_of(req, struct s3c_hsotg_req, req); | 44 | return container_of(req, struct dwc2_hsotg_req, req); |
45 | } | 45 | } |
46 | 46 | ||
47 | static inline struct s3c_hsotg_ep *our_ep(struct usb_ep *ep) | 47 | static inline struct dwc2_hsotg_ep *our_ep(struct usb_ep *ep) |
48 | { | 48 | { |
49 | return container_of(ep, struct s3c_hsotg_ep, ep); | 49 | return container_of(ep, struct dwc2_hsotg_ep, ep); |
50 | } | 50 | } |
51 | 51 | ||
52 | static inline struct dwc2_hsotg *to_hsotg(struct usb_gadget *gadget) | 52 | static inline struct dwc2_hsotg *to_hsotg(struct usb_gadget *gadget) |
@@ -64,7 +64,7 @@ static inline void __bic32(void __iomem *ptr, u32 val) | |||
64 | writel(readl(ptr) & ~val, ptr); | 64 | writel(readl(ptr) & ~val, ptr); |
65 | } | 65 | } |
66 | 66 | ||
67 | static inline struct s3c_hsotg_ep *index_to_ep(struct dwc2_hsotg *hsotg, | 67 | static inline struct dwc2_hsotg_ep *index_to_ep(struct dwc2_hsotg *hsotg, |
68 | u32 ep_index, u32 dir_in) | 68 | u32 ep_index, u32 dir_in) |
69 | { | 69 | { |
70 | if (dir_in) | 70 | if (dir_in) |
@@ -74,7 +74,7 @@ static inline struct s3c_hsotg_ep *index_to_ep(struct dwc2_hsotg *hsotg, | |||
74 | } | 74 | } |
75 | 75 | ||
76 | /* forward declaration of functions */ | 76 | /* forward declaration of functions */ |
77 | static void s3c_hsotg_dump(struct dwc2_hsotg *hsotg); | 77 | static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg); |
78 | 78 | ||
79 | /** | 79 | /** |
80 | * using_dma - return the DMA status of the driver. | 80 | * using_dma - return the DMA status of the driver. |
@@ -101,11 +101,11 @@ static inline bool using_dma(struct dwc2_hsotg *hsotg) | |||
101 | } | 101 | } |
102 | 102 | ||
103 | /** | 103 | /** |
104 | * s3c_hsotg_en_gsint - enable one or more of the general interrupt | 104 | * dwc2_hsotg_en_gsint - enable one or more of the general interrupt |
105 | * @hsotg: The device state | 105 | * @hsotg: The device state |
106 | * @ints: A bitmask of the interrupts to enable | 106 | * @ints: A bitmask of the interrupts to enable |
107 | */ | 107 | */ |
108 | static void s3c_hsotg_en_gsint(struct dwc2_hsotg *hsotg, u32 ints) | 108 | static void dwc2_hsotg_en_gsint(struct dwc2_hsotg *hsotg, u32 ints) |
109 | { | 109 | { |
110 | u32 gsintmsk = readl(hsotg->regs + GINTMSK); | 110 | u32 gsintmsk = readl(hsotg->regs + GINTMSK); |
111 | u32 new_gsintmsk; | 111 | u32 new_gsintmsk; |
@@ -119,11 +119,11 @@ static void s3c_hsotg_en_gsint(struct dwc2_hsotg *hsotg, u32 ints) | |||
119 | } | 119 | } |
120 | 120 | ||
121 | /** | 121 | /** |
122 | * s3c_hsotg_disable_gsint - disable one or more of the general interrupt | 122 | * dwc2_hsotg_disable_gsint - disable one or more of the general interrupt |
123 | * @hsotg: The device state | 123 | * @hsotg: The device state |
124 | * @ints: A bitmask of the interrupts to enable | 124 | * @ints: A bitmask of the interrupts to enable |
125 | */ | 125 | */ |
126 | static void s3c_hsotg_disable_gsint(struct dwc2_hsotg *hsotg, u32 ints) | 126 | static void dwc2_hsotg_disable_gsint(struct dwc2_hsotg *hsotg, u32 ints) |
127 | { | 127 | { |
128 | u32 gsintmsk = readl(hsotg->regs + GINTMSK); | 128 | u32 gsintmsk = readl(hsotg->regs + GINTMSK); |
129 | u32 new_gsintmsk; | 129 | u32 new_gsintmsk; |
@@ -135,7 +135,7 @@ static void s3c_hsotg_disable_gsint(struct dwc2_hsotg *hsotg, u32 ints) | |||
135 | } | 135 | } |
136 | 136 | ||
137 | /** | 137 | /** |
138 | * s3c_hsotg_ctrl_epint - enable/disable an endpoint irq | 138 | * dwc2_hsotg_ctrl_epint - enable/disable an endpoint irq |
139 | * @hsotg: The device state | 139 | * @hsotg: The device state |
140 | * @ep: The endpoint index | 140 | * @ep: The endpoint index |
141 | * @dir_in: True if direction is in. | 141 | * @dir_in: True if direction is in. |
@@ -144,7 +144,7 @@ static void s3c_hsotg_disable_gsint(struct dwc2_hsotg *hsotg, u32 ints) | |||
144 | * Set or clear the mask for an individual endpoint's interrupt | 144 | * Set or clear the mask for an individual endpoint's interrupt |
145 | * request. | 145 | * request. |
146 | */ | 146 | */ |
147 | static void s3c_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg, | 147 | static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg, |
148 | unsigned int ep, unsigned int dir_in, | 148 | unsigned int ep, unsigned int dir_in, |
149 | unsigned int en) | 149 | unsigned int en) |
150 | { | 150 | { |
@@ -166,10 +166,10 @@ static void s3c_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg, | |||
166 | } | 166 | } |
167 | 167 | ||
168 | /** | 168 | /** |
169 | * s3c_hsotg_init_fifo - initialise non-periodic FIFOs | 169 | * dwc2_hsotg_init_fifo - initialise non-periodic FIFOs |
170 | * @hsotg: The device instance. | 170 | * @hsotg: The device instance. |
171 | */ | 171 | */ |
172 | static void s3c_hsotg_init_fifo(struct dwc2_hsotg *hsotg) | 172 | static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg) |
173 | { | 173 | { |
174 | unsigned int ep; | 174 | unsigned int ep; |
175 | unsigned int addr; | 175 | unsigned int addr; |
@@ -248,12 +248,12 @@ static void s3c_hsotg_init_fifo(struct dwc2_hsotg *hsotg) | |||
248 | * | 248 | * |
249 | * Allocate a new USB request structure appropriate for the specified endpoint | 249 | * Allocate a new USB request structure appropriate for the specified endpoint |
250 | */ | 250 | */ |
251 | static struct usb_request *s3c_hsotg_ep_alloc_request(struct usb_ep *ep, | 251 | static struct usb_request *dwc2_hsotg_ep_alloc_request(struct usb_ep *ep, |
252 | gfp_t flags) | 252 | gfp_t flags) |
253 | { | 253 | { |
254 | struct s3c_hsotg_req *req; | 254 | struct dwc2_hsotg_req *req; |
255 | 255 | ||
256 | req = kzalloc(sizeof(struct s3c_hsotg_req), flags); | 256 | req = kzalloc(sizeof(struct dwc2_hsotg_req), flags); |
257 | if (!req) | 257 | if (!req) |
258 | return NULL; | 258 | return NULL; |
259 | 259 | ||
@@ -269,23 +269,23 @@ static struct usb_request *s3c_hsotg_ep_alloc_request(struct usb_ep *ep, | |||
269 | * Returns true if the endpoint is in periodic mode, meaning it is being | 269 | * Returns true if the endpoint is in periodic mode, meaning it is being |
270 | * used for an Interrupt or ISO transfer. | 270 | * used for an Interrupt or ISO transfer. |
271 | */ | 271 | */ |
272 | static inline int is_ep_periodic(struct s3c_hsotg_ep *hs_ep) | 272 | static inline int is_ep_periodic(struct dwc2_hsotg_ep *hs_ep) |
273 | { | 273 | { |
274 | return hs_ep->periodic; | 274 | return hs_ep->periodic; |
275 | } | 275 | } |
276 | 276 | ||
277 | /** | 277 | /** |
278 | * s3c_hsotg_unmap_dma - unmap the DMA memory being used for the request | 278 | * dwc2_hsotg_unmap_dma - unmap the DMA memory being used for the request |
279 | * @hsotg: The device state. | 279 | * @hsotg: The device state. |
280 | * @hs_ep: The endpoint for the request | 280 | * @hs_ep: The endpoint for the request |
281 | * @hs_req: The request being processed. | 281 | * @hs_req: The request being processed. |
282 | * | 282 | * |
283 | * This is the reverse of s3c_hsotg_map_dma(), called for the completion | 283 | * This is the reverse of dwc2_hsotg_map_dma(), called for the completion |
284 | * of a request to ensure the buffer is ready for access by the caller. | 284 | * of a request to ensure the buffer is ready for access by the caller. |
285 | */ | 285 | */ |
286 | static void s3c_hsotg_unmap_dma(struct dwc2_hsotg *hsotg, | 286 | static void dwc2_hsotg_unmap_dma(struct dwc2_hsotg *hsotg, |
287 | struct s3c_hsotg_ep *hs_ep, | 287 | struct dwc2_hsotg_ep *hs_ep, |
288 | struct s3c_hsotg_req *hs_req) | 288 | struct dwc2_hsotg_req *hs_req) |
289 | { | 289 | { |
290 | struct usb_request *req = &hs_req->req; | 290 | struct usb_request *req = &hs_req->req; |
291 | 291 | ||
@@ -297,7 +297,7 @@ static void s3c_hsotg_unmap_dma(struct dwc2_hsotg *hsotg, | |||
297 | } | 297 | } |
298 | 298 | ||
299 | /** | 299 | /** |
300 | * s3c_hsotg_write_fifo - write packet Data to the TxFIFO | 300 | * dwc2_hsotg_write_fifo - write packet Data to the TxFIFO |
301 | * @hsotg: The controller state. | 301 | * @hsotg: The controller state. |
302 | * @hs_ep: The endpoint we're going to write for. | 302 | * @hs_ep: The endpoint we're going to write for. |
303 | * @hs_req: The request to write data for. | 303 | * @hs_req: The request to write data for. |
@@ -312,9 +312,9 @@ static void s3c_hsotg_unmap_dma(struct dwc2_hsotg *hsotg, | |||
312 | * | 312 | * |
313 | * This routine is only needed for PIO | 313 | * This routine is only needed for PIO |
314 | */ | 314 | */ |
315 | static int s3c_hsotg_write_fifo(struct dwc2_hsotg *hsotg, | 315 | static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg, |
316 | struct s3c_hsotg_ep *hs_ep, | 316 | struct dwc2_hsotg_ep *hs_ep, |
317 | struct s3c_hsotg_req *hs_req) | 317 | struct dwc2_hsotg_req *hs_req) |
318 | { | 318 | { |
319 | bool periodic = is_ep_periodic(hs_ep); | 319 | bool periodic = is_ep_periodic(hs_ep); |
320 | u32 gnptxsts = readl(hsotg->regs + GNPTXSTS); | 320 | u32 gnptxsts = readl(hsotg->regs + GNPTXSTS); |
@@ -348,7 +348,7 @@ static int s3c_hsotg_write_fifo(struct dwc2_hsotg *hsotg, | |||
348 | * previous data has been completely sent. | 348 | * previous data has been completely sent. |
349 | */ | 349 | */ |
350 | if (hs_ep->fifo_load != 0) { | 350 | if (hs_ep->fifo_load != 0) { |
351 | s3c_hsotg_en_gsint(hsotg, GINTSTS_PTXFEMP); | 351 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_PTXFEMP); |
352 | return -ENOSPC; | 352 | return -ENOSPC; |
353 | } | 353 | } |
354 | 354 | ||
@@ -369,7 +369,7 @@ static int s3c_hsotg_write_fifo(struct dwc2_hsotg *hsotg, | |||
369 | __func__, can_write); | 369 | __func__, can_write); |
370 | 370 | ||
371 | if (can_write <= 0) { | 371 | if (can_write <= 0) { |
372 | s3c_hsotg_en_gsint(hsotg, GINTSTS_PTXFEMP); | 372 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_PTXFEMP); |
373 | return -ENOSPC; | 373 | return -ENOSPC; |
374 | } | 374 | } |
375 | } else if (hsotg->dedicated_fifos && hs_ep->index != 0) { | 375 | } else if (hsotg->dedicated_fifos && hs_ep->index != 0) { |
@@ -383,7 +383,7 @@ static int s3c_hsotg_write_fifo(struct dwc2_hsotg *hsotg, | |||
383 | "%s: no queue slots available (0x%08x)\n", | 383 | "%s: no queue slots available (0x%08x)\n", |
384 | __func__, gnptxsts); | 384 | __func__, gnptxsts); |
385 | 385 | ||
386 | s3c_hsotg_en_gsint(hsotg, GINTSTS_NPTXFEMP); | 386 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_NPTXFEMP); |
387 | return -ENOSPC; | 387 | return -ENOSPC; |
388 | } | 388 | } |
389 | 389 | ||
@@ -414,7 +414,7 @@ static int s3c_hsotg_write_fifo(struct dwc2_hsotg *hsotg, | |||
414 | 414 | ||
415 | /* it's needed only when we do not use dedicated fifos */ | 415 | /* it's needed only when we do not use dedicated fifos */ |
416 | if (!hsotg->dedicated_fifos) | 416 | if (!hsotg->dedicated_fifos) |
417 | s3c_hsotg_en_gsint(hsotg, | 417 | dwc2_hsotg_en_gsint(hsotg, |
418 | periodic ? GINTSTS_PTXFEMP : | 418 | periodic ? GINTSTS_PTXFEMP : |
419 | GINTSTS_NPTXFEMP); | 419 | GINTSTS_NPTXFEMP); |
420 | } | 420 | } |
@@ -443,7 +443,7 @@ static int s3c_hsotg_write_fifo(struct dwc2_hsotg *hsotg, | |||
443 | 443 | ||
444 | /* it's needed only when we do not use dedicated fifos */ | 444 | /* it's needed only when we do not use dedicated fifos */ |
445 | if (!hsotg->dedicated_fifos) | 445 | if (!hsotg->dedicated_fifos) |
446 | s3c_hsotg_en_gsint(hsotg, | 446 | dwc2_hsotg_en_gsint(hsotg, |
447 | periodic ? GINTSTS_PTXFEMP : | 447 | periodic ? GINTSTS_PTXFEMP : |
448 | GINTSTS_NPTXFEMP); | 448 | GINTSTS_NPTXFEMP); |
449 | } | 449 | } |
@@ -475,7 +475,7 @@ static int s3c_hsotg_write_fifo(struct dwc2_hsotg *hsotg, | |||
475 | * Return the maximum data that can be queued in one go on a given endpoint | 475 | * Return the maximum data that can be queued in one go on a given endpoint |
476 | * so that transfers that are too long can be split. | 476 | * so that transfers that are too long can be split. |
477 | */ | 477 | */ |
478 | static unsigned get_ep_limit(struct s3c_hsotg_ep *hs_ep) | 478 | static unsigned get_ep_limit(struct dwc2_hsotg_ep *hs_ep) |
479 | { | 479 | { |
480 | int index = hs_ep->index; | 480 | int index = hs_ep->index; |
481 | unsigned maxsize; | 481 | unsigned maxsize; |
@@ -508,7 +508,7 @@ static unsigned get_ep_limit(struct s3c_hsotg_ep *hs_ep) | |||
508 | } | 508 | } |
509 | 509 | ||
510 | /** | 510 | /** |
511 | * s3c_hsotg_start_req - start a USB request from an endpoint's queue | 511 | * dwc2_hsotg_start_req - start a USB request from an endpoint's queue |
512 | * @hsotg: The controller state. | 512 | * @hsotg: The controller state. |
513 | * @hs_ep: The endpoint to process a request for | 513 | * @hs_ep: The endpoint to process a request for |
514 | * @hs_req: The request to start. | 514 | * @hs_req: The request to start. |
@@ -517,9 +517,9 @@ static unsigned get_ep_limit(struct s3c_hsotg_ep *hs_ep) | |||
517 | * Start the given request running by setting the endpoint registers | 517 | * Start the given request running by setting the endpoint registers |
518 | * appropriately, and writing any data to the FIFOs. | 518 | * appropriately, and writing any data to the FIFOs. |
519 | */ | 519 | */ |
520 | static void s3c_hsotg_start_req(struct dwc2_hsotg *hsotg, | 520 | static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg, |
521 | struct s3c_hsotg_ep *hs_ep, | 521 | struct dwc2_hsotg_ep *hs_ep, |
522 | struct s3c_hsotg_req *hs_req, | 522 | struct dwc2_hsotg_req *hs_req, |
523 | bool continuing) | 523 | bool continuing) |
524 | { | 524 | { |
525 | struct usb_request *ureq = &hs_req->req; | 525 | struct usb_request *ureq = &hs_req->req; |
@@ -625,7 +625,7 @@ static void s3c_hsotg_start_req(struct dwc2_hsotg *hsotg, | |||
625 | 625 | ||
626 | /* | 626 | /* |
627 | * write DMA address to control register, buffer already | 627 | * write DMA address to control register, buffer already |
628 | * synced by s3c_hsotg_ep_queue(). | 628 | * synced by dwc2_hsotg_ep_queue(). |
629 | */ | 629 | */ |
630 | 630 | ||
631 | dma_reg = dir_in ? DIEPDMA(index) : DOEPDMA(index); | 631 | dma_reg = dir_in ? DIEPDMA(index) : DOEPDMA(index); |
@@ -659,7 +659,7 @@ static void s3c_hsotg_start_req(struct dwc2_hsotg *hsotg, | |||
659 | /* set these anyway, we may need them for non-periodic in */ | 659 | /* set these anyway, we may need them for non-periodic in */ |
660 | hs_ep->fifo_load = 0; | 660 | hs_ep->fifo_load = 0; |
661 | 661 | ||
662 | s3c_hsotg_write_fifo(hsotg, hs_ep, hs_req); | 662 | dwc2_hsotg_write_fifo(hsotg, hs_ep, hs_req); |
663 | } | 663 | } |
664 | 664 | ||
665 | /* | 665 | /* |
@@ -685,11 +685,11 @@ static void s3c_hsotg_start_req(struct dwc2_hsotg *hsotg, | |||
685 | __func__, readl(hsotg->regs + epctrl_reg)); | 685 | __func__, readl(hsotg->regs + epctrl_reg)); |
686 | 686 | ||
687 | /* enable ep interrupts */ | 687 | /* enable ep interrupts */ |
688 | s3c_hsotg_ctrl_epint(hsotg, hs_ep->index, hs_ep->dir_in, 1); | 688 | dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index, hs_ep->dir_in, 1); |
689 | } | 689 | } |
690 | 690 | ||
691 | /** | 691 | /** |
692 | * s3c_hsotg_map_dma - map the DMA memory being used for the request | 692 | * dwc2_hsotg_map_dma - map the DMA memory being used for the request |
693 | * @hsotg: The device state. | 693 | * @hsotg: The device state. |
694 | * @hs_ep: The endpoint the request is on. | 694 | * @hs_ep: The endpoint the request is on. |
695 | * @req: The request being processed. | 695 | * @req: The request being processed. |
@@ -700,11 +700,11 @@ static void s3c_hsotg_start_req(struct dwc2_hsotg *hsotg, | |||
700 | * DMA memory, then we map the memory and mark our request to allow us to | 700 | * DMA memory, then we map the memory and mark our request to allow us to |
701 | * cleanup on completion. | 701 | * cleanup on completion. |
702 | */ | 702 | */ |
703 | static int s3c_hsotg_map_dma(struct dwc2_hsotg *hsotg, | 703 | static int dwc2_hsotg_map_dma(struct dwc2_hsotg *hsotg, |
704 | struct s3c_hsotg_ep *hs_ep, | 704 | struct dwc2_hsotg_ep *hs_ep, |
705 | struct usb_request *req) | 705 | struct usb_request *req) |
706 | { | 706 | { |
707 | struct s3c_hsotg_req *hs_req = our_req(req); | 707 | struct dwc2_hsotg_req *hs_req = our_req(req); |
708 | int ret; | 708 | int ret; |
709 | 709 | ||
710 | /* if the length is zero, ignore the DMA data */ | 710 | /* if the length is zero, ignore the DMA data */ |
@@ -724,8 +724,8 @@ dma_error: | |||
724 | return -EIO; | 724 | return -EIO; |
725 | } | 725 | } |
726 | 726 | ||
727 | static int s3c_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg, | 727 | static int dwc2_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg, |
728 | struct s3c_hsotg_ep *hs_ep, struct s3c_hsotg_req *hs_req) | 728 | struct dwc2_hsotg_ep *hs_ep, struct dwc2_hsotg_req *hs_req) |
729 | { | 729 | { |
730 | void *req_buf = hs_req->req.buf; | 730 | void *req_buf = hs_req->req.buf; |
731 | 731 | ||
@@ -755,8 +755,8 @@ static int s3c_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg, | |||
755 | return 0; | 755 | return 0; |
756 | } | 756 | } |
757 | 757 | ||
758 | static void s3c_hsotg_handle_unaligned_buf_complete(struct dwc2_hsotg *hsotg, | 758 | static void dwc2_hsotg_handle_unaligned_buf_complete(struct dwc2_hsotg *hsotg, |
759 | struct s3c_hsotg_ep *hs_ep, struct s3c_hsotg_req *hs_req) | 759 | struct dwc2_hsotg_ep *hs_ep, struct dwc2_hsotg_req *hs_req) |
760 | { | 760 | { |
761 | /* If dma is not being used or buffer was aligned */ | 761 | /* If dma is not being used or buffer was aligned */ |
762 | if (!using_dma(hsotg) || !hs_req->saved_req_buf) | 762 | if (!using_dma(hsotg) || !hs_req->saved_req_buf) |
@@ -777,11 +777,11 @@ static void s3c_hsotg_handle_unaligned_buf_complete(struct dwc2_hsotg *hsotg, | |||
777 | hs_req->saved_req_buf = NULL; | 777 | hs_req->saved_req_buf = NULL; |
778 | } | 778 | } |
779 | 779 | ||
780 | static int s3c_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req, | 780 | static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req, |
781 | gfp_t gfp_flags) | 781 | gfp_t gfp_flags) |
782 | { | 782 | { |
783 | struct s3c_hsotg_req *hs_req = our_req(req); | 783 | struct dwc2_hsotg_req *hs_req = our_req(req); |
784 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 784 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
785 | struct dwc2_hsotg *hs = hs_ep->parent; | 785 | struct dwc2_hsotg *hs = hs_ep->parent; |
786 | bool first; | 786 | bool first; |
787 | int ret; | 787 | int ret; |
@@ -802,13 +802,13 @@ static int s3c_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req, | |||
802 | req->actual = 0; | 802 | req->actual = 0; |
803 | req->status = -EINPROGRESS; | 803 | req->status = -EINPROGRESS; |
804 | 804 | ||
805 | ret = s3c_hsotg_handle_unaligned_buf_start(hs, hs_ep, hs_req); | 805 | ret = dwc2_hsotg_handle_unaligned_buf_start(hs, hs_ep, hs_req); |
806 | if (ret) | 806 | if (ret) |
807 | return ret; | 807 | return ret; |
808 | 808 | ||
809 | /* if we're using DMA, sync the buffers as necessary */ | 809 | /* if we're using DMA, sync the buffers as necessary */ |
810 | if (using_dma(hs)) { | 810 | if (using_dma(hs)) { |
811 | ret = s3c_hsotg_map_dma(hs, hs_ep, req); | 811 | ret = dwc2_hsotg_map_dma(hs, hs_ep, req); |
812 | if (ret) | 812 | if (ret) |
813 | return ret; | 813 | return ret; |
814 | } | 814 | } |
@@ -817,51 +817,51 @@ static int s3c_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req, | |||
817 | list_add_tail(&hs_req->queue, &hs_ep->queue); | 817 | list_add_tail(&hs_req->queue, &hs_ep->queue); |
818 | 818 | ||
819 | if (first) | 819 | if (first) |
820 | s3c_hsotg_start_req(hs, hs_ep, hs_req, false); | 820 | dwc2_hsotg_start_req(hs, hs_ep, hs_req, false); |
821 | 821 | ||
822 | return 0; | 822 | return 0; |
823 | } | 823 | } |
824 | 824 | ||
825 | static int s3c_hsotg_ep_queue_lock(struct usb_ep *ep, struct usb_request *req, | 825 | static int dwc2_hsotg_ep_queue_lock(struct usb_ep *ep, struct usb_request *req, |
826 | gfp_t gfp_flags) | 826 | gfp_t gfp_flags) |
827 | { | 827 | { |
828 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 828 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
829 | struct dwc2_hsotg *hs = hs_ep->parent; | 829 | struct dwc2_hsotg *hs = hs_ep->parent; |
830 | unsigned long flags = 0; | 830 | unsigned long flags = 0; |
831 | int ret = 0; | 831 | int ret = 0; |
832 | 832 | ||
833 | spin_lock_irqsave(&hs->lock, flags); | 833 | spin_lock_irqsave(&hs->lock, flags); |
834 | ret = s3c_hsotg_ep_queue(ep, req, gfp_flags); | 834 | ret = dwc2_hsotg_ep_queue(ep, req, gfp_flags); |
835 | spin_unlock_irqrestore(&hs->lock, flags); | 835 | spin_unlock_irqrestore(&hs->lock, flags); |
836 | 836 | ||
837 | return ret; | 837 | return ret; |
838 | } | 838 | } |
839 | 839 | ||
840 | static void s3c_hsotg_ep_free_request(struct usb_ep *ep, | 840 | static void dwc2_hsotg_ep_free_request(struct usb_ep *ep, |
841 | struct usb_request *req) | 841 | struct usb_request *req) |
842 | { | 842 | { |
843 | struct s3c_hsotg_req *hs_req = our_req(req); | 843 | struct dwc2_hsotg_req *hs_req = our_req(req); |
844 | 844 | ||
845 | kfree(hs_req); | 845 | kfree(hs_req); |
846 | } | 846 | } |
847 | 847 | ||
848 | /** | 848 | /** |
849 | * s3c_hsotg_complete_oursetup - setup completion callback | 849 | * dwc2_hsotg_complete_oursetup - setup completion callback |
850 | * @ep: The endpoint the request was on. | 850 | * @ep: The endpoint the request was on. |
851 | * @req: The request completed. | 851 | * @req: The request completed. |
852 | * | 852 | * |
853 | * Called on completion of any requests the driver itself | 853 | * Called on completion of any requests the driver itself |
854 | * submitted that need cleaning up. | 854 | * submitted that need cleaning up. |
855 | */ | 855 | */ |
856 | static void s3c_hsotg_complete_oursetup(struct usb_ep *ep, | 856 | static void dwc2_hsotg_complete_oursetup(struct usb_ep *ep, |
857 | struct usb_request *req) | 857 | struct usb_request *req) |
858 | { | 858 | { |
859 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 859 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
860 | struct dwc2_hsotg *hsotg = hs_ep->parent; | 860 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
861 | 861 | ||
862 | dev_dbg(hsotg->dev, "%s: ep %p, req %p\n", __func__, ep, req); | 862 | dev_dbg(hsotg->dev, "%s: ep %p, req %p\n", __func__, ep, req); |
863 | 863 | ||
864 | s3c_hsotg_ep_free_request(ep, req); | 864 | dwc2_hsotg_ep_free_request(ep, req); |
865 | } | 865 | } |
866 | 866 | ||
867 | /** | 867 | /** |
@@ -872,10 +872,10 @@ static void s3c_hsotg_complete_oursetup(struct usb_ep *ep, | |||
872 | * Convert the given wIndex into a pointer to an driver endpoint | 872 | * Convert the given wIndex into a pointer to an driver endpoint |
873 | * structure, or return NULL if it is not a valid endpoint. | 873 | * structure, or return NULL if it is not a valid endpoint. |
874 | */ | 874 | */ |
875 | static struct s3c_hsotg_ep *ep_from_windex(struct dwc2_hsotg *hsotg, | 875 | static struct dwc2_hsotg_ep *ep_from_windex(struct dwc2_hsotg *hsotg, |
876 | u32 windex) | 876 | u32 windex) |
877 | { | 877 | { |
878 | struct s3c_hsotg_ep *ep; | 878 | struct dwc2_hsotg_ep *ep; |
879 | int dir = (windex & USB_DIR_IN) ? 1 : 0; | 879 | int dir = (windex & USB_DIR_IN) ? 1 : 0; |
880 | int idx = windex & 0x7F; | 880 | int idx = windex & 0x7F; |
881 | 881 | ||
@@ -894,12 +894,12 @@ static struct s3c_hsotg_ep *ep_from_windex(struct dwc2_hsotg *hsotg, | |||
894 | } | 894 | } |
895 | 895 | ||
896 | /** | 896 | /** |
897 | * s3c_hsotg_set_test_mode - Enable usb Test Modes | 897 | * dwc2_hsotg_set_test_mode - Enable usb Test Modes |
898 | * @hsotg: The driver state. | 898 | * @hsotg: The driver state. |
899 | * @testmode: requested usb test mode | 899 | * @testmode: requested usb test mode |
900 | * Enable usb Test Mode requested by the Host. | 900 | * Enable usb Test Mode requested by the Host. |
901 | */ | 901 | */ |
902 | int s3c_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode) | 902 | int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode) |
903 | { | 903 | { |
904 | int dctl = readl(hsotg->regs + DCTL); | 904 | int dctl = readl(hsotg->regs + DCTL); |
905 | 905 | ||
@@ -920,7 +920,7 @@ int s3c_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode) | |||
920 | } | 920 | } |
921 | 921 | ||
922 | /** | 922 | /** |
923 | * s3c_hsotg_send_reply - send reply to control request | 923 | * dwc2_hsotg_send_reply - send reply to control request |
924 | * @hsotg: The device state | 924 | * @hsotg: The device state |
925 | * @ep: Endpoint 0 | 925 | * @ep: Endpoint 0 |
926 | * @buff: Buffer for request | 926 | * @buff: Buffer for request |
@@ -929,8 +929,8 @@ int s3c_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode) | |||
929 | * Create a request and queue it on the given endpoint. This is useful as | 929 | * Create a request and queue it on the given endpoint. This is useful as |
930 | * an internal method of sending replies to certain control requests, etc. | 930 | * an internal method of sending replies to certain control requests, etc. |
931 | */ | 931 | */ |
932 | static int s3c_hsotg_send_reply(struct dwc2_hsotg *hsotg, | 932 | static int dwc2_hsotg_send_reply(struct dwc2_hsotg *hsotg, |
933 | struct s3c_hsotg_ep *ep, | 933 | struct dwc2_hsotg_ep *ep, |
934 | void *buff, | 934 | void *buff, |
935 | int length) | 935 | int length) |
936 | { | 936 | { |
@@ -939,7 +939,7 @@ static int s3c_hsotg_send_reply(struct dwc2_hsotg *hsotg, | |||
939 | 939 | ||
940 | dev_dbg(hsotg->dev, "%s: buff %p, len %d\n", __func__, buff, length); | 940 | dev_dbg(hsotg->dev, "%s: buff %p, len %d\n", __func__, buff, length); |
941 | 941 | ||
942 | req = s3c_hsotg_ep_alloc_request(&ep->ep, GFP_ATOMIC); | 942 | req = dwc2_hsotg_ep_alloc_request(&ep->ep, GFP_ATOMIC); |
943 | hsotg->ep0_reply = req; | 943 | hsotg->ep0_reply = req; |
944 | if (!req) { | 944 | if (!req) { |
945 | dev_warn(hsotg->dev, "%s: cannot alloc req\n", __func__); | 945 | dev_warn(hsotg->dev, "%s: cannot alloc req\n", __func__); |
@@ -953,12 +953,12 @@ static int s3c_hsotg_send_reply(struct dwc2_hsotg *hsotg, | |||
953 | * STATUS stage. | 953 | * STATUS stage. |
954 | */ | 954 | */ |
955 | req->zero = 0; | 955 | req->zero = 0; |
956 | req->complete = s3c_hsotg_complete_oursetup; | 956 | req->complete = dwc2_hsotg_complete_oursetup; |
957 | 957 | ||
958 | if (length) | 958 | if (length) |
959 | memcpy(req->buf, buff, length); | 959 | memcpy(req->buf, buff, length); |
960 | 960 | ||
961 | ret = s3c_hsotg_ep_queue(&ep->ep, req, GFP_ATOMIC); | 961 | ret = dwc2_hsotg_ep_queue(&ep->ep, req, GFP_ATOMIC); |
962 | if (ret) { | 962 | if (ret) { |
963 | dev_warn(hsotg->dev, "%s: cannot queue req\n", __func__); | 963 | dev_warn(hsotg->dev, "%s: cannot queue req\n", __func__); |
964 | return ret; | 964 | return ret; |
@@ -968,15 +968,15 @@ static int s3c_hsotg_send_reply(struct dwc2_hsotg *hsotg, | |||
968 | } | 968 | } |
969 | 969 | ||
970 | /** | 970 | /** |
971 | * s3c_hsotg_process_req_status - process request GET_STATUS | 971 | * dwc2_hsotg_process_req_status - process request GET_STATUS |
972 | * @hsotg: The device state | 972 | * @hsotg: The device state |
973 | * @ctrl: USB control request | 973 | * @ctrl: USB control request |
974 | */ | 974 | */ |
975 | static int s3c_hsotg_process_req_status(struct dwc2_hsotg *hsotg, | 975 | static int dwc2_hsotg_process_req_status(struct dwc2_hsotg *hsotg, |
976 | struct usb_ctrlrequest *ctrl) | 976 | struct usb_ctrlrequest *ctrl) |
977 | { | 977 | { |
978 | struct s3c_hsotg_ep *ep0 = hsotg->eps_out[0]; | 978 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
979 | struct s3c_hsotg_ep *ep; | 979 | struct dwc2_hsotg_ep *ep; |
980 | __le16 reply; | 980 | __le16 reply; |
981 | int ret; | 981 | int ret; |
982 | 982 | ||
@@ -1013,7 +1013,7 @@ static int s3c_hsotg_process_req_status(struct dwc2_hsotg *hsotg, | |||
1013 | if (le16_to_cpu(ctrl->wLength) != 2) | 1013 | if (le16_to_cpu(ctrl->wLength) != 2) |
1014 | return -EINVAL; | 1014 | return -EINVAL; |
1015 | 1015 | ||
1016 | ret = s3c_hsotg_send_reply(hsotg, ep0, &reply, 2); | 1016 | ret = dwc2_hsotg_send_reply(hsotg, ep0, &reply, 2); |
1017 | if (ret) { | 1017 | if (ret) { |
1018 | dev_err(hsotg->dev, "%s: failed to send reply\n", __func__); | 1018 | dev_err(hsotg->dev, "%s: failed to send reply\n", __func__); |
1019 | return ret; | 1019 | return ret; |
@@ -1022,7 +1022,7 @@ static int s3c_hsotg_process_req_status(struct dwc2_hsotg *hsotg, | |||
1022 | return 1; | 1022 | return 1; |
1023 | } | 1023 | } |
1024 | 1024 | ||
1025 | static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value); | 1025 | static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value); |
1026 | 1026 | ||
1027 | /** | 1027 | /** |
1028 | * get_ep_head - return the first request on the endpoint | 1028 | * get_ep_head - return the first request on the endpoint |
@@ -1030,27 +1030,27 @@ static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value); | |||
1030 | * | 1030 | * |
1031 | * Get the first request on the endpoint. | 1031 | * Get the first request on the endpoint. |
1032 | */ | 1032 | */ |
1033 | static struct s3c_hsotg_req *get_ep_head(struct s3c_hsotg_ep *hs_ep) | 1033 | static struct dwc2_hsotg_req *get_ep_head(struct dwc2_hsotg_ep *hs_ep) |
1034 | { | 1034 | { |
1035 | if (list_empty(&hs_ep->queue)) | 1035 | if (list_empty(&hs_ep->queue)) |
1036 | return NULL; | 1036 | return NULL; |
1037 | 1037 | ||
1038 | return list_first_entry(&hs_ep->queue, struct s3c_hsotg_req, queue); | 1038 | return list_first_entry(&hs_ep->queue, struct dwc2_hsotg_req, queue); |
1039 | } | 1039 | } |
1040 | 1040 | ||
1041 | /** | 1041 | /** |
1042 | * s3c_hsotg_process_req_feature - process request {SET,CLEAR}_FEATURE | 1042 | * dwc2_hsotg_process_req_feature - process request {SET,CLEAR}_FEATURE |
1043 | * @hsotg: The device state | 1043 | * @hsotg: The device state |
1044 | * @ctrl: USB control request | 1044 | * @ctrl: USB control request |
1045 | */ | 1045 | */ |
1046 | static int s3c_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, | 1046 | static int dwc2_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, |
1047 | struct usb_ctrlrequest *ctrl) | 1047 | struct usb_ctrlrequest *ctrl) |
1048 | { | 1048 | { |
1049 | struct s3c_hsotg_ep *ep0 = hsotg->eps_out[0]; | 1049 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
1050 | struct s3c_hsotg_req *hs_req; | 1050 | struct dwc2_hsotg_req *hs_req; |
1051 | bool restart; | 1051 | bool restart; |
1052 | bool set = (ctrl->bRequest == USB_REQ_SET_FEATURE); | 1052 | bool set = (ctrl->bRequest == USB_REQ_SET_FEATURE); |
1053 | struct s3c_hsotg_ep *ep; | 1053 | struct dwc2_hsotg_ep *ep; |
1054 | int ret; | 1054 | int ret; |
1055 | bool halted; | 1055 | bool halted; |
1056 | u32 recip; | 1056 | u32 recip; |
@@ -1074,7 +1074,7 @@ static int s3c_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, | |||
1074 | return -EINVAL; | 1074 | return -EINVAL; |
1075 | 1075 | ||
1076 | hsotg->test_mode = wIndex >> 8; | 1076 | hsotg->test_mode = wIndex >> 8; |
1077 | ret = s3c_hsotg_send_reply(hsotg, ep0, NULL, 0); | 1077 | ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0); |
1078 | if (ret) { | 1078 | if (ret) { |
1079 | dev_err(hsotg->dev, | 1079 | dev_err(hsotg->dev, |
1080 | "%s: failed to send reply\n", __func__); | 1080 | "%s: failed to send reply\n", __func__); |
@@ -1098,9 +1098,9 @@ static int s3c_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, | |||
1098 | case USB_ENDPOINT_HALT: | 1098 | case USB_ENDPOINT_HALT: |
1099 | halted = ep->halted; | 1099 | halted = ep->halted; |
1100 | 1100 | ||
1101 | s3c_hsotg_ep_sethalt(&ep->ep, set); | 1101 | dwc2_hsotg_ep_sethalt(&ep->ep, set); |
1102 | 1102 | ||
1103 | ret = s3c_hsotg_send_reply(hsotg, ep0, NULL, 0); | 1103 | ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0); |
1104 | if (ret) { | 1104 | if (ret) { |
1105 | dev_err(hsotg->dev, | 1105 | dev_err(hsotg->dev, |
1106 | "%s: failed to send reply\n", __func__); | 1106 | "%s: failed to send reply\n", __func__); |
@@ -1134,7 +1134,7 @@ static int s3c_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, | |||
1134 | restart = !list_empty(&ep->queue); | 1134 | restart = !list_empty(&ep->queue); |
1135 | if (restart) { | 1135 | if (restart) { |
1136 | hs_req = get_ep_head(ep); | 1136 | hs_req = get_ep_head(ep); |
1137 | s3c_hsotg_start_req(hsotg, ep, | 1137 | dwc2_hsotg_start_req(hsotg, ep, |
1138 | hs_req, false); | 1138 | hs_req, false); |
1139 | } | 1139 | } |
1140 | } | 1140 | } |
@@ -1152,17 +1152,17 @@ static int s3c_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, | |||
1152 | return 1; | 1152 | return 1; |
1153 | } | 1153 | } |
1154 | 1154 | ||
1155 | static void s3c_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg); | 1155 | static void dwc2_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg); |
1156 | 1156 | ||
1157 | /** | 1157 | /** |
1158 | * s3c_hsotg_stall_ep0 - stall ep0 | 1158 | * dwc2_hsotg_stall_ep0 - stall ep0 |
1159 | * @hsotg: The device state | 1159 | * @hsotg: The device state |
1160 | * | 1160 | * |
1161 | * Set stall for ep0 as response for setup request. | 1161 | * Set stall for ep0 as response for setup request. |
1162 | */ | 1162 | */ |
1163 | static void s3c_hsotg_stall_ep0(struct dwc2_hsotg *hsotg) | 1163 | static void dwc2_hsotg_stall_ep0(struct dwc2_hsotg *hsotg) |
1164 | { | 1164 | { |
1165 | struct s3c_hsotg_ep *ep0 = hsotg->eps_out[0]; | 1165 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
1166 | u32 reg; | 1166 | u32 reg; |
1167 | u32 ctrl; | 1167 | u32 ctrl; |
1168 | 1168 | ||
@@ -1187,11 +1187,11 @@ static void s3c_hsotg_stall_ep0(struct dwc2_hsotg *hsotg) | |||
1187 | * complete won't be called, so we enqueue | 1187 | * complete won't be called, so we enqueue |
1188 | * setup request here | 1188 | * setup request here |
1189 | */ | 1189 | */ |
1190 | s3c_hsotg_enqueue_setup(hsotg); | 1190 | dwc2_hsotg_enqueue_setup(hsotg); |
1191 | } | 1191 | } |
1192 | 1192 | ||
1193 | /** | 1193 | /** |
1194 | * s3c_hsotg_process_control - process a control request | 1194 | * dwc2_hsotg_process_control - process a control request |
1195 | * @hsotg: The device state | 1195 | * @hsotg: The device state |
1196 | * @ctrl: The control request received | 1196 | * @ctrl: The control request received |
1197 | * | 1197 | * |
@@ -1199,10 +1199,10 @@ static void s3c_hsotg_stall_ep0(struct dwc2_hsotg *hsotg) | |||
1199 | * needs to work out what to do next (and whether to pass it on to the | 1199 | * needs to work out what to do next (and whether to pass it on to the |
1200 | * gadget driver). | 1200 | * gadget driver). |
1201 | */ | 1201 | */ |
1202 | static void s3c_hsotg_process_control(struct dwc2_hsotg *hsotg, | 1202 | static void dwc2_hsotg_process_control(struct dwc2_hsotg *hsotg, |
1203 | struct usb_ctrlrequest *ctrl) | 1203 | struct usb_ctrlrequest *ctrl) |
1204 | { | 1204 | { |
1205 | struct s3c_hsotg_ep *ep0 = hsotg->eps_out[0]; | 1205 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
1206 | int ret = 0; | 1206 | int ret = 0; |
1207 | u32 dcfg; | 1207 | u32 dcfg; |
1208 | 1208 | ||
@@ -1233,16 +1233,16 @@ static void s3c_hsotg_process_control(struct dwc2_hsotg *hsotg, | |||
1233 | 1233 | ||
1234 | dev_info(hsotg->dev, "new address %d\n", ctrl->wValue); | 1234 | dev_info(hsotg->dev, "new address %d\n", ctrl->wValue); |
1235 | 1235 | ||
1236 | ret = s3c_hsotg_send_reply(hsotg, ep0, NULL, 0); | 1236 | ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0); |
1237 | return; | 1237 | return; |
1238 | 1238 | ||
1239 | case USB_REQ_GET_STATUS: | 1239 | case USB_REQ_GET_STATUS: |
1240 | ret = s3c_hsotg_process_req_status(hsotg, ctrl); | 1240 | ret = dwc2_hsotg_process_req_status(hsotg, ctrl); |
1241 | break; | 1241 | break; |
1242 | 1242 | ||
1243 | case USB_REQ_CLEAR_FEATURE: | 1243 | case USB_REQ_CLEAR_FEATURE: |
1244 | case USB_REQ_SET_FEATURE: | 1244 | case USB_REQ_SET_FEATURE: |
1245 | ret = s3c_hsotg_process_req_feature(hsotg, ctrl); | 1245 | ret = dwc2_hsotg_process_req_feature(hsotg, ctrl); |
1246 | break; | 1246 | break; |
1247 | } | 1247 | } |
1248 | } | 1248 | } |
@@ -1263,21 +1263,21 @@ static void s3c_hsotg_process_control(struct dwc2_hsotg *hsotg, | |||
1263 | */ | 1263 | */ |
1264 | 1264 | ||
1265 | if (ret < 0) | 1265 | if (ret < 0) |
1266 | s3c_hsotg_stall_ep0(hsotg); | 1266 | dwc2_hsotg_stall_ep0(hsotg); |
1267 | } | 1267 | } |
1268 | 1268 | ||
1269 | /** | 1269 | /** |
1270 | * s3c_hsotg_complete_setup - completion of a setup transfer | 1270 | * dwc2_hsotg_complete_setup - completion of a setup transfer |
1271 | * @ep: The endpoint the request was on. | 1271 | * @ep: The endpoint the request was on. |
1272 | * @req: The request completed. | 1272 | * @req: The request completed. |
1273 | * | 1273 | * |
1274 | * Called on completion of any requests the driver itself submitted for | 1274 | * Called on completion of any requests the driver itself submitted for |
1275 | * EP0 setup packets | 1275 | * EP0 setup packets |
1276 | */ | 1276 | */ |
1277 | static void s3c_hsotg_complete_setup(struct usb_ep *ep, | 1277 | static void dwc2_hsotg_complete_setup(struct usb_ep *ep, |
1278 | struct usb_request *req) | 1278 | struct usb_request *req) |
1279 | { | 1279 | { |
1280 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 1280 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
1281 | struct dwc2_hsotg *hsotg = hs_ep->parent; | 1281 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
1282 | 1282 | ||
1283 | if (req->status < 0) { | 1283 | if (req->status < 0) { |
@@ -1287,23 +1287,23 @@ static void s3c_hsotg_complete_setup(struct usb_ep *ep, | |||
1287 | 1287 | ||
1288 | spin_lock(&hsotg->lock); | 1288 | spin_lock(&hsotg->lock); |
1289 | if (req->actual == 0) | 1289 | if (req->actual == 0) |
1290 | s3c_hsotg_enqueue_setup(hsotg); | 1290 | dwc2_hsotg_enqueue_setup(hsotg); |
1291 | else | 1291 | else |
1292 | s3c_hsotg_process_control(hsotg, req->buf); | 1292 | dwc2_hsotg_process_control(hsotg, req->buf); |
1293 | spin_unlock(&hsotg->lock); | 1293 | spin_unlock(&hsotg->lock); |
1294 | } | 1294 | } |
1295 | 1295 | ||
1296 | /** | 1296 | /** |
1297 | * s3c_hsotg_enqueue_setup - start a request for EP0 packets | 1297 | * dwc2_hsotg_enqueue_setup - start a request for EP0 packets |
1298 | * @hsotg: The device state. | 1298 | * @hsotg: The device state. |
1299 | * | 1299 | * |
1300 | * Enqueue a request on EP0 if necessary to received any SETUP packets | 1300 | * Enqueue a request on EP0 if necessary to received any SETUP packets |
1301 | * received from the host. | 1301 | * received from the host. |
1302 | */ | 1302 | */ |
1303 | static void s3c_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg) | 1303 | static void dwc2_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg) |
1304 | { | 1304 | { |
1305 | struct usb_request *req = hsotg->ctrl_req; | 1305 | struct usb_request *req = hsotg->ctrl_req; |
1306 | struct s3c_hsotg_req *hs_req = our_req(req); | 1306 | struct dwc2_hsotg_req *hs_req = our_req(req); |
1307 | int ret; | 1307 | int ret; |
1308 | 1308 | ||
1309 | dev_dbg(hsotg->dev, "%s: queueing setup request\n", __func__); | 1309 | dev_dbg(hsotg->dev, "%s: queueing setup request\n", __func__); |
@@ -1311,7 +1311,7 @@ static void s3c_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg) | |||
1311 | req->zero = 0; | 1311 | req->zero = 0; |
1312 | req->length = 8; | 1312 | req->length = 8; |
1313 | req->buf = hsotg->ctrl_buff; | 1313 | req->buf = hsotg->ctrl_buff; |
1314 | req->complete = s3c_hsotg_complete_setup; | 1314 | req->complete = dwc2_hsotg_complete_setup; |
1315 | 1315 | ||
1316 | if (!list_empty(&hs_req->queue)) { | 1316 | if (!list_empty(&hs_req->queue)) { |
1317 | dev_dbg(hsotg->dev, "%s already queued???\n", __func__); | 1317 | dev_dbg(hsotg->dev, "%s already queued???\n", __func__); |
@@ -1322,7 +1322,7 @@ static void s3c_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg) | |||
1322 | hsotg->eps_out[0]->send_zlp = 0; | 1322 | hsotg->eps_out[0]->send_zlp = 0; |
1323 | hsotg->ep0_state = DWC2_EP0_SETUP; | 1323 | hsotg->ep0_state = DWC2_EP0_SETUP; |
1324 | 1324 | ||
1325 | ret = s3c_hsotg_ep_queue(&hsotg->eps_out[0]->ep, req, GFP_ATOMIC); | 1325 | ret = dwc2_hsotg_ep_queue(&hsotg->eps_out[0]->ep, req, GFP_ATOMIC); |
1326 | if (ret < 0) { | 1326 | if (ret < 0) { |
1327 | dev_err(hsotg->dev, "%s: failed queue (%d)\n", __func__, ret); | 1327 | dev_err(hsotg->dev, "%s: failed queue (%d)\n", __func__, ret); |
1328 | /* | 1328 | /* |
@@ -1332,8 +1332,8 @@ static void s3c_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg) | |||
1332 | } | 1332 | } |
1333 | } | 1333 | } |
1334 | 1334 | ||
1335 | static void s3c_hsotg_program_zlp(struct dwc2_hsotg *hsotg, | 1335 | static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg, |
1336 | struct s3c_hsotg_ep *hs_ep) | 1336 | struct dwc2_hsotg_ep *hs_ep) |
1337 | { | 1337 | { |
1338 | u32 ctrl; | 1338 | u32 ctrl; |
1339 | u8 index = hs_ep->index; | 1339 | u8 index = hs_ep->index; |
@@ -1359,7 +1359,7 @@ static void s3c_hsotg_program_zlp(struct dwc2_hsotg *hsotg, | |||
1359 | } | 1359 | } |
1360 | 1360 | ||
1361 | /** | 1361 | /** |
1362 | * s3c_hsotg_complete_request - complete a request given to us | 1362 | * dwc2_hsotg_complete_request - complete a request given to us |
1363 | * @hsotg: The device state. | 1363 | * @hsotg: The device state. |
1364 | * @hs_ep: The endpoint the request was on. | 1364 | * @hs_ep: The endpoint the request was on. |
1365 | * @hs_req: The request to complete. | 1365 | * @hs_req: The request to complete. |
@@ -1371,9 +1371,9 @@ static void s3c_hsotg_program_zlp(struct dwc2_hsotg *hsotg, | |||
1371 | * | 1371 | * |
1372 | * Note, expects the ep to already be locked as appropriate. | 1372 | * Note, expects the ep to already be locked as appropriate. |
1373 | */ | 1373 | */ |
1374 | static void s3c_hsotg_complete_request(struct dwc2_hsotg *hsotg, | 1374 | static void dwc2_hsotg_complete_request(struct dwc2_hsotg *hsotg, |
1375 | struct s3c_hsotg_ep *hs_ep, | 1375 | struct dwc2_hsotg_ep *hs_ep, |
1376 | struct s3c_hsotg_req *hs_req, | 1376 | struct dwc2_hsotg_req *hs_req, |
1377 | int result) | 1377 | int result) |
1378 | { | 1378 | { |
1379 | bool restart; | 1379 | bool restart; |
@@ -1394,13 +1394,13 @@ static void s3c_hsotg_complete_request(struct dwc2_hsotg *hsotg, | |||
1394 | if (hs_req->req.status == -EINPROGRESS) | 1394 | if (hs_req->req.status == -EINPROGRESS) |
1395 | hs_req->req.status = result; | 1395 | hs_req->req.status = result; |
1396 | 1396 | ||
1397 | s3c_hsotg_handle_unaligned_buf_complete(hsotg, hs_ep, hs_req); | 1397 | dwc2_hsotg_handle_unaligned_buf_complete(hsotg, hs_ep, hs_req); |
1398 | 1398 | ||
1399 | hs_ep->req = NULL; | 1399 | hs_ep->req = NULL; |
1400 | list_del_init(&hs_req->queue); | 1400 | list_del_init(&hs_req->queue); |
1401 | 1401 | ||
1402 | if (using_dma(hsotg)) | 1402 | if (using_dma(hsotg)) |
1403 | s3c_hsotg_unmap_dma(hsotg, hs_ep, hs_req); | 1403 | dwc2_hsotg_unmap_dma(hsotg, hs_ep, hs_req); |
1404 | 1404 | ||
1405 | /* | 1405 | /* |
1406 | * call the complete request with the locks off, just in case the | 1406 | * call the complete request with the locks off, just in case the |
@@ -1423,13 +1423,13 @@ static void s3c_hsotg_complete_request(struct dwc2_hsotg *hsotg, | |||
1423 | restart = !list_empty(&hs_ep->queue); | 1423 | restart = !list_empty(&hs_ep->queue); |
1424 | if (restart) { | 1424 | if (restart) { |
1425 | hs_req = get_ep_head(hs_ep); | 1425 | hs_req = get_ep_head(hs_ep); |
1426 | s3c_hsotg_start_req(hsotg, hs_ep, hs_req, false); | 1426 | dwc2_hsotg_start_req(hsotg, hs_ep, hs_req, false); |
1427 | } | 1427 | } |
1428 | } | 1428 | } |
1429 | } | 1429 | } |
1430 | 1430 | ||
1431 | /** | 1431 | /** |
1432 | * s3c_hsotg_rx_data - receive data from the FIFO for an endpoint | 1432 | * dwc2_hsotg_rx_data - receive data from the FIFO for an endpoint |
1433 | * @hsotg: The device state. | 1433 | * @hsotg: The device state. |
1434 | * @ep_idx: The endpoint index for the data | 1434 | * @ep_idx: The endpoint index for the data |
1435 | * @size: The size of data in the fifo, in bytes | 1435 | * @size: The size of data in the fifo, in bytes |
@@ -1438,10 +1438,10 @@ static void s3c_hsotg_complete_request(struct dwc2_hsotg *hsotg, | |||
1438 | * endpoint, so sort out whether we need to read the data into a request | 1438 | * endpoint, so sort out whether we need to read the data into a request |
1439 | * that has been made for that endpoint. | 1439 | * that has been made for that endpoint. |
1440 | */ | 1440 | */ |
1441 | static void s3c_hsotg_rx_data(struct dwc2_hsotg *hsotg, int ep_idx, int size) | 1441 | static void dwc2_hsotg_rx_data(struct dwc2_hsotg *hsotg, int ep_idx, int size) |
1442 | { | 1442 | { |
1443 | struct s3c_hsotg_ep *hs_ep = hsotg->eps_out[ep_idx]; | 1443 | struct dwc2_hsotg_ep *hs_ep = hsotg->eps_out[ep_idx]; |
1444 | struct s3c_hsotg_req *hs_req = hs_ep->req; | 1444 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
1445 | void __iomem *fifo = hsotg->regs + EPFIFO(ep_idx); | 1445 | void __iomem *fifo = hsotg->regs + EPFIFO(ep_idx); |
1446 | int to_read; | 1446 | int to_read; |
1447 | int max_req; | 1447 | int max_req; |
@@ -1492,7 +1492,7 @@ static void s3c_hsotg_rx_data(struct dwc2_hsotg *hsotg, int ep_idx, int size) | |||
1492 | } | 1492 | } |
1493 | 1493 | ||
1494 | /** | 1494 | /** |
1495 | * s3c_hsotg_ep0_zlp - send/receive zero-length packet on control endpoint | 1495 | * dwc2_hsotg_ep0_zlp - send/receive zero-length packet on control endpoint |
1496 | * @hsotg: The device instance | 1496 | * @hsotg: The device instance |
1497 | * @dir_in: If IN zlp | 1497 | * @dir_in: If IN zlp |
1498 | * | 1498 | * |
@@ -1503,17 +1503,17 @@ static void s3c_hsotg_rx_data(struct dwc2_hsotg *hsotg, int ep_idx, int size) | |||
1503 | * currently believed that we do not need to wait for any space in | 1503 | * currently believed that we do not need to wait for any space in |
1504 | * the TxFIFO. | 1504 | * the TxFIFO. |
1505 | */ | 1505 | */ |
1506 | static void s3c_hsotg_ep0_zlp(struct dwc2_hsotg *hsotg, bool dir_in) | 1506 | static void dwc2_hsotg_ep0_zlp(struct dwc2_hsotg *hsotg, bool dir_in) |
1507 | { | 1507 | { |
1508 | /* eps_out[0] is used in both directions */ | 1508 | /* eps_out[0] is used in both directions */ |
1509 | hsotg->eps_out[0]->dir_in = dir_in; | 1509 | hsotg->eps_out[0]->dir_in = dir_in; |
1510 | hsotg->ep0_state = dir_in ? DWC2_EP0_STATUS_IN : DWC2_EP0_STATUS_OUT; | 1510 | hsotg->ep0_state = dir_in ? DWC2_EP0_STATUS_IN : DWC2_EP0_STATUS_OUT; |
1511 | 1511 | ||
1512 | s3c_hsotg_program_zlp(hsotg, hsotg->eps_out[0]); | 1512 | dwc2_hsotg_program_zlp(hsotg, hsotg->eps_out[0]); |
1513 | } | 1513 | } |
1514 | 1514 | ||
1515 | /** | 1515 | /** |
1516 | * s3c_hsotg_handle_outdone - handle receiving OutDone/SetupDone from RXFIFO | 1516 | * dwc2_hsotg_handle_outdone - handle receiving OutDone/SetupDone from RXFIFO |
1517 | * @hsotg: The device instance | 1517 | * @hsotg: The device instance |
1518 | * @epnum: The endpoint received from | 1518 | * @epnum: The endpoint received from |
1519 | * | 1519 | * |
@@ -1521,11 +1521,11 @@ static void s3c_hsotg_ep0_zlp(struct dwc2_hsotg *hsotg, bool dir_in) | |||
1521 | * transfer for an OUT endpoint has been completed, either by a short | 1521 | * transfer for an OUT endpoint has been completed, either by a short |
1522 | * packet or by the finish of a transfer. | 1522 | * packet or by the finish of a transfer. |
1523 | */ | 1523 | */ |
1524 | static void s3c_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum) | 1524 | static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum) |
1525 | { | 1525 | { |
1526 | u32 epsize = readl(hsotg->regs + DOEPTSIZ(epnum)); | 1526 | u32 epsize = readl(hsotg->regs + DOEPTSIZ(epnum)); |
1527 | struct s3c_hsotg_ep *hs_ep = hsotg->eps_out[epnum]; | 1527 | struct dwc2_hsotg_ep *hs_ep = hsotg->eps_out[epnum]; |
1528 | struct s3c_hsotg_req *hs_req = hs_ep->req; | 1528 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
1529 | struct usb_request *req = &hs_req->req; | 1529 | struct usb_request *req = &hs_req->req; |
1530 | unsigned size_left = DXEPTSIZ_XFERSIZE_GET(epsize); | 1530 | unsigned size_left = DXEPTSIZ_XFERSIZE_GET(epsize); |
1531 | int result = 0; | 1531 | int result = 0; |
@@ -1537,8 +1537,8 @@ static void s3c_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum) | |||
1537 | 1537 | ||
1538 | if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_OUT) { | 1538 | if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_OUT) { |
1539 | dev_dbg(hsotg->dev, "zlp packet received\n"); | 1539 | dev_dbg(hsotg->dev, "zlp packet received\n"); |
1540 | s3c_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); | 1540 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); |
1541 | s3c_hsotg_enqueue_setup(hsotg); | 1541 | dwc2_hsotg_enqueue_setup(hsotg); |
1542 | return; | 1542 | return; |
1543 | } | 1543 | } |
1544 | 1544 | ||
@@ -1562,7 +1562,7 @@ static void s3c_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum) | |||
1562 | 1562 | ||
1563 | /* if there is more request to do, schedule new transfer */ | 1563 | /* if there is more request to do, schedule new transfer */ |
1564 | if (req->actual < req->length && size_left == 0) { | 1564 | if (req->actual < req->length && size_left == 0) { |
1565 | s3c_hsotg_start_req(hsotg, hs_ep, hs_req, true); | 1565 | dwc2_hsotg_start_req(hsotg, hs_ep, hs_req, true); |
1566 | return; | 1566 | return; |
1567 | } | 1567 | } |
1568 | 1568 | ||
@@ -1578,20 +1578,20 @@ static void s3c_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum) | |||
1578 | 1578 | ||
1579 | if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_DATA_OUT) { | 1579 | if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_DATA_OUT) { |
1580 | /* Move to STATUS IN */ | 1580 | /* Move to STATUS IN */ |
1581 | s3c_hsotg_ep0_zlp(hsotg, true); | 1581 | dwc2_hsotg_ep0_zlp(hsotg, true); |
1582 | return; | 1582 | return; |
1583 | } | 1583 | } |
1584 | 1584 | ||
1585 | s3c_hsotg_complete_request(hsotg, hs_ep, hs_req, result); | 1585 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, result); |
1586 | } | 1586 | } |
1587 | 1587 | ||
1588 | /** | 1588 | /** |
1589 | * s3c_hsotg_read_frameno - read current frame number | 1589 | * dwc2_hsotg_read_frameno - read current frame number |
1590 | * @hsotg: The device instance | 1590 | * @hsotg: The device instance |
1591 | * | 1591 | * |
1592 | * Return the current frame number | 1592 | * Return the current frame number |
1593 | */ | 1593 | */ |
1594 | static u32 s3c_hsotg_read_frameno(struct dwc2_hsotg *hsotg) | 1594 | static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg) |
1595 | { | 1595 | { |
1596 | u32 dsts; | 1596 | u32 dsts; |
1597 | 1597 | ||
@@ -1603,7 +1603,7 @@ static u32 s3c_hsotg_read_frameno(struct dwc2_hsotg *hsotg) | |||
1603 | } | 1603 | } |
1604 | 1604 | ||
1605 | /** | 1605 | /** |
1606 | * s3c_hsotg_handle_rx - RX FIFO has data | 1606 | * dwc2_hsotg_handle_rx - RX FIFO has data |
1607 | * @hsotg: The device instance | 1607 | * @hsotg: The device instance |
1608 | * | 1608 | * |
1609 | * The IRQ handler has detected that the RX FIFO has some data in it | 1609 | * The IRQ handler has detected that the RX FIFO has some data in it |
@@ -1618,7 +1618,7 @@ static u32 s3c_hsotg_read_frameno(struct dwc2_hsotg *hsotg) | |||
1618 | * as the actual data should be sent to the memory directly and we turn | 1618 | * as the actual data should be sent to the memory directly and we turn |
1619 | * on the completion interrupts to get notifications of transfer completion. | 1619 | * on the completion interrupts to get notifications of transfer completion. |
1620 | */ | 1620 | */ |
1621 | static void s3c_hsotg_handle_rx(struct dwc2_hsotg *hsotg) | 1621 | static void dwc2_hsotg_handle_rx(struct dwc2_hsotg *hsotg) |
1622 | { | 1622 | { |
1623 | u32 grxstsr = readl(hsotg->regs + GRXSTSP); | 1623 | u32 grxstsr = readl(hsotg->regs + GRXSTSP); |
1624 | u32 epnum, status, size; | 1624 | u32 epnum, status, size; |
@@ -1641,55 +1641,55 @@ static void s3c_hsotg_handle_rx(struct dwc2_hsotg *hsotg) | |||
1641 | 1641 | ||
1642 | case GRXSTS_PKTSTS_OUTDONE: | 1642 | case GRXSTS_PKTSTS_OUTDONE: |
1643 | dev_dbg(hsotg->dev, "OutDone (Frame=0x%08x)\n", | 1643 | dev_dbg(hsotg->dev, "OutDone (Frame=0x%08x)\n", |
1644 | s3c_hsotg_read_frameno(hsotg)); | 1644 | dwc2_hsotg_read_frameno(hsotg)); |
1645 | 1645 | ||
1646 | if (!using_dma(hsotg)) | 1646 | if (!using_dma(hsotg)) |
1647 | s3c_hsotg_handle_outdone(hsotg, epnum); | 1647 | dwc2_hsotg_handle_outdone(hsotg, epnum); |
1648 | break; | 1648 | break; |
1649 | 1649 | ||
1650 | case GRXSTS_PKTSTS_SETUPDONE: | 1650 | case GRXSTS_PKTSTS_SETUPDONE: |
1651 | dev_dbg(hsotg->dev, | 1651 | dev_dbg(hsotg->dev, |
1652 | "SetupDone (Frame=0x%08x, DOPEPCTL=0x%08x)\n", | 1652 | "SetupDone (Frame=0x%08x, DOPEPCTL=0x%08x)\n", |
1653 | s3c_hsotg_read_frameno(hsotg), | 1653 | dwc2_hsotg_read_frameno(hsotg), |
1654 | readl(hsotg->regs + DOEPCTL(0))); | 1654 | readl(hsotg->regs + DOEPCTL(0))); |
1655 | /* | 1655 | /* |
1656 | * Call s3c_hsotg_handle_outdone here if it was not called from | 1656 | * Call dwc2_hsotg_handle_outdone here if it was not called from |
1657 | * GRXSTS_PKTSTS_OUTDONE. That is, if the core didn't | 1657 | * GRXSTS_PKTSTS_OUTDONE. That is, if the core didn't |
1658 | * generate GRXSTS_PKTSTS_OUTDONE for setup packet. | 1658 | * generate GRXSTS_PKTSTS_OUTDONE for setup packet. |
1659 | */ | 1659 | */ |
1660 | if (hsotg->ep0_state == DWC2_EP0_SETUP) | 1660 | if (hsotg->ep0_state == DWC2_EP0_SETUP) |
1661 | s3c_hsotg_handle_outdone(hsotg, epnum); | 1661 | dwc2_hsotg_handle_outdone(hsotg, epnum); |
1662 | break; | 1662 | break; |
1663 | 1663 | ||
1664 | case GRXSTS_PKTSTS_OUTRX: | 1664 | case GRXSTS_PKTSTS_OUTRX: |
1665 | s3c_hsotg_rx_data(hsotg, epnum, size); | 1665 | dwc2_hsotg_rx_data(hsotg, epnum, size); |
1666 | break; | 1666 | break; |
1667 | 1667 | ||
1668 | case GRXSTS_PKTSTS_SETUPRX: | 1668 | case GRXSTS_PKTSTS_SETUPRX: |
1669 | dev_dbg(hsotg->dev, | 1669 | dev_dbg(hsotg->dev, |
1670 | "SetupRX (Frame=0x%08x, DOPEPCTL=0x%08x)\n", | 1670 | "SetupRX (Frame=0x%08x, DOPEPCTL=0x%08x)\n", |
1671 | s3c_hsotg_read_frameno(hsotg), | 1671 | dwc2_hsotg_read_frameno(hsotg), |
1672 | readl(hsotg->regs + DOEPCTL(0))); | 1672 | readl(hsotg->regs + DOEPCTL(0))); |
1673 | 1673 | ||
1674 | WARN_ON(hsotg->ep0_state != DWC2_EP0_SETUP); | 1674 | WARN_ON(hsotg->ep0_state != DWC2_EP0_SETUP); |
1675 | 1675 | ||
1676 | s3c_hsotg_rx_data(hsotg, epnum, size); | 1676 | dwc2_hsotg_rx_data(hsotg, epnum, size); |
1677 | break; | 1677 | break; |
1678 | 1678 | ||
1679 | default: | 1679 | default: |
1680 | dev_warn(hsotg->dev, "%s: unknown status %08x\n", | 1680 | dev_warn(hsotg->dev, "%s: unknown status %08x\n", |
1681 | __func__, grxstsr); | 1681 | __func__, grxstsr); |
1682 | 1682 | ||
1683 | s3c_hsotg_dump(hsotg); | 1683 | dwc2_hsotg_dump(hsotg); |
1684 | break; | 1684 | break; |
1685 | } | 1685 | } |
1686 | } | 1686 | } |
1687 | 1687 | ||
1688 | /** | 1688 | /** |
1689 | * s3c_hsotg_ep0_mps - turn max packet size into register setting | 1689 | * dwc2_hsotg_ep0_mps - turn max packet size into register setting |
1690 | * @mps: The maximum packet size in bytes. | 1690 | * @mps: The maximum packet size in bytes. |
1691 | */ | 1691 | */ |
1692 | static u32 s3c_hsotg_ep0_mps(unsigned int mps) | 1692 | static u32 dwc2_hsotg_ep0_mps(unsigned int mps) |
1693 | { | 1693 | { |
1694 | switch (mps) { | 1694 | switch (mps) { |
1695 | case 64: | 1695 | case 64: |
@@ -1708,7 +1708,7 @@ static u32 s3c_hsotg_ep0_mps(unsigned int mps) | |||
1708 | } | 1708 | } |
1709 | 1709 | ||
1710 | /** | 1710 | /** |
1711 | * s3c_hsotg_set_ep_maxpacket - set endpoint's max-packet field | 1711 | * dwc2_hsotg_set_ep_maxpacket - set endpoint's max-packet field |
1712 | * @hsotg: The driver state. | 1712 | * @hsotg: The driver state. |
1713 | * @ep: The index number of the endpoint | 1713 | * @ep: The index number of the endpoint |
1714 | * @mps: The maximum packet size in bytes | 1714 | * @mps: The maximum packet size in bytes |
@@ -1716,10 +1716,10 @@ static u32 s3c_hsotg_ep0_mps(unsigned int mps) | |||
1716 | * Configure the maximum packet size for the given endpoint, updating | 1716 | * Configure the maximum packet size for the given endpoint, updating |
1717 | * the hardware control registers to reflect this. | 1717 | * the hardware control registers to reflect this. |
1718 | */ | 1718 | */ |
1719 | static void s3c_hsotg_set_ep_maxpacket(struct dwc2_hsotg *hsotg, | 1719 | static void dwc2_hsotg_set_ep_maxpacket(struct dwc2_hsotg *hsotg, |
1720 | unsigned int ep, unsigned int mps, unsigned int dir_in) | 1720 | unsigned int ep, unsigned int mps, unsigned int dir_in) |
1721 | { | 1721 | { |
1722 | struct s3c_hsotg_ep *hs_ep; | 1722 | struct dwc2_hsotg_ep *hs_ep; |
1723 | void __iomem *regs = hsotg->regs; | 1723 | void __iomem *regs = hsotg->regs; |
1724 | u32 mpsval; | 1724 | u32 mpsval; |
1725 | u32 mcval; | 1725 | u32 mcval; |
@@ -1731,7 +1731,7 @@ static void s3c_hsotg_set_ep_maxpacket(struct dwc2_hsotg *hsotg, | |||
1731 | 1731 | ||
1732 | if (ep == 0) { | 1732 | if (ep == 0) { |
1733 | /* EP0 is a special case */ | 1733 | /* EP0 is a special case */ |
1734 | mpsval = s3c_hsotg_ep0_mps(mps); | 1734 | mpsval = dwc2_hsotg_ep0_mps(mps); |
1735 | if (mpsval > 3) | 1735 | if (mpsval > 3) |
1736 | goto bad_mps; | 1736 | goto bad_mps; |
1737 | hs_ep->ep.maxpacket = mps; | 1737 | hs_ep->ep.maxpacket = mps; |
@@ -1766,11 +1766,11 @@ bad_mps: | |||
1766 | } | 1766 | } |
1767 | 1767 | ||
1768 | /** | 1768 | /** |
1769 | * s3c_hsotg_txfifo_flush - flush Tx FIFO | 1769 | * dwc2_hsotg_txfifo_flush - flush Tx FIFO |
1770 | * @hsotg: The driver state | 1770 | * @hsotg: The driver state |
1771 | * @idx: The index for the endpoint (0..15) | 1771 | * @idx: The index for the endpoint (0..15) |
1772 | */ | 1772 | */ |
1773 | static void s3c_hsotg_txfifo_flush(struct dwc2_hsotg *hsotg, unsigned int idx) | 1773 | static void dwc2_hsotg_txfifo_flush(struct dwc2_hsotg *hsotg, unsigned int idx) |
1774 | { | 1774 | { |
1775 | int timeout; | 1775 | int timeout; |
1776 | int val; | 1776 | int val; |
@@ -1799,17 +1799,17 @@ static void s3c_hsotg_txfifo_flush(struct dwc2_hsotg *hsotg, unsigned int idx) | |||
1799 | } | 1799 | } |
1800 | 1800 | ||
1801 | /** | 1801 | /** |
1802 | * s3c_hsotg_trytx - check to see if anything needs transmitting | 1802 | * dwc2_hsotg_trytx - check to see if anything needs transmitting |
1803 | * @hsotg: The driver state | 1803 | * @hsotg: The driver state |
1804 | * @hs_ep: The driver endpoint to check. | 1804 | * @hs_ep: The driver endpoint to check. |
1805 | * | 1805 | * |
1806 | * Check to see if there is a request that has data to send, and if so | 1806 | * Check to see if there is a request that has data to send, and if so |
1807 | * make an attempt to write data into the FIFO. | 1807 | * make an attempt to write data into the FIFO. |
1808 | */ | 1808 | */ |
1809 | static int s3c_hsotg_trytx(struct dwc2_hsotg *hsotg, | 1809 | static int dwc2_hsotg_trytx(struct dwc2_hsotg *hsotg, |
1810 | struct s3c_hsotg_ep *hs_ep) | 1810 | struct dwc2_hsotg_ep *hs_ep) |
1811 | { | 1811 | { |
1812 | struct s3c_hsotg_req *hs_req = hs_ep->req; | 1812 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
1813 | 1813 | ||
1814 | if (!hs_ep->dir_in || !hs_req) { | 1814 | if (!hs_ep->dir_in || !hs_req) { |
1815 | /** | 1815 | /** |
@@ -1817,7 +1817,7 @@ static int s3c_hsotg_trytx(struct dwc2_hsotg *hsotg, | |||
1817 | * for endpoints, excepting ep0 | 1817 | * for endpoints, excepting ep0 |
1818 | */ | 1818 | */ |
1819 | if (hs_ep->index != 0) | 1819 | if (hs_ep->index != 0) |
1820 | s3c_hsotg_ctrl_epint(hsotg, hs_ep->index, | 1820 | dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index, |
1821 | hs_ep->dir_in, 0); | 1821 | hs_ep->dir_in, 0); |
1822 | return 0; | 1822 | return 0; |
1823 | } | 1823 | } |
@@ -1825,24 +1825,24 @@ static int s3c_hsotg_trytx(struct dwc2_hsotg *hsotg, | |||
1825 | if (hs_req->req.actual < hs_req->req.length) { | 1825 | if (hs_req->req.actual < hs_req->req.length) { |
1826 | dev_dbg(hsotg->dev, "trying to write more for ep%d\n", | 1826 | dev_dbg(hsotg->dev, "trying to write more for ep%d\n", |
1827 | hs_ep->index); | 1827 | hs_ep->index); |
1828 | return s3c_hsotg_write_fifo(hsotg, hs_ep, hs_req); | 1828 | return dwc2_hsotg_write_fifo(hsotg, hs_ep, hs_req); |
1829 | } | 1829 | } |
1830 | 1830 | ||
1831 | return 0; | 1831 | return 0; |
1832 | } | 1832 | } |
1833 | 1833 | ||
1834 | /** | 1834 | /** |
1835 | * s3c_hsotg_complete_in - complete IN transfer | 1835 | * dwc2_hsotg_complete_in - complete IN transfer |
1836 | * @hsotg: The device state. | 1836 | * @hsotg: The device state. |
1837 | * @hs_ep: The endpoint that has just completed. | 1837 | * @hs_ep: The endpoint that has just completed. |
1838 | * | 1838 | * |
1839 | * An IN transfer has been completed, update the transfer's state and then | 1839 | * An IN transfer has been completed, update the transfer's state and then |
1840 | * call the relevant completion routines. | 1840 | * call the relevant completion routines. |
1841 | */ | 1841 | */ |
1842 | static void s3c_hsotg_complete_in(struct dwc2_hsotg *hsotg, | 1842 | static void dwc2_hsotg_complete_in(struct dwc2_hsotg *hsotg, |
1843 | struct s3c_hsotg_ep *hs_ep) | 1843 | struct dwc2_hsotg_ep *hs_ep) |
1844 | { | 1844 | { |
1845 | struct s3c_hsotg_req *hs_req = hs_ep->req; | 1845 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
1846 | u32 epsize = readl(hsotg->regs + DIEPTSIZ(hs_ep->index)); | 1846 | u32 epsize = readl(hsotg->regs + DIEPTSIZ(hs_ep->index)); |
1847 | int size_left, size_done; | 1847 | int size_left, size_done; |
1848 | 1848 | ||
@@ -1854,19 +1854,19 @@ static void s3c_hsotg_complete_in(struct dwc2_hsotg *hsotg, | |||
1854 | /* Finish ZLP handling for IN EP0 transactions */ | 1854 | /* Finish ZLP handling for IN EP0 transactions */ |
1855 | if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_IN) { | 1855 | if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_IN) { |
1856 | dev_dbg(hsotg->dev, "zlp packet sent\n"); | 1856 | dev_dbg(hsotg->dev, "zlp packet sent\n"); |
1857 | s3c_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); | 1857 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); |
1858 | if (hsotg->test_mode) { | 1858 | if (hsotg->test_mode) { |
1859 | int ret; | 1859 | int ret; |
1860 | 1860 | ||
1861 | ret = s3c_hsotg_set_test_mode(hsotg, hsotg->test_mode); | 1861 | ret = dwc2_hsotg_set_test_mode(hsotg, hsotg->test_mode); |
1862 | if (ret < 0) { | 1862 | if (ret < 0) { |
1863 | dev_dbg(hsotg->dev, "Invalid Test #%d\n", | 1863 | dev_dbg(hsotg->dev, "Invalid Test #%d\n", |
1864 | hsotg->test_mode); | 1864 | hsotg->test_mode); |
1865 | s3c_hsotg_stall_ep0(hsotg); | 1865 | dwc2_hsotg_stall_ep0(hsotg); |
1866 | return; | 1866 | return; |
1867 | } | 1867 | } |
1868 | } | 1868 | } |
1869 | s3c_hsotg_enqueue_setup(hsotg); | 1869 | dwc2_hsotg_enqueue_setup(hsotg); |
1870 | return; | 1870 | return; |
1871 | } | 1871 | } |
1872 | 1872 | ||
@@ -1895,13 +1895,13 @@ static void s3c_hsotg_complete_in(struct dwc2_hsotg *hsotg, | |||
1895 | 1895 | ||
1896 | if (!size_left && hs_req->req.actual < hs_req->req.length) { | 1896 | if (!size_left && hs_req->req.actual < hs_req->req.length) { |
1897 | dev_dbg(hsotg->dev, "%s trying more for req...\n", __func__); | 1897 | dev_dbg(hsotg->dev, "%s trying more for req...\n", __func__); |
1898 | s3c_hsotg_start_req(hsotg, hs_ep, hs_req, true); | 1898 | dwc2_hsotg_start_req(hsotg, hs_ep, hs_req, true); |
1899 | return; | 1899 | return; |
1900 | } | 1900 | } |
1901 | 1901 | ||
1902 | /* Zlp for all endpoints, for ep0 only in DATA IN stage */ | 1902 | /* Zlp for all endpoints, for ep0 only in DATA IN stage */ |
1903 | if (hs_ep->send_zlp) { | 1903 | if (hs_ep->send_zlp) { |
1904 | s3c_hsotg_program_zlp(hsotg, hs_ep); | 1904 | dwc2_hsotg_program_zlp(hsotg, hs_ep); |
1905 | hs_ep->send_zlp = 0; | 1905 | hs_ep->send_zlp = 0; |
1906 | /* transfer will be completed on next complete interrupt */ | 1906 | /* transfer will be completed on next complete interrupt */ |
1907 | return; | 1907 | return; |
@@ -1909,25 +1909,25 @@ static void s3c_hsotg_complete_in(struct dwc2_hsotg *hsotg, | |||
1909 | 1909 | ||
1910 | if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_DATA_IN) { | 1910 | if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_DATA_IN) { |
1911 | /* Move to STATUS OUT */ | 1911 | /* Move to STATUS OUT */ |
1912 | s3c_hsotg_ep0_zlp(hsotg, false); | 1912 | dwc2_hsotg_ep0_zlp(hsotg, false); |
1913 | return; | 1913 | return; |
1914 | } | 1914 | } |
1915 | 1915 | ||
1916 | s3c_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); | 1916 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); |
1917 | } | 1917 | } |
1918 | 1918 | ||
1919 | /** | 1919 | /** |
1920 | * s3c_hsotg_epint - handle an in/out endpoint interrupt | 1920 | * dwc2_hsotg_epint - handle an in/out endpoint interrupt |
1921 | * @hsotg: The driver state | 1921 | * @hsotg: The driver state |
1922 | * @idx: The index for the endpoint (0..15) | 1922 | * @idx: The index for the endpoint (0..15) |
1923 | * @dir_in: Set if this is an IN endpoint | 1923 | * @dir_in: Set if this is an IN endpoint |
1924 | * | 1924 | * |
1925 | * Process and clear any interrupt pending for an individual endpoint | 1925 | * Process and clear any interrupt pending for an individual endpoint |
1926 | */ | 1926 | */ |
1927 | static void s3c_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, | 1927 | static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, |
1928 | int dir_in) | 1928 | int dir_in) |
1929 | { | 1929 | { |
1930 | struct s3c_hsotg_ep *hs_ep = index_to_ep(hsotg, idx, dir_in); | 1930 | struct dwc2_hsotg_ep *hs_ep = index_to_ep(hsotg, idx, dir_in); |
1931 | u32 epint_reg = dir_in ? DIEPINT(idx) : DOEPINT(idx); | 1931 | u32 epint_reg = dir_in ? DIEPINT(idx) : DOEPINT(idx); |
1932 | u32 epctl_reg = dir_in ? DIEPCTL(idx) : DOEPCTL(idx); | 1932 | u32 epctl_reg = dir_in ? DIEPCTL(idx) : DOEPCTL(idx); |
1933 | u32 epsiz_reg = dir_in ? DIEPTSIZ(idx) : DOEPTSIZ(idx); | 1933 | u32 epsiz_reg = dir_in ? DIEPTSIZ(idx) : DOEPTSIZ(idx); |
@@ -1972,17 +1972,17 @@ static void s3c_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, | |||
1972 | * at completing IN requests here | 1972 | * at completing IN requests here |
1973 | */ | 1973 | */ |
1974 | if (dir_in) { | 1974 | if (dir_in) { |
1975 | s3c_hsotg_complete_in(hsotg, hs_ep); | 1975 | dwc2_hsotg_complete_in(hsotg, hs_ep); |
1976 | 1976 | ||
1977 | if (idx == 0 && !hs_ep->req) | 1977 | if (idx == 0 && !hs_ep->req) |
1978 | s3c_hsotg_enqueue_setup(hsotg); | 1978 | dwc2_hsotg_enqueue_setup(hsotg); |
1979 | } else if (using_dma(hsotg)) { | 1979 | } else if (using_dma(hsotg)) { |
1980 | /* | 1980 | /* |
1981 | * We're using DMA, we need to fire an OutDone here | 1981 | * We're using DMA, we need to fire an OutDone here |
1982 | * as we ignore the RXFIFO. | 1982 | * as we ignore the RXFIFO. |
1983 | */ | 1983 | */ |
1984 | 1984 | ||
1985 | s3c_hsotg_handle_outdone(hsotg, idx); | 1985 | dwc2_hsotg_handle_outdone(hsotg, idx); |
1986 | } | 1986 | } |
1987 | } | 1987 | } |
1988 | 1988 | ||
@@ -1992,7 +1992,7 @@ static void s3c_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, | |||
1992 | if (dir_in) { | 1992 | if (dir_in) { |
1993 | int epctl = readl(hsotg->regs + epctl_reg); | 1993 | int epctl = readl(hsotg->regs + epctl_reg); |
1994 | 1994 | ||
1995 | s3c_hsotg_txfifo_flush(hsotg, hs_ep->fifo_index); | 1995 | dwc2_hsotg_txfifo_flush(hsotg, hs_ep->fifo_index); |
1996 | 1996 | ||
1997 | if ((epctl & DXEPCTL_STALL) && | 1997 | if ((epctl & DXEPCTL_STALL) && |
1998 | (epctl & DXEPCTL_EPTYPE_BULK)) { | 1998 | (epctl & DXEPCTL_EPTYPE_BULK)) { |
@@ -2021,7 +2021,7 @@ static void s3c_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, | |||
2021 | if (dir_in) | 2021 | if (dir_in) |
2022 | WARN_ON_ONCE(1); | 2022 | WARN_ON_ONCE(1); |
2023 | else | 2023 | else |
2024 | s3c_hsotg_handle_outdone(hsotg, 0); | 2024 | dwc2_hsotg_handle_outdone(hsotg, 0); |
2025 | } | 2025 | } |
2026 | } | 2026 | } |
2027 | 2027 | ||
@@ -2047,19 +2047,19 @@ static void s3c_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, | |||
2047 | dev_dbg(hsotg->dev, "%s: ep%d: TxFIFOEmpty\n", | 2047 | dev_dbg(hsotg->dev, "%s: ep%d: TxFIFOEmpty\n", |
2048 | __func__, idx); | 2048 | __func__, idx); |
2049 | if (!using_dma(hsotg)) | 2049 | if (!using_dma(hsotg)) |
2050 | s3c_hsotg_trytx(hsotg, hs_ep); | 2050 | dwc2_hsotg_trytx(hsotg, hs_ep); |
2051 | } | 2051 | } |
2052 | } | 2052 | } |
2053 | } | 2053 | } |
2054 | 2054 | ||
2055 | /** | 2055 | /** |
2056 | * s3c_hsotg_irq_enumdone - Handle EnumDone interrupt (enumeration done) | 2056 | * dwc2_hsotg_irq_enumdone - Handle EnumDone interrupt (enumeration done) |
2057 | * @hsotg: The device state. | 2057 | * @hsotg: The device state. |
2058 | * | 2058 | * |
2059 | * Handle updating the device settings after the enumeration phase has | 2059 | * Handle updating the device settings after the enumeration phase has |
2060 | * been completed. | 2060 | * been completed. |
2061 | */ | 2061 | */ |
2062 | static void s3c_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg) | 2062 | static void dwc2_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg) |
2063 | { | 2063 | { |
2064 | u32 dsts = readl(hsotg->regs + DSTS); | 2064 | u32 dsts = readl(hsotg->regs + DSTS); |
2065 | int ep0_mps = 0, ep_mps = 8; | 2065 | int ep0_mps = 0, ep_mps = 8; |
@@ -2113,19 +2113,19 @@ static void s3c_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg) | |||
2113 | if (ep0_mps) { | 2113 | if (ep0_mps) { |
2114 | int i; | 2114 | int i; |
2115 | /* Initialize ep0 for both in and out directions */ | 2115 | /* Initialize ep0 for both in and out directions */ |
2116 | s3c_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 1); | 2116 | dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 1); |
2117 | s3c_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 0); | 2117 | dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 0); |
2118 | for (i = 1; i < hsotg->num_of_eps; i++) { | 2118 | for (i = 1; i < hsotg->num_of_eps; i++) { |
2119 | if (hsotg->eps_in[i]) | 2119 | if (hsotg->eps_in[i]) |
2120 | s3c_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 1); | 2120 | dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 1); |
2121 | if (hsotg->eps_out[i]) | 2121 | if (hsotg->eps_out[i]) |
2122 | s3c_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 0); | 2122 | dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 0); |
2123 | } | 2123 | } |
2124 | } | 2124 | } |
2125 | 2125 | ||
2126 | /* ensure after enumeration our EP0 is active */ | 2126 | /* ensure after enumeration our EP0 is active */ |
2127 | 2127 | ||
2128 | s3c_hsotg_enqueue_setup(hsotg); | 2128 | dwc2_hsotg_enqueue_setup(hsotg); |
2129 | 2129 | ||
2130 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", | 2130 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", |
2131 | readl(hsotg->regs + DIEPCTL0), | 2131 | readl(hsotg->regs + DIEPCTL0), |
@@ -2142,34 +2142,34 @@ static void s3c_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg) | |||
2142 | * completed with the given result code. | 2142 | * completed with the given result code. |
2143 | */ | 2143 | */ |
2144 | static void kill_all_requests(struct dwc2_hsotg *hsotg, | 2144 | static void kill_all_requests(struct dwc2_hsotg *hsotg, |
2145 | struct s3c_hsotg_ep *ep, | 2145 | struct dwc2_hsotg_ep *ep, |
2146 | int result) | 2146 | int result) |
2147 | { | 2147 | { |
2148 | struct s3c_hsotg_req *req, *treq; | 2148 | struct dwc2_hsotg_req *req, *treq; |
2149 | unsigned size; | 2149 | unsigned size; |
2150 | 2150 | ||
2151 | ep->req = NULL; | 2151 | ep->req = NULL; |
2152 | 2152 | ||
2153 | list_for_each_entry_safe(req, treq, &ep->queue, queue) | 2153 | list_for_each_entry_safe(req, treq, &ep->queue, queue) |
2154 | s3c_hsotg_complete_request(hsotg, ep, req, | 2154 | dwc2_hsotg_complete_request(hsotg, ep, req, |
2155 | result); | 2155 | result); |
2156 | 2156 | ||
2157 | if (!hsotg->dedicated_fifos) | 2157 | if (!hsotg->dedicated_fifos) |
2158 | return; | 2158 | return; |
2159 | size = (readl(hsotg->regs + DTXFSTS(ep->index)) & 0xffff) * 4; | 2159 | size = (readl(hsotg->regs + DTXFSTS(ep->index)) & 0xffff) * 4; |
2160 | if (size < ep->fifo_size) | 2160 | if (size < ep->fifo_size) |
2161 | s3c_hsotg_txfifo_flush(hsotg, ep->fifo_index); | 2161 | dwc2_hsotg_txfifo_flush(hsotg, ep->fifo_index); |
2162 | } | 2162 | } |
2163 | 2163 | ||
2164 | /** | 2164 | /** |
2165 | * s3c_hsotg_disconnect - disconnect service | 2165 | * dwc2_hsotg_disconnect - disconnect service |
2166 | * @hsotg: The device state. | 2166 | * @hsotg: The device state. |
2167 | * | 2167 | * |
2168 | * The device has been disconnected. Remove all current | 2168 | * The device has been disconnected. Remove all current |
2169 | * transactions and signal the gadget driver that this | 2169 | * transactions and signal the gadget driver that this |
2170 | * has happened. | 2170 | * has happened. |
2171 | */ | 2171 | */ |
2172 | void s3c_hsotg_disconnect(struct dwc2_hsotg *hsotg) | 2172 | void dwc2_hsotg_disconnect(struct dwc2_hsotg *hsotg) |
2173 | { | 2173 | { |
2174 | unsigned ep; | 2174 | unsigned ep; |
2175 | 2175 | ||
@@ -2192,13 +2192,13 @@ void s3c_hsotg_disconnect(struct dwc2_hsotg *hsotg) | |||
2192 | } | 2192 | } |
2193 | 2193 | ||
2194 | /** | 2194 | /** |
2195 | * s3c_hsotg_irq_fifoempty - TX FIFO empty interrupt handler | 2195 | * dwc2_hsotg_irq_fifoempty - TX FIFO empty interrupt handler |
2196 | * @hsotg: The device state: | 2196 | * @hsotg: The device state: |
2197 | * @periodic: True if this is a periodic FIFO interrupt | 2197 | * @periodic: True if this is a periodic FIFO interrupt |
2198 | */ | 2198 | */ |
2199 | static void s3c_hsotg_irq_fifoempty(struct dwc2_hsotg *hsotg, bool periodic) | 2199 | static void dwc2_hsotg_irq_fifoempty(struct dwc2_hsotg *hsotg, bool periodic) |
2200 | { | 2200 | { |
2201 | struct s3c_hsotg_ep *ep; | 2201 | struct dwc2_hsotg_ep *ep; |
2202 | int epno, ret; | 2202 | int epno, ret; |
2203 | 2203 | ||
2204 | /* look through for any more data to transmit */ | 2204 | /* look through for any more data to transmit */ |
@@ -2215,7 +2215,7 @@ static void s3c_hsotg_irq_fifoempty(struct dwc2_hsotg *hsotg, bool periodic) | |||
2215 | (!periodic && ep->periodic)) | 2215 | (!periodic && ep->periodic)) |
2216 | continue; | 2216 | continue; |
2217 | 2217 | ||
2218 | ret = s3c_hsotg_trytx(hsotg, ep); | 2218 | ret = dwc2_hsotg_trytx(hsotg, ep); |
2219 | if (ret < 0) | 2219 | if (ret < 0) |
2220 | break; | 2220 | break; |
2221 | } | 2221 | } |
@@ -2227,12 +2227,12 @@ static void s3c_hsotg_irq_fifoempty(struct dwc2_hsotg *hsotg, bool periodic) | |||
2227 | GINTSTS_RXFLVL) | 2227 | GINTSTS_RXFLVL) |
2228 | 2228 | ||
2229 | /** | 2229 | /** |
2230 | * s3c_hsotg_corereset - issue softreset to the core | 2230 | * dwc2_hsotg_corereset - issue softreset to the core |
2231 | * @hsotg: The device state | 2231 | * @hsotg: The device state |
2232 | * | 2232 | * |
2233 | * Issue a soft reset to the core, and await the core finishing it. | 2233 | * Issue a soft reset to the core, and await the core finishing it. |
2234 | */ | 2234 | */ |
2235 | static int s3c_hsotg_corereset(struct dwc2_hsotg *hsotg) | 2235 | static int dwc2_hsotg_corereset(struct dwc2_hsotg *hsotg) |
2236 | { | 2236 | { |
2237 | int timeout; | 2237 | int timeout; |
2238 | u32 grstctl; | 2238 | u32 grstctl; |
@@ -2275,18 +2275,18 @@ static int s3c_hsotg_corereset(struct dwc2_hsotg *hsotg) | |||
2275 | } | 2275 | } |
2276 | 2276 | ||
2277 | /** | 2277 | /** |
2278 | * s3c_hsotg_core_init - issue softreset to the core | 2278 | * dwc2_hsotg_core_init - issue softreset to the core |
2279 | * @hsotg: The device state | 2279 | * @hsotg: The device state |
2280 | * | 2280 | * |
2281 | * Issue a soft reset to the core, and await the core finishing it. | 2281 | * Issue a soft reset to the core, and await the core finishing it. |
2282 | */ | 2282 | */ |
2283 | void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, | 2283 | void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, |
2284 | bool is_usb_reset) | 2284 | bool is_usb_reset) |
2285 | { | 2285 | { |
2286 | u32 val; | 2286 | u32 val; |
2287 | 2287 | ||
2288 | if (!is_usb_reset) | 2288 | if (!is_usb_reset) |
2289 | s3c_hsotg_corereset(hsotg); | 2289 | dwc2_hsotg_corereset(hsotg); |
2290 | 2290 | ||
2291 | /* | 2291 | /* |
2292 | * we must now enable ep0 ready for host detection and then | 2292 | * we must now enable ep0 ready for host detection and then |
@@ -2298,7 +2298,7 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, | |||
2298 | writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) | | 2298 | writel(hsotg->phyif | GUSBCFG_TOUTCAL(7) | |
2299 | (val << GUSBCFG_USBTRDTIM_SHIFT), hsotg->regs + GUSBCFG); | 2299 | (val << GUSBCFG_USBTRDTIM_SHIFT), hsotg->regs + GUSBCFG); |
2300 | 2300 | ||
2301 | s3c_hsotg_init_fifo(hsotg); | 2301 | dwc2_hsotg_init_fifo(hsotg); |
2302 | 2302 | ||
2303 | if (!is_usb_reset) | 2303 | if (!is_usb_reset) |
2304 | __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); | 2304 | __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); |
@@ -2359,7 +2359,7 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, | |||
2359 | readl(hsotg->regs + DOEPCTL0)); | 2359 | readl(hsotg->regs + DOEPCTL0)); |
2360 | 2360 | ||
2361 | /* enable in and out endpoint interrupts */ | 2361 | /* enable in and out endpoint interrupts */ |
2362 | s3c_hsotg_en_gsint(hsotg, GINTSTS_OEPINT | GINTSTS_IEPINT); | 2362 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_OEPINT | GINTSTS_IEPINT); |
2363 | 2363 | ||
2364 | /* | 2364 | /* |
2365 | * Enable the RXFIFO when in slave mode, as this is how we collect | 2365 | * Enable the RXFIFO when in slave mode, as this is how we collect |
@@ -2367,11 +2367,11 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, | |||
2367 | * things we cannot process, so do not use it. | 2367 | * things we cannot process, so do not use it. |
2368 | */ | 2368 | */ |
2369 | if (!using_dma(hsotg)) | 2369 | if (!using_dma(hsotg)) |
2370 | s3c_hsotg_en_gsint(hsotg, GINTSTS_RXFLVL); | 2370 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_RXFLVL); |
2371 | 2371 | ||
2372 | /* Enable interrupts for EP0 in and out */ | 2372 | /* Enable interrupts for EP0 in and out */ |
2373 | s3c_hsotg_ctrl_epint(hsotg, 0, 0, 1); | 2373 | dwc2_hsotg_ctrl_epint(hsotg, 0, 0, 1); |
2374 | s3c_hsotg_ctrl_epint(hsotg, 0, 1, 1); | 2374 | dwc2_hsotg_ctrl_epint(hsotg, 0, 1, 1); |
2375 | 2375 | ||
2376 | if (!is_usb_reset) { | 2376 | if (!is_usb_reset) { |
2377 | __orr32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE); | 2377 | __orr32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE); |
@@ -2390,16 +2390,16 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, | |||
2390 | writel(DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) | | 2390 | writel(DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) | |
2391 | DXEPTSIZ_XFERSIZE(8), hsotg->regs + DOEPTSIZ0); | 2391 | DXEPTSIZ_XFERSIZE(8), hsotg->regs + DOEPTSIZ0); |
2392 | 2392 | ||
2393 | writel(s3c_hsotg_ep0_mps(hsotg->eps_out[0]->ep.maxpacket) | | 2393 | writel(dwc2_hsotg_ep0_mps(hsotg->eps_out[0]->ep.maxpacket) | |
2394 | DXEPCTL_CNAK | DXEPCTL_EPENA | | 2394 | DXEPCTL_CNAK | DXEPCTL_EPENA | |
2395 | DXEPCTL_USBACTEP, | 2395 | DXEPCTL_USBACTEP, |
2396 | hsotg->regs + DOEPCTL0); | 2396 | hsotg->regs + DOEPCTL0); |
2397 | 2397 | ||
2398 | /* enable, but don't activate EP0in */ | 2398 | /* enable, but don't activate EP0in */ |
2399 | writel(s3c_hsotg_ep0_mps(hsotg->eps_out[0]->ep.maxpacket) | | 2399 | writel(dwc2_hsotg_ep0_mps(hsotg->eps_out[0]->ep.maxpacket) | |
2400 | DXEPCTL_USBACTEP, hsotg->regs + DIEPCTL0); | 2400 | DXEPCTL_USBACTEP, hsotg->regs + DIEPCTL0); |
2401 | 2401 | ||
2402 | s3c_hsotg_enqueue_setup(hsotg); | 2402 | dwc2_hsotg_enqueue_setup(hsotg); |
2403 | 2403 | ||
2404 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", | 2404 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", |
2405 | readl(hsotg->regs + DIEPCTL0), | 2405 | readl(hsotg->regs + DIEPCTL0), |
@@ -2417,24 +2417,24 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, | |||
2417 | hsotg->last_rst = jiffies; | 2417 | hsotg->last_rst = jiffies; |
2418 | } | 2418 | } |
2419 | 2419 | ||
2420 | static void s3c_hsotg_core_disconnect(struct dwc2_hsotg *hsotg) | 2420 | static void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg) |
2421 | { | 2421 | { |
2422 | /* set the soft-disconnect bit */ | 2422 | /* set the soft-disconnect bit */ |
2423 | __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); | 2423 | __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); |
2424 | } | 2424 | } |
2425 | 2425 | ||
2426 | void s3c_hsotg_core_connect(struct dwc2_hsotg *hsotg) | 2426 | void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg) |
2427 | { | 2427 | { |
2428 | /* remove the soft-disconnect and let's go */ | 2428 | /* remove the soft-disconnect and let's go */ |
2429 | __bic32(hsotg->regs + DCTL, DCTL_SFTDISCON); | 2429 | __bic32(hsotg->regs + DCTL, DCTL_SFTDISCON); |
2430 | } | 2430 | } |
2431 | 2431 | ||
2432 | /** | 2432 | /** |
2433 | * s3c_hsotg_irq - handle device interrupt | 2433 | * dwc2_hsotg_irq - handle device interrupt |
2434 | * @irq: The IRQ number triggered | 2434 | * @irq: The IRQ number triggered |
2435 | * @pw: The pw value when registered the handler. | 2435 | * @pw: The pw value when registered the handler. |
2436 | */ | 2436 | */ |
2437 | static irqreturn_t s3c_hsotg_irq(int irq, void *pw) | 2437 | static irqreturn_t dwc2_hsotg_irq(int irq, void *pw) |
2438 | { | 2438 | { |
2439 | struct dwc2_hsotg *hsotg = pw; | 2439 | struct dwc2_hsotg *hsotg = pw; |
2440 | int retry_count = 8; | 2440 | int retry_count = 8; |
@@ -2454,7 +2454,7 @@ irq_retry: | |||
2454 | if (gintsts & GINTSTS_ENUMDONE) { | 2454 | if (gintsts & GINTSTS_ENUMDONE) { |
2455 | writel(GINTSTS_ENUMDONE, hsotg->regs + GINTSTS); | 2455 | writel(GINTSTS_ENUMDONE, hsotg->regs + GINTSTS); |
2456 | 2456 | ||
2457 | s3c_hsotg_irq_enumdone(hsotg); | 2457 | dwc2_hsotg_irq_enumdone(hsotg); |
2458 | } | 2458 | } |
2459 | 2459 | ||
2460 | if (gintsts & (GINTSTS_OEPINT | GINTSTS_IEPINT)) { | 2460 | if (gintsts & (GINTSTS_OEPINT | GINTSTS_IEPINT)) { |
@@ -2472,13 +2472,13 @@ irq_retry: | |||
2472 | for (ep = 0; ep < hsotg->num_of_eps && daint_out; | 2472 | for (ep = 0; ep < hsotg->num_of_eps && daint_out; |
2473 | ep++, daint_out >>= 1) { | 2473 | ep++, daint_out >>= 1) { |
2474 | if (daint_out & 1) | 2474 | if (daint_out & 1) |
2475 | s3c_hsotg_epint(hsotg, ep, 0); | 2475 | dwc2_hsotg_epint(hsotg, ep, 0); |
2476 | } | 2476 | } |
2477 | 2477 | ||
2478 | for (ep = 0; ep < hsotg->num_of_eps && daint_in; | 2478 | for (ep = 0; ep < hsotg->num_of_eps && daint_in; |
2479 | ep++, daint_in >>= 1) { | 2479 | ep++, daint_in >>= 1) { |
2480 | if (daint_in & 1) | 2480 | if (daint_in & 1) |
2481 | s3c_hsotg_epint(hsotg, ep, 1); | 2481 | dwc2_hsotg_epint(hsotg, ep, 1); |
2482 | } | 2482 | } |
2483 | } | 2483 | } |
2484 | 2484 | ||
@@ -2505,7 +2505,7 @@ irq_retry: | |||
2505 | writel(GINTSTS_USBRST, hsotg->regs + GINTSTS); | 2505 | writel(GINTSTS_USBRST, hsotg->regs + GINTSTS); |
2506 | 2506 | ||
2507 | /* Report disconnection if it is not already done. */ | 2507 | /* Report disconnection if it is not already done. */ |
2508 | s3c_hsotg_disconnect(hsotg); | 2508 | dwc2_hsotg_disconnect(hsotg); |
2509 | 2509 | ||
2510 | if (usb_status & GOTGCTL_BSESVLD) { | 2510 | if (usb_status & GOTGCTL_BSESVLD) { |
2511 | if (time_after(jiffies, hsotg->last_rst + | 2511 | if (time_after(jiffies, hsotg->last_rst + |
@@ -2515,7 +2515,7 @@ irq_retry: | |||
2515 | -ECONNRESET); | 2515 | -ECONNRESET); |
2516 | 2516 | ||
2517 | hsotg->lx_state = DWC2_L0; | 2517 | hsotg->lx_state = DWC2_L0; |
2518 | s3c_hsotg_core_init_disconnected(hsotg, true); | 2518 | dwc2_hsotg_core_init_disconnected(hsotg, true); |
2519 | } | 2519 | } |
2520 | } | 2520 | } |
2521 | } | 2521 | } |
@@ -2531,8 +2531,8 @@ irq_retry: | |||
2531 | * it needs re-enabling | 2531 | * it needs re-enabling |
2532 | */ | 2532 | */ |
2533 | 2533 | ||
2534 | s3c_hsotg_disable_gsint(hsotg, GINTSTS_NPTXFEMP); | 2534 | dwc2_hsotg_disable_gsint(hsotg, GINTSTS_NPTXFEMP); |
2535 | s3c_hsotg_irq_fifoempty(hsotg, false); | 2535 | dwc2_hsotg_irq_fifoempty(hsotg, false); |
2536 | } | 2536 | } |
2537 | 2537 | ||
2538 | if (gintsts & GINTSTS_PTXFEMP) { | 2538 | if (gintsts & GINTSTS_PTXFEMP) { |
@@ -2540,18 +2540,18 @@ irq_retry: | |||
2540 | 2540 | ||
2541 | /* See note in GINTSTS_NPTxFEmp */ | 2541 | /* See note in GINTSTS_NPTxFEmp */ |
2542 | 2542 | ||
2543 | s3c_hsotg_disable_gsint(hsotg, GINTSTS_PTXFEMP); | 2543 | dwc2_hsotg_disable_gsint(hsotg, GINTSTS_PTXFEMP); |
2544 | s3c_hsotg_irq_fifoempty(hsotg, true); | 2544 | dwc2_hsotg_irq_fifoempty(hsotg, true); |
2545 | } | 2545 | } |
2546 | 2546 | ||
2547 | if (gintsts & GINTSTS_RXFLVL) { | 2547 | if (gintsts & GINTSTS_RXFLVL) { |
2548 | /* | 2548 | /* |
2549 | * note, since GINTSTS_RxFLvl doubles as FIFO-not-empty, | 2549 | * note, since GINTSTS_RxFLvl doubles as FIFO-not-empty, |
2550 | * we need to retry s3c_hsotg_handle_rx if this is still | 2550 | * we need to retry dwc2_hsotg_handle_rx if this is still |
2551 | * set. | 2551 | * set. |
2552 | */ | 2552 | */ |
2553 | 2553 | ||
2554 | s3c_hsotg_handle_rx(hsotg); | 2554 | dwc2_hsotg_handle_rx(hsotg); |
2555 | } | 2555 | } |
2556 | 2556 | ||
2557 | if (gintsts & GINTSTS_ERLYSUSP) { | 2557 | if (gintsts & GINTSTS_ERLYSUSP) { |
@@ -2570,7 +2570,7 @@ irq_retry: | |||
2570 | 2570 | ||
2571 | writel(DCTL_CGOUTNAK, hsotg->regs + DCTL); | 2571 | writel(DCTL_CGOUTNAK, hsotg->regs + DCTL); |
2572 | 2572 | ||
2573 | s3c_hsotg_dump(hsotg); | 2573 | dwc2_hsotg_dump(hsotg); |
2574 | } | 2574 | } |
2575 | 2575 | ||
2576 | if (gintsts & GINTSTS_GINNAKEFF) { | 2576 | if (gintsts & GINTSTS_GINNAKEFF) { |
@@ -2578,7 +2578,7 @@ irq_retry: | |||
2578 | 2578 | ||
2579 | writel(DCTL_CGNPINNAK, hsotg->regs + DCTL); | 2579 | writel(DCTL_CGNPINNAK, hsotg->regs + DCTL); |
2580 | 2580 | ||
2581 | s3c_hsotg_dump(hsotg); | 2581 | dwc2_hsotg_dump(hsotg); |
2582 | } | 2582 | } |
2583 | 2583 | ||
2584 | /* | 2584 | /* |
@@ -2595,16 +2595,16 @@ irq_retry: | |||
2595 | } | 2595 | } |
2596 | 2596 | ||
2597 | /** | 2597 | /** |
2598 | * s3c_hsotg_ep_enable - enable the given endpoint | 2598 | * dwc2_hsotg_ep_enable - enable the given endpoint |
2599 | * @ep: The USB endpint to configure | 2599 | * @ep: The USB endpint to configure |
2600 | * @desc: The USB endpoint descriptor to configure with. | 2600 | * @desc: The USB endpoint descriptor to configure with. |
2601 | * | 2601 | * |
2602 | * This is called from the USB gadget code's usb_ep_enable(). | 2602 | * This is called from the USB gadget code's usb_ep_enable(). |
2603 | */ | 2603 | */ |
2604 | static int s3c_hsotg_ep_enable(struct usb_ep *ep, | 2604 | static int dwc2_hsotg_ep_enable(struct usb_ep *ep, |
2605 | const struct usb_endpoint_descriptor *desc) | 2605 | const struct usb_endpoint_descriptor *desc) |
2606 | { | 2606 | { |
2607 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 2607 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
2608 | struct dwc2_hsotg *hsotg = hs_ep->parent; | 2608 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
2609 | unsigned long flags; | 2609 | unsigned long flags; |
2610 | unsigned int index = hs_ep->index; | 2610 | unsigned int index = hs_ep->index; |
@@ -2631,7 +2631,7 @@ static int s3c_hsotg_ep_enable(struct usb_ep *ep, | |||
2631 | 2631 | ||
2632 | mps = usb_endpoint_maxp(desc); | 2632 | mps = usb_endpoint_maxp(desc); |
2633 | 2633 | ||
2634 | /* note, we handle this here instead of s3c_hsotg_set_ep_maxpacket */ | 2634 | /* note, we handle this here instead of dwc2_hsotg_set_ep_maxpacket */ |
2635 | 2635 | ||
2636 | epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); | 2636 | epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); |
2637 | epctrl = readl(hsotg->regs + epctrl_reg); | 2637 | epctrl = readl(hsotg->regs + epctrl_reg); |
@@ -2660,7 +2660,7 @@ static int s3c_hsotg_ep_enable(struct usb_ep *ep, | |||
2660 | epctrl |= DXEPCTL_SNAK; | 2660 | epctrl |= DXEPCTL_SNAK; |
2661 | 2661 | ||
2662 | /* update the endpoint state */ | 2662 | /* update the endpoint state */ |
2663 | s3c_hsotg_set_ep_maxpacket(hsotg, hs_ep->index, mps, dir_in); | 2663 | dwc2_hsotg_set_ep_maxpacket(hsotg, hs_ep->index, mps, dir_in); |
2664 | 2664 | ||
2665 | /* default, set to non-periodic */ | 2665 | /* default, set to non-periodic */ |
2666 | hs_ep->isochronous = 0; | 2666 | hs_ep->isochronous = 0; |
@@ -2752,7 +2752,7 @@ static int s3c_hsotg_ep_enable(struct usb_ep *ep, | |||
2752 | __func__, readl(hsotg->regs + epctrl_reg)); | 2752 | __func__, readl(hsotg->regs + epctrl_reg)); |
2753 | 2753 | ||
2754 | /* enable the endpoint interrupt */ | 2754 | /* enable the endpoint interrupt */ |
2755 | s3c_hsotg_ctrl_epint(hsotg, index, dir_in, 1); | 2755 | dwc2_hsotg_ctrl_epint(hsotg, index, dir_in, 1); |
2756 | 2756 | ||
2757 | error: | 2757 | error: |
2758 | spin_unlock_irqrestore(&hsotg->lock, flags); | 2758 | spin_unlock_irqrestore(&hsotg->lock, flags); |
@@ -2760,12 +2760,12 @@ error: | |||
2760 | } | 2760 | } |
2761 | 2761 | ||
2762 | /** | 2762 | /** |
2763 | * s3c_hsotg_ep_disable - disable given endpoint | 2763 | * dwc2_hsotg_ep_disable - disable given endpoint |
2764 | * @ep: The endpoint to disable. | 2764 | * @ep: The endpoint to disable. |
2765 | */ | 2765 | */ |
2766 | static int s3c_hsotg_ep_disable(struct usb_ep *ep) | 2766 | static int dwc2_hsotg_ep_disable(struct usb_ep *ep) |
2767 | { | 2767 | { |
2768 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 2768 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
2769 | struct dwc2_hsotg *hsotg = hs_ep->parent; | 2769 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
2770 | int dir_in = hs_ep->dir_in; | 2770 | int dir_in = hs_ep->dir_in; |
2771 | int index = hs_ep->index; | 2771 | int index = hs_ep->index; |
@@ -2797,7 +2797,7 @@ static int s3c_hsotg_ep_disable(struct usb_ep *ep) | |||
2797 | writel(ctrl, hsotg->regs + epctrl_reg); | 2797 | writel(ctrl, hsotg->regs + epctrl_reg); |
2798 | 2798 | ||
2799 | /* disable endpoint interrupts */ | 2799 | /* disable endpoint interrupts */ |
2800 | s3c_hsotg_ctrl_epint(hsotg, hs_ep->index, hs_ep->dir_in, 0); | 2800 | dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index, hs_ep->dir_in, 0); |
2801 | 2801 | ||
2802 | /* terminate all requests with shutdown */ | 2802 | /* terminate all requests with shutdown */ |
2803 | kill_all_requests(hsotg, hs_ep, -ESHUTDOWN); | 2803 | kill_all_requests(hsotg, hs_ep, -ESHUTDOWN); |
@@ -2811,9 +2811,9 @@ static int s3c_hsotg_ep_disable(struct usb_ep *ep) | |||
2811 | * @ep: The endpoint to check. | 2811 | * @ep: The endpoint to check. |
2812 | * @test: The request to test if it is on the endpoint. | 2812 | * @test: The request to test if it is on the endpoint. |
2813 | */ | 2813 | */ |
2814 | static bool on_list(struct s3c_hsotg_ep *ep, struct s3c_hsotg_req *test) | 2814 | static bool on_list(struct dwc2_hsotg_ep *ep, struct dwc2_hsotg_req *test) |
2815 | { | 2815 | { |
2816 | struct s3c_hsotg_req *req, *treq; | 2816 | struct dwc2_hsotg_req *req, *treq; |
2817 | 2817 | ||
2818 | list_for_each_entry_safe(req, treq, &ep->queue, queue) { | 2818 | list_for_each_entry_safe(req, treq, &ep->queue, queue) { |
2819 | if (req == test) | 2819 | if (req == test) |
@@ -2824,14 +2824,14 @@ static bool on_list(struct s3c_hsotg_ep *ep, struct s3c_hsotg_req *test) | |||
2824 | } | 2824 | } |
2825 | 2825 | ||
2826 | /** | 2826 | /** |
2827 | * s3c_hsotg_ep_dequeue - dequeue given endpoint | 2827 | * dwc2_hsotg_ep_dequeue - dequeue given endpoint |
2828 | * @ep: The endpoint to dequeue. | 2828 | * @ep: The endpoint to dequeue. |
2829 | * @req: The request to be removed from a queue. | 2829 | * @req: The request to be removed from a queue. |
2830 | */ | 2830 | */ |
2831 | static int s3c_hsotg_ep_dequeue(struct usb_ep *ep, struct usb_request *req) | 2831 | static int dwc2_hsotg_ep_dequeue(struct usb_ep *ep, struct usb_request *req) |
2832 | { | 2832 | { |
2833 | struct s3c_hsotg_req *hs_req = our_req(req); | 2833 | struct dwc2_hsotg_req *hs_req = our_req(req); |
2834 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 2834 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
2835 | struct dwc2_hsotg *hs = hs_ep->parent; | 2835 | struct dwc2_hsotg *hs = hs_ep->parent; |
2836 | unsigned long flags; | 2836 | unsigned long flags; |
2837 | 2837 | ||
@@ -2844,20 +2844,20 @@ static int s3c_hsotg_ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |||
2844 | return -EINVAL; | 2844 | return -EINVAL; |
2845 | } | 2845 | } |
2846 | 2846 | ||
2847 | s3c_hsotg_complete_request(hs, hs_ep, hs_req, -ECONNRESET); | 2847 | dwc2_hsotg_complete_request(hs, hs_ep, hs_req, -ECONNRESET); |
2848 | spin_unlock_irqrestore(&hs->lock, flags); | 2848 | spin_unlock_irqrestore(&hs->lock, flags); |
2849 | 2849 | ||
2850 | return 0; | 2850 | return 0; |
2851 | } | 2851 | } |
2852 | 2852 | ||
2853 | /** | 2853 | /** |
2854 | * s3c_hsotg_ep_sethalt - set halt on a given endpoint | 2854 | * dwc2_hsotg_ep_sethalt - set halt on a given endpoint |
2855 | * @ep: The endpoint to set halt. | 2855 | * @ep: The endpoint to set halt. |
2856 | * @value: Set or unset the halt. | 2856 | * @value: Set or unset the halt. |
2857 | */ | 2857 | */ |
2858 | static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value) | 2858 | static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value) |
2859 | { | 2859 | { |
2860 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 2860 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
2861 | struct dwc2_hsotg *hs = hs_ep->parent; | 2861 | struct dwc2_hsotg *hs = hs_ep->parent; |
2862 | int index = hs_ep->index; | 2862 | int index = hs_ep->index; |
2863 | u32 epreg; | 2863 | u32 epreg; |
@@ -2868,7 +2868,7 @@ static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value) | |||
2868 | 2868 | ||
2869 | if (index == 0) { | 2869 | if (index == 0) { |
2870 | if (value) | 2870 | if (value) |
2871 | s3c_hsotg_stall_ep0(hs); | 2871 | dwc2_hsotg_stall_ep0(hs); |
2872 | else | 2872 | else |
2873 | dev_warn(hs->dev, | 2873 | dev_warn(hs->dev, |
2874 | "%s: can't clear halt on ep0\n", __func__); | 2874 | "%s: can't clear halt on ep0\n", __func__); |
@@ -2914,43 +2914,43 @@ static int s3c_hsotg_ep_sethalt(struct usb_ep *ep, int value) | |||
2914 | } | 2914 | } |
2915 | 2915 | ||
2916 | /** | 2916 | /** |
2917 | * s3c_hsotg_ep_sethalt_lock - set halt on a given endpoint with lock held | 2917 | * dwc2_hsotg_ep_sethalt_lock - set halt on a given endpoint with lock held |
2918 | * @ep: The endpoint to set halt. | 2918 | * @ep: The endpoint to set halt. |
2919 | * @value: Set or unset the halt. | 2919 | * @value: Set or unset the halt. |
2920 | */ | 2920 | */ |
2921 | static int s3c_hsotg_ep_sethalt_lock(struct usb_ep *ep, int value) | 2921 | static int dwc2_hsotg_ep_sethalt_lock(struct usb_ep *ep, int value) |
2922 | { | 2922 | { |
2923 | struct s3c_hsotg_ep *hs_ep = our_ep(ep); | 2923 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
2924 | struct dwc2_hsotg *hs = hs_ep->parent; | 2924 | struct dwc2_hsotg *hs = hs_ep->parent; |
2925 | unsigned long flags = 0; | 2925 | unsigned long flags = 0; |
2926 | int ret = 0; | 2926 | int ret = 0; |
2927 | 2927 | ||
2928 | spin_lock_irqsave(&hs->lock, flags); | 2928 | spin_lock_irqsave(&hs->lock, flags); |
2929 | ret = s3c_hsotg_ep_sethalt(ep, value); | 2929 | ret = dwc2_hsotg_ep_sethalt(ep, value); |
2930 | spin_unlock_irqrestore(&hs->lock, flags); | 2930 | spin_unlock_irqrestore(&hs->lock, flags); |
2931 | 2931 | ||
2932 | return ret; | 2932 | return ret; |
2933 | } | 2933 | } |
2934 | 2934 | ||
2935 | static struct usb_ep_ops s3c_hsotg_ep_ops = { | 2935 | static struct usb_ep_ops dwc2_hsotg_ep_ops = { |
2936 | .enable = s3c_hsotg_ep_enable, | 2936 | .enable = dwc2_hsotg_ep_enable, |
2937 | .disable = s3c_hsotg_ep_disable, | 2937 | .disable = dwc2_hsotg_ep_disable, |
2938 | .alloc_request = s3c_hsotg_ep_alloc_request, | 2938 | .alloc_request = dwc2_hsotg_ep_alloc_request, |
2939 | .free_request = s3c_hsotg_ep_free_request, | 2939 | .free_request = dwc2_hsotg_ep_free_request, |
2940 | .queue = s3c_hsotg_ep_queue_lock, | 2940 | .queue = dwc2_hsotg_ep_queue_lock, |
2941 | .dequeue = s3c_hsotg_ep_dequeue, | 2941 | .dequeue = dwc2_hsotg_ep_dequeue, |
2942 | .set_halt = s3c_hsotg_ep_sethalt_lock, | 2942 | .set_halt = dwc2_hsotg_ep_sethalt_lock, |
2943 | /* note, don't believe we have any call for the fifo routines */ | 2943 | /* note, don't believe we have any call for the fifo routines */ |
2944 | }; | 2944 | }; |
2945 | 2945 | ||
2946 | /** | 2946 | /** |
2947 | * s3c_hsotg_phy_enable - enable platform phy dev | 2947 | * dwc2_hsotg_phy_enable - enable platform phy dev |
2948 | * @hsotg: The driver state | 2948 | * @hsotg: The driver state |
2949 | * | 2949 | * |
2950 | * A wrapper for platform code responsible for controlling | 2950 | * A wrapper for platform code responsible for controlling |
2951 | * low-level USB code | 2951 | * low-level USB code |
2952 | */ | 2952 | */ |
2953 | static void s3c_hsotg_phy_enable(struct dwc2_hsotg *hsotg) | 2953 | static void dwc2_hsotg_phy_enable(struct dwc2_hsotg *hsotg) |
2954 | { | 2954 | { |
2955 | struct platform_device *pdev = to_platform_device(hsotg->dev); | 2955 | struct platform_device *pdev = to_platform_device(hsotg->dev); |
2956 | 2956 | ||
@@ -2967,13 +2967,13 @@ static void s3c_hsotg_phy_enable(struct dwc2_hsotg *hsotg) | |||
2967 | } | 2967 | } |
2968 | 2968 | ||
2969 | /** | 2969 | /** |
2970 | * s3c_hsotg_phy_disable - disable platform phy dev | 2970 | * dwc2_hsotg_phy_disable - disable platform phy dev |
2971 | * @hsotg: The driver state | 2971 | * @hsotg: The driver state |
2972 | * | 2972 | * |
2973 | * A wrapper for platform code responsible for controlling | 2973 | * A wrapper for platform code responsible for controlling |
2974 | * low-level USB code | 2974 | * low-level USB code |
2975 | */ | 2975 | */ |
2976 | static void s3c_hsotg_phy_disable(struct dwc2_hsotg *hsotg) | 2976 | static void dwc2_hsotg_phy_disable(struct dwc2_hsotg *hsotg) |
2977 | { | 2977 | { |
2978 | struct platform_device *pdev = to_platform_device(hsotg->dev); | 2978 | struct platform_device *pdev = to_platform_device(hsotg->dev); |
2979 | 2979 | ||
@@ -2988,10 +2988,10 @@ static void s3c_hsotg_phy_disable(struct dwc2_hsotg *hsotg) | |||
2988 | } | 2988 | } |
2989 | 2989 | ||
2990 | /** | 2990 | /** |
2991 | * s3c_hsotg_init - initalize the usb core | 2991 | * dwc2_hsotg_init - initalize the usb core |
2992 | * @hsotg: The driver state | 2992 | * @hsotg: The driver state |
2993 | */ | 2993 | */ |
2994 | static void s3c_hsotg_init(struct dwc2_hsotg *hsotg) | 2994 | static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg) |
2995 | { | 2995 | { |
2996 | u32 trdtim; | 2996 | u32 trdtim; |
2997 | /* unmask subset of endpoint interrupts */ | 2997 | /* unmask subset of endpoint interrupts */ |
@@ -3015,7 +3015,7 @@ static void s3c_hsotg_init(struct dwc2_hsotg *hsotg) | |||
3015 | readl(hsotg->regs + GRXFSIZ), | 3015 | readl(hsotg->regs + GRXFSIZ), |
3016 | readl(hsotg->regs + GNPTXFSIZ)); | 3016 | readl(hsotg->regs + GNPTXFSIZ)); |
3017 | 3017 | ||
3018 | s3c_hsotg_init_fifo(hsotg); | 3018 | dwc2_hsotg_init_fifo(hsotg); |
3019 | 3019 | ||
3020 | /* set the PLL on, remove the HNP/SRP and set the PHY */ | 3020 | /* set the PLL on, remove the HNP/SRP and set the PHY */ |
3021 | trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; | 3021 | trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; |
@@ -3028,14 +3028,14 @@ static void s3c_hsotg_init(struct dwc2_hsotg *hsotg) | |||
3028 | } | 3028 | } |
3029 | 3029 | ||
3030 | /** | 3030 | /** |
3031 | * s3c_hsotg_udc_start - prepare the udc for work | 3031 | * dwc2_hsotg_udc_start - prepare the udc for work |
3032 | * @gadget: The usb gadget state | 3032 | * @gadget: The usb gadget state |
3033 | * @driver: The usb gadget driver | 3033 | * @driver: The usb gadget driver |
3034 | * | 3034 | * |
3035 | * Perform initialization to prepare udc device and driver | 3035 | * Perform initialization to prepare udc device and driver |
3036 | * to work. | 3036 | * to work. |
3037 | */ | 3037 | */ |
3038 | static int s3c_hsotg_udc_start(struct usb_gadget *gadget, | 3038 | static int dwc2_hsotg_udc_start(struct usb_gadget *gadget, |
3039 | struct usb_gadget_driver *driver) | 3039 | struct usb_gadget_driver *driver) |
3040 | { | 3040 | { |
3041 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); | 3041 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
@@ -3077,13 +3077,13 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget, | |||
3077 | goto err; | 3077 | goto err; |
3078 | } | 3078 | } |
3079 | 3079 | ||
3080 | s3c_hsotg_phy_enable(hsotg); | 3080 | dwc2_hsotg_phy_enable(hsotg); |
3081 | if (!IS_ERR_OR_NULL(hsotg->uphy)) | 3081 | if (!IS_ERR_OR_NULL(hsotg->uphy)) |
3082 | otg_set_peripheral(hsotg->uphy->otg, &hsotg->gadget); | 3082 | otg_set_peripheral(hsotg->uphy->otg, &hsotg->gadget); |
3083 | 3083 | ||
3084 | spin_lock_irqsave(&hsotg->lock, flags); | 3084 | spin_lock_irqsave(&hsotg->lock, flags); |
3085 | s3c_hsotg_init(hsotg); | 3085 | dwc2_hsotg_init(hsotg); |
3086 | s3c_hsotg_core_init_disconnected(hsotg, false); | 3086 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
3087 | hsotg->enabled = 0; | 3087 | hsotg->enabled = 0; |
3088 | spin_unlock_irqrestore(&hsotg->lock, flags); | 3088 | spin_unlock_irqrestore(&hsotg->lock, flags); |
3089 | 3089 | ||
@@ -3100,13 +3100,13 @@ err: | |||
3100 | } | 3100 | } |
3101 | 3101 | ||
3102 | /** | 3102 | /** |
3103 | * s3c_hsotg_udc_stop - stop the udc | 3103 | * dwc2_hsotg_udc_stop - stop the udc |
3104 | * @gadget: The usb gadget state | 3104 | * @gadget: The usb gadget state |
3105 | * @driver: The usb gadget driver | 3105 | * @driver: The usb gadget driver |
3106 | * | 3106 | * |
3107 | * Stop udc hw block and stay tunned for future transmissions | 3107 | * Stop udc hw block and stay tunned for future transmissions |
3108 | */ | 3108 | */ |
3109 | static int s3c_hsotg_udc_stop(struct usb_gadget *gadget) | 3109 | static int dwc2_hsotg_udc_stop(struct usb_gadget *gadget) |
3110 | { | 3110 | { |
3111 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); | 3111 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
3112 | unsigned long flags = 0; | 3112 | unsigned long flags = 0; |
@@ -3120,9 +3120,9 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget) | |||
3120 | /* all endpoints should be shutdown */ | 3120 | /* all endpoints should be shutdown */ |
3121 | for (ep = 1; ep < hsotg->num_of_eps; ep++) { | 3121 | for (ep = 1; ep < hsotg->num_of_eps; ep++) { |
3122 | if (hsotg->eps_in[ep]) | 3122 | if (hsotg->eps_in[ep]) |
3123 | s3c_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); | 3123 | dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); |
3124 | if (hsotg->eps_out[ep]) | 3124 | if (hsotg->eps_out[ep]) |
3125 | s3c_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); | 3125 | dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); |
3126 | } | 3126 | } |
3127 | 3127 | ||
3128 | spin_lock_irqsave(&hsotg->lock, flags); | 3128 | spin_lock_irqsave(&hsotg->lock, flags); |
@@ -3135,7 +3135,7 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget) | |||
3135 | 3135 | ||
3136 | if (!IS_ERR_OR_NULL(hsotg->uphy)) | 3136 | if (!IS_ERR_OR_NULL(hsotg->uphy)) |
3137 | otg_set_peripheral(hsotg->uphy->otg, NULL); | 3137 | otg_set_peripheral(hsotg->uphy->otg, NULL); |
3138 | s3c_hsotg_phy_disable(hsotg); | 3138 | dwc2_hsotg_phy_disable(hsotg); |
3139 | 3139 | ||
3140 | regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); | 3140 | regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies); |
3141 | 3141 | ||
@@ -3147,24 +3147,24 @@ static int s3c_hsotg_udc_stop(struct usb_gadget *gadget) | |||
3147 | } | 3147 | } |
3148 | 3148 | ||
3149 | /** | 3149 | /** |
3150 | * s3c_hsotg_gadget_getframe - read the frame number | 3150 | * dwc2_hsotg_gadget_getframe - read the frame number |
3151 | * @gadget: The usb gadget state | 3151 | * @gadget: The usb gadget state |
3152 | * | 3152 | * |
3153 | * Read the {micro} frame number | 3153 | * Read the {micro} frame number |
3154 | */ | 3154 | */ |
3155 | static int s3c_hsotg_gadget_getframe(struct usb_gadget *gadget) | 3155 | static int dwc2_hsotg_gadget_getframe(struct usb_gadget *gadget) |
3156 | { | 3156 | { |
3157 | return s3c_hsotg_read_frameno(to_hsotg(gadget)); | 3157 | return dwc2_hsotg_read_frameno(to_hsotg(gadget)); |
3158 | } | 3158 | } |
3159 | 3159 | ||
3160 | /** | 3160 | /** |
3161 | * s3c_hsotg_pullup - connect/disconnect the USB PHY | 3161 | * dwc2_hsotg_pullup - connect/disconnect the USB PHY |
3162 | * @gadget: The usb gadget state | 3162 | * @gadget: The usb gadget state |
3163 | * @is_on: Current state of the USB PHY | 3163 | * @is_on: Current state of the USB PHY |
3164 | * | 3164 | * |
3165 | * Connect/Disconnect the USB PHY pullup | 3165 | * Connect/Disconnect the USB PHY pullup |
3166 | */ | 3166 | */ |
3167 | static int s3c_hsotg_pullup(struct usb_gadget *gadget, int is_on) | 3167 | static int dwc2_hsotg_pullup(struct usb_gadget *gadget, int is_on) |
3168 | { | 3168 | { |
3169 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); | 3169 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
3170 | unsigned long flags = 0; | 3170 | unsigned long flags = 0; |
@@ -3176,11 +3176,11 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget, int is_on) | |||
3176 | if (is_on) { | 3176 | if (is_on) { |
3177 | clk_enable(hsotg->clk); | 3177 | clk_enable(hsotg->clk); |
3178 | hsotg->enabled = 1; | 3178 | hsotg->enabled = 1; |
3179 | s3c_hsotg_core_init_disconnected(hsotg, false); | 3179 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
3180 | s3c_hsotg_core_connect(hsotg); | 3180 | dwc2_hsotg_core_connect(hsotg); |
3181 | } else { | 3181 | } else { |
3182 | s3c_hsotg_core_disconnect(hsotg); | 3182 | dwc2_hsotg_core_disconnect(hsotg); |
3183 | s3c_hsotg_disconnect(hsotg); | 3183 | dwc2_hsotg_disconnect(hsotg); |
3184 | hsotg->enabled = 0; | 3184 | hsotg->enabled = 0; |
3185 | clk_disable(hsotg->clk); | 3185 | clk_disable(hsotg->clk); |
3186 | } | 3186 | } |
@@ -3192,7 +3192,7 @@ static int s3c_hsotg_pullup(struct usb_gadget *gadget, int is_on) | |||
3192 | return 0; | 3192 | return 0; |
3193 | } | 3193 | } |
3194 | 3194 | ||
3195 | static int s3c_hsotg_vbus_session(struct usb_gadget *gadget, int is_active) | 3195 | static int dwc2_hsotg_vbus_session(struct usb_gadget *gadget, int is_active) |
3196 | { | 3196 | { |
3197 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); | 3197 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
3198 | unsigned long flags; | 3198 | unsigned long flags; |
@@ -3211,12 +3211,12 @@ static int s3c_hsotg_vbus_session(struct usb_gadget *gadget, int is_active) | |||
3211 | } | 3211 | } |
3212 | /* Kill any ep0 requests as controller will be reinitialized */ | 3212 | /* Kill any ep0 requests as controller will be reinitialized */ |
3213 | kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); | 3213 | kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); |
3214 | s3c_hsotg_core_init_disconnected(hsotg, false); | 3214 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
3215 | if (hsotg->enabled) | 3215 | if (hsotg->enabled) |
3216 | s3c_hsotg_core_connect(hsotg); | 3216 | dwc2_hsotg_core_connect(hsotg); |
3217 | } else { | 3217 | } else { |
3218 | s3c_hsotg_core_disconnect(hsotg); | 3218 | dwc2_hsotg_core_disconnect(hsotg); |
3219 | s3c_hsotg_disconnect(hsotg); | 3219 | dwc2_hsotg_disconnect(hsotg); |
3220 | } | 3220 | } |
3221 | 3221 | ||
3222 | spin_unlock_irqrestore(&hsotg->lock, flags); | 3222 | spin_unlock_irqrestore(&hsotg->lock, flags); |
@@ -3224,13 +3224,13 @@ static int s3c_hsotg_vbus_session(struct usb_gadget *gadget, int is_active) | |||
3224 | } | 3224 | } |
3225 | 3225 | ||
3226 | /** | 3226 | /** |
3227 | * s3c_hsotg_vbus_draw - report bMaxPower field | 3227 | * dwc2_hsotg_vbus_draw - report bMaxPower field |
3228 | * @gadget: The usb gadget state | 3228 | * @gadget: The usb gadget state |
3229 | * @mA: Amount of current | 3229 | * @mA: Amount of current |
3230 | * | 3230 | * |
3231 | * Report how much power the device may consume to the phy. | 3231 | * Report how much power the device may consume to the phy. |
3232 | */ | 3232 | */ |
3233 | static int s3c_hsotg_vbus_draw(struct usb_gadget *gadget, unsigned mA) | 3233 | static int dwc2_hsotg_vbus_draw(struct usb_gadget *gadget, unsigned mA) |
3234 | { | 3234 | { |
3235 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); | 3235 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
3236 | 3236 | ||
@@ -3239,17 +3239,17 @@ static int s3c_hsotg_vbus_draw(struct usb_gadget *gadget, unsigned mA) | |||
3239 | return usb_phy_set_power(hsotg->uphy, mA); | 3239 | return usb_phy_set_power(hsotg->uphy, mA); |
3240 | } | 3240 | } |
3241 | 3241 | ||
3242 | static const struct usb_gadget_ops s3c_hsotg_gadget_ops = { | 3242 | static const struct usb_gadget_ops dwc2_hsotg_gadget_ops = { |
3243 | .get_frame = s3c_hsotg_gadget_getframe, | 3243 | .get_frame = dwc2_hsotg_gadget_getframe, |
3244 | .udc_start = s3c_hsotg_udc_start, | 3244 | .udc_start = dwc2_hsotg_udc_start, |
3245 | .udc_stop = s3c_hsotg_udc_stop, | 3245 | .udc_stop = dwc2_hsotg_udc_stop, |
3246 | .pullup = s3c_hsotg_pullup, | 3246 | .pullup = dwc2_hsotg_pullup, |
3247 | .vbus_session = s3c_hsotg_vbus_session, | 3247 | .vbus_session = dwc2_hsotg_vbus_session, |
3248 | .vbus_draw = s3c_hsotg_vbus_draw, | 3248 | .vbus_draw = dwc2_hsotg_vbus_draw, |
3249 | }; | 3249 | }; |
3250 | 3250 | ||
3251 | /** | 3251 | /** |
3252 | * s3c_hsotg_initep - initialise a single endpoint | 3252 | * dwc2_hsotg_initep - initialise a single endpoint |
3253 | * @hsotg: The device state. | 3253 | * @hsotg: The device state. |
3254 | * @hs_ep: The endpoint to be initialised. | 3254 | * @hs_ep: The endpoint to be initialised. |
3255 | * @epnum: The endpoint number | 3255 | * @epnum: The endpoint number |
@@ -3258,8 +3258,8 @@ static const struct usb_gadget_ops s3c_hsotg_gadget_ops = { | |||
3258 | * creation) to give to the gadget driver. Setup the endpoint name, any | 3258 | * creation) to give to the gadget driver. Setup the endpoint name, any |
3259 | * direction information and other state that may be required. | 3259 | * direction information and other state that may be required. |
3260 | */ | 3260 | */ |
3261 | static void s3c_hsotg_initep(struct dwc2_hsotg *hsotg, | 3261 | static void dwc2_hsotg_initep(struct dwc2_hsotg *hsotg, |
3262 | struct s3c_hsotg_ep *hs_ep, | 3262 | struct dwc2_hsotg_ep *hs_ep, |
3263 | int epnum, | 3263 | int epnum, |
3264 | bool dir_in) | 3264 | bool dir_in) |
3265 | { | 3265 | { |
@@ -3287,7 +3287,7 @@ static void s3c_hsotg_initep(struct dwc2_hsotg *hsotg, | |||
3287 | hs_ep->parent = hsotg; | 3287 | hs_ep->parent = hsotg; |
3288 | hs_ep->ep.name = hs_ep->name; | 3288 | hs_ep->ep.name = hs_ep->name; |
3289 | usb_ep_set_maxpacket_limit(&hs_ep->ep, epnum ? 1024 : EP0_MPS_LIMIT); | 3289 | usb_ep_set_maxpacket_limit(&hs_ep->ep, epnum ? 1024 : EP0_MPS_LIMIT); |
3290 | hs_ep->ep.ops = &s3c_hsotg_ep_ops; | 3290 | hs_ep->ep.ops = &dwc2_hsotg_ep_ops; |
3291 | 3291 | ||
3292 | if (epnum == 0) { | 3292 | if (epnum == 0) { |
3293 | hs_ep->ep.caps.type_control = true; | 3293 | hs_ep->ep.caps.type_control = true; |
@@ -3317,12 +3317,12 @@ static void s3c_hsotg_initep(struct dwc2_hsotg *hsotg, | |||
3317 | } | 3317 | } |
3318 | 3318 | ||
3319 | /** | 3319 | /** |
3320 | * s3c_hsotg_hw_cfg - read HW configuration registers | 3320 | * dwc2_hsotg_hw_cfg - read HW configuration registers |
3321 | * @param: The device state | 3321 | * @param: The device state |
3322 | * | 3322 | * |
3323 | * Read the USB core HW configuration registers | 3323 | * Read the USB core HW configuration registers |
3324 | */ | 3324 | */ |
3325 | static int s3c_hsotg_hw_cfg(struct dwc2_hsotg *hsotg) | 3325 | static int dwc2_hsotg_hw_cfg(struct dwc2_hsotg *hsotg) |
3326 | { | 3326 | { |
3327 | u32 cfg; | 3327 | u32 cfg; |
3328 | u32 ep_type; | 3328 | u32 ep_type; |
@@ -3335,11 +3335,11 @@ static int s3c_hsotg_hw_cfg(struct dwc2_hsotg *hsotg) | |||
3335 | /* Add ep0 */ | 3335 | /* Add ep0 */ |
3336 | hsotg->num_of_eps++; | 3336 | hsotg->num_of_eps++; |
3337 | 3337 | ||
3338 | hsotg->eps_in[0] = devm_kzalloc(hsotg->dev, sizeof(struct s3c_hsotg_ep), | 3338 | hsotg->eps_in[0] = devm_kzalloc(hsotg->dev, sizeof(struct dwc2_hsotg_ep), |
3339 | GFP_KERNEL); | 3339 | GFP_KERNEL); |
3340 | if (!hsotg->eps_in[0]) | 3340 | if (!hsotg->eps_in[0]) |
3341 | return -ENOMEM; | 3341 | return -ENOMEM; |
3342 | /* Same s3c_hsotg_ep is used in both directions for ep0 */ | 3342 | /* Same dwc2_hsotg_ep is used in both directions for ep0 */ |
3343 | hsotg->eps_out[0] = hsotg->eps_in[0]; | 3343 | hsotg->eps_out[0] = hsotg->eps_in[0]; |
3344 | 3344 | ||
3345 | cfg = readl(hsotg->regs + GHWCFG1); | 3345 | cfg = readl(hsotg->regs + GHWCFG1); |
@@ -3348,14 +3348,14 @@ static int s3c_hsotg_hw_cfg(struct dwc2_hsotg *hsotg) | |||
3348 | /* Direction in or both */ | 3348 | /* Direction in or both */ |
3349 | if (!(ep_type & 2)) { | 3349 | if (!(ep_type & 2)) { |
3350 | hsotg->eps_in[i] = devm_kzalloc(hsotg->dev, | 3350 | hsotg->eps_in[i] = devm_kzalloc(hsotg->dev, |
3351 | sizeof(struct s3c_hsotg_ep), GFP_KERNEL); | 3351 | sizeof(struct dwc2_hsotg_ep), GFP_KERNEL); |
3352 | if (!hsotg->eps_in[i]) | 3352 | if (!hsotg->eps_in[i]) |
3353 | return -ENOMEM; | 3353 | return -ENOMEM; |
3354 | } | 3354 | } |
3355 | /* Direction out or both */ | 3355 | /* Direction out or both */ |
3356 | if (!(ep_type & 1)) { | 3356 | if (!(ep_type & 1)) { |
3357 | hsotg->eps_out[i] = devm_kzalloc(hsotg->dev, | 3357 | hsotg->eps_out[i] = devm_kzalloc(hsotg->dev, |
3358 | sizeof(struct s3c_hsotg_ep), GFP_KERNEL); | 3358 | sizeof(struct dwc2_hsotg_ep), GFP_KERNEL); |
3359 | if (!hsotg->eps_out[i]) | 3359 | if (!hsotg->eps_out[i]) |
3360 | return -ENOMEM; | 3360 | return -ENOMEM; |
3361 | } | 3361 | } |
@@ -3375,10 +3375,10 @@ static int s3c_hsotg_hw_cfg(struct dwc2_hsotg *hsotg) | |||
3375 | } | 3375 | } |
3376 | 3376 | ||
3377 | /** | 3377 | /** |
3378 | * s3c_hsotg_dump - dump state of the udc | 3378 | * dwc2_hsotg_dump - dump state of the udc |
3379 | * @param: The device state | 3379 | * @param: The device state |
3380 | */ | 3380 | */ |
3381 | static void s3c_hsotg_dump(struct dwc2_hsotg *hsotg) | 3381 | static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg) |
3382 | { | 3382 | { |
3383 | #ifdef DEBUG | 3383 | #ifdef DEBUG |
3384 | struct device *dev = hsotg->dev; | 3384 | struct device *dev = hsotg->dev; |
@@ -3427,7 +3427,7 @@ static void s3c_hsotg_dump(struct dwc2_hsotg *hsotg) | |||
3427 | } | 3427 | } |
3428 | 3428 | ||
3429 | #ifdef CONFIG_OF | 3429 | #ifdef CONFIG_OF |
3430 | static void s3c_hsotg_of_probe(struct dwc2_hsotg *hsotg) | 3430 | static void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg) |
3431 | { | 3431 | { |
3432 | struct device_node *np = hsotg->dev->of_node; | 3432 | struct device_node *np = hsotg->dev->of_node; |
3433 | u32 len = 0; | 3433 | u32 len = 0; |
@@ -3468,7 +3468,7 @@ rx_fifo: | |||
3468 | &hsotg->g_np_g_tx_fifo_sz); | 3468 | &hsotg->g_np_g_tx_fifo_sz); |
3469 | } | 3469 | } |
3470 | #else | 3470 | #else |
3471 | static inline void s3c_hsotg_of_probe(struct dwc2_hsotg *hsotg) { } | 3471 | static inline void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg) { } |
3472 | #endif | 3472 | #endif |
3473 | 3473 | ||
3474 | /** | 3474 | /** |
@@ -3479,7 +3479,7 @@ static inline void s3c_hsotg_of_probe(struct dwc2_hsotg *hsotg) { } | |||
3479 | int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | 3479 | int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) |
3480 | { | 3480 | { |
3481 | struct device *dev = hsotg->dev; | 3481 | struct device *dev = hsotg->dev; |
3482 | struct s3c_hsotg_plat *plat = dev->platform_data; | 3482 | struct dwc2_hsotg_plat *plat = dev->platform_data; |
3483 | int epnum; | 3483 | int epnum; |
3484 | int ret; | 3484 | int ret; |
3485 | int i; | 3485 | int i; |
@@ -3488,14 +3488,14 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3488 | /* Set default UTMI width */ | 3488 | /* Set default UTMI width */ |
3489 | hsotg->phyif = GUSBCFG_PHYIF16; | 3489 | hsotg->phyif = GUSBCFG_PHYIF16; |
3490 | 3490 | ||
3491 | s3c_hsotg_of_probe(hsotg); | 3491 | dwc2_hsotg_of_probe(hsotg); |
3492 | 3492 | ||
3493 | /* Initialize to legacy fifo configuration values */ | 3493 | /* Initialize to legacy fifo configuration values */ |
3494 | hsotg->g_rx_fifo_sz = 2048; | 3494 | hsotg->g_rx_fifo_sz = 2048; |
3495 | hsotg->g_np_g_tx_fifo_sz = 1024; | 3495 | hsotg->g_np_g_tx_fifo_sz = 1024; |
3496 | memcpy(&hsotg->g_tx_fifo_sz[1], p_tx_fifo, sizeof(p_tx_fifo)); | 3496 | memcpy(&hsotg->g_tx_fifo_sz[1], p_tx_fifo, sizeof(p_tx_fifo)); |
3497 | /* Device tree specific probe */ | 3497 | /* Device tree specific probe */ |
3498 | s3c_hsotg_of_probe(hsotg); | 3498 | dwc2_hsotg_of_probe(hsotg); |
3499 | /* Dump fifo information */ | 3499 | /* Dump fifo information */ |
3500 | dev_dbg(dev, "NonPeriodic TXFIFO size: %d\n", | 3500 | dev_dbg(dev, "NonPeriodic TXFIFO size: %d\n", |
3501 | hsotg->g_np_g_tx_fifo_sz); | 3501 | hsotg->g_np_g_tx_fifo_sz); |
@@ -3531,7 +3531,7 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3531 | } | 3531 | } |
3532 | 3532 | ||
3533 | hsotg->gadget.max_speed = USB_SPEED_HIGH; | 3533 | hsotg->gadget.max_speed = USB_SPEED_HIGH; |
3534 | hsotg->gadget.ops = &s3c_hsotg_gadget_ops; | 3534 | hsotg->gadget.ops = &dwc2_hsotg_gadget_ops; |
3535 | hsotg->gadget.name = dev_name(dev); | 3535 | hsotg->gadget.name = dev_name(dev); |
3536 | if (hsotg->dr_mode == USB_DR_MODE_OTG) | 3536 | if (hsotg->dr_mode == USB_DR_MODE_OTG) |
3537 | hsotg->gadget.is_otg = 1; | 3537 | hsotg->gadget.is_otg = 1; |
@@ -3548,7 +3548,7 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3548 | /* regulators */ | 3548 | /* regulators */ |
3549 | 3549 | ||
3550 | for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) | 3550 | for (i = 0; i < ARRAY_SIZE(hsotg->supplies); i++) |
3551 | hsotg->supplies[i].supply = s3c_hsotg_supply_names[i]; | 3551 | hsotg->supplies[i].supply = dwc2_hsotg_supply_names[i]; |
3552 | 3552 | ||
3553 | ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(hsotg->supplies), | 3553 | ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(hsotg->supplies), |
3554 | hsotg->supplies); | 3554 | hsotg->supplies); |
@@ -3566,7 +3566,7 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3566 | } | 3566 | } |
3567 | 3567 | ||
3568 | /* usb phy enable */ | 3568 | /* usb phy enable */ |
3569 | s3c_hsotg_phy_enable(hsotg); | 3569 | dwc2_hsotg_phy_enable(hsotg); |
3570 | 3570 | ||
3571 | /* | 3571 | /* |
3572 | * Force Device mode before initialization. | 3572 | * Force Device mode before initialization. |
@@ -3581,14 +3581,14 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3581 | */ | 3581 | */ |
3582 | msleep(25); | 3582 | msleep(25); |
3583 | 3583 | ||
3584 | s3c_hsotg_corereset(hsotg); | 3584 | dwc2_hsotg_corereset(hsotg); |
3585 | ret = s3c_hsotg_hw_cfg(hsotg); | 3585 | ret = dwc2_hsotg_hw_cfg(hsotg); |
3586 | if (ret) { | 3586 | if (ret) { |
3587 | dev_err(hsotg->dev, "Hardware configuration failed: %d\n", ret); | 3587 | dev_err(hsotg->dev, "Hardware configuration failed: %d\n", ret); |
3588 | goto err_clk; | 3588 | goto err_clk; |
3589 | } | 3589 | } |
3590 | 3590 | ||
3591 | s3c_hsotg_init(hsotg); | 3591 | dwc2_hsotg_init(hsotg); |
3592 | 3592 | ||
3593 | /* Switch back to default configuration */ | 3593 | /* Switch back to default configuration */ |
3594 | __bic32(hsotg->regs + GUSBCFG, GUSBCFG_FORCEDEVMODE); | 3594 | __bic32(hsotg->regs + GUSBCFG, GUSBCFG_FORCEDEVMODE); |
@@ -3609,10 +3609,10 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3609 | goto err_supplies; | 3609 | goto err_supplies; |
3610 | } | 3610 | } |
3611 | 3611 | ||
3612 | ret = devm_request_irq(hsotg->dev, irq, s3c_hsotg_irq, IRQF_SHARED, | 3612 | ret = devm_request_irq(hsotg->dev, irq, dwc2_hsotg_irq, IRQF_SHARED, |
3613 | dev_name(hsotg->dev), hsotg); | 3613 | dev_name(hsotg->dev), hsotg); |
3614 | if (ret < 0) { | 3614 | if (ret < 0) { |
3615 | s3c_hsotg_phy_disable(hsotg); | 3615 | dwc2_hsotg_phy_disable(hsotg); |
3616 | clk_disable_unprepare(hsotg->clk); | 3616 | clk_disable_unprepare(hsotg->clk); |
3617 | regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), | 3617 | regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), |
3618 | hsotg->supplies); | 3618 | hsotg->supplies); |
@@ -3635,7 +3635,7 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3635 | 3635 | ||
3636 | /* allocate EP0 request */ | 3636 | /* allocate EP0 request */ |
3637 | 3637 | ||
3638 | hsotg->ctrl_req = s3c_hsotg_ep_alloc_request(&hsotg->eps_out[0]->ep, | 3638 | hsotg->ctrl_req = dwc2_hsotg_ep_alloc_request(&hsotg->eps_out[0]->ep, |
3639 | GFP_KERNEL); | 3639 | GFP_KERNEL); |
3640 | if (!hsotg->ctrl_req) { | 3640 | if (!hsotg->ctrl_req) { |
3641 | dev_err(dev, "failed to allocate ctrl req\n"); | 3641 | dev_err(dev, "failed to allocate ctrl req\n"); |
@@ -3646,15 +3646,15 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3646 | /* initialise the endpoints now the core has been initialised */ | 3646 | /* initialise the endpoints now the core has been initialised */ |
3647 | for (epnum = 0; epnum < hsotg->num_of_eps; epnum++) { | 3647 | for (epnum = 0; epnum < hsotg->num_of_eps; epnum++) { |
3648 | if (hsotg->eps_in[epnum]) | 3648 | if (hsotg->eps_in[epnum]) |
3649 | s3c_hsotg_initep(hsotg, hsotg->eps_in[epnum], | 3649 | dwc2_hsotg_initep(hsotg, hsotg->eps_in[epnum], |
3650 | epnum, 1); | 3650 | epnum, 1); |
3651 | if (hsotg->eps_out[epnum]) | 3651 | if (hsotg->eps_out[epnum]) |
3652 | s3c_hsotg_initep(hsotg, hsotg->eps_out[epnum], | 3652 | dwc2_hsotg_initep(hsotg, hsotg->eps_out[epnum], |
3653 | epnum, 0); | 3653 | epnum, 0); |
3654 | } | 3654 | } |
3655 | 3655 | ||
3656 | /* disable power and clock */ | 3656 | /* disable power and clock */ |
3657 | s3c_hsotg_phy_disable(hsotg); | 3657 | dwc2_hsotg_phy_disable(hsotg); |
3658 | 3658 | ||
3659 | ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), | 3659 | ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), |
3660 | hsotg->supplies); | 3660 | hsotg->supplies); |
@@ -3667,12 +3667,12 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) | |||
3667 | if (ret) | 3667 | if (ret) |
3668 | goto err_supplies; | 3668 | goto err_supplies; |
3669 | 3669 | ||
3670 | s3c_hsotg_dump(hsotg); | 3670 | dwc2_hsotg_dump(hsotg); |
3671 | 3671 | ||
3672 | return 0; | 3672 | return 0; |
3673 | 3673 | ||
3674 | err_supplies: | 3674 | err_supplies: |
3675 | s3c_hsotg_phy_disable(hsotg); | 3675 | dwc2_hsotg_phy_disable(hsotg); |
3676 | err_clk: | 3676 | err_clk: |
3677 | clk_disable_unprepare(hsotg->clk); | 3677 | clk_disable_unprepare(hsotg->clk); |
3678 | 3678 | ||
@@ -3680,10 +3680,10 @@ err_clk: | |||
3680 | } | 3680 | } |
3681 | 3681 | ||
3682 | /** | 3682 | /** |
3683 | * s3c_hsotg_remove - remove function for hsotg driver | 3683 | * dwc2_hsotg_remove - remove function for hsotg driver |
3684 | * @pdev: The platform information for the driver | 3684 | * @pdev: The platform information for the driver |
3685 | */ | 3685 | */ |
3686 | int s3c_hsotg_remove(struct dwc2_hsotg *hsotg) | 3686 | int dwc2_hsotg_remove(struct dwc2_hsotg *hsotg) |
3687 | { | 3687 | { |
3688 | usb_del_gadget_udc(&hsotg->gadget); | 3688 | usb_del_gadget_udc(&hsotg->gadget); |
3689 | clk_disable_unprepare(hsotg->clk); | 3689 | clk_disable_unprepare(hsotg->clk); |
@@ -3691,7 +3691,7 @@ int s3c_hsotg_remove(struct dwc2_hsotg *hsotg) | |||
3691 | return 0; | 3691 | return 0; |
3692 | } | 3692 | } |
3693 | 3693 | ||
3694 | int s3c_hsotg_suspend(struct dwc2_hsotg *hsotg) | 3694 | int dwc2_hsotg_suspend(struct dwc2_hsotg *hsotg) |
3695 | { | 3695 | { |
3696 | unsigned long flags; | 3696 | unsigned long flags; |
3697 | int ret = 0; | 3697 | int ret = 0; |
@@ -3709,18 +3709,18 @@ int s3c_hsotg_suspend(struct dwc2_hsotg *hsotg) | |||
3709 | 3709 | ||
3710 | spin_lock_irqsave(&hsotg->lock, flags); | 3710 | spin_lock_irqsave(&hsotg->lock, flags); |
3711 | if (hsotg->enabled) | 3711 | if (hsotg->enabled) |
3712 | s3c_hsotg_core_disconnect(hsotg); | 3712 | dwc2_hsotg_core_disconnect(hsotg); |
3713 | s3c_hsotg_disconnect(hsotg); | 3713 | dwc2_hsotg_disconnect(hsotg); |
3714 | hsotg->gadget.speed = USB_SPEED_UNKNOWN; | 3714 | hsotg->gadget.speed = USB_SPEED_UNKNOWN; |
3715 | spin_unlock_irqrestore(&hsotg->lock, flags); | 3715 | spin_unlock_irqrestore(&hsotg->lock, flags); |
3716 | 3716 | ||
3717 | s3c_hsotg_phy_disable(hsotg); | 3717 | dwc2_hsotg_phy_disable(hsotg); |
3718 | 3718 | ||
3719 | for (ep = 0; ep < hsotg->num_of_eps; ep++) { | 3719 | for (ep = 0; ep < hsotg->num_of_eps; ep++) { |
3720 | if (hsotg->eps_in[ep]) | 3720 | if (hsotg->eps_in[ep]) |
3721 | s3c_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); | 3721 | dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); |
3722 | if (hsotg->eps_out[ep]) | 3722 | if (hsotg->eps_out[ep]) |
3723 | s3c_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); | 3723 | dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); |
3724 | } | 3724 | } |
3725 | 3725 | ||
3726 | ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), | 3726 | ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), |
@@ -3733,7 +3733,7 @@ int s3c_hsotg_suspend(struct dwc2_hsotg *hsotg) | |||
3733 | return ret; | 3733 | return ret; |
3734 | } | 3734 | } |
3735 | 3735 | ||
3736 | int s3c_hsotg_resume(struct dwc2_hsotg *hsotg) | 3736 | int dwc2_hsotg_resume(struct dwc2_hsotg *hsotg) |
3737 | { | 3737 | { |
3738 | unsigned long flags; | 3738 | unsigned long flags; |
3739 | int ret = 0; | 3739 | int ret = 0; |
@@ -3751,12 +3751,12 @@ int s3c_hsotg_resume(struct dwc2_hsotg *hsotg) | |||
3751 | ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies), | 3751 | ret = regulator_bulk_enable(ARRAY_SIZE(hsotg->supplies), |
3752 | hsotg->supplies); | 3752 | hsotg->supplies); |
3753 | 3753 | ||
3754 | s3c_hsotg_phy_enable(hsotg); | 3754 | dwc2_hsotg_phy_enable(hsotg); |
3755 | 3755 | ||
3756 | spin_lock_irqsave(&hsotg->lock, flags); | 3756 | spin_lock_irqsave(&hsotg->lock, flags); |
3757 | s3c_hsotg_core_init_disconnected(hsotg, false); | 3757 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
3758 | if (hsotg->enabled) | 3758 | if (hsotg->enabled) |
3759 | s3c_hsotg_core_connect(hsotg); | 3759 | dwc2_hsotg_core_connect(hsotg); |
3760 | spin_unlock_irqrestore(&hsotg->lock, flags); | 3760 | spin_unlock_irqrestore(&hsotg->lock, flags); |
3761 | } | 3761 | } |
3762 | mutex_unlock(&hsotg->init_mutex); | 3762 | mutex_unlock(&hsotg->init_mutex); |