aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/mpt2sas/mpt2sas_base.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/scsi/mpt2sas/mpt2sas_base.h')
-rw-r--r--drivers/scsi/mpt2sas/mpt2sas_base.h20
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.h b/drivers/scsi/mpt2sas/mpt2sas_base.h
index e0e4dd48e9dc..9bc8e0b915b8 100644
--- a/drivers/scsi/mpt2sas/mpt2sas_base.h
+++ b/drivers/scsi/mpt2sas/mpt2sas_base.h
@@ -636,6 +636,11 @@ struct mpt2sas_port_facts {
636 u16 MaxPostedCmdBuffers; 636 u16 MaxPostedCmdBuffers;
637}; 637};
638 638
639struct reply_post_struct {
640 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
641 dma_addr_t reply_post_free_dma;
642};
643
639/** 644/**
640 * enum mutex_type - task management mutex type 645 * enum mutex_type - task management mutex type
641 * @TM_MUTEX_OFF: mutex is not required becuase calling function is acquiring it 646 * @TM_MUTEX_OFF: mutex is not required becuase calling function is acquiring it
@@ -663,6 +668,7 @@ typedef void (*MPT2SAS_FLUSH_RUNNING_CMDS)(struct MPT2SAS_ADAPTER *ioc);
663 * @ir_firmware: IR firmware present 668 * @ir_firmware: IR firmware present
664 * @bars: bitmask of BAR's that must be configured 669 * @bars: bitmask of BAR's that must be configured
665 * @mask_interrupts: ignore interrupt 670 * @mask_interrupts: ignore interrupt
671 * @dma_mask: used to set the consistent dma mask
666 * @fault_reset_work_q_name: fw fault work queue 672 * @fault_reset_work_q_name: fw fault work queue
667 * @fault_reset_work_q: "" 673 * @fault_reset_work_q: ""
668 * @fault_reset_work: "" 674 * @fault_reset_work: ""
@@ -779,8 +785,11 @@ typedef void (*MPT2SAS_FLUSH_RUNNING_CMDS)(struct MPT2SAS_ADAPTER *ioc);
779 * @reply_free_dma_pool: 785 * @reply_free_dma_pool:
780 * @reply_free_host_index: tail index in pool to insert free replys 786 * @reply_free_host_index: tail index in pool to insert free replys
781 * @reply_post_queue_depth: reply post queue depth 787 * @reply_post_queue_depth: reply post queue depth
782 * @reply_post_free: pool for reply post (64bit descriptor) 788 * @reply_post_struct: struct for reply_post_free physical & virt address
783 * @reply_post_free_dma: 789 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
790 * @rdpq_array_enable: rdpq_array support is enabled in the driver
791 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
792 * is assigned only ones
784 * @reply_queue_count: number of reply queue's 793 * @reply_queue_count: number of reply queue's
785 * @reply_queue_list: link list contaning the reply queue info 794 * @reply_queue_list: link list contaning the reply queue info
786 * @reply_post_host_index: head index in the pool where FW completes IO 795 * @reply_post_host_index: head index in the pool where FW completes IO
@@ -802,6 +811,7 @@ struct MPT2SAS_ADAPTER {
802 u8 ir_firmware; 811 u8 ir_firmware;
803 int bars; 812 int bars;
804 u8 mask_interrupts; 813 u8 mask_interrupts;
814 int dma_mask;
805 815
806 /* fw fault handler */ 816 /* fw fault handler */
807 char fault_reset_work_q_name[20]; 817 char fault_reset_work_q_name[20];
@@ -972,8 +982,10 @@ struct MPT2SAS_ADAPTER {
972 982
973 /* reply post queue */ 983 /* reply post queue */
974 u16 reply_post_queue_depth; 984 u16 reply_post_queue_depth;
975 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 985 struct reply_post_struct *reply_post;
976 dma_addr_t reply_post_free_dma; 986 u8 rdpq_array_capable;
987 u8 rdpq_array_enable;
988 u8 rdpq_array_enable_assigned;
977 struct dma_pool *reply_post_free_dma_pool; 989 struct dma_pool *reply_post_free_dma_pool;
978 u8 reply_queue_count; 990 u8 reply_queue_count;
979 struct list_head reply_queue_list; 991 struct list_head reply_queue_list;