diff options
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r-- | drivers/pci/quirks.c | 64 |
1 files changed, 46 insertions, 18 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index a346487a9532..a2afb44fad10 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -2062,7 +2062,7 @@ DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, | |||
2062 | 2062 | ||
2063 | /* | 2063 | /* |
2064 | * The 82575 and 82598 may experience data corruption issues when transitioning | 2064 | * The 82575 and 82598 may experience data corruption issues when transitioning |
2065 | * out of L0S. To prevent this we need to disable L0S on the pci-e link | 2065 | * out of L0S. To prevent this we need to disable L0S on the PCIe link. |
2066 | */ | 2066 | */ |
2067 | static void quirk_disable_aspm_l0s(struct pci_dev *dev) | 2067 | static void quirk_disable_aspm_l0s(struct pci_dev *dev) |
2068 | { | 2068 | { |
@@ -4227,6 +4227,18 @@ static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags) | |||
4227 | return acs_flags ? 0 : 1; | 4227 | return acs_flags ? 0 : 1; |
4228 | } | 4228 | } |
4229 | 4229 | ||
4230 | static int pci_quirk_xgene_acs(struct pci_dev *dev, u16 acs_flags) | ||
4231 | { | ||
4232 | /* | ||
4233 | * X-Gene root matching this quirk do not allow peer-to-peer | ||
4234 | * transactions with others, allowing masking out these bits as if they | ||
4235 | * were unimplemented in the ACS capability. | ||
4236 | */ | ||
4237 | acs_flags &= ~(PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF); | ||
4238 | |||
4239 | return acs_flags ? 0 : 1; | ||
4240 | } | ||
4241 | |||
4230 | /* | 4242 | /* |
4231 | * Many Intel PCH root ports do provide ACS-like features to disable peer | 4243 | * Many Intel PCH root ports do provide ACS-like features to disable peer |
4232 | * transactions and validate bus numbers in requests, but do not provide an | 4244 | * transactions and validate bus numbers in requests, but do not provide an |
@@ -4475,6 +4487,8 @@ static const struct pci_dev_acs_enabled { | |||
4475 | { 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */ | 4487 | { 0x10df, 0x720, pci_quirk_mf_endpoint_acs }, /* Emulex Skyhawk-R */ |
4476 | /* Cavium ThunderX */ | 4488 | /* Cavium ThunderX */ |
4477 | { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs }, | 4489 | { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs }, |
4490 | /* APM X-Gene */ | ||
4491 | { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs }, | ||
4478 | { 0 } | 4492 | { 0 } |
4479 | }; | 4493 | }; |
4480 | 4494 | ||
@@ -4747,23 +4761,6 @@ static void quirk_intel_qat_vf_cap(struct pci_dev *pdev) | |||
4747 | } | 4761 | } |
4748 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443, quirk_intel_qat_vf_cap); | 4762 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x443, quirk_intel_qat_vf_cap); |
4749 | 4763 | ||
4750 | /* | ||
4751 | * VMD-enabled root ports will change the source ID for all messages | ||
4752 | * to the VMD device. Rather than doing device matching with the source | ||
4753 | * ID, the AER driver should traverse the child device tree, reading | ||
4754 | * AER registers to find the faulting device. | ||
4755 | */ | ||
4756 | static void quirk_no_aersid(struct pci_dev *pdev) | ||
4757 | { | ||
4758 | /* VMD Domain */ | ||
4759 | if (pdev->bus->sysdata && pci_domain_nr(pdev->bus) >= 0x10000) | ||
4760 | pdev->bus->bus_flags |= PCI_BUS_FLAGS_NO_AERSID; | ||
4761 | } | ||
4762 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2030, quirk_no_aersid); | ||
4763 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2031, quirk_no_aersid); | ||
4764 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2032, quirk_no_aersid); | ||
4765 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2033, quirk_no_aersid); | ||
4766 | |||
4767 | /* FLR may cause some 82579 devices to hang. */ | 4764 | /* FLR may cause some 82579 devices to hang. */ |
4768 | static void quirk_intel_no_flr(struct pci_dev *dev) | 4765 | static void quirk_intel_no_flr(struct pci_dev *dev) |
4769 | { | 4766 | { |
@@ -4771,3 +4768,34 @@ static void quirk_intel_no_flr(struct pci_dev *dev) | |||
4771 | } | 4768 | } |
4772 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_intel_no_flr); | 4769 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1502, quirk_intel_no_flr); |
4773 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_intel_no_flr); | 4770 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x1503, quirk_intel_no_flr); |
4771 | |||
4772 | static void quirk_no_ext_tags(struct pci_dev *pdev) | ||
4773 | { | ||
4774 | struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus); | ||
4775 | |||
4776 | if (!bridge) | ||
4777 | return; | ||
4778 | |||
4779 | bridge->no_ext_tags = 1; | ||
4780 | dev_info(&pdev->dev, "disabling Extended Tags (this device can't handle them)\n"); | ||
4781 | |||
4782 | pci_walk_bus(bridge->bus, pci_configure_extended_tags, NULL); | ||
4783 | } | ||
4784 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0140, quirk_no_ext_tags); | ||
4785 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0142, quirk_no_ext_tags); | ||
4786 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0144, quirk_no_ext_tags); | ||
4787 | |||
4788 | #ifdef CONFIG_PCI_ATS | ||
4789 | /* | ||
4790 | * Some devices have a broken ATS implementation causing IOMMU stalls. | ||
4791 | * Don't use ATS for those devices. | ||
4792 | */ | ||
4793 | static void quirk_no_ats(struct pci_dev *pdev) | ||
4794 | { | ||
4795 | dev_info(&pdev->dev, "disabling ATS (broken on this device)\n"); | ||
4796 | pdev->ats_cap = 0; | ||
4797 | } | ||
4798 | |||
4799 | /* AMD Stoney platform GPU */ | ||
4800 | DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_no_ats); | ||
4801 | #endif /* CONFIG_PCI_ATS */ | ||