1 files changed, 102 insertions, 74 deletions

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 38e403dddf6e..04796c056d12 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -16,7 +16,7 @@
 #define CARDBUS_LATENCY_TIMER   176     /* secondary latency timer */
 #define CARDBUS_RESERVE_BUSNR   3
 
-struct resource busn_resource = {
+static struct resource busn_resource = {
         .name   = "PCI busn",
         .start  = 0,
         .end    = 255,
@@ -269,8 +269,8 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 region.end = l + sz;
         }
 
-        pcibios_bus_to_resource(dev, res, &region);
-        pcibios_resource_to_bus(dev, &inverted_region, res);
+        pcibios_bus_to_resource(dev->bus, res, &region);
+        pcibios_resource_to_bus(dev->bus, &inverted_region, res);
 
         /*
          * If "A" is a BAR value (a bus address), "bus_to_resource(A)" is
@@ -364,7 +364,7 @@ static void pci_read_bridge_io(struct pci_bus *child)
                 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
                 region.start = base;
                 region.end = limit + io_granularity - 1;
-                pcibios_bus_to_resource(dev, res, &region);
+                pcibios_bus_to_resource(dev->bus, res, &region);
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 }
@@ -386,7 +386,7 @@ static void pci_read_bridge_mmio(struct pci_bus *child)
                 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
                 region.start = base;
                 region.end = limit + 0xfffff;
-                pcibios_bus_to_resource(dev, res, &region);
+                pcibios_bus_to_resource(dev->bus, res, &region);
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 }
@@ -436,7 +436,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
                         res->flags |= IORESOURCE_MEM_64;
                 region.start = base;
                 region.end = limit + 0xfffff;
-                pcibios_bus_to_resource(dev, res, &region);
+                pcibios_bus_to_resource(dev->bus, res, &region);
                 dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 }
@@ -518,7 +518,7 @@ static struct pci_host_bridge *pci_alloc_host_bridge(struct pci_bus *b)
         return bridge;
 }
 
-const unsigned char pcix_bus_speed[] = {
+static const unsigned char pcix_bus_speed[] = {
         PCI_SPEED_UNKNOWN,              /* 0 */
         PCI_SPEED_66MHz_PCIX,           /* 1 */
         PCI_SPEED_100MHz_PCIX,          /* 2 */
@@ -999,6 +999,60 @@ void set_pcie_hotplug_bridge(struct pci_dev *pdev)
                 pdev->is_hotplug_bridge = 1;
 }
 
+
+/**
+ * pci_cfg_space_size - get the configuration space size of the PCI device.
+ * @dev: PCI device
+ *
+ * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
+ * have 4096 bytes.  Even if the device is capable, that doesn't mean we can
+ * access it.  Maybe we don't have a way to generate extended config space
+ * accesses, or the device is behind a reverse Express bridge.  So we try
+ * reading the dword at 0x100 which must either be 0 or a valid extended
+ * capability header.
+ */
+static int pci_cfg_space_size_ext(struct pci_dev *dev)
+{
+        u32 status;
+        int pos = PCI_CFG_SPACE_SIZE;
+
+        if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
+                goto fail;
+        if (status == 0xffffffff)
+                goto fail;
+
+        return PCI_CFG_SPACE_EXP_SIZE;
+
+ fail:
+        return PCI_CFG_SPACE_SIZE;
+}
+
+int pci_cfg_space_size(struct pci_dev *dev)
+{
+        int pos;
+        u32 status;
+        u16 class;
+
+        class = dev->class >> 8;
+        if (class == PCI_CLASS_BRIDGE_HOST)
+                return pci_cfg_space_size_ext(dev);
+
+        if (!pci_is_pcie(dev)) {
+                pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
+                if (!pos)
+                        goto fail;
+
+                pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
+                if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
+                        goto fail;
+        }
+
+        return pci_cfg_space_size_ext(dev);
+
+ fail:
+        return PCI_CFG_SPACE_SIZE;
+}
+
 #define LEGACY_IO_RESOURCE      (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
 
 /**
@@ -1084,24 +1138,24 @@ int pci_setup_device(struct pci_dev *dev)
                                 region.end = 0x1F7;
                                 res = &dev->resource[0];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                                 region.start = 0x3F6;
                                 region.end = 0x3F6;
                                 res = &dev->resource[1];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                         }
                         if ((progif & 4) == 0) {
                                 region.start = 0x170;
                                 region.end = 0x177;
                                 res = &dev->resource[2];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                                 region.start = 0x376;
                                 region.end = 0x376;
                                 res = &dev->resource[3];
                                 res->flags = LEGACY_IO_RESOURCE;
-                                pcibios_bus_to_resource(dev, res, &region);
+                                pcibios_bus_to_resource(dev->bus, res, &region);
                         }
                 }
                 break;
@@ -1154,6 +1208,18 @@ static void pci_release_capabilities(struct pci_dev *dev)
         pci_free_cap_save_buffers(dev);
 }
 
+static void pci_free_resources(struct pci_dev *dev)
+{
+        int i;
+
+        pci_cleanup_rom(dev);
+        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+                struct resource *res = dev->resource + i;
+                if (res->parent)
+                        release_resource(res);
+        }
+}
+
 /**
  * pci_release_dev - free a pci device structure when all users of it are finished.
  * @dev: device that's been disconnected
@@ -1163,9 +1229,14 @@ static void pci_release_capabilities(struct pci_dev *dev)
  */
 static void pci_release_dev(struct device *dev)
 {
-        struct pci_dev *pci_dev;
+        struct pci_dev *pci_dev = to_pci_dev(dev);
+
+        down_write(&pci_bus_sem);
+        list_del(&pci_dev->bus_list);
+        up_write(&pci_bus_sem);
+
+        pci_free_resources(pci_dev);
 
-        pci_dev = to_pci_dev(dev);
         pci_release_capabilities(pci_dev);
         pci_release_of_node(pci_dev);
         pcibios_release_device(pci_dev);
@@ -1173,59 +1244,6 @@ static void pci_release_dev(struct device *dev)
         kfree(pci_dev);
 }
 
-/**
- * pci_cfg_space_size - get the configuration space size of the PCI device.
- * @dev: PCI device
- *
- * Regular PCI devices have 256 bytes, but PCI-X 2 and PCI Express devices
- * have 4096 bytes.  Even if the device is capable, that doesn't mean we can
- * access it.  Maybe we don't have a way to generate extended config space
- * accesses, or the device is behind a reverse Express bridge.  So we try
- * reading the dword at 0x100 which must either be 0 or a valid extended
- * capability header.
- */
-int pci_cfg_space_size_ext(struct pci_dev *dev)
-{
-        u32 status;
-        int pos = PCI_CFG_SPACE_SIZE;
-
-        if (pci_read_config_dword(dev, pos, &status) != PCIBIOS_SUCCESSFUL)
-                goto fail;
-        if (status == 0xffffffff)
-                goto fail;
-
-        return PCI_CFG_SPACE_EXP_SIZE;
-
- fail:
-        return PCI_CFG_SPACE_SIZE;
-}
-
-int pci_cfg_space_size(struct pci_dev *dev)
-{
-        int pos;
-        u32 status;
-        u16 class;
-
-        class = dev->class >> 8;
-        if (class == PCI_CLASS_BRIDGE_HOST)
-                return pci_cfg_space_size_ext(dev);
-
-        if (!pci_is_pcie(dev)) {
-                pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
-                if (!pos)
-                        goto fail;
-
-                pci_read_config_dword(dev, pos + PCI_X_STATUS, &status);
-                if (!(status & (PCI_X_STATUS_266MHZ | PCI_X_STATUS_533MHZ)))
-                        goto fail;
-        }
-
-        return pci_cfg_space_size_ext(dev);
-
- fail:
-        return PCI_CFG_SPACE_SIZE;
-}
-
 struct pci_dev *pci_alloc_dev(struct pci_bus *bus)
 {
         struct pci_dev *dev;
@@ -1242,12 +1260,6 @@ struct pci_dev *pci_alloc_dev(struct pci_bus *bus)
 }
 EXPORT_SYMBOL(pci_alloc_dev);
 
-struct pci_dev *alloc_pci_dev(void)
-{
-        return pci_alloc_dev(NULL);
-}
-EXPORT_SYMBOL(alloc_pci_dev);
-
 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l,
                                  int crs_timeout)
 {
@@ -1381,8 +1393,6 @@ void pci_device_add(struct pci_dev *dev, struct pci_bus *bus)
         dev->match_driver = false;
         ret = device_add(&dev->dev);
         WARN_ON(ret < 0);
-
-        pci_proc_attach_device(dev);
 }
 
 struct pci_dev *__ref pci_scan_single_device(struct pci_bus *bus, int devfn)
@@ -2014,6 +2024,24 @@ EXPORT_SYMBOL(pci_scan_slot);
 EXPORT_SYMBOL(pci_scan_bridge);
 EXPORT_SYMBOL_GPL(pci_scan_child_bus);
 
+/*
+ * pci_rescan_bus(), pci_rescan_bus_bridge_resize() and PCI device removal
+ * routines should always be executed under this mutex.
+ */
+static DEFINE_MUTEX(pci_rescan_remove_lock);
+
+void pci_lock_rescan_remove(void)
+{
+        mutex_lock(&pci_rescan_remove_lock);
+}
+EXPORT_SYMBOL_GPL(pci_lock_rescan_remove);
+
+void pci_unlock_rescan_remove(void)
+{
+        mutex_unlock(&pci_rescan_remove_lock);
+}
+EXPORT_SYMBOL_GPL(pci_unlock_rescan_remove);
+
 static int __init pci_sort_bf_cmp(const struct device *d_a, const struct device *d_b)
 {
         const struct pci_dev *a = to_pci_dev(d_a);