1 files changed, 283 insertions, 64 deletions

diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 083cf37ca047..0fb0fdb223d5 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -25,6 +25,7 @@
  */
 
 #include <linux/clk.h>
+#include <linux/debugfs.h>
 #include <linux/delay.h>
 #include <linux/export.h>
 #include <linux/interrupt.h>
@@ -41,11 +42,12 @@
 #include <linux/reset.h>
 #include <linux/sizes.h>
 #include <linux/slab.h>
-#include <linux/tegra-cpuidle.h>
-#include <linux/tegra-powergate.h>
 #include <linux/vmalloc.h>
 #include <linux/regulator/consumer.h>
 
+#include <soc/tegra/cpuidle.h>
+#include <soc/tegra/pmc.h>
+
 #include <asm/mach/irq.h>
 #include <asm/mach/map.h>
 #include <asm/mach/pci.h>
@@ -233,7 +235,6 @@ struct tegra_pcie_soc_data {
         bool has_pex_clkreq_en;
         bool has_pex_bias_ctrl;
         bool has_intr_prsnt_sense;
-        bool has_avdd_supply;
         bool has_cml_clk;
 };
 
@@ -272,11 +273,11 @@ struct tegra_pcie {
         unsigned int num_ports;
         u32 xbar_config;
 
-        struct regulator *pex_clk_supply;
-        struct regulator *vdd_supply;
-        struct regulator *avdd_supply;
+        struct regulator_bulk_data *supplies;
+        unsigned int num_supplies;
 
         const struct tegra_pcie_soc_data *soc_data;
+        struct dentry *debugfs;
 };
 
 struct tegra_pcie_port {
@@ -894,7 +895,6 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie)
 
 static void tegra_pcie_power_off(struct tegra_pcie *pcie)
 {
-        const struct tegra_pcie_soc_data *soc = pcie->soc_data;
         int err;
 
         /* TODO: disable and unprepare clocks? */
@@ -905,23 +905,9 @@ static void tegra_pcie_power_off(struct tegra_pcie *pcie)
 
         tegra_powergate_power_off(TEGRA_POWERGATE_PCIE);
 
-        if (soc->has_avdd_supply) {
-                err = regulator_disable(pcie->avdd_supply);
-                if (err < 0)
-                        dev_warn(pcie->dev,
-                                 "failed to disable AVDD regulator: %d\n",
-                                 err);
-        }
-
-        err = regulator_disable(pcie->pex_clk_supply);
+        err = regulator_bulk_disable(pcie->num_supplies, pcie->supplies);
         if (err < 0)
-                dev_warn(pcie->dev, "failed to disable pex-clk regulator: %d\n",
-                         err);
-
-        err = regulator_disable(pcie->vdd_supply);
-        if (err < 0)
-                dev_warn(pcie->dev, "failed to disable VDD regulator: %d\n",
-                         err);
+                dev_warn(pcie->dev, "failed to disable regulators: %d\n", err);
 }
 
 static int tegra_pcie_power_on(struct tegra_pcie *pcie)
@@ -936,28 +922,9 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
         tegra_powergate_power_off(TEGRA_POWERGATE_PCIE);
 
         /* enable regulators */
-        err = regulator_enable(pcie->vdd_supply);
-        if (err < 0) {
-                dev_err(pcie->dev, "failed to enable VDD regulator: %d\n", err);
-                return err;
-        }
-
-        err = regulator_enable(pcie->pex_clk_supply);
-        if (err < 0) {
-                dev_err(pcie->dev, "failed to enable pex-clk regulator: %d\n",
-                        err);
-                return err;
-        }
-
-        if (soc->has_avdd_supply) {
-                err = regulator_enable(pcie->avdd_supply);
-                if (err < 0) {
-                        dev_err(pcie->dev,
-                                "failed to enable AVDD regulator: %d\n",
-                                err);
-                        return err;
-                }
-        }
+        err = regulator_bulk_enable(pcie->num_supplies, pcie->supplies);
+        if (err < 0)
+                dev_err(pcie->dev, "failed to enable regulators: %d\n", err);
 
         err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE,
                                                 pcie->pex_clk,
@@ -1394,14 +1361,157 @@ static int tegra_pcie_get_xbar_config(struct tegra_pcie *pcie, u32 lanes,
         return -EINVAL;
 }
 
+/*
+ * Check whether a given set of supplies is available in a device tree node.
+ * This is used to check whether the new or the legacy device tree bindings
+ * should be used.
+ */
+static bool of_regulator_bulk_available(struct device_node *np,
+                                        struct regulator_bulk_data *supplies,
+                                        unsigned int num_supplies)
+{
+        char property[32];
+        unsigned int i;
+
+        for (i = 0; i < num_supplies; i++) {
+                snprintf(property, 32, "%s-supply", supplies[i].supply);
+
+                if (of_find_property(np, property, NULL) == NULL)
+                        return false;
+        }
+
+        return true;
+}
+
+/*
+ * Old versions of the device tree binding for this device used a set of power
+ * supplies that didn't match the hardware inputs. This happened to work for a
+ * number of cases but is not future proof. However to preserve backwards-
+ * compatibility with old device trees, this function will try to use the old
+ * set of supplies.
+ */
+static int tegra_pcie_get_legacy_regulators(struct tegra_pcie *pcie)
+{
+        struct device_node *np = pcie->dev->of_node;
+
+        if (of_device_is_compatible(np, "nvidia,tegra30-pcie"))
+                pcie->num_supplies = 3;
+        else if (of_device_is_compatible(np, "nvidia,tegra20-pcie"))
+                pcie->num_supplies = 2;
+
+        if (pcie->num_supplies == 0) {
+                dev_err(pcie->dev, "device %s not supported in legacy mode\n",
+                        np->full_name);
+                return -ENODEV;
+        }
+
+        pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies,
+                                      sizeof(*pcie->supplies),
+                                      GFP_KERNEL);
+        if (!pcie->supplies)
+                return -ENOMEM;
+
+        pcie->supplies[0].supply = "pex-clk";
+        pcie->supplies[1].supply = "vdd";
+
+        if (pcie->num_supplies > 2)
+                pcie->supplies[2].supply = "avdd";
+
+        return devm_regulator_bulk_get(pcie->dev, pcie->num_supplies,
+                                       pcie->supplies);
+}
+
+/*
+ * Obtains the list of regulators required for a particular generation of the
+ * IP block.
+ *
+ * This would've been nice to do simply by providing static tables for use
+ * with the regulator_bulk_*() API, but unfortunately Tegra30 is a bit quirky
+ * in that it has two pairs or AVDD_PEX and VDD_PEX supplies (PEXA and PEXB)
+ * and either seems to be optional depending on which ports are being used.
+ */
+static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask)
+{
+        struct device_node *np = pcie->dev->of_node;
+        unsigned int i = 0;
+
+        if (of_device_is_compatible(np, "nvidia,tegra30-pcie")) {
+                bool need_pexa = false, need_pexb = false;
+
+                /* VDD_PEXA and AVDD_PEXA supply lanes 0 to 3 */
+                if (lane_mask & 0x0f)
+                        need_pexa = true;
+
+                /* VDD_PEXB and AVDD_PEXB supply lanes 4 to 5 */
+                if (lane_mask & 0x30)
+                        need_pexb = true;
+
+                pcie->num_supplies = 4 + (need_pexa ? 2 : 0) +
+                                         (need_pexb ? 2 : 0);
+
+                pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies,
+                                              sizeof(*pcie->supplies),
+                                              GFP_KERNEL);
+                if (!pcie->supplies)
+                        return -ENOMEM;
+
+                pcie->supplies[i++].supply = "avdd-pex-pll";
+                pcie->supplies[i++].supply = "hvdd-pex";
+                pcie->supplies[i++].supply = "vddio-pex-ctl";
+                pcie->supplies[i++].supply = "avdd-plle";
+
+                if (need_pexa) {
+                        pcie->supplies[i++].supply = "avdd-pexa";
+                        pcie->supplies[i++].supply = "vdd-pexa";
+                }
+
+                if (need_pexb) {
+                        pcie->supplies[i++].supply = "avdd-pexb";
+                        pcie->supplies[i++].supply = "vdd-pexb";
+                }
+        } else if (of_device_is_compatible(np, "nvidia,tegra20-pcie")) {
+                pcie->num_supplies = 5;
+
+                pcie->supplies = devm_kcalloc(pcie->dev, pcie->num_supplies,
+                                              sizeof(*pcie->supplies),
+                                              GFP_KERNEL);
+                if (!pcie->supplies)
+                        return -ENOMEM;
+
+                pcie->supplies[0].supply = "avdd-pex";
+                pcie->supplies[1].supply = "vdd-pex";
+                pcie->supplies[2].supply = "avdd-pex-pll";
+                pcie->supplies[3].supply = "avdd-plle";
+                pcie->supplies[4].supply = "vddio-pex-clk";
+        }
+
+        if (of_regulator_bulk_available(pcie->dev->of_node, pcie->supplies,
+                                        pcie->num_supplies))
+                return devm_regulator_bulk_get(pcie->dev, pcie->num_supplies,
+                                               pcie->supplies);
+
+        /*
+         * If not all regulators are available for this new scheme, assume
+         * that the device tree complies with an older version of the device
+         * tree binding.
+         */
+        dev_info(pcie->dev, "using legacy DT binding for power supplies\n");
+
+        devm_kfree(pcie->dev, pcie->supplies);
+        pcie->num_supplies = 0;
+
+        return tegra_pcie_get_legacy_regulators(pcie);
+}
+
 static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
 {
         const struct tegra_pcie_soc_data *soc = pcie->soc_data;
         struct device_node *np = pcie->dev->of_node, *port;
         struct of_pci_range_parser parser;
         struct of_pci_range range;
+        u32 lanes = 0, mask = 0;
+        unsigned int lane = 0;
         struct resource res;
-        u32 lanes = 0;
         int err;
 
         if (of_pci_range_parser_init(&parser, np)) {
@@ -1409,20 +1519,6 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
                 return -EINVAL;
         }
 
-        pcie->vdd_supply = devm_regulator_get(pcie->dev, "vdd");
-        if (IS_ERR(pcie->vdd_supply))
-                return PTR_ERR(pcie->vdd_supply);
-
-        pcie->pex_clk_supply = devm_regulator_get(pcie->dev, "pex-clk");
-        if (IS_ERR(pcie->pex_clk_supply))
-                return PTR_ERR(pcie->pex_clk_supply);
-
-        if (soc->has_avdd_supply) {
-                pcie->avdd_supply = devm_regulator_get(pcie->dev, "avdd");
-                if (IS_ERR(pcie->avdd_supply))
-                        return PTR_ERR(pcie->avdd_supply);
-        }
-
         for_each_of_pci_range(&parser, &range) {
                 of_pci_range_to_resource(&range, np, &res);
 
@@ -1490,8 +1586,13 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
 
                 lanes |= value << (index << 3);
 
-                if (!of_device_is_available(port))
+                if (!of_device_is_available(port)) {
+                        lane += value;
                         continue;
+                }
+
+                mask |= ((1 << value) - 1) << lane;
+                lane += value;
 
                 rp = devm_kzalloc(pcie->dev, sizeof(*rp), GFP_KERNEL);
                 if (!rp)
@@ -1522,6 +1623,10 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
                 return err;
         }
 
+        err = tegra_pcie_get_regulators(pcie, mask);
+        if (err < 0)
+                return err;
+
         return 0;
 }
 
@@ -1615,7 +1720,6 @@ static const struct tegra_pcie_soc_data tegra20_pcie_data = {
         .has_pex_clkreq_en = false,
         .has_pex_bias_ctrl = false,
         .has_intr_prsnt_sense = false,
-        .has_avdd_supply = false,
         .has_cml_clk = false,
 };
 
@@ -1627,7 +1731,6 @@ static const struct tegra_pcie_soc_data tegra30_pcie_data = {
         .has_pex_clkreq_en = true,
         .has_pex_bias_ctrl = true,
         .has_intr_prsnt_sense = true,
-        .has_avdd_supply = true,
         .has_cml_clk = true,
 };
 
@@ -1638,6 +1741,115 @@ static const struct of_device_id tegra_pcie_of_match[] = {
 };
 MODULE_DEVICE_TABLE(of, tegra_pcie_of_match);
 
+static void *tegra_pcie_ports_seq_start(struct seq_file *s, loff_t *pos)
+{
+        struct tegra_pcie *pcie = s->private;
+
+        if (list_empty(&pcie->ports))
+                return NULL;
+
+        seq_printf(s, "Index  Status\n");
+
+        return seq_list_start(&pcie->ports, *pos);
+}
+
+static void *tegra_pcie_ports_seq_next(struct seq_file *s, void *v, loff_t *pos)
+{
+        struct tegra_pcie *pcie = s->private;
+
+        return seq_list_next(v, &pcie->ports, pos);
+}
+
+static void tegra_pcie_ports_seq_stop(struct seq_file *s, void *v)
+{
+}
+
+static int tegra_pcie_ports_seq_show(struct seq_file *s, void *v)
+{
+        bool up = false, active = false;
+        struct tegra_pcie_port *port;
+        unsigned int value;
+
+        port = list_entry(v, struct tegra_pcie_port, list);
+
+        value = readl(port->base + RP_VEND_XP);
+
+        if (value & RP_VEND_XP_DL_UP)
+                up = true;
+
+        value = readl(port->base + RP_LINK_CONTROL_STATUS);
+
+        if (value & RP_LINK_CONTROL_STATUS_DL_LINK_ACTIVE)
+                active = true;
+
+        seq_printf(s, "%2u     ", port->index);
+
+        if (up)
+                seq_printf(s, "up");
+
+        if (active) {
+                if (up)
+                        seq_printf(s, ", ");
+
+                seq_printf(s, "active");
+        }
+
+        seq_printf(s, "\n");
+        return 0;
+}
+
+static const struct seq_operations tegra_pcie_ports_seq_ops = {
+        .start = tegra_pcie_ports_seq_start,
+        .next = tegra_pcie_ports_seq_next,
+        .stop = tegra_pcie_ports_seq_stop,
+        .show = tegra_pcie_ports_seq_show,
+};
+
+static int tegra_pcie_ports_open(struct inode *inode, struct file *file)
+{
+        struct tegra_pcie *pcie = inode->i_private;
+        struct seq_file *s;
+        int err;
+
+        err = seq_open(file, &tegra_pcie_ports_seq_ops);
+        if (err)
+                return err;
+
+        s = file->private_data;
+        s->private = pcie;
+
+        return 0;
+}
+
+static const struct file_operations tegra_pcie_ports_ops = {
+        .owner = THIS_MODULE,
+        .open = tegra_pcie_ports_open,
+        .read = seq_read,
+        .llseek = seq_lseek,
+        .release = seq_release,
+};
+
+static int tegra_pcie_debugfs_init(struct tegra_pcie *pcie)
+{
+        struct dentry *file;
+
+        pcie->debugfs = debugfs_create_dir("pcie", NULL);
+        if (!pcie->debugfs)
+                return -ENOMEM;
+
+        file = debugfs_create_file("ports", S_IFREG | S_IRUGO, pcie->debugfs,
+                                   pcie, &tegra_pcie_ports_ops);
+        if (!file)
+                goto remove;
+
+        return 0;
+
+remove:
+        debugfs_remove_recursive(pcie->debugfs);
+        pcie->debugfs = NULL;
+        return -ENOMEM;
+}
+
 static int tegra_pcie_probe(struct platform_device *pdev)
 {
         const struct of_device_id *match;
@@ -1692,6 +1904,13 @@ static int tegra_pcie_probe(struct platform_device *pdev)
                 goto disable_msi;
         }
 
+        if (IS_ENABLED(CONFIG_DEBUG_FS)) {
+                err = tegra_pcie_debugfs_init(pcie);
+                if (err < 0)
+                        dev_err(&pdev->dev, "failed to setup debugfs: %d\n",
+                                err);
+        }
+
         platform_set_drvdata(pdev, pcie);
         return 0;
 
@@ -1716,4 +1935,4 @@ module_platform_driver(tegra_pcie_driver);
 
 MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
 MODULE_DESCRIPTION("NVIDIA Tegra PCIe driver");
-MODULE_LICENSE("GPLv2");
+MODULE_LICENSE("GPL v2");