1 files changed, 0 insertions, 55 deletions

diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
index 7b363437d851..c9c72595bd20 100644
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -111,24 +111,6 @@
 #define PCIE_MSI_MASK_REG                       (CONTROL_BASE_ADDR + 0x5C)
 #define PCIE_MSI_PAYLOAD_REG                    (CONTROL_BASE_ADDR + 0x9C)
 
-/* PCIe window configuration */
-#define OB_WIN_BASE_ADDR                        0x4c00
-#define OB_WIN_BLOCK_SIZE                       0x20
-#define OB_WIN_REG_ADDR(win, offset)            (OB_WIN_BASE_ADDR + \
-                                                 OB_WIN_BLOCK_SIZE * (win) + \
-                                                 (offset))
-#define OB_WIN_MATCH_LS(win)                    OB_WIN_REG_ADDR(win, 0x00)
-#define OB_WIN_MATCH_MS(win)                    OB_WIN_REG_ADDR(win, 0x04)
-#define OB_WIN_REMAP_LS(win)                    OB_WIN_REG_ADDR(win, 0x08)
-#define OB_WIN_REMAP_MS(win)                    OB_WIN_REG_ADDR(win, 0x0c)
-#define OB_WIN_MASK_LS(win)                     OB_WIN_REG_ADDR(win, 0x10)
-#define OB_WIN_MASK_MS(win)                     OB_WIN_REG_ADDR(win, 0x14)
-#define OB_WIN_ACTIONS(win)                     OB_WIN_REG_ADDR(win, 0x18)
-
-/* PCIe window types */
-#define OB_PCIE_MEM                             0x0
-#define OB_PCIE_IO                              0x4
-
 /* LMI registers base address and register offsets */
 #define LMI_BASE_ADDR                           0x6000
 #define CFG_REG                                 (LMI_BASE_ADDR + 0x0)
@@ -247,34 +229,9 @@ static int advk_pcie_wait_for_link(struct advk_pcie *pcie)
         return -ETIMEDOUT;
 }
 
-/*
- * Set PCIe address window register which could be used for memory
- * mapping.
- */
-static void advk_pcie_set_ob_win(struct advk_pcie *pcie,
-                                 u32 win_num, u32 match_ms,
-                                 u32 match_ls, u32 mask_ms,
-                                 u32 mask_ls, u32 remap_ms,
-                                 u32 remap_ls, u32 action)
-{
-        advk_writel(pcie, match_ls, OB_WIN_MATCH_LS(win_num));
-        advk_writel(pcie, match_ms, OB_WIN_MATCH_MS(win_num));
-        advk_writel(pcie, mask_ms, OB_WIN_MASK_MS(win_num));
-        advk_writel(pcie, mask_ls, OB_WIN_MASK_LS(win_num));
-        advk_writel(pcie, remap_ms, OB_WIN_REMAP_MS(win_num));
-        advk_writel(pcie, remap_ls, OB_WIN_REMAP_LS(win_num));
-        advk_writel(pcie, action, OB_WIN_ACTIONS(win_num));
-        advk_writel(pcie, match_ls | BIT(0), OB_WIN_MATCH_LS(win_num));
-}
-
 static void advk_pcie_setup_hw(struct advk_pcie *pcie)
 {
         u32 reg;
-        int i;
-
-        /* Point PCIe unit MBUS decode windows to DRAM space */
-        for (i = 0; i < 8; i++)
-                advk_pcie_set_ob_win(pcie, i, 0, 0, 0, 0, 0, 0, 0);
 
         /* Set to Direct mode */
         reg = advk_readl(pcie, CTRL_CONFIG_REG);
@@ -852,12 +809,6 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
 
                 switch (resource_type(res)) {
                 case IORESOURCE_IO:
-                        advk_pcie_set_ob_win(pcie, 1,
-                                             upper_32_bits(res->start),
-                                             lower_32_bits(res->start),
-                                             0, 0xF8000000, 0,
-                                             lower_32_bits(res->start),
-                                             OB_PCIE_IO);
                         err = pci_remap_iospace(res, iobase);
                         if (err) {
                                 dev_warn(dev, "error %d: failed to map resource %pR\n",
@@ -866,12 +817,6 @@ static int advk_pcie_parse_request_of_pci_ranges(struct advk_pcie *pcie)
                         }
                         break;
                 case IORESOURCE_MEM:
-                        advk_pcie_set_ob_win(pcie, 0,
-                                             upper_32_bits(res->start),
-                                             lower_32_bits(res->start),
-                                             0x0, 0xF8000000, 0,
-                                             lower_32_bits(res->start),
-                                             (2 << 20) | OB_PCIE_MEM);
                         res_valid |= !(res->flags & IORESOURCE_PREFETCH);
                         break;
                 case IORESOURCE_BUS: