diff options
Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8723be/rf.c')
-rw-r--r-- | drivers/net/wireless/rtlwifi/rtl8723be/rf.c | 144 |
1 files changed, 76 insertions, 68 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8723be/rf.c b/drivers/net/wireless/rtlwifi/rtl8723be/rf.c index 486294930a7b..5ed4492d3c80 100644 --- a/drivers/net/wireless/rtlwifi/rtl8723be/rf.c +++ b/drivers/net/wireless/rtlwifi/rtl8723be/rf.c | |||
@@ -51,7 +51,7 @@ void rtl8723be_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth) | |||
51 | rtlphy->rfreg_chnlval[0]); | 51 | rtlphy->rfreg_chnlval[0]); |
52 | break; | 52 | break; |
53 | default: | 53 | default: |
54 | RT_TRACE(rtlpriv, COMP_INIT, DBG_EMERG, | 54 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, |
55 | "unknown bandwidth: %#X\n", bandwidth); | 55 | "unknown bandwidth: %#X\n", bandwidth); |
56 | break; | 56 | break; |
57 | } | 57 | } |
@@ -93,18 +93,20 @@ void rtl8723be_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw, | |||
93 | (ppowerlevel[idx1] << 16) | | 93 | (ppowerlevel[idx1] << 16) | |
94 | (ppowerlevel[idx1] << 24); | 94 | (ppowerlevel[idx1] << 24); |
95 | } | 95 | } |
96 | |||
96 | if (rtlefuse->eeprom_regulatory == 0) { | 97 | if (rtlefuse->eeprom_regulatory == 0) { |
97 | tmpval = | 98 | tmpval = |
98 | (rtlphy->mcs_offset[0][6]) + | 99 | (rtlphy->mcs_txpwrlevel_origoffset[0][6]) + |
99 | (rtlphy->mcs_offset[0][7] << 8); | 100 | (rtlphy->mcs_txpwrlevel_origoffset[0][7] << 8); |
100 | tx_agc[RF90_PATH_A] += tmpval; | 101 | tx_agc[RF90_PATH_A] += tmpval; |
101 | 102 | ||
102 | tmpval = (rtlphy->mcs_offset[0][14]) + | 103 | tmpval = (rtlphy->mcs_txpwrlevel_origoffset[0][14]) + |
103 | (rtlphy->mcs_offset[0][15] << | 104 | (rtlphy->mcs_txpwrlevel_origoffset[0][15] << |
104 | 24); | 105 | 24); |
105 | tx_agc[RF90_PATH_B] += tmpval; | 106 | tx_agc[RF90_PATH_B] += tmpval; |
106 | } | 107 | } |
107 | } | 108 | } |
109 | |||
108 | for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { | 110 | for (idx1 = RF90_PATH_A; idx1 <= RF90_PATH_B; idx1++) { |
109 | ptr = (u8 *)(&(tx_agc[idx1])); | 111 | ptr = (u8 *)(&(tx_agc[idx1])); |
110 | for (idx2 = 0; idx2 < 4; idx2++) { | 112 | for (idx2 = 0; idx2 < 4; idx2++) { |
@@ -124,30 +126,32 @@ void rtl8723be_phy_rf6052_set_cck_txpower(struct ieee80211_hw *hw, | |||
124 | tmpval = tx_agc[RF90_PATH_A] & 0xff; | 126 | tmpval = tx_agc[RF90_PATH_A] & 0xff; |
125 | rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval); | 127 | rtl_set_bbreg(hw, RTXAGC_A_CCK1_MCS32, MASKBYTE1, tmpval); |
126 | 128 | ||
127 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 129 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
128 | "CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, | 130 | "CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, |
129 | RTXAGC_A_CCK1_MCS32); | 131 | RTXAGC_A_CCK1_MCS32); |
130 | 132 | ||
131 | tmpval = tx_agc[RF90_PATH_A] >> 8; | 133 | tmpval = tx_agc[RF90_PATH_A] >> 8; |
132 | 134 | ||
135 | /*tmpval = tmpval & 0xff00ffff;*/ | ||
136 | |||
133 | rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); | 137 | rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); |
134 | 138 | ||
135 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 139 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
136 | "CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, | 140 | "CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, |
137 | RTXAGC_B_CCK11_A_CCK2_11); | 141 | RTXAGC_B_CCK11_A_CCK2_11); |
138 | 142 | ||
139 | tmpval = tx_agc[RF90_PATH_B] >> 24; | 143 | tmpval = tx_agc[RF90_PATH_B] >> 24; |
140 | rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, MASKBYTE0, tmpval); | 144 | rtl_set_bbreg(hw, RTXAGC_B_CCK11_A_CCK2_11, MASKBYTE0, tmpval); |
141 | 145 | ||
142 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 146 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
143 | "CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, | 147 | "CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, |
144 | RTXAGC_B_CCK11_A_CCK2_11); | 148 | RTXAGC_B_CCK11_A_CCK2_11); |
145 | 149 | ||
146 | tmpval = tx_agc[RF90_PATH_B] & 0x00ffffff; | 150 | tmpval = tx_agc[RF90_PATH_B] & 0x00ffffff; |
147 | rtl_set_bbreg(hw, RTXAGC_B_CCK1_55_MCS32, 0xffffff00, tmpval); | 151 | rtl_set_bbreg(hw, RTXAGC_B_CCK1_55_MCS32, 0xffffff00, tmpval); |
148 | 152 | ||
149 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 153 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
150 | "CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, | 154 | "CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, |
151 | RTXAGC_B_CCK1_55_MCS32); | 155 | RTXAGC_B_CCK1_55_MCS32); |
152 | } | 156 | } |
153 | 157 | ||
@@ -169,8 +173,8 @@ static void rtl8723be_phy_get_power_base(struct ieee80211_hw *hw, | |||
169 | powerbase0 = (powerbase0 << 24) | (powerbase0 << 16) | | 173 | powerbase0 = (powerbase0 << 24) | (powerbase0 << 16) | |
170 | (powerbase0 << 8) | powerbase0; | 174 | (powerbase0 << 8) | powerbase0; |
171 | *(ofdmbase + i) = powerbase0; | 175 | *(ofdmbase + i) = powerbase0; |
172 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 176 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
173 | " [OFDM power base index rf(%c) = 0x%x]\n", | 177 | " [OFDM power base index rf(%c) = 0x%x]\n", |
174 | ((i == 0) ? 'A' : 'B'), *(ofdmbase + i)); | 178 | ((i == 0) ? 'A' : 'B'), *(ofdmbase + i)); |
175 | } | 179 | } |
176 | 180 | ||
@@ -179,27 +183,30 @@ static void rtl8723be_phy_get_power_base(struct ieee80211_hw *hw, | |||
179 | powerlevel[i] = ppowerlevel_bw20[i]; | 183 | powerlevel[i] = ppowerlevel_bw20[i]; |
180 | else | 184 | else |
181 | powerlevel[i] = ppowerlevel_bw40[i]; | 185 | powerlevel[i] = ppowerlevel_bw40[i]; |
186 | |||
182 | powerbase1 = powerlevel[i]; | 187 | powerbase1 = powerlevel[i]; |
183 | powerbase1 = (powerbase1 << 24) | (powerbase1 << 16) | | 188 | powerbase1 = (powerbase1 << 24) | (powerbase1 << 16) | |
184 | (powerbase1 << 8) | powerbase1; | 189 | (powerbase1 << 8) | powerbase1; |
185 | 190 | ||
186 | *(mcsbase + i) = powerbase1; | 191 | *(mcsbase + i) = powerbase1; |
187 | 192 | ||
188 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 193 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
189 | " [MCS power base index rf(%c) = 0x%x]\n", | 194 | " [MCS power base index rf(%c) = 0x%x]\n", |
190 | ((i == 0) ? 'A' : 'B'), *(mcsbase + i)); | 195 | ((i == 0) ? 'A' : 'B'), *(mcsbase + i)); |
191 | } | 196 | } |
192 | } | 197 | } |
193 | 198 | ||
194 | static void txpwr_by_regulatory(struct ieee80211_hw *hw, u8 channel, u8 index, | 199 | static void _rtl8723be_get_txpower_writeval_by_regulatory( |
195 | u32 *powerbase0, u32 *powerbase1, | 200 | struct ieee80211_hw *hw, |
196 | u32 *p_outwriteval) | 201 | u8 channel, u8 index, |
202 | u32 *powerbase0, | ||
203 | u32 *powerbase1, | ||
204 | u32 *p_outwriteval) | ||
197 | { | 205 | { |
198 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 206 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
199 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 207 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
200 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); | 208 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); |
201 | u8 i, chnlgroup = 0, pwr_diff_limit[4]; | 209 | u8 i, chnlgroup = 0, pwr_diff_limit[4], pwr_diff = 0, customer_pwr_diff; |
202 | u8 pwr_diff = 0, customer_pwr_diff; | ||
203 | u32 writeval, customer_limit, rf; | 210 | u32 writeval, customer_limit, rf; |
204 | 211 | ||
205 | for (rf = 0; rf < 2; rf++) { | 212 | for (rf = 0; rf < 2; rf++) { |
@@ -208,13 +215,13 @@ static void txpwr_by_regulatory(struct ieee80211_hw *hw, u8 channel, u8 index, | |||
208 | chnlgroup = 0; | 215 | chnlgroup = 0; |
209 | 216 | ||
210 | writeval = | 217 | writeval = |
211 | rtlphy->mcs_offset[chnlgroup][index + (rf ? 8 : 0)] | 218 | rtlphy->mcs_txpwrlevel_origoffset[chnlgroup][index + |
219 | (rf ? 8 : 0)] | ||
212 | + ((index < 2) ? powerbase0[rf] : powerbase1[rf]); | 220 | + ((index < 2) ? powerbase0[rf] : powerbase1[rf]); |
213 | 221 | ||
214 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 222 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
215 | "RTK better performance, " | 223 | "RTK better performance, writeval(%c) = 0x%x\n", |
216 | "writeval(%c) = 0x%x\n", | 224 | ((rf == 0) ? 'A' : 'B'), writeval); |
217 | ((rf == 0) ? 'A' : 'B'), writeval); | ||
218 | break; | 225 | break; |
219 | case 1: | 226 | case 1: |
220 | if (rtlphy->pwrgroup_cnt == 1) { | 227 | if (rtlphy->pwrgroup_cnt == 1) { |
@@ -233,43 +240,41 @@ static void txpwr_by_regulatory(struct ieee80211_hw *hw, u8 channel, u8 index, | |||
233 | else if (channel == 14) | 240 | else if (channel == 14) |
234 | chnlgroup = 5; | 241 | chnlgroup = 5; |
235 | } | 242 | } |
236 | writeval = rtlphy->mcs_offset[chnlgroup] | 243 | |
244 | writeval = | ||
245 | rtlphy->mcs_txpwrlevel_origoffset[chnlgroup] | ||
237 | [index + (rf ? 8 : 0)] + ((index < 2) ? | 246 | [index + (rf ? 8 : 0)] + ((index < 2) ? |
238 | powerbase0[rf] : | 247 | powerbase0[rf] : |
239 | powerbase1[rf]); | 248 | powerbase1[rf]); |
240 | 249 | ||
241 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 250 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
242 | "Realtek regulatory, 20MHz, " | 251 | "Realtek regulatory, 20MHz, writeval(%c) = 0x%x\n", |
243 | "writeval(%c) = 0x%x\n", | 252 | ((rf == 0) ? 'A' : 'B'), writeval); |
244 | ((rf == 0) ? 'A' : 'B'), writeval); | ||
245 | 253 | ||
246 | break; | 254 | break; |
247 | case 2: | 255 | case 2: |
248 | writeval = | 256 | writeval = |
249 | ((index < 2) ? powerbase0[rf] : powerbase1[rf]); | 257 | ((index < 2) ? powerbase0[rf] : powerbase1[rf]); |
250 | 258 | ||
251 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 259 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
252 | "Better regulatory, " | 260 | "Better regulatory, writeval(%c) = 0x%x\n", |
253 | "writeval(%c) = 0x%x\n", | 261 | ((rf == 0) ? 'A' : 'B'), writeval); |
254 | ((rf == 0) ? 'A' : 'B'), writeval); | ||
255 | break; | 262 | break; |
256 | case 3: | 263 | case 3: |
257 | chnlgroup = 0; | 264 | chnlgroup = 0; |
258 | 265 | ||
259 | if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) { | 266 | if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) { |
260 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 267 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
261 | "customer's limit, 40MHz " | 268 | "customer's limit, 40MHz rf(%c) = 0x%x\n", |
262 | "rf(%c) = 0x%x\n", | 269 | ((rf == 0) ? 'A' : 'B'), |
263 | ((rf == 0) ? 'A' : 'B'), | 270 | rtlefuse->pwrgroup_ht40 |
264 | rtlefuse->pwrgroup_ht40[rf] | 271 | [rf][channel - 1]); |
265 | [channel-1]); | ||
266 | } else { | 272 | } else { |
267 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 273 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
268 | "customer's limit, 20MHz " | 274 | "customer's limit, 20MHz rf(%c) = 0x%x\n", |
269 | "rf(%c) = 0x%x\n", | 275 | ((rf == 0) ? 'A' : 'B'), |
270 | ((rf == 0) ? 'A' : 'B'), | 276 | rtlefuse->pwrgroup_ht20 |
271 | rtlefuse->pwrgroup_ht20[rf] | 277 | [rf][channel - 1]); |
272 | [channel-1]); | ||
273 | } | 278 | } |
274 | 279 | ||
275 | if (index < 2) | 280 | if (index < 2) |
@@ -294,9 +299,9 @@ static void txpwr_by_regulatory(struct ieee80211_hw *hw, u8 channel, u8 index, | |||
294 | 299 | ||
295 | for (i = 0; i < 4; i++) { | 300 | for (i = 0; i < 4; i++) { |
296 | pwr_diff_limit[i] = | 301 | pwr_diff_limit[i] = |
297 | (u8)((rtlphy->mcs_offset | 302 | (u8)((rtlphy->mcs_txpwrlevel_origoffset |
298 | [chnlgroup][index + (rf ? 8 : 0)] & | 303 | [chnlgroup][index + (rf ? 8 : 0)] & |
299 | (0x7f << (i * 8))) >> (i * 8)); | 304 | (0x7f << (i * 8))) >> (i * 8)); |
300 | 305 | ||
301 | if (pwr_diff_limit[i] > pwr_diff) | 306 | if (pwr_diff_limit[i] > pwr_diff) |
302 | pwr_diff_limit[i] = pwr_diff; | 307 | pwr_diff_limit[i] = pwr_diff; |
@@ -307,29 +312,28 @@ static void txpwr_by_regulatory(struct ieee80211_hw *hw, u8 channel, u8 index, | |||
307 | (pwr_diff_limit[1] << 8) | | 312 | (pwr_diff_limit[1] << 8) | |
308 | (pwr_diff_limit[0]); | 313 | (pwr_diff_limit[0]); |
309 | 314 | ||
310 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 315 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
311 | "Customer's limit rf(%c) = 0x%x\n", | 316 | "Customer's limit rf(%c) = 0x%x\n", |
312 | ((rf == 0) ? 'A' : 'B'), customer_limit); | 317 | ((rf == 0) ? 'A' : 'B'), customer_limit); |
313 | 318 | ||
314 | writeval = customer_limit + ((index < 2) ? | 319 | writeval = customer_limit + ((index < 2) ? |
315 | powerbase0[rf] : | 320 | powerbase0[rf] : |
316 | powerbase1[rf]); | 321 | powerbase1[rf]); |
317 | 322 | ||
318 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 323 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
319 | "Customer, writeval rf(%c)= 0x%x\n", | 324 | "Customer, writeval rf(%c)= 0x%x\n", |
320 | ((rf == 0) ? 'A' : 'B'), writeval); | 325 | ((rf == 0) ? 'A' : 'B'), writeval); |
321 | break; | 326 | break; |
322 | default: | 327 | default: |
323 | chnlgroup = 0; | 328 | chnlgroup = 0; |
324 | writeval = | 329 | writeval = |
325 | rtlphy->mcs_offset[chnlgroup] | 330 | rtlphy->mcs_txpwrlevel_origoffset[chnlgroup] |
326 | [index + (rf ? 8 : 0)] | 331 | [index + (rf ? 8 : 0)] |
327 | + ((index < 2) ? powerbase0[rf] : powerbase1[rf]); | 332 | + ((index < 2) ? powerbase0[rf] : powerbase1[rf]); |
328 | 333 | ||
329 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 334 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
330 | "RTK better performance, writeval " | 335 | "RTK better performance, writeval rf(%c) = 0x%x\n", |
331 | "rf(%c) = 0x%x\n", | 336 | ((rf == 0) ? 'A' : 'B'), writeval); |
332 | ((rf == 0) ? 'A' : 'B'), writeval); | ||
333 | break; | 337 | break; |
334 | } | 338 | } |
335 | 339 | ||
@@ -343,7 +347,7 @@ static void txpwr_by_regulatory(struct ieee80211_hw *hw, u8 channel, u8 index, | |||
343 | } | 347 | } |
344 | 348 | ||
345 | static void _rtl8723be_write_ofdm_power_reg(struct ieee80211_hw *hw, | 349 | static void _rtl8723be_write_ofdm_power_reg(struct ieee80211_hw *hw, |
346 | u8 index, u32 *value) | 350 | u8 index, u32 *pvalue) |
347 | { | 351 | { |
348 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 352 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
349 | u16 regoffset_a[6] = { | 353 | u16 regoffset_a[6] = { |
@@ -361,9 +365,9 @@ static void _rtl8723be_write_ofdm_power_reg(struct ieee80211_hw *hw, | |||
361 | u16 regoffset; | 365 | u16 regoffset; |
362 | 366 | ||
363 | for (rf = 0; rf < 2; rf++) { | 367 | for (rf = 0; rf < 2; rf++) { |
364 | writeval = value[rf]; | 368 | writeval = pvalue[rf]; |
365 | for (i = 0; i < 4; i++) { | 369 | for (i = 0; i < 4; i++) { |
366 | pwr_val[i] = (u8) ((writeval & (0x7f << | 370 | pwr_val[i] = (u8)((writeval & (0x7f << |
367 | (i * 8))) >> (i * 8)); | 371 | (i * 8))) >> (i * 8)); |
368 | 372 | ||
369 | if (pwr_val[i] > RF6052_MAX_TX_PWR) | 373 | if (pwr_val[i] > RF6052_MAX_TX_PWR) |
@@ -378,8 +382,8 @@ static void _rtl8723be_write_ofdm_power_reg(struct ieee80211_hw *hw, | |||
378 | regoffset = regoffset_b[index]; | 382 | regoffset = regoffset_b[index]; |
379 | rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); | 383 | rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval); |
380 | 384 | ||
381 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 385 | RTPRINT(rtlpriv, FPHY, PHY_TXPWR, |
382 | "Set 0x%x = %08x\n", regoffset, writeval); | 386 | "Set 0x%x = %08x\n", regoffset, writeval); |
383 | } | 387 | } |
384 | } | 388 | } |
385 | 389 | ||
@@ -400,8 +404,11 @@ void rtl8723be_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw, | |||
400 | rtl8723be_dm_txpower_track_adjust(hw, 1, &direction, &pwrtrac_value); | 404 | rtl8723be_dm_txpower_track_adjust(hw, 1, &direction, &pwrtrac_value); |
401 | 405 | ||
402 | for (index = 0; index < 6; index++) { | 406 | for (index = 0; index < 6; index++) { |
403 | txpwr_by_regulatory(hw, channel, index, &powerbase0[0], | 407 | _rtl8723be_get_txpower_writeval_by_regulatory(hw, |
404 | &powerbase1[0], &writeval[0]); | 408 | channel, index, |
409 | &powerbase0[0], | ||
410 | &powerbase1[0], | ||
411 | &writeval[0]); | ||
405 | if (direction == 1) { | 412 | if (direction == 1) { |
406 | writeval[0] += pwrtrac_value; | 413 | writeval[0] += pwrtrac_value; |
407 | writeval[1] += pwrtrac_value; | 414 | writeval[1] += pwrtrac_value; |
@@ -424,16 +431,17 @@ bool rtl8723be_phy_rf6052_config(struct ieee80211_hw *hw) | |||
424 | rtlphy->num_total_rfpath = 2; | 431 | rtlphy->num_total_rfpath = 2; |
425 | 432 | ||
426 | return _rtl8723be_phy_rf6052_config_parafile(hw); | 433 | return _rtl8723be_phy_rf6052_config_parafile(hw); |
434 | |||
427 | } | 435 | } |
428 | 436 | ||
429 | static bool _rtl8723be_phy_rf6052_config_parafile(struct ieee80211_hw *hw) | 437 | static bool _rtl8723be_phy_rf6052_config_parafile(struct ieee80211_hw *hw) |
430 | { | 438 | { |
431 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 439 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
432 | struct rtl_phy *rtlphy = &(rtlpriv->phy); | 440 | struct rtl_phy *rtlphy = &(rtlpriv->phy); |
433 | struct bb_reg_def *pphyreg; | ||
434 | u32 u4_regvalue = 0; | 441 | u32 u4_regvalue = 0; |
435 | u8 rfpath; | 442 | u8 rfpath; |
436 | bool rtstatus = true; | 443 | bool rtstatus = true; |
444 | struct bb_reg_def *pphyreg; | ||
437 | 445 | ||
438 | for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) { | 446 | for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) { |
439 | pphyreg = &rtlphy->phyreg_def[rfpath]; | 447 | pphyreg = &rtlphy->phyreg_def[rfpath]; |