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path: root/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c
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Diffstat (limited to 'drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c')
-rw-r--r--drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c48
1 files changed, 13 insertions, 35 deletions
diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c
index 30dea7b9bc17..6d6e8994460d 100644
--- a/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c
+++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192se/hw.c
@@ -1,27 +1,5 @@
1/****************************************************************************** 1// SPDX-License-Identifier: GPL-2.0
2 * 2/* Copyright(c) 2009-2012 Realtek Corporation.*/
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25 3
26#include "../wifi.h" 4#include "../wifi.h"
27#include "../efuse.h" 5#include "../efuse.h"
@@ -258,7 +236,7 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
258 union aci_aifsn *p_aci_aifsn = (union aci_aifsn *)(&( 236 union aci_aifsn *p_aci_aifsn = (union aci_aifsn *)(&(
259 mac->ac[0].aifs)); 237 mac->ac[0].aifs));
260 u8 acm = p_aci_aifsn->f.acm; 238 u8 acm = p_aci_aifsn->f.acm;
261 u8 acm_ctrl = rtl_read_byte(rtlpriv, AcmHwCtrl); 239 u8 acm_ctrl = rtl_read_byte(rtlpriv, ACMHWCTRL);
262 240
263 acm_ctrl = acm_ctrl | ((rtlpci->acm_method == 2) ? 241 acm_ctrl = acm_ctrl | ((rtlpci->acm_method == 2) ?
264 0x0 : 0x1); 242 0x0 : 0x1);
@@ -266,13 +244,13 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
266 if (acm) { 244 if (acm) {
267 switch (e_aci) { 245 switch (e_aci) {
268 case AC0_BE: 246 case AC0_BE:
269 acm_ctrl |= AcmHw_BeqEn; 247 acm_ctrl |= ACMHW_BEQEN;
270 break; 248 break;
271 case AC2_VI: 249 case AC2_VI:
272 acm_ctrl |= AcmHw_ViqEn; 250 acm_ctrl |= ACMHW_VIQEN;
273 break; 251 break;
274 case AC3_VO: 252 case AC3_VO:
275 acm_ctrl |= AcmHw_VoqEn; 253 acm_ctrl |= ACMHW_VOQEN;
276 break; 254 break;
277 default: 255 default:
278 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, 256 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
@@ -283,13 +261,13 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
283 } else { 261 } else {
284 switch (e_aci) { 262 switch (e_aci) {
285 case AC0_BE: 263 case AC0_BE:
286 acm_ctrl &= (~AcmHw_BeqEn); 264 acm_ctrl &= (~ACMHW_BEQEN);
287 break; 265 break;
288 case AC2_VI: 266 case AC2_VI:
289 acm_ctrl &= (~AcmHw_ViqEn); 267 acm_ctrl &= (~ACMHW_VIQEN);
290 break; 268 break;
291 case AC3_VO: 269 case AC3_VO:
292 acm_ctrl &= (~AcmHw_VoqEn); 270 acm_ctrl &= (~ACMHW_VOQEN);
293 break; 271 break;
294 default: 272 default:
295 pr_err("switch case %#x not processed\n", 273 pr_err("switch case %#x not processed\n",
@@ -300,7 +278,7 @@ void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
300 278
301 RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE, 279 RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE,
302 "HW_VAR_ACM_CTRL Write 0x%X\n", acm_ctrl); 280 "HW_VAR_ACM_CTRL Write 0x%X\n", acm_ctrl);
303 rtl_write_byte(rtlpriv, AcmHwCtrl, acm_ctrl); 281 rtl_write_byte(rtlpriv, ACMHWCTRL, acm_ctrl);
304 break; 282 break;
305 } 283 }
306 case HW_VAR_RCR:{ 284 case HW_VAR_RCR:{
@@ -869,7 +847,7 @@ static void _rtl92se_macconfig_after_fwdownload(struct ieee80211_hw *hw)
869 /* 10. Power Save Control Register (Offset: 0x0260 - 0x02DF) */ 847 /* 10. Power Save Control Register (Offset: 0x0260 - 0x02DF) */
870 /* 11. General Purpose Register (Offset: 0x02E0 - 0x02FF) */ 848 /* 11. General Purpose Register (Offset: 0x02E0 - 0x02FF) */
871 /* 12. Host Interrupt Status Register (Offset: 0x0300 - 0x030F) */ 849 /* 12. Host Interrupt Status Register (Offset: 0x0300 - 0x030F) */
872 /* 13. Test Mode and Debug Control Register (Offset: 0x0310 - 0x034F) */ 850 /* 13. Test mode and Debug Control Register (Offset: 0x0310 - 0x034F) */
873 851
874 /* 14. Set driver info, we only accept PHY status now. */ 852 /* 14. Set driver info, we only accept PHY status now. */
875 rtl_write_byte(rtlpriv, RXDRVINFO_SZ, 4); 853 rtl_write_byte(rtlpriv, RXDRVINFO_SZ, 4);
@@ -1641,7 +1619,7 @@ void rtl92se_update_interrupt_mask(struct ieee80211_hw *hw,
1641 rtl92se_enable_interrupt(hw); 1619 rtl92se_enable_interrupt(hw);
1642} 1620}
1643 1621
1644static void _rtl8192se_get_IC_Inferiority(struct ieee80211_hw *hw) 1622static void _rtl8192se_get_ic_inferiority(struct ieee80211_hw *hw)
1645{ 1623{
1646 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); 1624 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1647 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); 1625 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
@@ -1704,7 +1682,7 @@ static void _rtl92se_read_adapter_info(struct ieee80211_hw *hw)
1704 if (rtlefuse->autoload_failflag) 1682 if (rtlefuse->autoload_failflag)
1705 return; 1683 return;
1706 1684
1707 _rtl8192se_get_IC_Inferiority(hw); 1685 _rtl8192se_get_ic_inferiority(hw);
1708 1686
1709 /* Read IC Version && Channel Plan */ 1687 /* Read IC Version && Channel Plan */
1710 /* VID, DID SE 0xA-D */ 1688 /* VID, DID SE 0xA-D */