1 files changed, 479 insertions, 73 deletions

diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
index ca0174680af9..96e101d79662 100644
--- a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
+++ b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c
@@ -8,6 +8,7 @@
  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
+ * Copyright(c) 2018        Intel Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
@@ -18,11 +19,6 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  * General Public License for more details.
  *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
- * USA
- *
  * The full GNU General Public License is included in this distribution
  * in the file called COPYING.
  *
@@ -35,6 +31,7 @@
  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
+ * Copyright(c) 2018        Intel Corporation
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -68,6 +65,7 @@
 #include <linux/export.h>
 #include <linux/etherdevice.h>
 #include <linux/pci.h>
+#include <linux/firmware.h>
 
 #include "iwl-drv.h"
 #include "iwl-modparams.h"
@@ -77,6 +75,9 @@
 #include "iwl-csr.h"
 #include "fw/acpi.h"
 #include "fw/api/nvm-reg.h"
+#include "fw/api/commands.h"
+#include "fw/api/cmdhdr.h"
+#include "fw/img.h"
 
 /* NVM offsets (in words) definitions */
 enum nvm_offsets {
@@ -292,7 +293,7 @@ static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
 static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
                                 struct iwl_nvm_data *data,
                                 const __le16 * const nvm_ch_flags,
-                                bool lar_supported, bool no_wide_in_5ghz)
+                                u32 sbands_flags)
 {
         int ch_idx;
         int n_channels = 0;
@@ -316,11 +317,12 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
 
                 ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
 
-                if (is_5ghz && !data->sku_cap_band_52GHz_enable)
+                if (is_5ghz && !data->sku_cap_band_52ghz_enable)
                         continue;
 
                 /* workaround to disable wide channels in 5GHz */
-                if (no_wide_in_5ghz && is_5ghz) {
+                if ((sbands_flags & IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ) &&
+                    is_5ghz) {
                         ch_flags &= ~(NVM_CHANNEL_40MHZ |
                                      NVM_CHANNEL_80MHZ |
                                      NVM_CHANNEL_160MHZ);
@@ -329,7 +331,8 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
                 if (ch_flags & NVM_CHANNEL_160MHZ)
                         data->vht160_supported = true;
 
-                if (!lar_supported && !(ch_flags & NVM_CHANNEL_VALID)) {
+                if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR) &&
+                    !(ch_flags & NVM_CHANNEL_VALID)) {
                         /*
                          * Channels might become valid later if lar is
                          * supported, hence we still want to add them to
@@ -359,7 +362,7 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
                 channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
 
                 /* don't put limitations in case we're using LAR */
-                if (!lar_supported)
+                if (!(sbands_flags & IWL_NVM_SBANDS_FLAGS_LAR))
                         channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
                                                                ch_idx, is_5ghz,
                                                                ch_flags, cfg);
@@ -422,6 +425,13 @@ static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
                 else
                         vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
                 break;
+        case IWL_AMSDU_2K:
+                if (cfg->mq_rx_supported)
+                        vht_cap->cap |=
+                                IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
+                else
+                        WARN(1, "RB size of 2K is not supported by this device\n");
+                break;
         case IWL_AMSDU_4K:
                 vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
                 break;
@@ -455,17 +465,137 @@ static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
         vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
 }
 
-void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
-                     struct iwl_nvm_data *data, const __le16 *nvm_ch_flags,
-                     u8 tx_chains, u8 rx_chains, bool lar_supported,
-                     bool no_wide_in_5ghz)
+static struct ieee80211_sband_iftype_data iwl_he_capa = {
+        .types_mask = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP),
+        .he_cap = {
+                .has_he = true,
+                .he_cap_elem = {
+                        .mac_cap_info[0] =
+                                IEEE80211_HE_MAC_CAP0_HTC_HE |
+                                IEEE80211_HE_MAC_CAP0_TWT_REQ,
+                        .mac_cap_info[1] =
+                                IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
+                                IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
+                        .mac_cap_info[2] =
+                                IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP |
+                                IEEE80211_HE_MAC_CAP2_MU_CASCADING |
+                                IEEE80211_HE_MAC_CAP2_ACK_EN,
+                        .mac_cap_info[3] =
+                                IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
+                                IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
+                        .mac_cap_info[4] =
+                                IEEE80211_HE_MAC_CAP4_AMDSU_IN_AMPDU |
+                                IEEE80211_HE_MAC_CAP4_MULTI_TID_AGG_TX_QOS_B39,
+                        .mac_cap_info[5] =
+                                IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B40 |
+                                IEEE80211_HE_MAC_CAP5_MULTI_TID_AGG_TX_QOS_B41 |
+                                IEEE80211_HE_MAC_CAP5_UL_2x996_TONE_RU,
+                        .phy_cap_info[0] =
+                                IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G |
+                                IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G |
+                                IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G,
+                        .phy_cap_info[1] =
+                                IEEE80211_HE_PHY_CAP1_PREAMBLE_PUNC_RX_MASK |
+                                IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A |
+                                IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD |
+                                IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS,
+                        .phy_cap_info[2] =
+                                IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US |
+                                IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ |
+                                IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ |
+                                IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO |
+                                IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO,
+                        .phy_cap_info[3] =
+                                IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK |
+                                IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 |
+                                IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK |
+                                IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1,
+                        .phy_cap_info[4] =
+                                IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE |
+                                IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_ABOVE_80MHZ_8 |
+                                IEEE80211_HE_PHY_CAP4_BEAMFORMEE_MAX_STS_UNDER_80MHZ_8,
+                        .phy_cap_info[5] =
+                                IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_2 |
+                                IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2 |
+                                IEEE80211_HE_PHY_CAP5_NG16_SU_FEEDBACK |
+                                IEEE80211_HE_PHY_CAP5_NG16_MU_FEEDBACK,
+                        .phy_cap_info[6] =
+                                IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_42_SU |
+                                IEEE80211_HE_PHY_CAP6_CODEBOOK_SIZE_75_MU |
+                                IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMER_FB |
+                                IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMER_FB |
+                                IEEE80211_HE_PHY_CAP6_TRIG_CQI_FB |
+                                IEEE80211_HE_PHY_CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO |
+                                IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT,
+                        .phy_cap_info[7] =
+                                IEEE80211_HE_PHY_CAP7_POWER_BOOST_FACTOR_AR |
+                                IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI |
+                                IEEE80211_HE_PHY_CAP7_MAX_NC_1,
+                        .phy_cap_info[8] =
+                                IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI |
+                                IEEE80211_HE_PHY_CAP8_20MHZ_IN_40MHZ_HE_PPDU_IN_2G |
+                                IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU |
+                                IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU |
+                                IEEE80211_HE_PHY_CAP8_DCM_MAX_BW_160_OR_80P80_MHZ,
+                        .phy_cap_info[9] =
+                                IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK |
+                                IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB |
+                                IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_NON_COMP_SIGB,
+                },
+                /*
+                 * Set default Tx/Rx HE MCS NSS Support field. Indicate support
+                 * for up to 2 spatial streams and all MCS, without any special
+                 * cases
+                 */
+                .he_mcs_nss_supp = {
+                        .rx_mcs_80 = cpu_to_le16(0xfffa),
+                        .tx_mcs_80 = cpu_to_le16(0xfffa),
+                        .rx_mcs_160 = cpu_to_le16(0xfffa),
+                        .tx_mcs_160 = cpu_to_le16(0xfffa),
+                        .rx_mcs_80p80 = cpu_to_le16(0xffff),
+                        .tx_mcs_80p80 = cpu_to_le16(0xffff),
+                },
+                /*
+                 * Set default PPE thresholds, with PPET16 set to 0, PPET8 set
+                 * to 7
+                 */
+                .ppe_thres = {0x61, 0x1c, 0xc7, 0x71},
+        },
+};
+
+static void iwl_init_he_hw_capab(struct ieee80211_supported_band *sband,
+                                 u8 tx_chains, u8 rx_chains)
+{
+        if (sband->band == NL80211_BAND_2GHZ ||
+            sband->band == NL80211_BAND_5GHZ)
+                sband->iftype_data = &iwl_he_capa;
+        else
+                return;
+
+        sband->n_iftype_data = 1;
+
+        /* If not 2x2, we need to indicate 1x1 in the Midamble RX Max NSTS */
+        if ((tx_chains & rx_chains) != ANT_AB) {
+                iwl_he_capa.he_cap.he_cap_elem.phy_cap_info[1] &=
+                        ~IEEE80211_HE_PHY_CAP1_MIDAMBLE_RX_TX_MAX_NSTS;
+                iwl_he_capa.he_cap.he_cap_elem.phy_cap_info[2] &=
+                        ~IEEE80211_HE_PHY_CAP2_MIDAMBLE_RX_TX_MAX_NSTS;
+                iwl_he_capa.he_cap.he_cap_elem.phy_cap_info[7] &=
+                        ~IEEE80211_HE_PHY_CAP7_MAX_NC_MASK;
+        }
+}
+
+static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
+                            struct iwl_nvm_data *data,
+                            const __le16 *nvm_ch_flags, u8 tx_chains,
+                            u8 rx_chains, u32 sbands_flags)
 {
         int n_channels;
         int n_used = 0;
         struct ieee80211_supported_band *sband;
 
         n_channels = iwl_init_channel_map(dev, cfg, data, nvm_ch_flags,
-                                          lar_supported, no_wide_in_5ghz);
+                                          sbands_flags);
         sband = &data->bands[NL80211_BAND_2GHZ];
         sband->band = NL80211_BAND_2GHZ;
         sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
@@ -475,6 +605,9 @@ void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
         iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, NL80211_BAND_2GHZ,
                              tx_chains, rx_chains);
 
+        if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
+                iwl_init_he_hw_capab(sband, tx_chains, rx_chains);
+
         sband = &data->bands[NL80211_BAND_5GHZ];
         sband->band = NL80211_BAND_5GHZ;
         sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
@@ -487,11 +620,13 @@ void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
                 iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
                                       tx_chains, rx_chains);
 
+        if (data->sku_cap_11ax_enable && !iwlwifi_mod_params.disable_11ax)
+                iwl_init_he_hw_capab(sband, tx_chains, rx_chains);
+
         if (n_channels != n_used)
                 IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
                             n_used, n_channels);
 }
-IWL_EXPORT_SYMBOL(iwl_init_sbands);
 
 static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
                        const __le16 *phy_sku)
@@ -569,11 +704,15 @@ static void iwl_flip_hw_address(__le32 mac_addr0, __le32 mac_addr1, u8 *dest)
         dest[5] = hw_addr[0];
 }
 
-void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
-                                 struct iwl_nvm_data *data)
+static void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
+                                        struct iwl_nvm_data *data)
 {
-        __le32 mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_STRAP));
-        __le32 mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_STRAP));
+        __le32 mac_addr0 =
+                cpu_to_le32(iwl_read32(trans,
+                                       trans->cfg->csr->mac_addr0_strap));
+        __le32 mac_addr1 =
+                cpu_to_le32(iwl_read32(trans,
+                                       trans->cfg->csr->mac_addr1_strap));
 
         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
         /*
@@ -583,12 +722,13 @@ void iwl_set_hw_address_from_csr(struct iwl_trans *trans,
         if (is_valid_ether_addr(data->hw_addr))
                 return;
 
-        mac_addr0 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR0_OTP));
-        mac_addr1 = cpu_to_le32(iwl_read32(trans, CSR_MAC_ADDR1_OTP));
+        mac_addr0 = cpu_to_le32(iwl_read32(trans,
+                                           trans->cfg->csr->mac_addr0_otp));
+        mac_addr1 = cpu_to_le32(iwl_read32(trans,
+                                           trans->cfg->csr->mac_addr1_otp));
 
         iwl_flip_hw_address(mac_addr0, mac_addr1, data->hw_addr);
 }
-IWL_EXPORT_SYMBOL(iwl_set_hw_address_from_csr);
 
 static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
                                            const struct iwl_cfg *cfg,
@@ -713,8 +853,8 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
         struct device *dev = trans->dev;
         struct iwl_nvm_data *data;
         bool lar_enabled;
-        bool no_wide_in_5ghz = iwl_nvm_no_wide_in_5ghz(dev, cfg, nvm_hw);
         u32 sku, radio_cfg;
+        u32 sbands_flags = 0;
         u16 lar_config;
         const __le16 *ch_section;
 
@@ -741,8 +881,8 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
                 rx_chains &= data->valid_rx_ant;
 
         sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
-        data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
-        data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
+        data->sku_cap_band_24ghz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
+        data->sku_cap_band_52ghz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
         data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
         if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
                 data->sku_cap_11n_enable = false;
@@ -787,8 +927,14 @@ iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
                 return NULL;
         }
 
+        if (lar_fw_supported && lar_enabled)
+                sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
+
+        if (iwl_nvm_no_wide_in_5ghz(dev, cfg, nvm_hw))
+                sbands_flags |= IWL_NVM_SBANDS_FLAGS_NO_WIDE_IN_5GHZ;
+
         iwl_init_sbands(dev, cfg, data, ch_section, tx_chains, rx_chains,
-                        lar_fw_supported && lar_enabled, no_wide_in_5ghz);
+                        sbands_flags);
         data->calib_version = 255;
 
         return data;
@@ -859,15 +1005,12 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
         const u8 *nvm_chan = cfg->nvm_type == IWL_NVM_EXT ?
                              iwl_ext_nvm_channels : iwl_nvm_channels;
         struct ieee80211_regdomain *regd, *copy_rd;
-        int size_of_regd, regd_to_copy, wmms_to_copy;
-        int size_of_wmms = 0;
+        int size_of_regd, regd_to_copy;
         struct ieee80211_reg_rule *rule;
-        struct ieee80211_wmm_rule *wmm_rule, *d_wmm, *s_wmm;
         struct regdb_ptrs *regdb_ptrs;
         enum nl80211_band band;
         int center_freq, prev_center_freq = 0;
-        int valid_rules = 0, n_wmms = 0;
-        int i;
+        int valid_rules = 0;
         bool new_rule;
         int max_num_ch = cfg->nvm_type == IWL_NVM_EXT ?
                          IWL_NVM_NUM_CHANNELS_EXT : IWL_NVM_NUM_CHANNELS;
@@ -886,11 +1029,7 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
                 sizeof(struct ieee80211_regdomain) +
                 num_of_ch * sizeof(struct ieee80211_reg_rule);
 
-        if (geo_info & GEO_WMM_ETSI_5GHZ_INFO)
-                size_of_wmms =
-                        num_of_ch * sizeof(struct ieee80211_wmm_rule);
-
-        regd = kzalloc(size_of_regd + size_of_wmms, GFP_KERNEL);
+        regd = kzalloc(size_of_regd, GFP_KERNEL);
         if (!regd)
                 return ERR_PTR(-ENOMEM);
 
@@ -904,8 +1043,6 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
         regd->alpha2[0] = fw_mcc >> 8;
         regd->alpha2[1] = fw_mcc & 0xff;
 
-        wmm_rule = (struct ieee80211_wmm_rule *)((u8 *)regd + size_of_regd);
-
         for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
                 ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
                 band = (ch_idx < NUM_2GHZ_CHANNELS) ?
@@ -959,26 +1096,10 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
                     band == NL80211_BAND_2GHZ)
                         continue;
 
-                if (!reg_query_regdb_wmm(regd->alpha2, center_freq,
-                                         &regdb_ptrs[n_wmms].token, wmm_rule)) {
-                        /* Add only new rules */
-                        for (i = 0; i < n_wmms; i++) {
-                                if (regdb_ptrs[i].token ==
-                                    regdb_ptrs[n_wmms].token) {
-                                        rule->wmm_rule = regdb_ptrs[i].rule;
-                                        break;
-                                }
-                        }
-                        if (i == n_wmms) {
-                                rule->wmm_rule = wmm_rule;
-                                regdb_ptrs[n_wmms++].rule = wmm_rule;
-                                wmm_rule++;
-                        }
-                }
+                reg_query_regdb_wmm(regd->alpha2, center_freq, rule);
         }
 
         regd->n_reg_rules = valid_rules;
-        regd->n_wmm_rules = n_wmms;
 
         /*
          * Narrow down regdom for unused regulatory rules to prevent hole
@@ -987,29 +1108,13 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
         regd_to_copy = sizeof(struct ieee80211_regdomain) +
                 valid_rules * sizeof(struct ieee80211_reg_rule);
 
-        wmms_to_copy = sizeof(struct ieee80211_wmm_rule) * n_wmms;
-
-        copy_rd = kzalloc(regd_to_copy + wmms_to_copy, GFP_KERNEL);
+        copy_rd = kzalloc(regd_to_copy, GFP_KERNEL);
         if (!copy_rd) {
                 copy_rd = ERR_PTR(-ENOMEM);
                 goto out;
         }
 
         memcpy(copy_rd, regd, regd_to_copy);
-        memcpy((u8 *)copy_rd + regd_to_copy, (u8 *)regd + size_of_regd,
-               wmms_to_copy);
-
-        d_wmm = (struct ieee80211_wmm_rule *)((u8 *)copy_rd + regd_to_copy);
-        s_wmm = (struct ieee80211_wmm_rule *)((u8 *)regd + size_of_regd);
-
-        for (i = 0; i < regd->n_reg_rules; i++) {
-                if (!regd->reg_rules[i].wmm_rule)
-                        continue;
-
-                copy_rd->reg_rules[i].wmm_rule = d_wmm +
-                        (regd->reg_rules[i].wmm_rule - s_wmm) /
-                        sizeof(struct ieee80211_wmm_rule);
-        }
 
 out:
         kfree(regdb_ptrs);
@@ -1017,3 +1122,304 @@ out:
         return copy_rd;
 }
 IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);
+
+#define IWL_MAX_NVM_SECTION_SIZE        0x1b58
+#define IWL_MAX_EXT_NVM_SECTION_SIZE    0x1ffc
+#define MAX_NVM_FILE_LEN        16384
+
+void iwl_nvm_fixups(u32 hw_id, unsigned int section, u8 *data,
+                    unsigned int len)
+{
+#define IWL_4165_DEVICE_ID      0x5501
+#define NVM_SKU_CAP_MIMO_DISABLE BIT(5)
+
+        if (section == NVM_SECTION_TYPE_PHY_SKU &&
+            hw_id == IWL_4165_DEVICE_ID && data && len >= 5 &&
+            (data[4] & NVM_SKU_CAP_MIMO_DISABLE))
+                /* OTP 0x52 bug work around: it's a 1x1 device */
+                data[3] = ANT_B | (ANT_B << 4);
+}
+IWL_EXPORT_SYMBOL(iwl_nvm_fixups);
+
+/*
+ * Reads external NVM from a file into mvm->nvm_sections
+ *
+ * HOW TO CREATE THE NVM FILE FORMAT:
+ * ------------------------------
+ * 1. create hex file, format:
+ *      3800 -> header
+ *      0000 -> header
+ *      5a40 -> data
+ *
+ *   rev - 6 bit (word1)
+ *   len - 10 bit (word1)
+ *   id - 4 bit (word2)
+ *   rsv - 12 bit (word2)
+ *
+ * 2. flip 8bits with 8 bits per line to get the right NVM file format
+ *
+ * 3. create binary file from the hex file
+ *
+ * 4. save as "iNVM_xxx.bin" under /lib/firmware
+ */
+int iwl_read_external_nvm(struct iwl_trans *trans,
+                          const char *nvm_file_name,
+                          struct iwl_nvm_section *nvm_sections)
+{
+        int ret, section_size;
+        u16 section_id;
+        const struct firmware *fw_entry;
+        const struct {
+                __le16 word1;
+                __le16 word2;
+                u8 data[];
+        } *file_sec;
+        const u8 *eof;
+        u8 *temp;
+        int max_section_size;
+        const __le32 *dword_buff;
+
+#define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
+#define NVM_WORD2_ID(x) (x >> 12)
+#define EXT_NVM_WORD2_LEN(x) (2 * (((x) & 0xFF) << 8 | (x) >> 8))
+#define EXT_NVM_WORD1_ID(x) ((x) >> 4)
+#define NVM_HEADER_0    (0x2A504C54)
+#define NVM_HEADER_1    (0x4E564D2A)
+#define NVM_HEADER_SIZE (4 * sizeof(u32))
+
+        IWL_DEBUG_EEPROM(trans->dev, "Read from external NVM\n");
+
+        /* Maximal size depends on NVM version */
+        if (trans->cfg->nvm_type != IWL_NVM_EXT)
+                max_section_size = IWL_MAX_NVM_SECTION_SIZE;
+        else
+                max_section_size = IWL_MAX_EXT_NVM_SECTION_SIZE;
+
+        /*
+         * Obtain NVM image via request_firmware. Since we already used
+         * request_firmware_nowait() for the firmware binary load and only
+         * get here after that we assume the NVM request can be satisfied
+         * synchronously.
+         */
+        ret = request_firmware(&fw_entry, nvm_file_name, trans->dev);
+        if (ret) {
+                IWL_ERR(trans, "ERROR: %s isn't available %d\n",
+                        nvm_file_name, ret);
+                return ret;
+        }
+
+        IWL_INFO(trans, "Loaded NVM file %s (%zu bytes)\n",
+                 nvm_file_name, fw_entry->size);
+
+        if (fw_entry->size > MAX_NVM_FILE_LEN) {
+                IWL_ERR(trans, "NVM file too large\n");
+                ret = -EINVAL;
+                goto out;
+        }
+
+        eof = fw_entry->data + fw_entry->size;
+        dword_buff = (__le32 *)fw_entry->data;
+
+        /* some NVM file will contain a header.
+         * The header is identified by 2 dwords header as follow:
+         * dword[0] = 0x2A504C54
+         * dword[1] = 0x4E564D2A
+         *
+         * This header must be skipped when providing the NVM data to the FW.
+         */
+        if (fw_entry->size > NVM_HEADER_SIZE &&
+            dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
+            dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
+                file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
+                IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
+                IWL_INFO(trans, "NVM Manufacturing date %08X\n",
+                         le32_to_cpu(dword_buff[3]));
+
+                /* nvm file validation, dword_buff[2] holds the file version */
+                if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000 &&
+                    CSR_HW_REV_STEP(trans->hw_rev) == SILICON_C_STEP &&
+                    le32_to_cpu(dword_buff[2]) < 0xE4A) {
+                        ret = -EFAULT;
+                        goto out;
+                }
+        } else {
+                file_sec = (void *)fw_entry->data;
+        }
+
+        while (true) {
+                if (file_sec->data > eof) {
+                        IWL_ERR(trans,
+                                "ERROR - NVM file too short for section header\n");
+                        ret = -EINVAL;
+                        break;
+                }
+
+                /* check for EOF marker */
+                if (!file_sec->word1 && !file_sec->word2) {
+                        ret = 0;
+                        break;
+                }
+
+                if (trans->cfg->nvm_type != IWL_NVM_EXT) {
+                        section_size =
+                                2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
+                        section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
+                } else {
+                        section_size = 2 * EXT_NVM_WORD2_LEN(
+                                                le16_to_cpu(file_sec->word2));
+                        section_id = EXT_NVM_WORD1_ID(
+                                                le16_to_cpu(file_sec->word1));
+                }
+
+                if (section_size > max_section_size) {
+                        IWL_ERR(trans, "ERROR - section too large (%d)\n",
+                                section_size);
+                        ret = -EINVAL;
+                        break;
+                }
+
+                if (!section_size) {
+                        IWL_ERR(trans, "ERROR - section empty\n");
+                        ret = -EINVAL;
+                        break;
+                }
+
+                if (file_sec->data + section_size > eof) {
+                        IWL_ERR(trans,
+                                "ERROR - NVM file too short for section (%d bytes)\n",
+                                section_size);
+                        ret = -EINVAL;
+                        break;
+                }
+
+                if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
+                         "Invalid NVM section ID %d\n", section_id)) {
+                        ret = -EINVAL;
+                        break;
+                }
+
+                temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
+                if (!temp) {
+                        ret = -ENOMEM;
+                        break;
+                }
+
+                iwl_nvm_fixups(trans->hw_id, section_id, temp, section_size);
+
+                kfree(nvm_sections[section_id].data);
+                nvm_sections[section_id].data = temp;
+                nvm_sections[section_id].length = section_size;
+
+                /* advance to the next section */
+                file_sec = (void *)(file_sec->data + section_size);
+        }
+out:
+        release_firmware(fw_entry);
+        return ret;
+}
+IWL_EXPORT_SYMBOL(iwl_read_external_nvm);
+
+struct iwl_nvm_data *iwl_get_nvm(struct iwl_trans *trans,
+                                 const struct iwl_fw *fw)
+{
+        struct iwl_nvm_get_info cmd = {};
+        struct iwl_nvm_get_info_rsp *rsp;
+        struct iwl_nvm_data *nvm;
+        struct iwl_host_cmd hcmd = {
+                .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
+                .data = { &cmd, },
+                .len = { sizeof(cmd) },
+                .id = WIDE_ID(REGULATORY_AND_NVM_GROUP, NVM_GET_INFO)
+        };
+        int  ret;
+        bool lar_fw_supported = !iwlwifi_mod_params.lar_disable &&
+                                fw_has_capa(&fw->ucode_capa,
+                                            IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
+        bool empty_otp;
+        u32 mac_flags;
+        u32 sbands_flags = 0;
+
+        ret = iwl_trans_send_cmd(trans, &hcmd);
+        if (ret)
+                return ERR_PTR(ret);
+
+        if (WARN(iwl_rx_packet_payload_len(hcmd.resp_pkt) != sizeof(*rsp),
+                 "Invalid payload len in NVM response from FW %d",
+                 iwl_rx_packet_payload_len(hcmd.resp_pkt))) {
+                ret = -EINVAL;
+                goto out;
+        }
+
+        rsp = (void *)hcmd.resp_pkt->data;
+        empty_otp = !!(le32_to_cpu(rsp->general.flags) &
+                       NVM_GENERAL_FLAGS_EMPTY_OTP);
+        if (empty_otp)
+                IWL_INFO(trans, "OTP is empty\n");
+
+        nvm = kzalloc(sizeof(*nvm) +
+                      sizeof(struct ieee80211_channel) * IWL_NUM_CHANNELS,
+                      GFP_KERNEL);
+        if (!nvm) {
+                ret = -ENOMEM;
+                goto out;
+        }
+
+        iwl_set_hw_address_from_csr(trans, nvm);
+        /* TODO: if platform NVM has MAC address - override it here */
+
+        if (!is_valid_ether_addr(nvm->hw_addr)) {
+                IWL_ERR(trans, "no valid mac address was found\n");
+                ret = -EINVAL;
+                goto err_free;
+        }
+
+        IWL_INFO(trans, "base HW address: %pM\n", nvm->hw_addr);
+
+        /* Initialize general data */
+        nvm->nvm_version = le16_to_cpu(rsp->general.nvm_version);
+        nvm->n_hw_addrs = rsp->general.n_hw_addrs;
+        if (nvm->n_hw_addrs == 0)
+                IWL_WARN(trans,
+                         "Firmware declares no reserved mac addresses. OTP is empty: %d\n",
+                         empty_otp);
+
+        /* Initialize MAC sku data */
+        mac_flags = le32_to_cpu(rsp->mac_sku.mac_sku_flags);
+        nvm->sku_cap_11ac_enable =
+                !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AC_ENABLED);
+        nvm->sku_cap_11n_enable =
+                !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11N_ENABLED);
+        nvm->sku_cap_11ax_enable =
+                !!(mac_flags & NVM_MAC_SKU_FLAGS_802_11AX_ENABLED);
+        nvm->sku_cap_band_24ghz_enable =
+                !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_2_4_ENABLED);
+        nvm->sku_cap_band_52ghz_enable =
+                !!(mac_flags & NVM_MAC_SKU_FLAGS_BAND_5_2_ENABLED);
+        nvm->sku_cap_mimo_disabled =
+                !!(mac_flags & NVM_MAC_SKU_FLAGS_MIMO_DISABLED);
+
+        /* Initialize PHY sku data */
+        nvm->valid_tx_ant = (u8)le32_to_cpu(rsp->phy_sku.tx_chains);
+        nvm->valid_rx_ant = (u8)le32_to_cpu(rsp->phy_sku.rx_chains);
+
+        if (le32_to_cpu(rsp->regulatory.lar_enabled) && lar_fw_supported) {
+                nvm->lar_enabled = true;
+                sbands_flags |= IWL_NVM_SBANDS_FLAGS_LAR;
+        }
+
+        iwl_init_sbands(trans->dev, trans->cfg, nvm,
+                        rsp->regulatory.channel_profile,
+                        nvm->valid_tx_ant & fw->valid_tx_ant,
+                        nvm->valid_rx_ant & fw->valid_rx_ant,
+                        sbands_flags);
+
+        iwl_free_resp(&hcmd);
+        return nvm;
+
+err_free:
+        kfree(nvm);
+out:
+        iwl_free_resp(&hcmd);
+        return ERR_PTR(ret);
+}
+IWL_EXPORT_SYMBOL(iwl_get_nvm);