1 files changed, 8 insertions, 27 deletions

diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index f088f4bf9a26..7ae73fbd9136 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -96,17 +96,6 @@ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
         return true;
 }
 
-static void ath_pci_extn_synch_enable(struct ath_common *common)
-{
-        struct ath_softc *sc = (struct ath_softc *) common->priv;
-        struct pci_dev *pdev = to_pci_dev(sc->dev);
-        u8 lnkctl;
-
-        pci_read_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, &lnkctl);
-        lnkctl |= PCI_EXP_LNKCTL_ES;
-        pci_write_config_byte(pdev, sc->sc_ah->caps.pcie_lcr_offset, lnkctl);
-}
-
 /* Need to be called after we discover btcoex capabilities */
 static void ath_pci_aspm_init(struct ath_common *common)
 {
@@ -125,23 +114,23 @@ static void ath_pci_aspm_init(struct ath_common *common)
 
         if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
             (AR_SREV_9285(ah))) {
-                /* Bluetooth coexistance requires disabling ASPM. */
+                /* Bluetooth coexistence requires disabling ASPM. */
                 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
-                        PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
+                        PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
 
                 /*
                  * Both upstream and downstream PCIe components should
                  * have the same ASPM settings.
                  */
                 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
-                        PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
+                        PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);
 
                 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
                 return;
         }
 
         pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
-        if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) {
+        if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
                 ah->aspm_enabled = true;
                 /* Initialize PCIe PM and SERDES registers. */
                 ath9k_hw_configpcipowersave(ah, false);
@@ -153,7 +142,6 @@ static const struct ath_bus_ops ath_pci_bus_ops = {
         .ath_bus_type = ATH_PCI,
         .read_cachesize = ath_pci_read_cachesize,
         .eeprom_read = ath_pci_eeprom_read,
-        .extn_synch_en = ath_pci_extn_synch_enable,
         .aspm_init = ath_pci_aspm_init,
 };
 
@@ -299,7 +287,7 @@ static void ath_pci_remove(struct pci_dev *pdev)
         pci_release_region(pdev, 0);
 }
 
-#ifdef CONFIG_PM
+#ifdef CONFIG_PM_SLEEP
 
 static int ath_pci_suspend(struct device *device)
 {
@@ -345,22 +333,15 @@ static int ath_pci_resume(struct device *device)
         return 0;
 }
 
-static const struct dev_pm_ops ath9k_pm_ops = {
-        .suspend = ath_pci_suspend,
-        .resume = ath_pci_resume,
-        .freeze = ath_pci_suspend,
-        .thaw = ath_pci_resume,
-        .poweroff = ath_pci_suspend,
-        .restore = ath_pci_resume,
-};
+static SIMPLE_DEV_PM_OPS(ath9k_pm_ops, ath_pci_suspend, ath_pci_resume);
 
 #define ATH9K_PM_OPS    (&ath9k_pm_ops)
 
-#else /* !CONFIG_PM */
+#else /* !CONFIG_PM_SLEEP */
 
 #define ATH9K_PM_OPS    NULL
 
-#endif /* !CONFIG_PM */
+#endif /* !CONFIG_PM_SLEEP */
 
 
 MODULE_DEVICE_TABLE(pci, ath_pci_id_table);