1 files changed, 45 insertions, 38 deletions

diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index c79889036ec4..f389b3c93cf3 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -45,6 +45,8 @@
 #define AR9300_DEVID_PCIE       0x0030
 #define AR9300_DEVID_AR9340     0x0031
 #define AR9300_DEVID_AR9485_PCIE 0x0032
+#define AR9300_DEVID_AR9580     0x0033
+#define AR9300_DEVID_AR9462     0x0034
 #define AR9300_DEVID_AR9330     0x0035
 
 #define AR5416_AR9100_DEVID     0x000b
@@ -93,6 +95,12 @@
                         (_ah)->reg_ops.write_flush((_ah));      \
         } while (0)
 
+#define PR_EEP(_s, _val)                                                \
+        do {                                                            \
+                len += snprintf(buf + len, size - len, "%20s : %10d\n", \
+                                _s, (_val));                            \
+        } while (0)
+
 #define SM(_v, _f)  (((_v) << _f##_S) & _f)
 #define MS(_v, _f)  (((_v) & _f) >> _f##_S)
 #define REG_RMW_FIELD(_a, _r, _f, _v) \
@@ -194,6 +202,7 @@ enum ath9k_hw_caps {
         ATH9K_HW_CAP_2GHZ                       = BIT(13),
         ATH9K_HW_CAP_5GHZ                       = BIT(14),
         ATH9K_HW_CAP_APM                        = BIT(15),
+        ATH9K_HW_CAP_RTT                        = BIT(16),
 };
 
 struct ath9k_hw_capabilities {
@@ -329,6 +338,16 @@ enum ath9k_int {
          CHANNEL_HT40PLUS |                     \
          CHANNEL_HT40MINUS)
 
+#define MAX_RTT_TABLE_ENTRY     6
+#define RTT_HIST_MAX            3
+struct ath9k_rtt_hist {
+        u32 table[AR9300_MAX_CHAINS][RTT_HIST_MAX][MAX_RTT_TABLE_ENTRY];
+        u8 num_readings;
+};
+
+#define MAX_IQCAL_MEASUREMENT   8
+#define MAX_CL_TAB_ENTRY        16
+
 struct ath9k_hw_cal_data {
         u16 channel;
         u32 channelFlags;
@@ -338,9 +357,15 @@ struct ath9k_hw_cal_data {
         bool paprd_done;
         bool nfcal_pending;
         bool nfcal_interference;
+        bool done_txiqcal_once;
+        bool done_txclcal_once;
         u16 small_signal_gain[AR9300_MAX_CHAINS];
         u32 pa_table[AR9300_MAX_CHAINS][PAPRD_TABLE_SZ];
+        u32 num_measures[AR9300_MAX_CHAINS];
+        int tx_corr_coeff[MAX_IQCAL_MEASUREMENT][AR9300_MAX_CHAINS];
+        u32 tx_clcal[AR9300_MAX_CHAINS][MAX_CL_TAB_ENTRY];
         struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS];
+        struct ath9k_rtt_hist rtt_hist;
 };
 
 struct ath9k_channel {
@@ -382,14 +407,6 @@ enum ath9k_power_mode {
         ATH9K_PM_UNDEFINED
 };
 
-enum ath9k_tp_scale {
-        ATH9K_TP_SCALE_MAX = 0,
-        ATH9K_TP_SCALE_50,
-        ATH9K_TP_SCALE_25,
-        ATH9K_TP_SCALE_12,
-        ATH9K_TP_SCALE_MIN
-};
-
 enum ser_reg_mode {
         SER_REG_MODE_OFF = 0,
         SER_REG_MODE_ON = 1,
@@ -438,7 +455,6 @@ struct ath9k_hw_version {
         u16 phyRev;
         u16 analog5GhzRev;
         u16 analog2GhzRev;
-        u16 subsysid;
         enum ath_usb_dev usbdev;
 };
 
@@ -577,7 +593,6 @@ struct ath_hw_private_ops {
         bool (*rfbus_req)(struct ath_hw *ah);
         void (*rfbus_done)(struct ath_hw *ah);
         void (*restore_chainmask)(struct ath_hw *ah);
-        void (*set_diversity)(struct ath_hw *ah, bool value);
         u32 (*compute_pll_control)(struct ath_hw *ah,
                                    struct ath9k_channel *chan);
         bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
@@ -585,6 +600,8 @@ struct ath_hw_private_ops {
         void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
         void (*set_radar_params)(struct ath_hw *ah,
                                  struct ath_hw_radar_conf *conf);
+        int (*fast_chan_change)(struct ath_hw *ah, struct ath9k_channel *chan,
+                                u8 *ini_reloaded);
 
         /* ANI */
         void (*ani_cache_ini_regs)(struct ath_hw *ah);
@@ -601,8 +618,7 @@ struct ath_hw_private_ops {
  */
 struct ath_hw_ops {
         void (*config_pci_powersave)(struct ath_hw *ah,
-                                     int restore,
-                                     int power_off);
+                                     bool power_off);
         void (*rx_enable)(struct ath_hw *ah);
         void (*set_desc_link)(void *ds, u32 link);
         bool (*calibrate)(struct ath_hw *ah,
@@ -610,30 +626,10 @@ struct ath_hw_ops {
                           u8 rxchainmask,
                           bool longcal);
         bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked);
-        void (*fill_txdesc)(struct ath_hw *ah, void *ds, u32 seglen,
-                            bool is_firstseg, bool is_is_lastseg,
-                            const void *ds0, dma_addr_t buf_addr,
-                            unsigned int qcu);
+        void (*set_txdesc)(struct ath_hw *ah, void *ds,
+                           struct ath_tx_info *i);
         int (*proc_txdesc)(struct ath_hw *ah, void *ds,
                            struct ath_tx_status *ts);
-        void (*set11n_txdesc)(struct ath_hw *ah, void *ds,
-                              u32 pktLen, enum ath9k_pkt_type type,
-                              u32 txPower, u32 keyIx,
-                              enum ath9k_key_type keyType,
-                              u32 flags);
-        void (*set11n_ratescenario)(struct ath_hw *ah, void *ds,
-                                void *lastds,
-                                u32 durUpdateEn, u32 rtsctsRate,
-                                u32 rtsctsDuration,
-                                struct ath9k_11n_rate_series series[],
-                                u32 nseries, u32 flags);
-        void (*set11n_aggr_first)(struct ath_hw *ah, void *ds,
-                                  u32 aggrLen);
-        void (*set11n_aggr_middle)(struct ath_hw *ah, void *ds,
-                                   u32 numDelims);
-        void (*set11n_aggr_last)(struct ath_hw *ah, void *ds);
-        void (*clr11n_aggr)(struct ath_hw *ah, void *ds);
-        void (*set_clrdmask)(struct ath_hw *ah, void *ds, bool val);
         void (*antdiv_comb_conf_get)(struct ath_hw *ah,
                         struct ath_hw_antcomb_conf *antconf);
         void (*antdiv_comb_conf_set)(struct ath_hw *ah,
@@ -647,9 +643,16 @@ struct ath_nf_limits {
         s16 nominal;
 };
 
+enum ath_cal_list {
+        TX_IQ_CAL         =     BIT(0),
+        TX_IQ_ON_AGC_CAL  =     BIT(1),
+        TX_CL_CAL         =     BIT(2),
+};
+
 /* ah_flags */
 #define AH_USE_EEPROM   0x1
 #define AH_UNPLUGGED    0x2 /* The card has been physically removed. */
+#define AH_FASTCC       0x4
 
 struct ath_hw {
         struct ath_ops reg_ops;
@@ -690,6 +693,7 @@ struct ath_hw {
         enum nl80211_iftype opmode;
         enum ath9k_power_mode power_mode;
 
+        s8 noise;
         struct ath9k_hw_cal_data *caldata;
         struct ath9k_pacal_info pacal_info;
         struct ar5416Stats stats;
@@ -703,8 +707,10 @@ struct ath_hw {
         u32 txdesc_interrupt_mask;
         u32 txeol_interrupt_mask;
         u32 txurn_interrupt_mask;
+        atomic_t intr_ref_cnt;
         bool chip_fullsleep;
         u32 atim_window;
+        u32 modes_index;
 
         /* Calibration */
         u32 supp_cals;
@@ -743,6 +749,7 @@ struct ath_hw {
                 int32_t sign[AR5416_MAX_CHAINS];
         } meas3;
         u16 cal_samples;
+        u8 enabled_cals;
 
         u32 sta_id1_defaults;
         u32 misc_mode;
@@ -820,11 +827,14 @@ struct ath_hw {
         struct ar5416IniArray iniModes_9271_1_0_only;
         struct ar5416IniArray iniCckfirNormal;
         struct ar5416IniArray iniCckfirJapan2484;
+        struct ar5416IniArray ini_japan2484;
         struct ar5416IniArray iniCommon_normal_cck_fir_coeff_9271;
         struct ar5416IniArray iniCommon_japan_2484_cck_fir_coeff_9271;
         struct ar5416IniArray iniModes_9271_ANI_reg;
         struct ar5416IniArray iniModes_high_power_tx_gain_9271;
         struct ar5416IniArray iniModes_normal_power_tx_gain_9271;
+        struct ar5416IniArray ini_radio_post_sys2ant;
+        struct ar5416IniArray ini_BTCOEX_MAX_TXPWR;
 
         struct ar5416IniArray iniMac[ATH_INI_NUM_SPLIT];
         struct ar5416IniArray iniBB[ATH_INI_NUM_SPLIT];
@@ -978,6 +988,7 @@ void ath9k_hw_htc_resetinit(struct ath_hw *ah);
 /* PHY */
 void ath9k_hw_get_delta_slope_vals(struct ath_hw *ah, u32 coef_scaled,
                                    u32 *coef_mantissa, u32 *coef_exponent);
+void ath9k_hw_apply_txpower(struct ath_hw *ah, struct ath9k_channel *chan);
 
 /*
  * Code Specific to AR5008, AR9001 or AR9002,
@@ -1030,10 +1041,6 @@ void ath9k_ani_reset(struct ath_hw *ah, bool is_scanning);
 void ath9k_hw_proc_mib_event(struct ath_hw *ah);
 void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan);
 
-#define ATH_PCIE_CAP_LINK_CTRL  0x70
-#define ATH_PCIE_CAP_LINK_L0S   1
-#define ATH_PCIE_CAP_LINK_L1    2
-
 #define ATH9K_CLOCK_RATE_CCK            22
 #define ATH9K_CLOCK_RATE_5GHZ_OFDM      40
 #define ATH9K_CLOCK_RATE_2GHZ_OFDM      44