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path: root/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_phy.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c36
1 files changed, 26 insertions, 10 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 1bc33f51e466..c83be2dd5718 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -86,14 +86,31 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
86 channelSel = (freq * 4) / 120; 86 channelSel = (freq * 4) / 120;
87 chan_frac = (((freq * 4) % 120) * 0x20000) / 120; 87 chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
88 channelSel = (channelSel << 17) | chan_frac; 88 channelSel = (channelSel << 17) | chan_frac;
89 } else if (AR_SREV_9340(ah)) {
90 if (ah->is_clk_25mhz) {
91 u32 chan_frac;
92
93 channelSel = (freq * 2) / 75;
94 chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
95 channelSel = (channelSel << 17) | chan_frac;
96 } else
97 channelSel = CHANSEL_2G(freq) >> 1;
89 } else 98 } else
90 channelSel = CHANSEL_2G(freq); 99 channelSel = CHANSEL_2G(freq);
91 /* Set to 2G mode */ 100 /* Set to 2G mode */
92 bMode = 1; 101 bMode = 1;
93 } else { 102 } else {
94 channelSel = CHANSEL_5G(freq); 103 if (AR_SREV_9340(ah) && ah->is_clk_25mhz) {
95 /* Doubler is ON, so, divide channelSel by 2. */ 104 u32 chan_frac;
96 channelSel >>= 1; 105
106 channelSel = (freq * 2) / 75;
107 chan_frac = ((freq % 75) * 0x20000) / 75;
108 channelSel = (channelSel << 17) | chan_frac;
109 } else {
110 channelSel = CHANSEL_5G(freq);
111 /* Doubler is ON, so, divide channelSel by 2. */
112 channelSel >>= 1;
113 }
97 /* Set to 5G mode */ 114 /* Set to 5G mode */
98 bMode = 0; 115 bMode = 0;
99 } 116 }
@@ -151,7 +168,7 @@ static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah,
151 * is out-of-band and can be ignored. 168 * is out-of-band and can be ignored.
152 */ 169 */
153 170
154 if (AR_SREV_9485(ah)) { 171 if (AR_SREV_9485(ah) || AR_SREV_9340(ah)) {
155 spur_fbin_ptr = ar9003_get_spur_chan_ptr(ah, 172 spur_fbin_ptr = ar9003_get_spur_chan_ptr(ah,
156 IS_CHAN_2GHZ(chan)); 173 IS_CHAN_2GHZ(chan));
157 if (spur_fbin_ptr[0] == 0) /* No spur */ 174 if (spur_fbin_ptr[0] == 0) /* No spur */
@@ -176,7 +193,7 @@ static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah,
176 193
177 for (i = 0; i < max_spur_cnts; i++) { 194 for (i = 0; i < max_spur_cnts; i++) {
178 negative = 0; 195 negative = 0;
179 if (AR_SREV_9485(ah)) 196 if (AR_SREV_9485(ah) || AR_SREV_9340(ah))
180 cur_bb_spur = FBIN2FREQ(spur_fbin_ptr[i], 197 cur_bb_spur = FBIN2FREQ(spur_fbin_ptr[i],
181 IS_CHAN_2GHZ(chan)) - synth_freq; 198 IS_CHAN_2GHZ(chan)) - synth_freq;
182 else 199 else
@@ -599,29 +616,25 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
599 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 616 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
600 unsigned int regWrites = 0, i; 617 unsigned int regWrites = 0, i;
601 struct ieee80211_channel *channel = chan->chan; 618 struct ieee80211_channel *channel = chan->chan;
602 u32 modesIndex, freqIndex; 619 u32 modesIndex;
603 620
604 switch (chan->chanmode) { 621 switch (chan->chanmode) {
605 case CHANNEL_A: 622 case CHANNEL_A:
606 case CHANNEL_A_HT20: 623 case CHANNEL_A_HT20:
607 modesIndex = 1; 624 modesIndex = 1;
608 freqIndex = 1;
609 break; 625 break;
610 case CHANNEL_A_HT40PLUS: 626 case CHANNEL_A_HT40PLUS:
611 case CHANNEL_A_HT40MINUS: 627 case CHANNEL_A_HT40MINUS:
612 modesIndex = 2; 628 modesIndex = 2;
613 freqIndex = 1;
614 break; 629 break;
615 case CHANNEL_G: 630 case CHANNEL_G:
616 case CHANNEL_G_HT20: 631 case CHANNEL_G_HT20:
617 case CHANNEL_B: 632 case CHANNEL_B:
618 modesIndex = 4; 633 modesIndex = 4;
619 freqIndex = 2;
620 break; 634 break;
621 case CHANNEL_G_HT40PLUS: 635 case CHANNEL_G_HT40PLUS:
622 case CHANNEL_G_HT40MINUS: 636 case CHANNEL_G_HT40MINUS:
623 modesIndex = 3; 637 modesIndex = 3;
624 freqIndex = 2;
625 break; 638 break;
626 639
627 default: 640 default:
@@ -646,6 +659,9 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
646 REG_WRITE_ARRAY(&ah->iniModesAdditional, 659 REG_WRITE_ARRAY(&ah->iniModesAdditional,
647 modesIndex, regWrites); 660 modesIndex, regWrites);
648 661
662 if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
663 REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
664
649 ar9003_hw_override_ini(ah); 665 ar9003_hw_override_ini(ah);
650 ar9003_hw_set_channel_regs(ah, chan); 666 ar9003_hw_set_channel_regs(ah, chan);
651 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); 667 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);