diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_paprd.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_paprd.c | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c index f80d1d633980..a4450cba0653 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c | |||
| @@ -14,12 +14,12 @@ | |||
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ | 15 | */ |
| 16 | 16 | ||
| 17 | #include <linux/export.h> | ||
| 17 | #include "hw.h" | 18 | #include "hw.h" |
| 18 | #include "ar9003_phy.h" | 19 | #include "ar9003_phy.h" |
| 19 | 20 | ||
| 20 | void ar9003_paprd_enable(struct ath_hw *ah, bool val) | 21 | void ar9003_paprd_enable(struct ath_hw *ah, bool val) |
| 21 | { | 22 | { |
| 22 | struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); | ||
| 23 | struct ath9k_channel *chan = ah->curchan; | 23 | struct ath9k_channel *chan = ah->curchan; |
| 24 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; | 24 | struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; |
| 25 | 25 | ||
| @@ -54,13 +54,7 @@ void ar9003_paprd_enable(struct ath_hw *ah, bool val) | |||
| 54 | 54 | ||
| 55 | if (val) { | 55 | if (val) { |
| 56 | ah->paprd_table_write_done = true; | 56 | ah->paprd_table_write_done = true; |
| 57 | 57 | ath9k_hw_apply_txpower(ah, chan); | |
| 58 | ah->eep_ops->set_txpower(ah, chan, | ||
| 59 | ath9k_regd_get_ctl(regulatory, chan), | ||
| 60 | chan->chan->max_antenna_gain * 2, | ||
| 61 | chan->chan->max_power * 2, | ||
| 62 | min((u32) MAX_RATE_POWER, | ||
| 63 | (u32) regulatory->power_limit), false); | ||
| 64 | } | 58 | } |
| 65 | 59 | ||
| 66 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0, | 60 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL0_B0, |
| @@ -113,7 +107,7 @@ static int ar9003_get_training_power_5g(struct ath_hw *ah) | |||
| 113 | if (delta > scale) | 107 | if (delta > scale) |
| 114 | return -1; | 108 | return -1; |
| 115 | 109 | ||
| 116 | switch (get_streams(common->tx_chainmask)) { | 110 | switch (get_streams(ah->txchainmask)) { |
| 117 | case 1: | 111 | case 1: |
| 118 | delta = 6; | 112 | delta = 6; |
| 119 | break; | 113 | break; |
| @@ -126,7 +120,7 @@ static int ar9003_get_training_power_5g(struct ath_hw *ah) | |||
| 126 | default: | 120 | default: |
| 127 | delta = 0; | 121 | delta = 0; |
| 128 | ath_dbg(common, ATH_DBG_CALIBRATE, | 122 | ath_dbg(common, ATH_DBG_CALIBRATE, |
| 129 | "Invalid tx-chainmask: %u\n", common->tx_chainmask); | 123 | "Invalid tx-chainmask: %u\n", ah->txchainmask); |
| 130 | } | 124 | } |
| 131 | 125 | ||
| 132 | power += delta; | 126 | power += delta; |
| @@ -147,7 +141,7 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah) | |||
| 147 | AR_PHY_PAPRD_CTRL1_B2 | 141 | AR_PHY_PAPRD_CTRL1_B2 |
| 148 | }; | 142 | }; |
| 149 | int training_power; | 143 | int training_power; |
| 150 | int i; | 144 | int i, val; |
| 151 | 145 | ||
| 152 | if (IS_CHAN_2GHZ(ah->curchan)) | 146 | if (IS_CHAN_2GHZ(ah->curchan)) |
| 153 | training_power = ar9003_get_training_power_2g(ah); | 147 | training_power = ar9003_get_training_power_2g(ah); |
| @@ -207,8 +201,9 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah) | |||
| 207 | AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28); | 201 | AR_PHY_PAPRD_TRAINER_CNTL1_CF_PAPRD_AGC2_SETTLING, 28); |
| 208 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1, | 202 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL1, |
| 209 | AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1); | 203 | AR_PHY_PAPRD_TRAINER_CNTL1_CF_CF_PAPRD_TRAIN_ENABLE, 1); |
| 204 | val = AR_SREV_9462(ah) ? 0x91 : 147; | ||
| 210 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2, | 205 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL2, |
| 211 | AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, 147); | 206 | AR_PHY_PAPRD_TRAINER_CNTL2_CF_PAPRD_INIT_RX_BB_GAIN, val); |
| 212 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, | 207 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, |
| 213 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_FINE_CORR_LEN, 4); | 208 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_FINE_CORR_LEN, 4); |
| 214 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, | 209 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, |
| @@ -217,7 +212,7 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah) | |||
| 217 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7); | 212 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7); |
| 218 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, | 213 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, |
| 219 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1); | 214 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1); |
| 220 | if (AR_SREV_9485(ah)) | 215 | if (AR_SREV_9485(ah) || AR_SREV_9462(ah)) |
| 221 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, | 216 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, |
| 222 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, | 217 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, |
| 223 | -3); | 218 | -3); |
| @@ -225,9 +220,10 @@ static int ar9003_paprd_setup_single_table(struct ath_hw *ah) | |||
| 225 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, | 220 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, |
| 226 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, | 221 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP, |
| 227 | -6); | 222 | -6); |
| 223 | val = AR_SREV_9462(ah) ? -10 : -15; | ||
| 228 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, | 224 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, |
| 229 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE, | 225 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_ADC_DESIRED_SIZE, |
| 230 | -15); | 226 | val); |
| 231 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, | 227 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3, |
| 232 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE, 1); | 228 | AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_BBTXMIX_DISABLE, 1); |
| 233 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL4, | 229 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL4, |
| @@ -757,6 +753,7 @@ void ar9003_paprd_populate_single_table(struct ath_hw *ah, | |||
| 757 | training_power); | 753 | training_power); |
| 758 | 754 | ||
| 759 | if (ah->caps.tx_chainmask & BIT(2)) | 755 | if (ah->caps.tx_chainmask & BIT(2)) |
| 756 | /* val AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL correct? */ | ||
| 760 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B2, | 757 | REG_RMW_FIELD(ah, AR_PHY_PAPRD_CTRL1_B2, |
| 761 | AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL, | 758 | AR_PHY_PAPRD_CTRL1_PAPRD_POWER_AT_AM2AM_CAL, |
| 762 | training_power); | 759 | training_power); |
