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path: root/drivers/net/wireless/ath/ath5k/phy.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath5k/phy.c')
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index 98ee85456321..641b13a279e1 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -75,13 +75,13 @@
75/** 75/**
76 * ath5k_hw_radio_revision() - Get the PHY Chip revision 76 * ath5k_hw_radio_revision() - Get the PHY Chip revision
77 * @ah: The &struct ath5k_hw 77 * @ah: The &struct ath5k_hw
78 * @band: One of enum ieee80211_band 78 * @band: One of enum nl80211_band
79 * 79 *
80 * Returns the revision number of a 2GHz, 5GHz or single chip 80 * Returns the revision number of a 2GHz, 5GHz or single chip
81 * radio. 81 * radio.
82 */ 82 */
83u16 83u16
84ath5k_hw_radio_revision(struct ath5k_hw *ah, enum ieee80211_band band) 84ath5k_hw_radio_revision(struct ath5k_hw *ah, enum nl80211_band band)
85{ 85{
86 unsigned int i; 86 unsigned int i;
87 u32 srev; 87 u32 srev;
@@ -91,10 +91,10 @@ ath5k_hw_radio_revision(struct ath5k_hw *ah, enum ieee80211_band band)
91 * Set the radio chip access register 91 * Set the radio chip access register
92 */ 92 */
93 switch (band) { 93 switch (band) {
94 case IEEE80211_BAND_2GHZ: 94 case NL80211_BAND_2GHZ:
95 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_2GHZ, AR5K_PHY(0)); 95 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_2GHZ, AR5K_PHY(0));
96 break; 96 break;
97 case IEEE80211_BAND_5GHZ: 97 case NL80211_BAND_5GHZ:
98 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_5GHZ, AR5K_PHY(0)); 98 ath5k_hw_reg_write(ah, AR5K_PHY_SHIFT_5GHZ, AR5K_PHY(0));
99 break; 99 break;
100 default: 100 default:
@@ -138,11 +138,11 @@ ath5k_channel_ok(struct ath5k_hw *ah, struct ieee80211_channel *channel)
138 u16 freq = channel->center_freq; 138 u16 freq = channel->center_freq;
139 139
140 /* Check if the channel is in our supported range */ 140 /* Check if the channel is in our supported range */
141 if (channel->band == IEEE80211_BAND_2GHZ) { 141 if (channel->band == NL80211_BAND_2GHZ) {
142 if ((freq >= ah->ah_capabilities.cap_range.range_2ghz_min) && 142 if ((freq >= ah->ah_capabilities.cap_range.range_2ghz_min) &&
143 (freq <= ah->ah_capabilities.cap_range.range_2ghz_max)) 143 (freq <= ah->ah_capabilities.cap_range.range_2ghz_max))
144 return true; 144 return true;
145 } else if (channel->band == IEEE80211_BAND_5GHZ) 145 } else if (channel->band == NL80211_BAND_5GHZ)
146 if ((freq >= ah->ah_capabilities.cap_range.range_5ghz_min) && 146 if ((freq >= ah->ah_capabilities.cap_range.range_5ghz_min) &&
147 (freq <= ah->ah_capabilities.cap_range.range_5ghz_max)) 147 (freq <= ah->ah_capabilities.cap_range.range_5ghz_max))
148 return true; 148 return true;
@@ -743,7 +743,7 @@ done:
743/** 743/**
744 * ath5k_hw_rfgain_init() - Write initial RF gain settings to hw 744 * ath5k_hw_rfgain_init() - Write initial RF gain settings to hw
745 * @ah: The &struct ath5k_hw 745 * @ah: The &struct ath5k_hw
746 * @band: One of enum ieee80211_band 746 * @band: One of enum nl80211_band
747 * 747 *
748 * Write initial RF gain table to set the RF sensitivity. 748 * Write initial RF gain table to set the RF sensitivity.
749 * 749 *
@@ -751,7 +751,7 @@ done:
751 * with Gain_F calibration 751 * with Gain_F calibration
752 */ 752 */
753static int 753static int
754ath5k_hw_rfgain_init(struct ath5k_hw *ah, enum ieee80211_band band) 754ath5k_hw_rfgain_init(struct ath5k_hw *ah, enum nl80211_band band)
755{ 755{
756 const struct ath5k_ini_rfgain *ath5k_rfg; 756 const struct ath5k_ini_rfgain *ath5k_rfg;
757 unsigned int i, size, index; 757 unsigned int i, size, index;
@@ -786,7 +786,7 @@ ath5k_hw_rfgain_init(struct ath5k_hw *ah, enum ieee80211_band band)
786 return -EINVAL; 786 return -EINVAL;
787 } 787 }
788 788
789 index = (band == IEEE80211_BAND_2GHZ) ? 1 : 0; 789 index = (band == NL80211_BAND_2GHZ) ? 1 : 0;
790 790
791 for (i = 0; i < size; i++) { 791 for (i = 0; i < size; i++) {
792 AR5K_REG_WAIT(i); 792 AR5K_REG_WAIT(i);
@@ -917,7 +917,7 @@ ath5k_hw_rfregs_init(struct ath5k_hw *ah,
917 } 917 }
918 918
919 /* Set Output and Driver bias current (OB/DB) */ 919 /* Set Output and Driver bias current (OB/DB) */
920 if (channel->band == IEEE80211_BAND_2GHZ) { 920 if (channel->band == NL80211_BAND_2GHZ) {
921 921
922 if (channel->hw_value == AR5K_MODE_11B) 922 if (channel->hw_value == AR5K_MODE_11B)
923 ee_mode = AR5K_EEPROM_MODE_11B; 923 ee_mode = AR5K_EEPROM_MODE_11B;
@@ -944,7 +944,7 @@ ath5k_hw_rfregs_init(struct ath5k_hw *ah,
944 AR5K_RF_DB_2GHZ, true); 944 AR5K_RF_DB_2GHZ, true);
945 945
946 /* RF5111 always needs OB/DB for 5GHz, even if we use 2GHz */ 946 /* RF5111 always needs OB/DB for 5GHz, even if we use 2GHz */
947 } else if ((channel->band == IEEE80211_BAND_5GHZ) || 947 } else if ((channel->band == NL80211_BAND_5GHZ) ||
948 (ah->ah_radio == AR5K_RF5111)) { 948 (ah->ah_radio == AR5K_RF5111)) {
949 949
950 /* For 11a, Turbo and XR we need to choose 950 /* For 11a, Turbo and XR we need to choose
@@ -1145,7 +1145,7 @@ ath5k_hw_rfregs_init(struct ath5k_hw *ah,
1145 } 1145 }
1146 1146
1147 if (ah->ah_radio == AR5K_RF5413 && 1147 if (ah->ah_radio == AR5K_RF5413 &&
1148 channel->band == IEEE80211_BAND_2GHZ) { 1148 channel->band == NL80211_BAND_2GHZ) {
1149 1149
1150 ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_DERBY_CHAN_SEL_MODE, 1150 ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_DERBY_CHAN_SEL_MODE,
1151 true); 1151 true);
@@ -1270,7 +1270,7 @@ ath5k_hw_rf5111_channel(struct ath5k_hw *ah,
1270 */ 1270 */
1271 data0 = data1 = 0; 1271 data0 = data1 = 0;
1272 1272
1273 if (channel->band == IEEE80211_BAND_2GHZ) { 1273 if (channel->band == NL80211_BAND_2GHZ) {
1274 /* Map 2GHz channel to 5GHz Atheros channel ID */ 1274 /* Map 2GHz channel to 5GHz Atheros channel ID */
1275 ret = ath5k_hw_rf5111_chan2athchan( 1275 ret = ath5k_hw_rf5111_chan2athchan(
1276 ieee80211_frequency_to_channel(channel->center_freq), 1276 ieee80211_frequency_to_channel(channel->center_freq),
@@ -1919,7 +1919,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
1919 /* Convert current frequency to fbin value (the same way channels 1919 /* Convert current frequency to fbin value (the same way channels
1920 * are stored on EEPROM, check out ath5k_eeprom_bin2freq) and scale 1920 * are stored on EEPROM, check out ath5k_eeprom_bin2freq) and scale
1921 * up by 2 so we can compare it later */ 1921 * up by 2 so we can compare it later */
1922 if (channel->band == IEEE80211_BAND_2GHZ) { 1922 if (channel->band == NL80211_BAND_2GHZ) {
1923 chan_fbin = (channel->center_freq - 2300) * 10; 1923 chan_fbin = (channel->center_freq - 2300) * 10;
1924 freq_band = AR5K_EEPROM_BAND_2GHZ; 1924 freq_band = AR5K_EEPROM_BAND_2GHZ;
1925 } else { 1925 } else {
@@ -1983,7 +1983,7 @@ ath5k_hw_set_spur_mitigation_filter(struct ath5k_hw *ah,
1983 symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz / 4; 1983 symbol_width = AR5K_SPUR_SYMBOL_WIDTH_BASE_100Hz / 4;
1984 break; 1984 break;
1985 default: 1985 default:
1986 if (channel->band == IEEE80211_BAND_5GHZ) { 1986 if (channel->band == NL80211_BAND_5GHZ) {
1987 /* Both sample_freq and chip_freq are 40MHz */ 1987 /* Both sample_freq and chip_freq are 40MHz */
1988 spur_delta_phase = (spur_offset << 17) / 25; 1988 spur_delta_phase = (spur_offset << 17) / 25;
1989 spur_freq_sigma_delta = 1989 spur_freq_sigma_delta =