diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/wmi.c')
-rw-r--r-- | drivers/net/wireless/ath/ath10k/wmi.c | 2238 |
1 files changed, 1631 insertions, 607 deletions
diff --git a/drivers/net/wireless/ath/ath10k/wmi.c b/drivers/net/wireless/ath/ath10k/wmi.c index c0f3e4d09263..aeea1c793943 100644 --- a/drivers/net/wireless/ath/ath10k/wmi.c +++ b/drivers/net/wireless/ath/ath10k/wmi.c | |||
@@ -22,8 +22,10 @@ | |||
22 | #include "htc.h" | 22 | #include "htc.h" |
23 | #include "debug.h" | 23 | #include "debug.h" |
24 | #include "wmi.h" | 24 | #include "wmi.h" |
25 | #include "wmi-tlv.h" | ||
25 | #include "mac.h" | 26 | #include "mac.h" |
26 | #include "testmode.h" | 27 | #include "testmode.h" |
28 | #include "wmi-ops.h" | ||
27 | 29 | ||
28 | /* MAIN WMI cmd track */ | 30 | /* MAIN WMI cmd track */ |
29 | static struct wmi_cmd_map wmi_cmd_map = { | 31 | static struct wmi_cmd_map wmi_cmd_map = { |
@@ -143,6 +145,7 @@ static struct wmi_cmd_map wmi_cmd_map = { | |||
143 | .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, | 145 | .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, |
144 | .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, | 146 | .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, |
145 | .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, | 147 | .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, |
148 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, | ||
146 | }; | 149 | }; |
147 | 150 | ||
148 | /* 10.X WMI cmd track */ | 151 | /* 10.X WMI cmd track */ |
@@ -265,6 +268,129 @@ static struct wmi_cmd_map wmi_10x_cmd_map = { | |||
265 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | 268 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, |
266 | .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, | 269 | .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, |
267 | .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, | 270 | .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, |
271 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, | ||
272 | }; | ||
273 | |||
274 | /* 10.2.4 WMI cmd track */ | ||
275 | static struct wmi_cmd_map wmi_10_2_4_cmd_map = { | ||
276 | .init_cmdid = WMI_10_2_INIT_CMDID, | ||
277 | .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, | ||
278 | .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, | ||
279 | .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, | ||
280 | .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, | ||
281 | .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, | ||
282 | .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, | ||
283 | .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, | ||
284 | .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, | ||
285 | .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, | ||
286 | .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, | ||
287 | .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, | ||
288 | .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, | ||
289 | .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, | ||
290 | .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, | ||
291 | .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, | ||
292 | .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, | ||
293 | .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, | ||
294 | .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, | ||
295 | .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, | ||
296 | .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, | ||
297 | .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, | ||
298 | .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, | ||
299 | .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, | ||
300 | .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, | ||
301 | .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, | ||
302 | .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, | ||
303 | .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, | ||
304 | .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, | ||
305 | .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, | ||
306 | .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, | ||
307 | .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, | ||
308 | .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, | ||
309 | .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, | ||
310 | .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, | ||
311 | .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, | ||
312 | .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | ||
313 | .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, | ||
314 | .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, | ||
315 | .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, | ||
316 | .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, | ||
317 | .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, | ||
318 | .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, | ||
319 | .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, | ||
320 | .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, | ||
321 | .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, | ||
322 | .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, | ||
323 | .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, | ||
324 | .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, | ||
325 | .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, | ||
326 | .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, | ||
327 | .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, | ||
328 | .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, | ||
329 | .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, | ||
330 | .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, | ||
331 | .roam_scan_rssi_change_threshold = | ||
332 | WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, | ||
333 | .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, | ||
334 | .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, | ||
335 | .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, | ||
336 | .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, | ||
337 | .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, | ||
338 | .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, | ||
339 | .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, | ||
340 | .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, | ||
341 | .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, | ||
342 | .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, | ||
343 | .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, | ||
344 | .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, | ||
345 | .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, | ||
346 | .wlan_profile_set_hist_intvl_cmdid = | ||
347 | WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, | ||
348 | .wlan_profile_get_profile_data_cmdid = | ||
349 | WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, | ||
350 | .wlan_profile_enable_profile_id_cmdid = | ||
351 | WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, | ||
352 | .wlan_profile_list_profile_id_cmdid = | ||
353 | WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, | ||
354 | .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, | ||
355 | .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, | ||
356 | .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, | ||
357 | .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, | ||
358 | .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, | ||
359 | .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, | ||
360 | .wow_enable_disable_wake_event_cmdid = | ||
361 | WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, | ||
362 | .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, | ||
363 | .wow_hostwakeup_from_sleep_cmdid = | ||
364 | WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, | ||
365 | .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, | ||
366 | .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, | ||
367 | .vdev_spectral_scan_configure_cmdid = | ||
368 | WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, | ||
369 | .vdev_spectral_scan_enable_cmdid = | ||
370 | WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, | ||
371 | .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, | ||
372 | .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, | ||
373 | .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, | ||
374 | .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, | ||
375 | .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, | ||
376 | .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, | ||
377 | .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, | ||
378 | .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, | ||
379 | .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, | ||
380 | .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, | ||
381 | .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, | ||
382 | .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, | ||
383 | .echo_cmdid = WMI_10_2_ECHO_CMDID, | ||
384 | .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, | ||
385 | .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, | ||
386 | .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, | ||
387 | .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, | ||
388 | .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | ||
389 | .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, | ||
390 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | ||
391 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | ||
392 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | ||
393 | .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, | ||
268 | }; | 394 | }; |
269 | 395 | ||
270 | /* MAIN WMI VDEV param map */ | 396 | /* MAIN WMI VDEV param map */ |
@@ -385,6 +511,64 @@ static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { | |||
385 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | 511 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, |
386 | }; | 512 | }; |
387 | 513 | ||
514 | static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = { | ||
515 | .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, | ||
516 | .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, | ||
517 | .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, | ||
518 | .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, | ||
519 | .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, | ||
520 | .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, | ||
521 | .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, | ||
522 | .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, | ||
523 | .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, | ||
524 | .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, | ||
525 | .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, | ||
526 | .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, | ||
527 | .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, | ||
528 | .wmi_vdev_oc_scheduler_air_time_limit = | ||
529 | WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, | ||
530 | .wds = WMI_10X_VDEV_PARAM_WDS, | ||
531 | .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, | ||
532 | .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, | ||
533 | .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | ||
534 | .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, | ||
535 | .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, | ||
536 | .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, | ||
537 | .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, | ||
538 | .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, | ||
539 | .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, | ||
540 | .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, | ||
541 | .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, | ||
542 | .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, | ||
543 | .sgi = WMI_10X_VDEV_PARAM_SGI, | ||
544 | .ldpc = WMI_10X_VDEV_PARAM_LDPC, | ||
545 | .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, | ||
546 | .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, | ||
547 | .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, | ||
548 | .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, | ||
549 | .nss = WMI_10X_VDEV_PARAM_NSS, | ||
550 | .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, | ||
551 | .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, | ||
552 | .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, | ||
553 | .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, | ||
554 | .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, | ||
555 | .ap_keepalive_min_idle_inactive_time_secs = | ||
556 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, | ||
557 | .ap_keepalive_max_idle_inactive_time_secs = | ||
558 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, | ||
559 | .ap_keepalive_max_unresponsive_time_secs = | ||
560 | WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, | ||
561 | .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, | ||
562 | .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, | ||
563 | .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, | ||
564 | .txbf = WMI_VDEV_PARAM_UNSUPPORTED, | ||
565 | .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, | ||
566 | .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, | ||
567 | .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, | ||
568 | .ap_detect_out_of_sync_sleeping_sta_time_secs = | ||
569 | WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, | ||
570 | }; | ||
571 | |||
388 | static struct wmi_pdev_param_map wmi_pdev_param_map = { | 572 | static struct wmi_pdev_param_map wmi_pdev_param_map = { |
389 | .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, | 573 | .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, |
390 | .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, | 574 | .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, |
@@ -434,6 +618,7 @@ static struct wmi_pdev_param_map wmi_pdev_param_map = { | |||
434 | .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, | 618 | .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, |
435 | .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, | 619 | .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, |
436 | .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, | 620 | .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, |
621 | .cal_period = WMI_PDEV_PARAM_UNSUPPORTED, | ||
437 | }; | 622 | }; |
438 | 623 | ||
439 | static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { | 624 | static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { |
@@ -486,6 +671,60 @@ static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { | |||
486 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | 671 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, |
487 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | 672 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, |
488 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | 673 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, |
674 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, | ||
675 | }; | ||
676 | |||
677 | static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = { | ||
678 | .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, | ||
679 | .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, | ||
680 | .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, | ||
681 | .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, | ||
682 | .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, | ||
683 | .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, | ||
684 | .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, | ||
685 | .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, | ||
686 | .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, | ||
687 | .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, | ||
688 | .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, | ||
689 | .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, | ||
690 | .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, | ||
691 | .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, | ||
692 | .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, | ||
693 | .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, | ||
694 | .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, | ||
695 | .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, | ||
696 | .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, | ||
697 | .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, | ||
698 | .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, | ||
699 | .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, | ||
700 | .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, | ||
701 | .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, | ||
702 | .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, | ||
703 | .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, | ||
704 | .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, | ||
705 | .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, | ||
706 | .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, | ||
707 | .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, | ||
708 | .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, | ||
709 | .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, | ||
710 | .bcnflt_stats_update_period = | ||
711 | WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, | ||
712 | .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, | ||
713 | .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, | ||
714 | .dcs = WMI_10X_PDEV_PARAM_DCS, | ||
715 | .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, | ||
716 | .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, | ||
717 | .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, | ||
718 | .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, | ||
719 | .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, | ||
720 | .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, | ||
721 | .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, | ||
722 | .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, | ||
723 | .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, | ||
724 | .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, | ||
725 | .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, | ||
726 | .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, | ||
727 | .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, | ||
489 | }; | 728 | }; |
490 | 729 | ||
491 | /* firmware 10.2 specific mappings */ | 730 | /* firmware 10.2 specific mappings */ |
@@ -607,11 +846,11 @@ static struct wmi_cmd_map wmi_10_2_cmd_map = { | |||
607 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, | 846 | .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, |
608 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, | 847 | .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, |
609 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, | 848 | .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, |
849 | .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, | ||
610 | }; | 850 | }; |
611 | 851 | ||
612 | static void | 852 | void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, |
613 | ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, | 853 | const struct wmi_channel_arg *arg) |
614 | const struct wmi_channel_arg *arg) | ||
615 | { | 854 | { |
616 | u32 flags = 0; | 855 | u32 flags = 0; |
617 | 856 | ||
@@ -685,8 +924,8 @@ static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) | |||
685 | dev_kfree_skb(skb); | 924 | dev_kfree_skb(skb); |
686 | } | 925 | } |
687 | 926 | ||
688 | static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, | 927 | int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, |
689 | u32 cmd_id) | 928 | u32 cmd_id) |
690 | { | 929 | { |
691 | struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); | 930 | struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); |
692 | struct wmi_cmd_hdr *cmd_hdr; | 931 | struct wmi_cmd_hdr *cmd_hdr; |
@@ -717,23 +956,45 @@ err_pull: | |||
717 | 956 | ||
718 | static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) | 957 | static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) |
719 | { | 958 | { |
959 | struct ath10k *ar = arvif->ar; | ||
960 | struct ath10k_skb_cb *cb; | ||
961 | struct sk_buff *bcn; | ||
720 | int ret; | 962 | int ret; |
721 | 963 | ||
722 | lockdep_assert_held(&arvif->ar->data_lock); | 964 | spin_lock_bh(&ar->data_lock); |
723 | 965 | ||
724 | if (arvif->beacon == NULL) | 966 | bcn = arvif->beacon; |
725 | return; | ||
726 | 967 | ||
727 | if (arvif->beacon_sent) | 968 | if (!bcn) |
728 | return; | 969 | goto unlock; |
729 | 970 | ||
730 | ret = ath10k_wmi_beacon_send_ref_nowait(arvif); | 971 | cb = ATH10K_SKB_CB(bcn); |
731 | if (ret) | 972 | |
732 | return; | 973 | switch (arvif->beacon_state) { |
974 | case ATH10K_BEACON_SENDING: | ||
975 | case ATH10K_BEACON_SENT: | ||
976 | break; | ||
977 | case ATH10K_BEACON_SCHEDULED: | ||
978 | arvif->beacon_state = ATH10K_BEACON_SENDING; | ||
979 | spin_unlock_bh(&ar->data_lock); | ||
980 | |||
981 | ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar, | ||
982 | arvif->vdev_id, | ||
983 | bcn->data, bcn->len, | ||
984 | cb->paddr, | ||
985 | cb->bcn.dtim_zero, | ||
986 | cb->bcn.deliver_cab); | ||
987 | |||
988 | spin_lock_bh(&ar->data_lock); | ||
989 | |||
990 | if (ret == 0) | ||
991 | arvif->beacon_state = ATH10K_BEACON_SENT; | ||
992 | else | ||
993 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; | ||
994 | } | ||
733 | 995 | ||
734 | /* We need to retain the arvif->beacon reference for DMA unmapping and | 996 | unlock: |
735 | * freeing the skbuff later. */ | 997 | spin_unlock_bh(&ar->data_lock); |
736 | arvif->beacon_sent = true; | ||
737 | } | 998 | } |
738 | 999 | ||
739 | static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, | 1000 | static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, |
@@ -746,12 +1007,10 @@ static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, | |||
746 | 1007 | ||
747 | static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) | 1008 | static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) |
748 | { | 1009 | { |
749 | spin_lock_bh(&ar->data_lock); | ||
750 | ieee80211_iterate_active_interfaces_atomic(ar->hw, | 1010 | ieee80211_iterate_active_interfaces_atomic(ar->hw, |
751 | IEEE80211_IFACE_ITER_NORMAL, | 1011 | IEEE80211_IFACE_ITER_NORMAL, |
752 | ath10k_wmi_tx_beacons_iter, | 1012 | ath10k_wmi_tx_beacons_iter, |
753 | NULL); | 1013 | NULL); |
754 | spin_unlock_bh(&ar->data_lock); | ||
755 | } | 1014 | } |
756 | 1015 | ||
757 | static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) | 1016 | static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) |
@@ -792,24 +1051,23 @@ int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) | |||
792 | return ret; | 1051 | return ret; |
793 | } | 1052 | } |
794 | 1053 | ||
795 | int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb) | 1054 | static struct sk_buff * |
1055 | ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu) | ||
796 | { | 1056 | { |
797 | int ret = 0; | ||
798 | struct wmi_mgmt_tx_cmd *cmd; | 1057 | struct wmi_mgmt_tx_cmd *cmd; |
799 | struct ieee80211_hdr *hdr; | 1058 | struct ieee80211_hdr *hdr; |
800 | struct sk_buff *wmi_skb; | 1059 | struct sk_buff *skb; |
801 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | ||
802 | int len; | 1060 | int len; |
803 | u32 buf_len = skb->len; | 1061 | u32 buf_len = msdu->len; |
804 | u16 fc; | 1062 | u16 fc; |
805 | 1063 | ||
806 | hdr = (struct ieee80211_hdr *)skb->data; | 1064 | hdr = (struct ieee80211_hdr *)msdu->data; |
807 | fc = le16_to_cpu(hdr->frame_control); | 1065 | fc = le16_to_cpu(hdr->frame_control); |
808 | 1066 | ||
809 | if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) | 1067 | if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) |
810 | return -EINVAL; | 1068 | return ERR_PTR(-EINVAL); |
811 | 1069 | ||
812 | len = sizeof(cmd->hdr) + skb->len; | 1070 | len = sizeof(cmd->hdr) + msdu->len; |
813 | 1071 | ||
814 | if ((ieee80211_is_action(hdr->frame_control) || | 1072 | if ((ieee80211_is_action(hdr->frame_control) || |
815 | ieee80211_is_deauth(hdr->frame_control) || | 1073 | ieee80211_is_deauth(hdr->frame_control) || |
@@ -821,36 +1079,27 @@ int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb) | |||
821 | 1079 | ||
822 | len = round_up(len, 4); | 1080 | len = round_up(len, 4); |
823 | 1081 | ||
824 | wmi_skb = ath10k_wmi_alloc_skb(ar, len); | 1082 | skb = ath10k_wmi_alloc_skb(ar, len); |
825 | if (!wmi_skb) | 1083 | if (!skb) |
826 | return -ENOMEM; | 1084 | return ERR_PTR(-ENOMEM); |
827 | 1085 | ||
828 | cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data; | 1086 | cmd = (struct wmi_mgmt_tx_cmd *)skb->data; |
829 | 1087 | ||
830 | cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id); | 1088 | cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id); |
831 | cmd->hdr.tx_rate = 0; | 1089 | cmd->hdr.tx_rate = 0; |
832 | cmd->hdr.tx_power = 0; | 1090 | cmd->hdr.tx_power = 0; |
833 | cmd->hdr.buf_len = __cpu_to_le32(buf_len); | 1091 | cmd->hdr.buf_len = __cpu_to_le32(buf_len); |
834 | 1092 | ||
835 | ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); | 1093 | ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); |
836 | memcpy(cmd->buf, skb->data, skb->len); | 1094 | memcpy(cmd->buf, msdu->data, msdu->len); |
837 | 1095 | ||
838 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", | 1096 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", |
839 | wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE, | 1097 | msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, |
840 | fc & IEEE80211_FCTL_STYPE); | 1098 | fc & IEEE80211_FCTL_STYPE); |
841 | trace_ath10k_tx_hdr(ar, skb->data, skb->len); | 1099 | trace_ath10k_tx_hdr(ar, skb->data, skb->len); |
842 | trace_ath10k_tx_payload(ar, skb->data, skb->len); | 1100 | trace_ath10k_tx_payload(ar, skb->data, skb->len); |
843 | 1101 | ||
844 | /* Send the management frame buffer to the target */ | 1102 | return skb; |
845 | ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid); | ||
846 | if (ret) | ||
847 | return ret; | ||
848 | |||
849 | /* TODO: report tx status to mac80211 - temporary just ACK */ | ||
850 | info->flags |= IEEE80211_TX_STAT_ACK; | ||
851 | ieee80211_tx_status_irqsafe(ar->hw, skb); | ||
852 | |||
853 | return ret; | ||
854 | } | 1103 | } |
855 | 1104 | ||
856 | static void ath10k_wmi_event_scan_started(struct ath10k *ar) | 1105 | static void ath10k_wmi_event_scan_started(struct ath10k *ar) |
@@ -977,22 +1226,48 @@ ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, | |||
977 | } | 1226 | } |
978 | } | 1227 | } |
979 | 1228 | ||
980 | static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) | 1229 | static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb, |
1230 | struct wmi_scan_ev_arg *arg) | ||
981 | { | 1231 | { |
982 | struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data; | 1232 | struct wmi_scan_event *ev = (void *)skb->data; |
1233 | |||
1234 | if (skb->len < sizeof(*ev)) | ||
1235 | return -EPROTO; | ||
1236 | |||
1237 | skb_pull(skb, sizeof(*ev)); | ||
1238 | arg->event_type = ev->event_type; | ||
1239 | arg->reason = ev->reason; | ||
1240 | arg->channel_freq = ev->channel_freq; | ||
1241 | arg->scan_req_id = ev->scan_req_id; | ||
1242 | arg->scan_id = ev->scan_id; | ||
1243 | arg->vdev_id = ev->vdev_id; | ||
1244 | |||
1245 | return 0; | ||
1246 | } | ||
1247 | |||
1248 | int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) | ||
1249 | { | ||
1250 | struct wmi_scan_ev_arg arg = {}; | ||
983 | enum wmi_scan_event_type event_type; | 1251 | enum wmi_scan_event_type event_type; |
984 | enum wmi_scan_completion_reason reason; | 1252 | enum wmi_scan_completion_reason reason; |
985 | u32 freq; | 1253 | u32 freq; |
986 | u32 req_id; | 1254 | u32 req_id; |
987 | u32 scan_id; | 1255 | u32 scan_id; |
988 | u32 vdev_id; | 1256 | u32 vdev_id; |
1257 | int ret; | ||
1258 | |||
1259 | ret = ath10k_wmi_pull_scan(ar, skb, &arg); | ||
1260 | if (ret) { | ||
1261 | ath10k_warn(ar, "failed to parse scan event: %d\n", ret); | ||
1262 | return ret; | ||
1263 | } | ||
989 | 1264 | ||
990 | event_type = __le32_to_cpu(event->event_type); | 1265 | event_type = __le32_to_cpu(arg.event_type); |
991 | reason = __le32_to_cpu(event->reason); | 1266 | reason = __le32_to_cpu(arg.reason); |
992 | freq = __le32_to_cpu(event->channel_freq); | 1267 | freq = __le32_to_cpu(arg.channel_freq); |
993 | req_id = __le32_to_cpu(event->scan_req_id); | 1268 | req_id = __le32_to_cpu(arg.scan_req_id); |
994 | scan_id = __le32_to_cpu(event->scan_id); | 1269 | scan_id = __le32_to_cpu(arg.scan_id); |
995 | vdev_id = __le32_to_cpu(event->vdev_id); | 1270 | vdev_id = __le32_to_cpu(arg.vdev_id); |
996 | 1271 | ||
997 | spin_lock_bh(&ar->data_lock); | 1272 | spin_lock_bh(&ar->data_lock); |
998 | 1273 | ||
@@ -1147,11 +1422,51 @@ static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar, | |||
1147 | } | 1422 | } |
1148 | } | 1423 | } |
1149 | 1424 | ||
1150 | static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) | 1425 | static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb, |
1426 | struct wmi_mgmt_rx_ev_arg *arg) | ||
1151 | { | 1427 | { |
1152 | struct wmi_mgmt_rx_event_v1 *ev_v1; | 1428 | struct wmi_mgmt_rx_event_v1 *ev_v1; |
1153 | struct wmi_mgmt_rx_event_v2 *ev_v2; | 1429 | struct wmi_mgmt_rx_event_v2 *ev_v2; |
1154 | struct wmi_mgmt_rx_hdr_v1 *ev_hdr; | 1430 | struct wmi_mgmt_rx_hdr_v1 *ev_hdr; |
1431 | size_t pull_len; | ||
1432 | u32 msdu_len; | ||
1433 | |||
1434 | if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { | ||
1435 | ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; | ||
1436 | ev_hdr = &ev_v2->hdr.v1; | ||
1437 | pull_len = sizeof(*ev_v2); | ||
1438 | } else { | ||
1439 | ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; | ||
1440 | ev_hdr = &ev_v1->hdr; | ||
1441 | pull_len = sizeof(*ev_v1); | ||
1442 | } | ||
1443 | |||
1444 | if (skb->len < pull_len) | ||
1445 | return -EPROTO; | ||
1446 | |||
1447 | skb_pull(skb, pull_len); | ||
1448 | arg->channel = ev_hdr->channel; | ||
1449 | arg->buf_len = ev_hdr->buf_len; | ||
1450 | arg->status = ev_hdr->status; | ||
1451 | arg->snr = ev_hdr->snr; | ||
1452 | arg->phy_mode = ev_hdr->phy_mode; | ||
1453 | arg->rate = ev_hdr->rate; | ||
1454 | |||
1455 | msdu_len = __le32_to_cpu(arg->buf_len); | ||
1456 | if (skb->len < msdu_len) | ||
1457 | return -EPROTO; | ||
1458 | |||
1459 | /* the WMI buffer might've ended up being padded to 4 bytes due to HTC | ||
1460 | * trailer with credit update. Trim the excess garbage. | ||
1461 | */ | ||
1462 | skb_trim(skb, msdu_len); | ||
1463 | |||
1464 | return 0; | ||
1465 | } | ||
1466 | |||
1467 | int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) | ||
1468 | { | ||
1469 | struct wmi_mgmt_rx_ev_arg arg = {}; | ||
1155 | struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); | 1470 | struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); |
1156 | struct ieee80211_hdr *hdr; | 1471 | struct ieee80211_hdr *hdr; |
1157 | u32 rx_status; | 1472 | u32 rx_status; |
@@ -1161,24 +1476,20 @@ static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) | |||
1161 | u32 rate; | 1476 | u32 rate; |
1162 | u32 buf_len; | 1477 | u32 buf_len; |
1163 | u16 fc; | 1478 | u16 fc; |
1164 | int pull_len; | 1479 | int ret; |
1165 | 1480 | ||
1166 | if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { | 1481 | ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg); |
1167 | ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; | 1482 | if (ret) { |
1168 | ev_hdr = &ev_v2->hdr.v1; | 1483 | ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret); |
1169 | pull_len = sizeof(*ev_v2); | 1484 | return ret; |
1170 | } else { | ||
1171 | ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; | ||
1172 | ev_hdr = &ev_v1->hdr; | ||
1173 | pull_len = sizeof(*ev_v1); | ||
1174 | } | 1485 | } |
1175 | 1486 | ||
1176 | channel = __le32_to_cpu(ev_hdr->channel); | 1487 | channel = __le32_to_cpu(arg.channel); |
1177 | buf_len = __le32_to_cpu(ev_hdr->buf_len); | 1488 | buf_len = __le32_to_cpu(arg.buf_len); |
1178 | rx_status = __le32_to_cpu(ev_hdr->status); | 1489 | rx_status = __le32_to_cpu(arg.status); |
1179 | snr = __le32_to_cpu(ev_hdr->snr); | 1490 | snr = __le32_to_cpu(arg.snr); |
1180 | phy_mode = __le32_to_cpu(ev_hdr->phy_mode); | 1491 | phy_mode = __le32_to_cpu(arg.phy_mode); |
1181 | rate = __le32_to_cpu(ev_hdr->rate); | 1492 | rate = __le32_to_cpu(arg.rate); |
1182 | 1493 | ||
1183 | memset(status, 0, sizeof(*status)); | 1494 | memset(status, 0, sizeof(*status)); |
1184 | 1495 | ||
@@ -1232,8 +1543,6 @@ static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) | |||
1232 | status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; | 1543 | status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; |
1233 | status->rate_idx = get_rate_idx(rate, status->band); | 1544 | status->rate_idx = get_rate_idx(rate, status->band); |
1234 | 1545 | ||
1235 | skb_pull(skb, pull_len); | ||
1236 | |||
1237 | hdr = (struct ieee80211_hdr *)skb->data; | 1546 | hdr = (struct ieee80211_hdr *)skb->data; |
1238 | fc = le16_to_cpu(hdr->frame_control); | 1547 | fc = le16_to_cpu(hdr->frame_control); |
1239 | 1548 | ||
@@ -1266,12 +1575,6 @@ static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) | |||
1266 | status->freq, status->band, status->signal, | 1575 | status->freq, status->band, status->signal, |
1267 | status->rate_idx); | 1576 | status->rate_idx); |
1268 | 1577 | ||
1269 | /* | ||
1270 | * packets from HTC come aligned to 4byte boundaries | ||
1271 | * because they can originally come in along with a trailer | ||
1272 | */ | ||
1273 | skb_trim(skb, buf_len); | ||
1274 | |||
1275 | ieee80211_rx(ar->hw, skb); | 1578 | ieee80211_rx(ar->hw, skb); |
1276 | return 0; | 1579 | return 0; |
1277 | } | 1580 | } |
@@ -1295,21 +1598,44 @@ exit: | |||
1295 | return idx; | 1598 | return idx; |
1296 | } | 1599 | } |
1297 | 1600 | ||
1298 | static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) | 1601 | static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb, |
1602 | struct wmi_ch_info_ev_arg *arg) | ||
1299 | { | 1603 | { |
1300 | struct wmi_chan_info_event *ev; | 1604 | struct wmi_chan_info_event *ev = (void *)skb->data; |
1605 | |||
1606 | if (skb->len < sizeof(*ev)) | ||
1607 | return -EPROTO; | ||
1608 | |||
1609 | skb_pull(skb, sizeof(*ev)); | ||
1610 | arg->err_code = ev->err_code; | ||
1611 | arg->freq = ev->freq; | ||
1612 | arg->cmd_flags = ev->cmd_flags; | ||
1613 | arg->noise_floor = ev->noise_floor; | ||
1614 | arg->rx_clear_count = ev->rx_clear_count; | ||
1615 | arg->cycle_count = ev->cycle_count; | ||
1616 | |||
1617 | return 0; | ||
1618 | } | ||
1619 | |||
1620 | void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) | ||
1621 | { | ||
1622 | struct wmi_ch_info_ev_arg arg = {}; | ||
1301 | struct survey_info *survey; | 1623 | struct survey_info *survey; |
1302 | u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; | 1624 | u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; |
1303 | int idx; | 1625 | int idx, ret; |
1304 | 1626 | ||
1305 | ev = (struct wmi_chan_info_event *)skb->data; | 1627 | ret = ath10k_wmi_pull_ch_info(ar, skb, &arg); |
1628 | if (ret) { | ||
1629 | ath10k_warn(ar, "failed to parse chan info event: %d\n", ret); | ||
1630 | return; | ||
1631 | } | ||
1306 | 1632 | ||
1307 | err_code = __le32_to_cpu(ev->err_code); | 1633 | err_code = __le32_to_cpu(arg.err_code); |
1308 | freq = __le32_to_cpu(ev->freq); | 1634 | freq = __le32_to_cpu(arg.freq); |
1309 | cmd_flags = __le32_to_cpu(ev->cmd_flags); | 1635 | cmd_flags = __le32_to_cpu(arg.cmd_flags); |
1310 | noise_floor = __le32_to_cpu(ev->noise_floor); | 1636 | noise_floor = __le32_to_cpu(arg.noise_floor); |
1311 | rx_clear_count = __le32_to_cpu(ev->rx_clear_count); | 1637 | rx_clear_count = __le32_to_cpu(arg.rx_clear_count); |
1312 | cycle_count = __le32_to_cpu(ev->cycle_count); | 1638 | cycle_count = __le32_to_cpu(arg.cycle_count); |
1313 | 1639 | ||
1314 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 1640 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
1315 | "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", | 1641 | "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", |
@@ -1344,11 +1670,11 @@ static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) | |||
1344 | rx_clear_count -= ar->survey_last_rx_clear_count; | 1670 | rx_clear_count -= ar->survey_last_rx_clear_count; |
1345 | 1671 | ||
1346 | survey = &ar->survey[idx]; | 1672 | survey = &ar->survey[idx]; |
1347 | survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count); | 1673 | survey->time = WMI_CHAN_INFO_MSEC(cycle_count); |
1348 | survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count); | 1674 | survey->time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count); |
1349 | survey->noise = noise_floor; | 1675 | survey->noise = noise_floor; |
1350 | survey->filled = SURVEY_INFO_CHANNEL_TIME | | 1676 | survey->filled = SURVEY_INFO_TIME | |
1351 | SURVEY_INFO_CHANNEL_TIME_RX | | 1677 | SURVEY_INFO_TIME_RX | |
1352 | SURVEY_INFO_NOISE_DBM; | 1678 | SURVEY_INFO_NOISE_DBM; |
1353 | } | 1679 | } |
1354 | 1680 | ||
@@ -1359,12 +1685,12 @@ exit: | |||
1359 | spin_unlock_bh(&ar->data_lock); | 1685 | spin_unlock_bh(&ar->data_lock); |
1360 | } | 1686 | } |
1361 | 1687 | ||
1362 | static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) | 1688 | void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) |
1363 | { | 1689 | { |
1364 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); | 1690 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); |
1365 | } | 1691 | } |
1366 | 1692 | ||
1367 | static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) | 1693 | int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) |
1368 | { | 1694 | { |
1369 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", | 1695 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", |
1370 | skb->len); | 1696 | skb->len); |
@@ -1374,12 +1700,9 @@ static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) | |||
1374 | return 0; | 1700 | return 0; |
1375 | } | 1701 | } |
1376 | 1702 | ||
1377 | static void ath10k_wmi_pull_pdev_stats(const struct wmi_pdev_stats *src, | 1703 | void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, |
1378 | struct ath10k_fw_stats_pdev *dst) | 1704 | struct ath10k_fw_stats_pdev *dst) |
1379 | { | 1705 | { |
1380 | const struct wal_dbg_tx_stats *tx = &src->wal.tx; | ||
1381 | const struct wal_dbg_rx_stats *rx = &src->wal.rx; | ||
1382 | |||
1383 | dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); | 1706 | dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); |
1384 | dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); | 1707 | dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); |
1385 | dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); | 1708 | dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); |
@@ -1387,57 +1710,76 @@ static void ath10k_wmi_pull_pdev_stats(const struct wmi_pdev_stats *src, | |||
1387 | dst->cycle_count = __le32_to_cpu(src->cycle_count); | 1710 | dst->cycle_count = __le32_to_cpu(src->cycle_count); |
1388 | dst->phy_err_count = __le32_to_cpu(src->phy_err_count); | 1711 | dst->phy_err_count = __le32_to_cpu(src->phy_err_count); |
1389 | dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); | 1712 | dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); |
1713 | } | ||
1390 | 1714 | ||
1391 | dst->comp_queued = __le32_to_cpu(tx->comp_queued); | 1715 | void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, |
1392 | dst->comp_delivered = __le32_to_cpu(tx->comp_delivered); | 1716 | struct ath10k_fw_stats_pdev *dst) |
1393 | dst->msdu_enqued = __le32_to_cpu(tx->msdu_enqued); | 1717 | { |
1394 | dst->mpdu_enqued = __le32_to_cpu(tx->mpdu_enqued); | 1718 | dst->comp_queued = __le32_to_cpu(src->comp_queued); |
1395 | dst->wmm_drop = __le32_to_cpu(tx->wmm_drop); | 1719 | dst->comp_delivered = __le32_to_cpu(src->comp_delivered); |
1396 | dst->local_enqued = __le32_to_cpu(tx->local_enqued); | 1720 | dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); |
1397 | dst->local_freed = __le32_to_cpu(tx->local_freed); | 1721 | dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); |
1398 | dst->hw_queued = __le32_to_cpu(tx->hw_queued); | 1722 | dst->wmm_drop = __le32_to_cpu(src->wmm_drop); |
1399 | dst->hw_reaped = __le32_to_cpu(tx->hw_reaped); | 1723 | dst->local_enqued = __le32_to_cpu(src->local_enqued); |
1400 | dst->underrun = __le32_to_cpu(tx->underrun); | 1724 | dst->local_freed = __le32_to_cpu(src->local_freed); |
1401 | dst->tx_abort = __le32_to_cpu(tx->tx_abort); | 1725 | dst->hw_queued = __le32_to_cpu(src->hw_queued); |
1402 | dst->mpdus_requed = __le32_to_cpu(tx->mpdus_requed); | 1726 | dst->hw_reaped = __le32_to_cpu(src->hw_reaped); |
1403 | dst->tx_ko = __le32_to_cpu(tx->tx_ko); | 1727 | dst->underrun = __le32_to_cpu(src->underrun); |
1404 | dst->data_rc = __le32_to_cpu(tx->data_rc); | 1728 | dst->tx_abort = __le32_to_cpu(src->tx_abort); |
1405 | dst->self_triggers = __le32_to_cpu(tx->self_triggers); | 1729 | dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); |
1406 | dst->sw_retry_failure = __le32_to_cpu(tx->sw_retry_failure); | 1730 | dst->tx_ko = __le32_to_cpu(src->tx_ko); |
1407 | dst->illgl_rate_phy_err = __le32_to_cpu(tx->illgl_rate_phy_err); | 1731 | dst->data_rc = __le32_to_cpu(src->data_rc); |
1408 | dst->pdev_cont_xretry = __le32_to_cpu(tx->pdev_cont_xretry); | 1732 | dst->self_triggers = __le32_to_cpu(src->self_triggers); |
1409 | dst->pdev_tx_timeout = __le32_to_cpu(tx->pdev_tx_timeout); | 1733 | dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); |
1410 | dst->pdev_resets = __le32_to_cpu(tx->pdev_resets); | 1734 | dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); |
1411 | dst->phy_underrun = __le32_to_cpu(tx->phy_underrun); | 1735 | dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); |
1412 | dst->txop_ovf = __le32_to_cpu(tx->txop_ovf); | 1736 | dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); |
1413 | 1737 | dst->pdev_resets = __le32_to_cpu(src->pdev_resets); | |
1414 | dst->mid_ppdu_route_change = __le32_to_cpu(rx->mid_ppdu_route_change); | 1738 | dst->phy_underrun = __le32_to_cpu(src->phy_underrun); |
1415 | dst->status_rcvd = __le32_to_cpu(rx->status_rcvd); | 1739 | dst->txop_ovf = __le32_to_cpu(src->txop_ovf); |
1416 | dst->r0_frags = __le32_to_cpu(rx->r0_frags); | 1740 | } |
1417 | dst->r1_frags = __le32_to_cpu(rx->r1_frags); | 1741 | |
1418 | dst->r2_frags = __le32_to_cpu(rx->r2_frags); | 1742 | void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, |
1419 | dst->r3_frags = __le32_to_cpu(rx->r3_frags); | 1743 | struct ath10k_fw_stats_pdev *dst) |
1420 | dst->htt_msdus = __le32_to_cpu(rx->htt_msdus); | 1744 | { |
1421 | dst->htt_mpdus = __le32_to_cpu(rx->htt_mpdus); | 1745 | dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change); |
1422 | dst->loc_msdus = __le32_to_cpu(rx->loc_msdus); | 1746 | dst->status_rcvd = __le32_to_cpu(src->status_rcvd); |
1423 | dst->loc_mpdus = __le32_to_cpu(rx->loc_mpdus); | 1747 | dst->r0_frags = __le32_to_cpu(src->r0_frags); |
1424 | dst->oversize_amsdu = __le32_to_cpu(rx->oversize_amsdu); | 1748 | dst->r1_frags = __le32_to_cpu(src->r1_frags); |
1425 | dst->phy_errs = __le32_to_cpu(rx->phy_errs); | 1749 | dst->r2_frags = __le32_to_cpu(src->r2_frags); |
1426 | dst->phy_err_drop = __le32_to_cpu(rx->phy_err_drop); | 1750 | dst->r3_frags = __le32_to_cpu(src->r3_frags); |
1427 | dst->mpdu_errs = __le32_to_cpu(rx->mpdu_errs); | 1751 | dst->htt_msdus = __le32_to_cpu(src->htt_msdus); |
1428 | } | 1752 | dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus); |
1429 | 1753 | dst->loc_msdus = __le32_to_cpu(src->loc_msdus); | |
1430 | static void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, | 1754 | dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus); |
1431 | struct ath10k_fw_stats_peer *dst) | 1755 | dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu); |
1756 | dst->phy_errs = __le32_to_cpu(src->phy_errs); | ||
1757 | dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop); | ||
1758 | dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs); | ||
1759 | } | ||
1760 | |||
1761 | void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, | ||
1762 | struct ath10k_fw_stats_pdev *dst) | ||
1763 | { | ||
1764 | dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); | ||
1765 | dst->rts_bad = __le32_to_cpu(src->rts_bad); | ||
1766 | dst->rts_good = __le32_to_cpu(src->rts_good); | ||
1767 | dst->fcs_bad = __le32_to_cpu(src->fcs_bad); | ||
1768 | dst->no_beacons = __le32_to_cpu(src->no_beacons); | ||
1769 | dst->mib_int_count = __le32_to_cpu(src->mib_int_count); | ||
1770 | } | ||
1771 | |||
1772 | void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, | ||
1773 | struct ath10k_fw_stats_peer *dst) | ||
1432 | { | 1774 | { |
1433 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); | 1775 | ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); |
1434 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); | 1776 | dst->peer_rssi = __le32_to_cpu(src->peer_rssi); |
1435 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); | 1777 | dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); |
1436 | } | 1778 | } |
1437 | 1779 | ||
1438 | static int ath10k_wmi_main_pull_fw_stats(struct ath10k *ar, | 1780 | static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar, |
1439 | struct sk_buff *skb, | 1781 | struct sk_buff *skb, |
1440 | struct ath10k_fw_stats *stats) | 1782 | struct ath10k_fw_stats *stats) |
1441 | { | 1783 | { |
1442 | const struct wmi_stats_event *ev = (void *)skb->data; | 1784 | const struct wmi_stats_event *ev = (void *)skb->data; |
1443 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | 1785 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; |
@@ -1462,7 +1804,10 @@ static int ath10k_wmi_main_pull_fw_stats(struct ath10k *ar, | |||
1462 | if (!dst) | 1804 | if (!dst) |
1463 | continue; | 1805 | continue; |
1464 | 1806 | ||
1465 | ath10k_wmi_pull_pdev_stats(src, dst); | 1807 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
1808 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | ||
1809 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | ||
1810 | |||
1466 | list_add_tail(&dst->list, &stats->pdevs); | 1811 | list_add_tail(&dst->list, &stats->pdevs); |
1467 | } | 1812 | } |
1468 | 1813 | ||
@@ -1487,9 +1832,9 @@ static int ath10k_wmi_main_pull_fw_stats(struct ath10k *ar, | |||
1487 | return 0; | 1832 | return 0; |
1488 | } | 1833 | } |
1489 | 1834 | ||
1490 | static int ath10k_wmi_10x_pull_fw_stats(struct ath10k *ar, | 1835 | static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar, |
1491 | struct sk_buff *skb, | 1836 | struct sk_buff *skb, |
1492 | struct ath10k_fw_stats *stats) | 1837 | struct ath10k_fw_stats *stats) |
1493 | { | 1838 | { |
1494 | const struct wmi_stats_event *ev = (void *)skb->data; | 1839 | const struct wmi_stats_event *ev = (void *)skb->data; |
1495 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; | 1840 | u32 num_pdev_stats, num_vdev_stats, num_peer_stats; |
@@ -1514,14 +1859,10 @@ static int ath10k_wmi_10x_pull_fw_stats(struct ath10k *ar, | |||
1514 | if (!dst) | 1859 | if (!dst) |
1515 | continue; | 1860 | continue; |
1516 | 1861 | ||
1517 | ath10k_wmi_pull_pdev_stats(&src->old, dst); | 1862 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); |
1518 | 1863 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | |
1519 | dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); | 1864 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); |
1520 | dst->rts_bad = __le32_to_cpu(src->rts_bad); | 1865 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); |
1521 | dst->rts_good = __le32_to_cpu(src->rts_good); | ||
1522 | dst->fcs_bad = __le32_to_cpu(src->fcs_bad); | ||
1523 | dst->no_beacons = __le32_to_cpu(src->no_beacons); | ||
1524 | dst->mib_int_count = __le32_to_cpu(src->mib_int_count); | ||
1525 | 1866 | ||
1526 | list_add_tail(&dst->list, &stats->pdevs); | 1867 | list_add_tail(&dst->list, &stats->pdevs); |
1527 | } | 1868 | } |
@@ -1550,61 +1891,250 @@ static int ath10k_wmi_10x_pull_fw_stats(struct ath10k *ar, | |||
1550 | return 0; | 1891 | return 0; |
1551 | } | 1892 | } |
1552 | 1893 | ||
1553 | int ath10k_wmi_pull_fw_stats(struct ath10k *ar, struct sk_buff *skb, | 1894 | static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar, |
1554 | struct ath10k_fw_stats *stats) | 1895 | struct sk_buff *skb, |
1896 | struct ath10k_fw_stats *stats) | ||
1555 | { | 1897 | { |
1556 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) | 1898 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; |
1557 | return ath10k_wmi_10x_pull_fw_stats(ar, skb, stats); | 1899 | u32 num_pdev_stats; |
1558 | else | 1900 | u32 num_pdev_ext_stats; |
1559 | return ath10k_wmi_main_pull_fw_stats(ar, skb, stats); | 1901 | u32 num_vdev_stats; |
1902 | u32 num_peer_stats; | ||
1903 | int i; | ||
1904 | |||
1905 | if (!skb_pull(skb, sizeof(*ev))) | ||
1906 | return -EPROTO; | ||
1907 | |||
1908 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | ||
1909 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | ||
1910 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | ||
1911 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | ||
1912 | |||
1913 | for (i = 0; i < num_pdev_stats; i++) { | ||
1914 | const struct wmi_10_2_pdev_stats *src; | ||
1915 | struct ath10k_fw_stats_pdev *dst; | ||
1916 | |||
1917 | src = (void *)skb->data; | ||
1918 | if (!skb_pull(skb, sizeof(*src))) | ||
1919 | return -EPROTO; | ||
1920 | |||
1921 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | ||
1922 | if (!dst) | ||
1923 | continue; | ||
1924 | |||
1925 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | ||
1926 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | ||
1927 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | ||
1928 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | ||
1929 | /* FIXME: expose 10.2 specific values */ | ||
1930 | |||
1931 | list_add_tail(&dst->list, &stats->pdevs); | ||
1932 | } | ||
1933 | |||
1934 | for (i = 0; i < num_pdev_ext_stats; i++) { | ||
1935 | const struct wmi_10_2_pdev_ext_stats *src; | ||
1936 | |||
1937 | src = (void *)skb->data; | ||
1938 | if (!skb_pull(skb, sizeof(*src))) | ||
1939 | return -EPROTO; | ||
1940 | |||
1941 | /* FIXME: expose values to userspace | ||
1942 | * | ||
1943 | * Note: Even though this loop seems to do nothing it is | ||
1944 | * required to parse following sub-structures properly. | ||
1945 | */ | ||
1946 | } | ||
1947 | |||
1948 | /* fw doesn't implement vdev stats */ | ||
1949 | |||
1950 | for (i = 0; i < num_peer_stats; i++) { | ||
1951 | const struct wmi_10_2_peer_stats *src; | ||
1952 | struct ath10k_fw_stats_peer *dst; | ||
1953 | |||
1954 | src = (void *)skb->data; | ||
1955 | if (!skb_pull(skb, sizeof(*src))) | ||
1956 | return -EPROTO; | ||
1957 | |||
1958 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | ||
1959 | if (!dst) | ||
1960 | continue; | ||
1961 | |||
1962 | ath10k_wmi_pull_peer_stats(&src->old, dst); | ||
1963 | |||
1964 | dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); | ||
1965 | /* FIXME: expose 10.2 specific values */ | ||
1966 | |||
1967 | list_add_tail(&dst->list, &stats->peers); | ||
1968 | } | ||
1969 | |||
1970 | return 0; | ||
1971 | } | ||
1972 | |||
1973 | static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar, | ||
1974 | struct sk_buff *skb, | ||
1975 | struct ath10k_fw_stats *stats) | ||
1976 | { | ||
1977 | const struct wmi_10_2_stats_event *ev = (void *)skb->data; | ||
1978 | u32 num_pdev_stats; | ||
1979 | u32 num_pdev_ext_stats; | ||
1980 | u32 num_vdev_stats; | ||
1981 | u32 num_peer_stats; | ||
1982 | int i; | ||
1983 | |||
1984 | if (!skb_pull(skb, sizeof(*ev))) | ||
1985 | return -EPROTO; | ||
1986 | |||
1987 | num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); | ||
1988 | num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); | ||
1989 | num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); | ||
1990 | num_peer_stats = __le32_to_cpu(ev->num_peer_stats); | ||
1991 | |||
1992 | for (i = 0; i < num_pdev_stats; i++) { | ||
1993 | const struct wmi_10_2_pdev_stats *src; | ||
1994 | struct ath10k_fw_stats_pdev *dst; | ||
1995 | |||
1996 | src = (void *)skb->data; | ||
1997 | if (!skb_pull(skb, sizeof(*src))) | ||
1998 | return -EPROTO; | ||
1999 | |||
2000 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | ||
2001 | if (!dst) | ||
2002 | continue; | ||
2003 | |||
2004 | ath10k_wmi_pull_pdev_stats_base(&src->base, dst); | ||
2005 | ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); | ||
2006 | ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); | ||
2007 | ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); | ||
2008 | /* FIXME: expose 10.2 specific values */ | ||
2009 | |||
2010 | list_add_tail(&dst->list, &stats->pdevs); | ||
2011 | } | ||
2012 | |||
2013 | for (i = 0; i < num_pdev_ext_stats; i++) { | ||
2014 | const struct wmi_10_2_pdev_ext_stats *src; | ||
2015 | |||
2016 | src = (void *)skb->data; | ||
2017 | if (!skb_pull(skb, sizeof(*src))) | ||
2018 | return -EPROTO; | ||
2019 | |||
2020 | /* FIXME: expose values to userspace | ||
2021 | * | ||
2022 | * Note: Even though this loop seems to do nothing it is | ||
2023 | * required to parse following sub-structures properly. | ||
2024 | */ | ||
2025 | } | ||
2026 | |||
2027 | /* fw doesn't implement vdev stats */ | ||
2028 | |||
2029 | for (i = 0; i < num_peer_stats; i++) { | ||
2030 | const struct wmi_10_2_4_peer_stats *src; | ||
2031 | struct ath10k_fw_stats_peer *dst; | ||
2032 | |||
2033 | src = (void *)skb->data; | ||
2034 | if (!skb_pull(skb, sizeof(*src))) | ||
2035 | return -EPROTO; | ||
2036 | |||
2037 | dst = kzalloc(sizeof(*dst), GFP_ATOMIC); | ||
2038 | if (!dst) | ||
2039 | continue; | ||
2040 | |||
2041 | ath10k_wmi_pull_peer_stats(&src->common.old, dst); | ||
2042 | |||
2043 | dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); | ||
2044 | /* FIXME: expose 10.2 specific values */ | ||
2045 | |||
2046 | list_add_tail(&dst->list, &stats->peers); | ||
2047 | } | ||
2048 | |||
2049 | return 0; | ||
1560 | } | 2050 | } |
1561 | 2051 | ||
1562 | static void ath10k_wmi_event_update_stats(struct ath10k *ar, | 2052 | void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb) |
1563 | struct sk_buff *skb) | ||
1564 | { | 2053 | { |
1565 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); | 2054 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); |
1566 | ath10k_debug_fw_stats_process(ar, skb); | 2055 | ath10k_debug_fw_stats_process(ar, skb); |
1567 | } | 2056 | } |
1568 | 2057 | ||
1569 | static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, | 2058 | static int |
1570 | struct sk_buff *skb) | 2059 | ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb, |
2060 | struct wmi_vdev_start_ev_arg *arg) | ||
2061 | { | ||
2062 | struct wmi_vdev_start_response_event *ev = (void *)skb->data; | ||
2063 | |||
2064 | if (skb->len < sizeof(*ev)) | ||
2065 | return -EPROTO; | ||
2066 | |||
2067 | skb_pull(skb, sizeof(*ev)); | ||
2068 | arg->vdev_id = ev->vdev_id; | ||
2069 | arg->req_id = ev->req_id; | ||
2070 | arg->resp_type = ev->resp_type; | ||
2071 | arg->status = ev->status; | ||
2072 | |||
2073 | return 0; | ||
2074 | } | ||
2075 | |||
2076 | void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb) | ||
1571 | { | 2077 | { |
1572 | struct wmi_vdev_start_response_event *ev; | 2078 | struct wmi_vdev_start_ev_arg arg = {}; |
2079 | int ret; | ||
1573 | 2080 | ||
1574 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); | 2081 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); |
1575 | 2082 | ||
1576 | ev = (struct wmi_vdev_start_response_event *)skb->data; | 2083 | ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg); |
2084 | if (ret) { | ||
2085 | ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret); | ||
2086 | return; | ||
2087 | } | ||
1577 | 2088 | ||
1578 | if (WARN_ON(__le32_to_cpu(ev->status))) | 2089 | if (WARN_ON(__le32_to_cpu(arg.status))) |
1579 | return; | 2090 | return; |
1580 | 2091 | ||
1581 | complete(&ar->vdev_setup_done); | 2092 | complete(&ar->vdev_setup_done); |
1582 | } | 2093 | } |
1583 | 2094 | ||
1584 | static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, | 2095 | void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb) |
1585 | struct sk_buff *skb) | ||
1586 | { | 2096 | { |
1587 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); | 2097 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); |
1588 | complete(&ar->vdev_setup_done); | 2098 | complete(&ar->vdev_setup_done); |
1589 | } | 2099 | } |
1590 | 2100 | ||
1591 | static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, | 2101 | static int |
1592 | struct sk_buff *skb) | 2102 | ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb, |
2103 | struct wmi_peer_kick_ev_arg *arg) | ||
1593 | { | 2104 | { |
1594 | struct wmi_peer_sta_kickout_event *ev; | 2105 | struct wmi_peer_sta_kickout_event *ev = (void *)skb->data; |
2106 | |||
2107 | if (skb->len < sizeof(*ev)) | ||
2108 | return -EPROTO; | ||
2109 | |||
2110 | skb_pull(skb, sizeof(*ev)); | ||
2111 | arg->mac_addr = ev->peer_macaddr.addr; | ||
2112 | |||
2113 | return 0; | ||
2114 | } | ||
2115 | |||
2116 | void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb) | ||
2117 | { | ||
2118 | struct wmi_peer_kick_ev_arg arg = {}; | ||
1595 | struct ieee80211_sta *sta; | 2119 | struct ieee80211_sta *sta; |
2120 | int ret; | ||
1596 | 2121 | ||
1597 | ev = (struct wmi_peer_sta_kickout_event *)skb->data; | 2122 | ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg); |
2123 | if (ret) { | ||
2124 | ath10k_warn(ar, "failed to parse peer kickout event: %d\n", | ||
2125 | ret); | ||
2126 | return; | ||
2127 | } | ||
1598 | 2128 | ||
1599 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", | 2129 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", |
1600 | ev->peer_macaddr.addr); | 2130 | arg.mac_addr); |
1601 | 2131 | ||
1602 | rcu_read_lock(); | 2132 | rcu_read_lock(); |
1603 | 2133 | ||
1604 | sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL); | 2134 | sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL); |
1605 | if (!sta) { | 2135 | if (!sta) { |
1606 | ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", | 2136 | ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", |
1607 | ev->peer_macaddr.addr); | 2137 | arg.mac_addr); |
1608 | goto exit; | 2138 | goto exit; |
1609 | } | 2139 | } |
1610 | 2140 | ||
@@ -1641,7 +2171,7 @@ exit: | |||
1641 | static void ath10k_wmi_update_tim(struct ath10k *ar, | 2171 | static void ath10k_wmi_update_tim(struct ath10k *ar, |
1642 | struct ath10k_vif *arvif, | 2172 | struct ath10k_vif *arvif, |
1643 | struct sk_buff *bcn, | 2173 | struct sk_buff *bcn, |
1644 | struct wmi_bcn_info *bcn_info) | 2174 | const struct wmi_tim_info *tim_info) |
1645 | { | 2175 | { |
1646 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; | 2176 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; |
1647 | struct ieee80211_tim_ie *tim; | 2177 | struct ieee80211_tim_ie *tim; |
@@ -1652,14 +2182,14 @@ static void ath10k_wmi_update_tim(struct ath10k *ar, | |||
1652 | 2182 | ||
1653 | /* if next SWBA has no tim_changed the tim_bitmap is garbage. | 2183 | /* if next SWBA has no tim_changed the tim_bitmap is garbage. |
1654 | * we must copy the bitmap upon change and reuse it later */ | 2184 | * we must copy the bitmap upon change and reuse it later */ |
1655 | if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) { | 2185 | if (__le32_to_cpu(tim_info->tim_changed)) { |
1656 | int i; | 2186 | int i; |
1657 | 2187 | ||
1658 | BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) != | 2188 | BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) != |
1659 | sizeof(bcn_info->tim_info.tim_bitmap)); | 2189 | sizeof(tim_info->tim_bitmap)); |
1660 | 2190 | ||
1661 | for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) { | 2191 | for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) { |
1662 | t = bcn_info->tim_info.tim_bitmap[i / 4]; | 2192 | t = tim_info->tim_bitmap[i / 4]; |
1663 | v = __le32_to_cpu(t); | 2193 | v = __le32_to_cpu(t); |
1664 | arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; | 2194 | arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; |
1665 | } | 2195 | } |
@@ -1711,13 +2241,13 @@ static void ath10k_wmi_update_tim(struct ath10k *ar, | |||
1711 | return; | 2241 | return; |
1712 | } | 2242 | } |
1713 | 2243 | ||
1714 | tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast); | 2244 | tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast); |
1715 | memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); | 2245 | memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); |
1716 | 2246 | ||
1717 | if (tim->dtim_count == 0) { | 2247 | if (tim->dtim_count == 0) { |
1718 | ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true; | 2248 | ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true; |
1719 | 2249 | ||
1720 | if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1) | 2250 | if (__le32_to_cpu(tim_info->tim_mcast) == 1) |
1721 | ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true; | 2251 | ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true; |
1722 | } | 2252 | } |
1723 | 2253 | ||
@@ -1727,7 +2257,7 @@ static void ath10k_wmi_update_tim(struct ath10k *ar, | |||
1727 | } | 2257 | } |
1728 | 2258 | ||
1729 | static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len, | 2259 | static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len, |
1730 | struct wmi_p2p_noa_info *noa) | 2260 | const struct wmi_p2p_noa_info *noa) |
1731 | { | 2261 | { |
1732 | struct ieee80211_p2p_noa_attr *noa_attr; | 2262 | struct ieee80211_p2p_noa_attr *noa_attr; |
1733 | u8 ctwindow_oppps = noa->ctwindow_oppps; | 2263 | u8 ctwindow_oppps = noa->ctwindow_oppps; |
@@ -1769,7 +2299,7 @@ static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len, | |||
1769 | *noa_attr_len = __cpu_to_le16(attr_len); | 2299 | *noa_attr_len = __cpu_to_le16(attr_len); |
1770 | } | 2300 | } |
1771 | 2301 | ||
1772 | static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa) | 2302 | static u32 ath10k_p2p_calc_noa_ie_len(const struct wmi_p2p_noa_info *noa) |
1773 | { | 2303 | { |
1774 | u32 len = 0; | 2304 | u32 len = 0; |
1775 | u8 noa_descriptors = noa->num_descriptors; | 2305 | u8 noa_descriptors = noa->num_descriptors; |
@@ -1789,9 +2319,8 @@ static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa) | |||
1789 | 2319 | ||
1790 | static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, | 2320 | static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, |
1791 | struct sk_buff *bcn, | 2321 | struct sk_buff *bcn, |
1792 | struct wmi_bcn_info *bcn_info) | 2322 | const struct wmi_p2p_noa_info *noa) |
1793 | { | 2323 | { |
1794 | struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info; | ||
1795 | u8 *new_data, *old_data = arvif->u.ap.noa_data; | 2324 | u8 *new_data, *old_data = arvif->u.ap.noa_data; |
1796 | u32 new_len; | 2325 | u32 new_len; |
1797 | 2326 | ||
@@ -1832,22 +2361,59 @@ cleanup: | |||
1832 | kfree(old_data); | 2361 | kfree(old_data); |
1833 | } | 2362 | } |
1834 | 2363 | ||
1835 | static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) | 2364 | static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb, |
2365 | struct wmi_swba_ev_arg *arg) | ||
1836 | { | 2366 | { |
1837 | struct wmi_host_swba_event *ev; | 2367 | struct wmi_host_swba_event *ev = (void *)skb->data; |
2368 | u32 map; | ||
2369 | size_t i; | ||
2370 | |||
2371 | if (skb->len < sizeof(*ev)) | ||
2372 | return -EPROTO; | ||
2373 | |||
2374 | skb_pull(skb, sizeof(*ev)); | ||
2375 | arg->vdev_map = ev->vdev_map; | ||
2376 | |||
2377 | for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { | ||
2378 | if (!(map & BIT(0))) | ||
2379 | continue; | ||
2380 | |||
2381 | /* If this happens there were some changes in firmware and | ||
2382 | * ath10k should update the max size of tim_info array. | ||
2383 | */ | ||
2384 | if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) | ||
2385 | break; | ||
2386 | |||
2387 | arg->tim_info[i] = &ev->bcn_info[i].tim_info; | ||
2388 | arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info; | ||
2389 | i++; | ||
2390 | } | ||
2391 | |||
2392 | return 0; | ||
2393 | } | ||
2394 | |||
2395 | void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) | ||
2396 | { | ||
2397 | struct wmi_swba_ev_arg arg = {}; | ||
1838 | u32 map; | 2398 | u32 map; |
1839 | int i = -1; | 2399 | int i = -1; |
1840 | struct wmi_bcn_info *bcn_info; | 2400 | const struct wmi_tim_info *tim_info; |
2401 | const struct wmi_p2p_noa_info *noa_info; | ||
1841 | struct ath10k_vif *arvif; | 2402 | struct ath10k_vif *arvif; |
1842 | struct sk_buff *bcn; | 2403 | struct sk_buff *bcn; |
1843 | dma_addr_t paddr; | 2404 | dma_addr_t paddr; |
1844 | int ret, vdev_id = 0; | 2405 | int ret, vdev_id = 0; |
1845 | 2406 | ||
1846 | ev = (struct wmi_host_swba_event *)skb->data; | 2407 | ret = ath10k_wmi_pull_swba(ar, skb, &arg); |
1847 | map = __le32_to_cpu(ev->vdev_map); | 2408 | if (ret) { |
2409 | ath10k_warn(ar, "failed to parse swba event: %d\n", ret); | ||
2410 | return; | ||
2411 | } | ||
2412 | |||
2413 | map = __le32_to_cpu(arg.vdev_map); | ||
1848 | 2414 | ||
1849 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", | 2415 | ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", |
1850 | ev->vdev_map); | 2416 | map); |
1851 | 2417 | ||
1852 | for (; map; map >>= 1, vdev_id++) { | 2418 | for (; map; map >>= 1, vdev_id++) { |
1853 | if (!(map & 0x1)) | 2419 | if (!(map & 0x1)) |
@@ -1860,19 +2426,20 @@ static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) | |||
1860 | break; | 2426 | break; |
1861 | } | 2427 | } |
1862 | 2428 | ||
1863 | bcn_info = &ev->bcn_info[i]; | 2429 | tim_info = arg.tim_info[i]; |
2430 | noa_info = arg.noa_info[i]; | ||
1864 | 2431 | ||
1865 | ath10k_dbg(ar, ATH10K_DBG_MGMT, | 2432 | ath10k_dbg(ar, ATH10K_DBG_MGMT, |
1866 | "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", | 2433 | "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", |
1867 | i, | 2434 | i, |
1868 | __le32_to_cpu(bcn_info->tim_info.tim_len), | 2435 | __le32_to_cpu(tim_info->tim_len), |
1869 | __le32_to_cpu(bcn_info->tim_info.tim_mcast), | 2436 | __le32_to_cpu(tim_info->tim_mcast), |
1870 | __le32_to_cpu(bcn_info->tim_info.tim_changed), | 2437 | __le32_to_cpu(tim_info->tim_changed), |
1871 | __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending), | 2438 | __le32_to_cpu(tim_info->tim_num_ps_pending), |
1872 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]), | 2439 | __le32_to_cpu(tim_info->tim_bitmap[3]), |
1873 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]), | 2440 | __le32_to_cpu(tim_info->tim_bitmap[2]), |
1874 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]), | 2441 | __le32_to_cpu(tim_info->tim_bitmap[1]), |
1875 | __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0])); | 2442 | __le32_to_cpu(tim_info->tim_bitmap[0])); |
1876 | 2443 | ||
1877 | arvif = ath10k_get_arvif(ar, vdev_id); | 2444 | arvif = ath10k_get_arvif(ar, vdev_id); |
1878 | if (arvif == NULL) { | 2445 | if (arvif == NULL) { |
@@ -1899,15 +2466,25 @@ static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) | |||
1899 | } | 2466 | } |
1900 | 2467 | ||
1901 | ath10k_tx_h_seq_no(arvif->vif, bcn); | 2468 | ath10k_tx_h_seq_no(arvif->vif, bcn); |
1902 | ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info); | 2469 | ath10k_wmi_update_tim(ar, arvif, bcn, tim_info); |
1903 | ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info); | 2470 | ath10k_wmi_update_noa(ar, arvif, bcn, noa_info); |
1904 | 2471 | ||
1905 | spin_lock_bh(&ar->data_lock); | 2472 | spin_lock_bh(&ar->data_lock); |
1906 | 2473 | ||
1907 | if (arvif->beacon) { | 2474 | if (arvif->beacon) { |
1908 | if (!arvif->beacon_sent) | 2475 | switch (arvif->beacon_state) { |
1909 | ath10k_warn(ar, "SWBA overrun on vdev %d\n", | 2476 | case ATH10K_BEACON_SENT: |
2477 | break; | ||
2478 | case ATH10K_BEACON_SCHEDULED: | ||
2479 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n", | ||
2480 | arvif->vdev_id); | ||
2481 | break; | ||
2482 | case ATH10K_BEACON_SENDING: | ||
2483 | ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n", | ||
1910 | arvif->vdev_id); | 2484 | arvif->vdev_id); |
2485 | dev_kfree_skb(bcn); | ||
2486 | goto skip; | ||
2487 | } | ||
1911 | 2488 | ||
1912 | ath10k_mac_vif_beacon_free(arvif); | 2489 | ath10k_mac_vif_beacon_free(arvif); |
1913 | } | 2490 | } |
@@ -1935,19 +2512,19 @@ static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) | |||
1935 | } | 2512 | } |
1936 | 2513 | ||
1937 | arvif->beacon = bcn; | 2514 | arvif->beacon = bcn; |
1938 | arvif->beacon_sent = false; | 2515 | arvif->beacon_state = ATH10K_BEACON_SCHEDULED; |
1939 | 2516 | ||
1940 | trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); | 2517 | trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); |
1941 | trace_ath10k_tx_payload(ar, bcn->data, bcn->len); | 2518 | trace_ath10k_tx_payload(ar, bcn->data, bcn->len); |
1942 | 2519 | ||
1943 | ath10k_wmi_tx_beacon_nowait(arvif); | ||
1944 | skip: | 2520 | skip: |
1945 | spin_unlock_bh(&ar->data_lock); | 2521 | spin_unlock_bh(&ar->data_lock); |
1946 | } | 2522 | } |
2523 | |||
2524 | ath10k_wmi_tx_beacons_nowait(ar); | ||
1947 | } | 2525 | } |
1948 | 2526 | ||
1949 | static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, | 2527 | void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb) |
1950 | struct sk_buff *skb) | ||
1951 | { | 2528 | { |
1952 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); | 2529 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); |
1953 | } | 2530 | } |
@@ -2068,9 +2645,9 @@ static int ath10k_dfs_fft_report(struct ath10k *ar, | |||
2068 | return 0; | 2645 | return 0; |
2069 | } | 2646 | } |
2070 | 2647 | ||
2071 | static void ath10k_wmi_event_dfs(struct ath10k *ar, | 2648 | void ath10k_wmi_event_dfs(struct ath10k *ar, |
2072 | const struct wmi_phyerr *phyerr, | 2649 | const struct wmi_phyerr *phyerr, |
2073 | u64 tsf) | 2650 | u64 tsf) |
2074 | { | 2651 | { |
2075 | int buf_len, tlv_len, res, i = 0; | 2652 | int buf_len, tlv_len, res, i = 0; |
2076 | const struct phyerr_tlv *tlv; | 2653 | const struct phyerr_tlv *tlv; |
@@ -2133,10 +2710,9 @@ static void ath10k_wmi_event_dfs(struct ath10k *ar, | |||
2133 | } | 2710 | } |
2134 | } | 2711 | } |
2135 | 2712 | ||
2136 | static void | 2713 | void ath10k_wmi_event_spectral_scan(struct ath10k *ar, |
2137 | ath10k_wmi_event_spectral_scan(struct ath10k *ar, | 2714 | const struct wmi_phyerr *phyerr, |
2138 | const struct wmi_phyerr *phyerr, | 2715 | u64 tsf) |
2139 | u64 tsf) | ||
2140 | { | 2716 | { |
2141 | int buf_len, tlv_len, res, i = 0; | 2717 | int buf_len, tlv_len, res, i = 0; |
2142 | struct phyerr_tlv *tlv; | 2718 | struct phyerr_tlv *tlv; |
@@ -2188,37 +2764,53 @@ ath10k_wmi_event_spectral_scan(struct ath10k *ar, | |||
2188 | } | 2764 | } |
2189 | } | 2765 | } |
2190 | 2766 | ||
2191 | static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) | 2767 | static int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, struct sk_buff *skb, |
2768 | struct wmi_phyerr_ev_arg *arg) | ||
2192 | { | 2769 | { |
2193 | const struct wmi_phyerr_event *ev; | 2770 | struct wmi_phyerr_event *ev = (void *)skb->data; |
2771 | |||
2772 | if (skb->len < sizeof(*ev)) | ||
2773 | return -EPROTO; | ||
2774 | |||
2775 | arg->num_phyerrs = ev->num_phyerrs; | ||
2776 | arg->tsf_l32 = ev->tsf_l32; | ||
2777 | arg->tsf_u32 = ev->tsf_u32; | ||
2778 | arg->buf_len = __cpu_to_le32(skb->len - sizeof(*ev)); | ||
2779 | arg->phyerrs = ev->phyerrs; | ||
2780 | |||
2781 | return 0; | ||
2782 | } | ||
2783 | |||
2784 | void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) | ||
2785 | { | ||
2786 | struct wmi_phyerr_ev_arg arg = {}; | ||
2194 | const struct wmi_phyerr *phyerr; | 2787 | const struct wmi_phyerr *phyerr; |
2195 | u32 count, i, buf_len, phy_err_code; | 2788 | u32 count, i, buf_len, phy_err_code; |
2196 | u64 tsf; | 2789 | u64 tsf; |
2197 | int left_len = skb->len; | 2790 | int left_len, ret; |
2198 | 2791 | ||
2199 | ATH10K_DFS_STAT_INC(ar, phy_errors); | 2792 | ATH10K_DFS_STAT_INC(ar, phy_errors); |
2200 | 2793 | ||
2201 | /* Check if combined event available */ | 2794 | ret = ath10k_wmi_pull_phyerr(ar, skb, &arg); |
2202 | if (left_len < sizeof(*ev)) { | 2795 | if (ret) { |
2203 | ath10k_warn(ar, "wmi phyerr combined event wrong len\n"); | 2796 | ath10k_warn(ar, "failed to parse phyerr event: %d\n", ret); |
2204 | return; | 2797 | return; |
2205 | } | 2798 | } |
2206 | 2799 | ||
2207 | left_len -= sizeof(*ev); | 2800 | left_len = __le32_to_cpu(arg.buf_len); |
2208 | 2801 | ||
2209 | /* Check number of included events */ | 2802 | /* Check number of included events */ |
2210 | ev = (const struct wmi_phyerr_event *)skb->data; | 2803 | count = __le32_to_cpu(arg.num_phyerrs); |
2211 | count = __le32_to_cpu(ev->num_phyerrs); | ||
2212 | 2804 | ||
2213 | tsf = __le32_to_cpu(ev->tsf_u32); | 2805 | tsf = __le32_to_cpu(arg.tsf_u32); |
2214 | tsf <<= 32; | 2806 | tsf <<= 32; |
2215 | tsf |= __le32_to_cpu(ev->tsf_l32); | 2807 | tsf |= __le32_to_cpu(arg.tsf_l32); |
2216 | 2808 | ||
2217 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 2809 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
2218 | "wmi event phyerr count %d tsf64 0x%llX\n", | 2810 | "wmi event phyerr count %d tsf64 0x%llX\n", |
2219 | count, tsf); | 2811 | count, tsf); |
2220 | 2812 | ||
2221 | phyerr = ev->phyerrs; | 2813 | phyerr = arg.phyerrs; |
2222 | for (i = 0; i < count; i++) { | 2814 | for (i = 0; i < count; i++) { |
2223 | /* Check if we can read event header */ | 2815 | /* Check if we can read event header */ |
2224 | if (left_len < sizeof(*phyerr)) { | 2816 | if (left_len < sizeof(*phyerr)) { |
@@ -2258,19 +2850,17 @@ static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) | |||
2258 | } | 2850 | } |
2259 | } | 2851 | } |
2260 | 2852 | ||
2261 | static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) | 2853 | void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) |
2262 | { | 2854 | { |
2263 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n"); | 2855 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n"); |
2264 | } | 2856 | } |
2265 | 2857 | ||
2266 | static void ath10k_wmi_event_profile_match(struct ath10k *ar, | 2858 | void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb) |
2267 | struct sk_buff *skb) | ||
2268 | { | 2859 | { |
2269 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); | 2860 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); |
2270 | } | 2861 | } |
2271 | 2862 | ||
2272 | static void ath10k_wmi_event_debug_print(struct ath10k *ar, | 2863 | void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb) |
2273 | struct sk_buff *skb) | ||
2274 | { | 2864 | { |
2275 | char buf[101], c; | 2865 | char buf[101], c; |
2276 | int i; | 2866 | int i; |
@@ -2303,103 +2893,90 @@ static void ath10k_wmi_event_debug_print(struct ath10k *ar, | |||
2303 | ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); | 2893 | ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); |
2304 | } | 2894 | } |
2305 | 2895 | ||
2306 | static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) | 2896 | void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) |
2307 | { | 2897 | { |
2308 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); | 2898 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); |
2309 | } | 2899 | } |
2310 | 2900 | ||
2311 | static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, | 2901 | void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb) |
2312 | struct sk_buff *skb) | ||
2313 | { | 2902 | { |
2314 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); | 2903 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); |
2315 | } | 2904 | } |
2316 | 2905 | ||
2317 | static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, | 2906 | void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, |
2318 | struct sk_buff *skb) | 2907 | struct sk_buff *skb) |
2319 | { | 2908 | { |
2320 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); | 2909 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); |
2321 | } | 2910 | } |
2322 | 2911 | ||
2323 | static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, | 2912 | void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, |
2324 | struct sk_buff *skb) | 2913 | struct sk_buff *skb) |
2325 | { | 2914 | { |
2326 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); | 2915 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); |
2327 | } | 2916 | } |
2328 | 2917 | ||
2329 | static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, | 2918 | void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb) |
2330 | struct sk_buff *skb) | ||
2331 | { | 2919 | { |
2332 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); | 2920 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); |
2333 | } | 2921 | } |
2334 | 2922 | ||
2335 | static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, | 2923 | void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb) |
2336 | struct sk_buff *skb) | ||
2337 | { | 2924 | { |
2338 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n"); | 2925 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n"); |
2339 | } | 2926 | } |
2340 | 2927 | ||
2341 | static void ath10k_wmi_event_dcs_interference(struct ath10k *ar, | 2928 | void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb) |
2342 | struct sk_buff *skb) | ||
2343 | { | 2929 | { |
2344 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); | 2930 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); |
2345 | } | 2931 | } |
2346 | 2932 | ||
2347 | static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, | 2933 | void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb) |
2348 | struct sk_buff *skb) | ||
2349 | { | 2934 | { |
2350 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n"); | 2935 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n"); |
2351 | } | 2936 | } |
2352 | 2937 | ||
2353 | static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, | 2938 | void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb) |
2354 | struct sk_buff *skb) | ||
2355 | { | 2939 | { |
2356 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); | 2940 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); |
2357 | } | 2941 | } |
2358 | 2942 | ||
2359 | static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, | 2943 | void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb) |
2360 | struct sk_buff *skb) | ||
2361 | { | 2944 | { |
2362 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); | 2945 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); |
2363 | } | 2946 | } |
2364 | 2947 | ||
2365 | static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, | 2948 | void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb) |
2366 | struct sk_buff *skb) | ||
2367 | { | 2949 | { |
2368 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); | 2950 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); |
2369 | } | 2951 | } |
2370 | 2952 | ||
2371 | static void ath10k_wmi_event_delba_complete(struct ath10k *ar, | 2953 | void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb) |
2372 | struct sk_buff *skb) | ||
2373 | { | 2954 | { |
2374 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); | 2955 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); |
2375 | } | 2956 | } |
2376 | 2957 | ||
2377 | static void ath10k_wmi_event_addba_complete(struct ath10k *ar, | 2958 | void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb) |
2378 | struct sk_buff *skb) | ||
2379 | { | 2959 | { |
2380 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); | 2960 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); |
2381 | } | 2961 | } |
2382 | 2962 | ||
2383 | static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, | 2963 | void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, |
2384 | struct sk_buff *skb) | 2964 | struct sk_buff *skb) |
2385 | { | 2965 | { |
2386 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); | 2966 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); |
2387 | } | 2967 | } |
2388 | 2968 | ||
2389 | static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, | 2969 | void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb) |
2390 | struct sk_buff *skb) | ||
2391 | { | 2970 | { |
2392 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); | 2971 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); |
2393 | } | 2972 | } |
2394 | 2973 | ||
2395 | static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, | 2974 | void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb) |
2396 | struct sk_buff *skb) | ||
2397 | { | 2975 | { |
2398 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); | 2976 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); |
2399 | } | 2977 | } |
2400 | 2978 | ||
2401 | static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, | 2979 | void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb) |
2402 | struct sk_buff *skb) | ||
2403 | { | 2980 | { |
2404 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); | 2981 | ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); |
2405 | } | 2982 | } |
@@ -2435,8 +3012,9 @@ static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, | |||
2435 | return 0; | 3012 | return 0; |
2436 | } | 3013 | } |
2437 | 3014 | ||
2438 | static int ath10k_wmi_main_pull_svc_rdy_ev(struct sk_buff *skb, | 3015 | static int |
2439 | struct wmi_svc_rdy_ev_arg *arg) | 3016 | ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, |
3017 | struct wmi_svc_rdy_ev_arg *arg) | ||
2440 | { | 3018 | { |
2441 | struct wmi_service_ready_event *ev; | 3019 | struct wmi_service_ready_event *ev; |
2442 | size_t i, n; | 3020 | size_t i, n; |
@@ -2471,8 +3049,9 @@ static int ath10k_wmi_main_pull_svc_rdy_ev(struct sk_buff *skb, | |||
2471 | return 0; | 3049 | return 0; |
2472 | } | 3050 | } |
2473 | 3051 | ||
2474 | static int ath10k_wmi_10x_pull_svc_rdy_ev(struct sk_buff *skb, | 3052 | static int |
2475 | struct wmi_svc_rdy_ev_arg *arg) | 3053 | ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, |
3054 | struct wmi_svc_rdy_ev_arg *arg) | ||
2476 | { | 3055 | { |
2477 | struct wmi_10x_service_ready_event *ev; | 3056 | struct wmi_10x_service_ready_event *ev; |
2478 | int i, n; | 3057 | int i, n; |
@@ -2506,30 +3085,22 @@ static int ath10k_wmi_10x_pull_svc_rdy_ev(struct sk_buff *skb, | |||
2506 | return 0; | 3085 | return 0; |
2507 | } | 3086 | } |
2508 | 3087 | ||
2509 | static void ath10k_wmi_event_service_ready(struct ath10k *ar, | 3088 | void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb) |
2510 | struct sk_buff *skb) | ||
2511 | { | 3089 | { |
2512 | struct wmi_svc_rdy_ev_arg arg = {}; | 3090 | struct wmi_svc_rdy_ev_arg arg = {}; |
2513 | u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; | 3091 | u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; |
2514 | int ret; | 3092 | int ret; |
2515 | 3093 | ||
2516 | memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); | 3094 | ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg); |
2517 | |||
2518 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | ||
2519 | ret = ath10k_wmi_10x_pull_svc_rdy_ev(skb, &arg); | ||
2520 | wmi_10x_svc_map(arg.service_map, ar->wmi.svc_map, | ||
2521 | arg.service_map_len); | ||
2522 | } else { | ||
2523 | ret = ath10k_wmi_main_pull_svc_rdy_ev(skb, &arg); | ||
2524 | wmi_main_svc_map(arg.service_map, ar->wmi.svc_map, | ||
2525 | arg.service_map_len); | ||
2526 | } | ||
2527 | |||
2528 | if (ret) { | 3095 | if (ret) { |
2529 | ath10k_warn(ar, "failed to parse service ready: %d\n", ret); | 3096 | ath10k_warn(ar, "failed to parse service ready: %d\n", ret); |
2530 | return; | 3097 | return; |
2531 | } | 3098 | } |
2532 | 3099 | ||
3100 | memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); | ||
3101 | ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map, | ||
3102 | arg.service_map_len); | ||
3103 | |||
2533 | ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); | 3104 | ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); |
2534 | ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); | 3105 | ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); |
2535 | ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); | 3106 | ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); |
@@ -2607,13 +3178,14 @@ static void ath10k_wmi_event_service_ready(struct ath10k *ar, | |||
2607 | } | 3178 | } |
2608 | 3179 | ||
2609 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 3180 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
2610 | "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", | 3181 | "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", |
2611 | __le32_to_cpu(arg.min_tx_power), | 3182 | __le32_to_cpu(arg.min_tx_power), |
2612 | __le32_to_cpu(arg.max_tx_power), | 3183 | __le32_to_cpu(arg.max_tx_power), |
2613 | __le32_to_cpu(arg.ht_cap), | 3184 | __le32_to_cpu(arg.ht_cap), |
2614 | __le32_to_cpu(arg.vht_cap), | 3185 | __le32_to_cpu(arg.vht_cap), |
2615 | __le32_to_cpu(arg.sw_ver0), | 3186 | __le32_to_cpu(arg.sw_ver0), |
2616 | __le32_to_cpu(arg.sw_ver1), | 3187 | __le32_to_cpu(arg.sw_ver1), |
3188 | __le32_to_cpu(arg.fw_build), | ||
2617 | __le32_to_cpu(arg.phy_capab), | 3189 | __le32_to_cpu(arg.phy_capab), |
2618 | __le32_to_cpu(arg.num_rf_chains), | 3190 | __le32_to_cpu(arg.num_rf_chains), |
2619 | __le32_to_cpu(arg.eeprom_rd), | 3191 | __le32_to_cpu(arg.eeprom_rd), |
@@ -2622,27 +3194,59 @@ static void ath10k_wmi_event_service_ready(struct ath10k *ar, | |||
2622 | complete(&ar->wmi.service_ready); | 3194 | complete(&ar->wmi.service_ready); |
2623 | } | 3195 | } |
2624 | 3196 | ||
2625 | static int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) | 3197 | static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb, |
3198 | struct wmi_rdy_ev_arg *arg) | ||
2626 | { | 3199 | { |
2627 | struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data; | 3200 | struct wmi_ready_event *ev = (void *)skb->data; |
2628 | 3201 | ||
2629 | if (WARN_ON(skb->len < sizeof(*ev))) | 3202 | if (skb->len < sizeof(*ev)) |
2630 | return -EINVAL; | 3203 | return -EPROTO; |
2631 | 3204 | ||
2632 | ether_addr_copy(ar->mac_addr, ev->mac_addr.addr); | 3205 | skb_pull(skb, sizeof(*ev)); |
3206 | arg->sw_version = ev->sw_version; | ||
3207 | arg->abi_version = ev->abi_version; | ||
3208 | arg->status = ev->status; | ||
3209 | arg->mac_addr = ev->mac_addr.addr; | ||
3210 | |||
3211 | return 0; | ||
3212 | } | ||
3213 | |||
3214 | int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) | ||
3215 | { | ||
3216 | struct wmi_rdy_ev_arg arg = {}; | ||
3217 | int ret; | ||
3218 | |||
3219 | ret = ath10k_wmi_pull_rdy(ar, skb, &arg); | ||
3220 | if (ret) { | ||
3221 | ath10k_warn(ar, "failed to parse ready event: %d\n", ret); | ||
3222 | return ret; | ||
3223 | } | ||
2633 | 3224 | ||
2634 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 3225 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
2635 | "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n", | 3226 | "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", |
2636 | __le32_to_cpu(ev->sw_version), | 3227 | __le32_to_cpu(arg.sw_version), |
2637 | __le32_to_cpu(ev->abi_version), | 3228 | __le32_to_cpu(arg.abi_version), |
2638 | ev->mac_addr.addr, | 3229 | arg.mac_addr, |
2639 | __le32_to_cpu(ev->status), skb->len, sizeof(*ev)); | 3230 | __le32_to_cpu(arg.status)); |
2640 | 3231 | ||
3232 | ether_addr_copy(ar->mac_addr, arg.mac_addr); | ||
2641 | complete(&ar->wmi.unified_ready); | 3233 | complete(&ar->wmi.unified_ready); |
2642 | return 0; | 3234 | return 0; |
2643 | } | 3235 | } |
2644 | 3236 | ||
2645 | static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb) | 3237 | static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb) |
3238 | { | ||
3239 | const struct wmi_pdev_temperature_event *ev; | ||
3240 | |||
3241 | ev = (struct wmi_pdev_temperature_event *)skb->data; | ||
3242 | if (WARN_ON(skb->len < sizeof(*ev))) | ||
3243 | return -EPROTO; | ||
3244 | |||
3245 | ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature)); | ||
3246 | return 0; | ||
3247 | } | ||
3248 | |||
3249 | static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb) | ||
2646 | { | 3250 | { |
2647 | struct wmi_cmd_hdr *cmd_hdr; | 3251 | struct wmi_cmd_hdr *cmd_hdr; |
2648 | enum wmi_event_id id; | 3252 | enum wmi_event_id id; |
@@ -2758,7 +3362,7 @@ static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb) | |||
2758 | dev_kfree_skb(skb); | 3362 | dev_kfree_skb(skb); |
2759 | } | 3363 | } |
2760 | 3364 | ||
2761 | static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb) | 3365 | static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb) |
2762 | { | 3366 | { |
2763 | struct wmi_cmd_hdr *cmd_hdr; | 3367 | struct wmi_cmd_hdr *cmd_hdr; |
2764 | enum wmi_10x_event_id id; | 3368 | enum wmi_10x_event_id id; |
@@ -2882,7 +3486,7 @@ out: | |||
2882 | dev_kfree_skb(skb); | 3486 | dev_kfree_skb(skb); |
2883 | } | 3487 | } |
2884 | 3488 | ||
2885 | static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb) | 3489 | static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb) |
2886 | { | 3490 | { |
2887 | struct wmi_cmd_hdr *cmd_hdr; | 3491 | struct wmi_cmd_hdr *cmd_hdr; |
2888 | enum wmi_10_2_event_id id; | 3492 | enum wmi_10_2_event_id id; |
@@ -2981,6 +3585,9 @@ static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb) | |||
2981 | case WMI_10_2_READY_EVENTID: | 3585 | case WMI_10_2_READY_EVENTID: |
2982 | ath10k_wmi_event_ready(ar, skb); | 3586 | ath10k_wmi_event_ready(ar, skb); |
2983 | break; | 3587 | break; |
3588 | case WMI_10_2_PDEV_TEMPERATURE_EVENTID: | ||
3589 | ath10k_wmi_event_temperature(ar, skb); | ||
3590 | break; | ||
2984 | case WMI_10_2_RTT_KEEPALIVE_EVENTID: | 3591 | case WMI_10_2_RTT_KEEPALIVE_EVENTID: |
2985 | case WMI_10_2_GPIO_INPUT_EVENTID: | 3592 | case WMI_10_2_GPIO_INPUT_EVENTID: |
2986 | case WMI_10_2_PEER_RATECODE_LIST_EVENTID: | 3593 | case WMI_10_2_PEER_RATECODE_LIST_EVENTID: |
@@ -3001,14 +3608,11 @@ static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb) | |||
3001 | 3608 | ||
3002 | static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) | 3609 | static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) |
3003 | { | 3610 | { |
3004 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | 3611 | int ret; |
3005 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) | 3612 | |
3006 | ath10k_wmi_10_2_process_rx(ar, skb); | 3613 | ret = ath10k_wmi_rx(ar, skb); |
3007 | else | 3614 | if (ret) |
3008 | ath10k_wmi_10x_process_rx(ar, skb); | 3615 | ath10k_warn(ar, "failed to process wmi rx: %d\n", ret); |
3009 | } else { | ||
3010 | ath10k_wmi_main_process_rx(ar, skb); | ||
3011 | } | ||
3012 | } | 3616 | } |
3013 | 3617 | ||
3014 | int ath10k_wmi_connect(struct ath10k *ar) | 3618 | int ath10k_wmi_connect(struct ath10k *ar) |
@@ -3039,16 +3643,17 @@ int ath10k_wmi_connect(struct ath10k *ar) | |||
3039 | return 0; | 3643 | return 0; |
3040 | } | 3644 | } |
3041 | 3645 | ||
3042 | static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd, | 3646 | static struct sk_buff * |
3043 | u16 rd2g, u16 rd5g, u16 ctl2g, | 3647 | ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, |
3044 | u16 ctl5g) | 3648 | u16 ctl2g, u16 ctl5g, |
3649 | enum wmi_dfs_region dfs_reg) | ||
3045 | { | 3650 | { |
3046 | struct wmi_pdev_set_regdomain_cmd *cmd; | 3651 | struct wmi_pdev_set_regdomain_cmd *cmd; |
3047 | struct sk_buff *skb; | 3652 | struct sk_buff *skb; |
3048 | 3653 | ||
3049 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 3654 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3050 | if (!skb) | 3655 | if (!skb) |
3051 | return -ENOMEM; | 3656 | return ERR_PTR(-ENOMEM); |
3052 | 3657 | ||
3053 | cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; | 3658 | cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; |
3054 | cmd->reg_domain = __cpu_to_le32(rd); | 3659 | cmd->reg_domain = __cpu_to_le32(rd); |
@@ -3060,22 +3665,20 @@ static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd, | |||
3060 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 3665 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3061 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", | 3666 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", |
3062 | rd, rd2g, rd5g, ctl2g, ctl5g); | 3667 | rd, rd2g, rd5g, ctl2g, ctl5g); |
3063 | 3668 | return skb; | |
3064 | return ath10k_wmi_cmd_send(ar, skb, | ||
3065 | ar->wmi.cmd->pdev_set_regdomain_cmdid); | ||
3066 | } | 3669 | } |
3067 | 3670 | ||
3068 | static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd, | 3671 | static struct sk_buff * |
3069 | u16 rd2g, u16 rd5g, | 3672 | ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 |
3070 | u16 ctl2g, u16 ctl5g, | 3673 | rd5g, u16 ctl2g, u16 ctl5g, |
3071 | enum wmi_dfs_region dfs_reg) | 3674 | enum wmi_dfs_region dfs_reg) |
3072 | { | 3675 | { |
3073 | struct wmi_pdev_set_regdomain_cmd_10x *cmd; | 3676 | struct wmi_pdev_set_regdomain_cmd_10x *cmd; |
3074 | struct sk_buff *skb; | 3677 | struct sk_buff *skb; |
3075 | 3678 | ||
3076 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 3679 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3077 | if (!skb) | 3680 | if (!skb) |
3078 | return -ENOMEM; | 3681 | return ERR_PTR(-ENOMEM); |
3079 | 3682 | ||
3080 | cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; | 3683 | cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; |
3081 | cmd->reg_domain = __cpu_to_le32(rd); | 3684 | cmd->reg_domain = __cpu_to_le32(rd); |
@@ -3088,50 +3691,39 @@ static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd, | |||
3088 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 3691 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3089 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", | 3692 | "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", |
3090 | rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); | 3693 | rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); |
3091 | 3694 | return skb; | |
3092 | return ath10k_wmi_cmd_send(ar, skb, | ||
3093 | ar->wmi.cmd->pdev_set_regdomain_cmdid); | ||
3094 | } | ||
3095 | |||
3096 | int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g, | ||
3097 | u16 rd5g, u16 ctl2g, u16 ctl5g, | ||
3098 | enum wmi_dfs_region dfs_reg) | ||
3099 | { | ||
3100 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) | ||
3101 | return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g, | ||
3102 | ctl2g, ctl5g, dfs_reg); | ||
3103 | else | ||
3104 | return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g, | ||
3105 | ctl2g, ctl5g); | ||
3106 | } | 3695 | } |
3107 | 3696 | ||
3108 | int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt) | 3697 | static struct sk_buff * |
3698 | ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt) | ||
3109 | { | 3699 | { |
3110 | struct wmi_pdev_suspend_cmd *cmd; | 3700 | struct wmi_pdev_suspend_cmd *cmd; |
3111 | struct sk_buff *skb; | 3701 | struct sk_buff *skb; |
3112 | 3702 | ||
3113 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 3703 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3114 | if (!skb) | 3704 | if (!skb) |
3115 | return -ENOMEM; | 3705 | return ERR_PTR(-ENOMEM); |
3116 | 3706 | ||
3117 | cmd = (struct wmi_pdev_suspend_cmd *)skb->data; | 3707 | cmd = (struct wmi_pdev_suspend_cmd *)skb->data; |
3118 | cmd->suspend_opt = __cpu_to_le32(suspend_opt); | 3708 | cmd->suspend_opt = __cpu_to_le32(suspend_opt); |
3119 | 3709 | ||
3120 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid); | 3710 | return skb; |
3121 | } | 3711 | } |
3122 | 3712 | ||
3123 | int ath10k_wmi_pdev_resume_target(struct ath10k *ar) | 3713 | static struct sk_buff * |
3714 | ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar) | ||
3124 | { | 3715 | { |
3125 | struct sk_buff *skb; | 3716 | struct sk_buff *skb; |
3126 | 3717 | ||
3127 | skb = ath10k_wmi_alloc_skb(ar, 0); | 3718 | skb = ath10k_wmi_alloc_skb(ar, 0); |
3128 | if (skb == NULL) | 3719 | if (!skb) |
3129 | return -ENOMEM; | 3720 | return ERR_PTR(-ENOMEM); |
3130 | 3721 | ||
3131 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid); | 3722 | return skb; |
3132 | } | 3723 | } |
3133 | 3724 | ||
3134 | int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | 3725 | static struct sk_buff * |
3726 | ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | ||
3135 | { | 3727 | { |
3136 | struct wmi_pdev_set_param_cmd *cmd; | 3728 | struct wmi_pdev_set_param_cmd *cmd; |
3137 | struct sk_buff *skb; | 3729 | struct sk_buff *skb; |
@@ -3139,12 +3731,12 @@ int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | |||
3139 | if (id == WMI_PDEV_PARAM_UNSUPPORTED) { | 3731 | if (id == WMI_PDEV_PARAM_UNSUPPORTED) { |
3140 | ath10k_warn(ar, "pdev param %d not supported by firmware\n", | 3732 | ath10k_warn(ar, "pdev param %d not supported by firmware\n", |
3141 | id); | 3733 | id); |
3142 | return -EOPNOTSUPP; | 3734 | return ERR_PTR(-EOPNOTSUPP); |
3143 | } | 3735 | } |
3144 | 3736 | ||
3145 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 3737 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3146 | if (!skb) | 3738 | if (!skb) |
3147 | return -ENOMEM; | 3739 | return ERR_PTR(-ENOMEM); |
3148 | 3740 | ||
3149 | cmd = (struct wmi_pdev_set_param_cmd *)skb->data; | 3741 | cmd = (struct wmi_pdev_set_param_cmd *)skb->data; |
3150 | cmd->param_id = __cpu_to_le32(id); | 3742 | cmd->param_id = __cpu_to_le32(id); |
@@ -3152,11 +3744,11 @@ int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value) | |||
3152 | 3744 | ||
3153 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", | 3745 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", |
3154 | id, value); | 3746 | id, value); |
3155 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid); | 3747 | return skb; |
3156 | } | 3748 | } |
3157 | 3749 | ||
3158 | static void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, | 3750 | void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, |
3159 | struct wmi_host_mem_chunks *chunks) | 3751 | struct wmi_host_mem_chunks *chunks) |
3160 | { | 3752 | { |
3161 | struct host_memory_chunk *chunk; | 3753 | struct host_memory_chunk *chunk; |
3162 | int i; | 3754 | int i; |
@@ -3177,7 +3769,7 @@ static void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, | |||
3177 | } | 3769 | } |
3178 | } | 3770 | } |
3179 | 3771 | ||
3180 | static int ath10k_wmi_main_cmd_init(struct ath10k *ar) | 3772 | static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar) |
3181 | { | 3773 | { |
3182 | struct wmi_init_cmd *cmd; | 3774 | struct wmi_init_cmd *cmd; |
3183 | struct sk_buff *buf; | 3775 | struct sk_buff *buf; |
@@ -3240,7 +3832,7 @@ static int ath10k_wmi_main_cmd_init(struct ath10k *ar) | |||
3240 | 3832 | ||
3241 | buf = ath10k_wmi_alloc_skb(ar, len); | 3833 | buf = ath10k_wmi_alloc_skb(ar, len); |
3242 | if (!buf) | 3834 | if (!buf) |
3243 | return -ENOMEM; | 3835 | return ERR_PTR(-ENOMEM); |
3244 | 3836 | ||
3245 | cmd = (struct wmi_init_cmd *)buf->data; | 3837 | cmd = (struct wmi_init_cmd *)buf->data; |
3246 | 3838 | ||
@@ -3248,10 +3840,10 @@ static int ath10k_wmi_main_cmd_init(struct ath10k *ar) | |||
3248 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); | 3840 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
3249 | 3841 | ||
3250 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); | 3842 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); |
3251 | return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid); | 3843 | return buf; |
3252 | } | 3844 | } |
3253 | 3845 | ||
3254 | static int ath10k_wmi_10x_cmd_init(struct ath10k *ar) | 3846 | static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar) |
3255 | { | 3847 | { |
3256 | struct wmi_init_cmd_10x *cmd; | 3848 | struct wmi_init_cmd_10x *cmd; |
3257 | struct sk_buff *buf; | 3849 | struct sk_buff *buf; |
@@ -3306,7 +3898,7 @@ static int ath10k_wmi_10x_cmd_init(struct ath10k *ar) | |||
3306 | 3898 | ||
3307 | buf = ath10k_wmi_alloc_skb(ar, len); | 3899 | buf = ath10k_wmi_alloc_skb(ar, len); |
3308 | if (!buf) | 3900 | if (!buf) |
3309 | return -ENOMEM; | 3901 | return ERR_PTR(-ENOMEM); |
3310 | 3902 | ||
3311 | cmd = (struct wmi_init_cmd_10x *)buf->data; | 3903 | cmd = (struct wmi_init_cmd_10x *)buf->data; |
3312 | 3904 | ||
@@ -3314,15 +3906,15 @@ static int ath10k_wmi_10x_cmd_init(struct ath10k *ar) | |||
3314 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); | 3906 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
3315 | 3907 | ||
3316 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); | 3908 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); |
3317 | return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid); | 3909 | return buf; |
3318 | } | 3910 | } |
3319 | 3911 | ||
3320 | static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar) | 3912 | static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar) |
3321 | { | 3913 | { |
3322 | struct wmi_init_cmd_10_2 *cmd; | 3914 | struct wmi_init_cmd_10_2 *cmd; |
3323 | struct sk_buff *buf; | 3915 | struct sk_buff *buf; |
3324 | struct wmi_resource_config_10x config = {}; | 3916 | struct wmi_resource_config_10x config = {}; |
3325 | u32 len, val; | 3917 | u32 len, val, features; |
3326 | 3918 | ||
3327 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); | 3919 | config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); |
3328 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); | 3920 | config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); |
@@ -3356,7 +3948,7 @@ static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar) | |||
3356 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); | 3948 | config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); |
3357 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); | 3949 | config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); |
3358 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); | 3950 | config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); |
3359 | config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); | 3951 | config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE); |
3360 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); | 3952 | config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); |
3361 | 3953 | ||
3362 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; | 3954 | val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; |
@@ -3372,34 +3964,21 @@ static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar) | |||
3372 | 3964 | ||
3373 | buf = ath10k_wmi_alloc_skb(ar, len); | 3965 | buf = ath10k_wmi_alloc_skb(ar, len); |
3374 | if (!buf) | 3966 | if (!buf) |
3375 | return -ENOMEM; | 3967 | return ERR_PTR(-ENOMEM); |
3376 | 3968 | ||
3377 | cmd = (struct wmi_init_cmd_10_2 *)buf->data; | 3969 | cmd = (struct wmi_init_cmd_10_2 *)buf->data; |
3378 | 3970 | ||
3971 | features = WMI_10_2_RX_BATCH_MODE; | ||
3972 | cmd->resource_config.feature_mask = __cpu_to_le32(features); | ||
3973 | |||
3379 | memcpy(&cmd->resource_config.common, &config, sizeof(config)); | 3974 | memcpy(&cmd->resource_config.common, &config, sizeof(config)); |
3380 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); | 3975 | ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); |
3381 | 3976 | ||
3382 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); | 3977 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); |
3383 | return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid); | 3978 | return buf; |
3384 | } | 3979 | } |
3385 | 3980 | ||
3386 | int ath10k_wmi_cmd_init(struct ath10k *ar) | 3981 | int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) |
3387 | { | ||
3388 | int ret; | ||
3389 | |||
3390 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | ||
3391 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) | ||
3392 | ret = ath10k_wmi_10_2_cmd_init(ar); | ||
3393 | else | ||
3394 | ret = ath10k_wmi_10x_cmd_init(ar); | ||
3395 | } else { | ||
3396 | ret = ath10k_wmi_main_cmd_init(ar); | ||
3397 | } | ||
3398 | |||
3399 | return ret; | ||
3400 | } | ||
3401 | |||
3402 | static int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) | ||
3403 | { | 3982 | { |
3404 | if (arg->ie_len && !arg->ie) | 3983 | if (arg->ie_len && !arg->ie) |
3405 | return -EINVAL; | 3984 | return -EINVAL; |
@@ -3450,9 +4029,8 @@ ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg) | |||
3450 | return len; | 4029 | return len; |
3451 | } | 4030 | } |
3452 | 4031 | ||
3453 | static void | 4032 | void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, |
3454 | ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, | 4033 | const struct wmi_start_scan_arg *arg) |
3455 | const struct wmi_start_scan_arg *arg) | ||
3456 | { | 4034 | { |
3457 | u32 scan_id; | 4035 | u32 scan_id; |
3458 | u32 scan_req_id; | 4036 | u32 scan_req_id; |
@@ -3546,46 +4124,60 @@ ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs, | |||
3546 | } | 4124 | } |
3547 | } | 4125 | } |
3548 | 4126 | ||
3549 | int ath10k_wmi_start_scan(struct ath10k *ar, | 4127 | static struct sk_buff * |
3550 | const struct wmi_start_scan_arg *arg) | 4128 | ath10k_wmi_op_gen_start_scan(struct ath10k *ar, |
4129 | const struct wmi_start_scan_arg *arg) | ||
3551 | { | 4130 | { |
4131 | struct wmi_start_scan_cmd *cmd; | ||
3552 | struct sk_buff *skb; | 4132 | struct sk_buff *skb; |
3553 | size_t len; | 4133 | size_t len; |
3554 | int ret; | 4134 | int ret; |
3555 | 4135 | ||
3556 | ret = ath10k_wmi_start_scan_verify(arg); | 4136 | ret = ath10k_wmi_start_scan_verify(arg); |
3557 | if (ret) | 4137 | if (ret) |
3558 | return ret; | 4138 | return ERR_PTR(ret); |
3559 | |||
3560 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) | ||
3561 | len = sizeof(struct wmi_10x_start_scan_cmd) + | ||
3562 | ath10k_wmi_start_scan_tlvs_len(arg); | ||
3563 | else | ||
3564 | len = sizeof(struct wmi_start_scan_cmd) + | ||
3565 | ath10k_wmi_start_scan_tlvs_len(arg); | ||
3566 | 4139 | ||
4140 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); | ||
3567 | skb = ath10k_wmi_alloc_skb(ar, len); | 4141 | skb = ath10k_wmi_alloc_skb(ar, len); |
3568 | if (!skb) | 4142 | if (!skb) |
3569 | return -ENOMEM; | 4143 | return ERR_PTR(-ENOMEM); |
3570 | |||
3571 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | ||
3572 | struct wmi_10x_start_scan_cmd *cmd; | ||
3573 | 4144 | ||
3574 | cmd = (struct wmi_10x_start_scan_cmd *)skb->data; | 4145 | cmd = (struct wmi_start_scan_cmd *)skb->data; |
3575 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); | ||
3576 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | ||
3577 | } else { | ||
3578 | struct wmi_start_scan_cmd *cmd; | ||
3579 | 4146 | ||
3580 | cmd = (struct wmi_start_scan_cmd *)skb->data; | 4147 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); |
3581 | cmd->burst_duration_ms = __cpu_to_le32(0); | 4148 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); |
3582 | 4149 | ||
3583 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); | 4150 | cmd->burst_duration_ms = __cpu_to_le32(0); |
3584 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | ||
3585 | } | ||
3586 | 4151 | ||
3587 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); | 4152 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); |
3588 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid); | 4153 | return skb; |
4154 | } | ||
4155 | |||
4156 | static struct sk_buff * | ||
4157 | ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar, | ||
4158 | const struct wmi_start_scan_arg *arg) | ||
4159 | { | ||
4160 | struct wmi_10x_start_scan_cmd *cmd; | ||
4161 | struct sk_buff *skb; | ||
4162 | size_t len; | ||
4163 | int ret; | ||
4164 | |||
4165 | ret = ath10k_wmi_start_scan_verify(arg); | ||
4166 | if (ret) | ||
4167 | return ERR_PTR(ret); | ||
4168 | |||
4169 | len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); | ||
4170 | skb = ath10k_wmi_alloc_skb(ar, len); | ||
4171 | if (!skb) | ||
4172 | return ERR_PTR(-ENOMEM); | ||
4173 | |||
4174 | cmd = (struct wmi_10x_start_scan_cmd *)skb->data; | ||
4175 | |||
4176 | ath10k_wmi_put_start_scan_common(&cmd->common, arg); | ||
4177 | ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); | ||
4178 | |||
4179 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n"); | ||
4180 | return skb; | ||
3589 | } | 4181 | } |
3590 | 4182 | ||
3591 | void ath10k_wmi_start_scan_init(struct ath10k *ar, | 4183 | void ath10k_wmi_start_scan_init(struct ath10k *ar, |
@@ -3614,7 +4206,9 @@ void ath10k_wmi_start_scan_init(struct ath10k *ar, | |||
3614 | arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; | 4206 | arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; |
3615 | } | 4207 | } |
3616 | 4208 | ||
3617 | int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg) | 4209 | static struct sk_buff * |
4210 | ath10k_wmi_op_gen_stop_scan(struct ath10k *ar, | ||
4211 | const struct wmi_stop_scan_arg *arg) | ||
3618 | { | 4212 | { |
3619 | struct wmi_stop_scan_cmd *cmd; | 4213 | struct wmi_stop_scan_cmd *cmd; |
3620 | struct sk_buff *skb; | 4214 | struct sk_buff *skb; |
@@ -3622,13 +4216,13 @@ int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg) | |||
3622 | u32 req_id; | 4216 | u32 req_id; |
3623 | 4217 | ||
3624 | if (arg->req_id > 0xFFF) | 4218 | if (arg->req_id > 0xFFF) |
3625 | return -EINVAL; | 4219 | return ERR_PTR(-EINVAL); |
3626 | if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) | 4220 | if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) |
3627 | return -EINVAL; | 4221 | return ERR_PTR(-EINVAL); |
3628 | 4222 | ||
3629 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4223 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3630 | if (!skb) | 4224 | if (!skb) |
3631 | return -ENOMEM; | 4225 | return ERR_PTR(-ENOMEM); |
3632 | 4226 | ||
3633 | scan_id = arg->u.scan_id; | 4227 | scan_id = arg->u.scan_id; |
3634 | scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; | 4228 | scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; |
@@ -3645,20 +4239,21 @@ int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg) | |||
3645 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4239 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3646 | "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", | 4240 | "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", |
3647 | arg->req_id, arg->req_type, arg->u.scan_id); | 4241 | arg->req_id, arg->req_type, arg->u.scan_id); |
3648 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid); | 4242 | return skb; |
3649 | } | 4243 | } |
3650 | 4244 | ||
3651 | int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id, | 4245 | static struct sk_buff * |
3652 | enum wmi_vdev_type type, | 4246 | ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id, |
3653 | enum wmi_vdev_subtype subtype, | 4247 | enum wmi_vdev_type type, |
3654 | const u8 macaddr[ETH_ALEN]) | 4248 | enum wmi_vdev_subtype subtype, |
4249 | const u8 macaddr[ETH_ALEN]) | ||
3655 | { | 4250 | { |
3656 | struct wmi_vdev_create_cmd *cmd; | 4251 | struct wmi_vdev_create_cmd *cmd; |
3657 | struct sk_buff *skb; | 4252 | struct sk_buff *skb; |
3658 | 4253 | ||
3659 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4254 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3660 | if (!skb) | 4255 | if (!skb) |
3661 | return -ENOMEM; | 4256 | return ERR_PTR(-ENOMEM); |
3662 | 4257 | ||
3663 | cmd = (struct wmi_vdev_create_cmd *)skb->data; | 4258 | cmd = (struct wmi_vdev_create_cmd *)skb->data; |
3664 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4259 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -3669,58 +4264,52 @@ int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id, | |||
3669 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4264 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3670 | "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", | 4265 | "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", |
3671 | vdev_id, type, subtype, macaddr); | 4266 | vdev_id, type, subtype, macaddr); |
3672 | 4267 | return skb; | |
3673 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid); | ||
3674 | } | 4268 | } |
3675 | 4269 | ||
3676 | int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id) | 4270 | static struct sk_buff * |
4271 | ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id) | ||
3677 | { | 4272 | { |
3678 | struct wmi_vdev_delete_cmd *cmd; | 4273 | struct wmi_vdev_delete_cmd *cmd; |
3679 | struct sk_buff *skb; | 4274 | struct sk_buff *skb; |
3680 | 4275 | ||
3681 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4276 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3682 | if (!skb) | 4277 | if (!skb) |
3683 | return -ENOMEM; | 4278 | return ERR_PTR(-ENOMEM); |
3684 | 4279 | ||
3685 | cmd = (struct wmi_vdev_delete_cmd *)skb->data; | 4280 | cmd = (struct wmi_vdev_delete_cmd *)skb->data; |
3686 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4281 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
3687 | 4282 | ||
3688 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4283 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3689 | "WMI vdev delete id %d\n", vdev_id); | 4284 | "WMI vdev delete id %d\n", vdev_id); |
3690 | 4285 | return skb; | |
3691 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid); | ||
3692 | } | 4286 | } |
3693 | 4287 | ||
3694 | static int | 4288 | static struct sk_buff * |
3695 | ath10k_wmi_vdev_start_restart(struct ath10k *ar, | 4289 | ath10k_wmi_op_gen_vdev_start(struct ath10k *ar, |
3696 | const struct wmi_vdev_start_request_arg *arg, | 4290 | const struct wmi_vdev_start_request_arg *arg, |
3697 | u32 cmd_id) | 4291 | bool restart) |
3698 | { | 4292 | { |
3699 | struct wmi_vdev_start_request_cmd *cmd; | 4293 | struct wmi_vdev_start_request_cmd *cmd; |
3700 | struct sk_buff *skb; | 4294 | struct sk_buff *skb; |
3701 | const char *cmdname; | 4295 | const char *cmdname; |
3702 | u32 flags = 0; | 4296 | u32 flags = 0; |
3703 | 4297 | ||
3704 | if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid && | ||
3705 | cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid) | ||
3706 | return -EINVAL; | ||
3707 | if (WARN_ON(arg->ssid && arg->ssid_len == 0)) | 4298 | if (WARN_ON(arg->ssid && arg->ssid_len == 0)) |
3708 | return -EINVAL; | 4299 | return ERR_PTR(-EINVAL); |
3709 | if (WARN_ON(arg->hidden_ssid && !arg->ssid)) | 4300 | if (WARN_ON(arg->hidden_ssid && !arg->ssid)) |
3710 | return -EINVAL; | 4301 | return ERR_PTR(-EINVAL); |
3711 | if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) | 4302 | if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) |
3712 | return -EINVAL; | 4303 | return ERR_PTR(-EINVAL); |
3713 | 4304 | ||
3714 | if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid) | 4305 | if (restart) |
3715 | cmdname = "start"; | ||
3716 | else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid) | ||
3717 | cmdname = "restart"; | 4306 | cmdname = "restart"; |
3718 | else | 4307 | else |
3719 | return -EINVAL; /* should not happen, we already check cmd_id */ | 4308 | cmdname = "start"; |
3720 | 4309 | ||
3721 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4310 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3722 | if (!skb) | 4311 | if (!skb) |
3723 | return -ENOMEM; | 4312 | return ERR_PTR(-ENOMEM); |
3724 | 4313 | ||
3725 | if (arg->hidden_ssid) | 4314 | if (arg->hidden_ssid) |
3726 | flags |= WMI_VDEV_START_HIDDEN_SSID; | 4315 | flags |= WMI_VDEV_START_HIDDEN_SSID; |
@@ -3749,50 +4338,36 @@ ath10k_wmi_vdev_start_restart(struct ath10k *ar, | |||
3749 | flags, arg->channel.freq, arg->channel.mode, | 4338 | flags, arg->channel.freq, arg->channel.mode, |
3750 | cmd->chan.flags, arg->channel.max_power); | 4339 | cmd->chan.flags, arg->channel.max_power); |
3751 | 4340 | ||
3752 | return ath10k_wmi_cmd_send(ar, skb, cmd_id); | 4341 | return skb; |
3753 | } | ||
3754 | |||
3755 | int ath10k_wmi_vdev_start(struct ath10k *ar, | ||
3756 | const struct wmi_vdev_start_request_arg *arg) | ||
3757 | { | ||
3758 | u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid; | ||
3759 | |||
3760 | return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id); | ||
3761 | } | ||
3762 | |||
3763 | int ath10k_wmi_vdev_restart(struct ath10k *ar, | ||
3764 | const struct wmi_vdev_start_request_arg *arg) | ||
3765 | { | ||
3766 | u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid; | ||
3767 | |||
3768 | return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id); | ||
3769 | } | 4342 | } |
3770 | 4343 | ||
3771 | int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id) | 4344 | static struct sk_buff * |
4345 | ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id) | ||
3772 | { | 4346 | { |
3773 | struct wmi_vdev_stop_cmd *cmd; | 4347 | struct wmi_vdev_stop_cmd *cmd; |
3774 | struct sk_buff *skb; | 4348 | struct sk_buff *skb; |
3775 | 4349 | ||
3776 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4350 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3777 | if (!skb) | 4351 | if (!skb) |
3778 | return -ENOMEM; | 4352 | return ERR_PTR(-ENOMEM); |
3779 | 4353 | ||
3780 | cmd = (struct wmi_vdev_stop_cmd *)skb->data; | 4354 | cmd = (struct wmi_vdev_stop_cmd *)skb->data; |
3781 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4355 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
3782 | 4356 | ||
3783 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); | 4357 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); |
3784 | 4358 | return skb; | |
3785 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid); | ||
3786 | } | 4359 | } |
3787 | 4360 | ||
3788 | int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid) | 4361 | static struct sk_buff * |
4362 | ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, | ||
4363 | const u8 *bssid) | ||
3789 | { | 4364 | { |
3790 | struct wmi_vdev_up_cmd *cmd; | 4365 | struct wmi_vdev_up_cmd *cmd; |
3791 | struct sk_buff *skb; | 4366 | struct sk_buff *skb; |
3792 | 4367 | ||
3793 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4368 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3794 | if (!skb) | 4369 | if (!skb) |
3795 | return -ENOMEM; | 4370 | return ERR_PTR(-ENOMEM); |
3796 | 4371 | ||
3797 | cmd = (struct wmi_vdev_up_cmd *)skb->data; | 4372 | cmd = (struct wmi_vdev_up_cmd *)skb->data; |
3798 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4373 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -3802,30 +4377,30 @@ int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid) | |||
3802 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4377 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3803 | "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", | 4378 | "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", |
3804 | vdev_id, aid, bssid); | 4379 | vdev_id, aid, bssid); |
3805 | 4380 | return skb; | |
3806 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid); | ||
3807 | } | 4381 | } |
3808 | 4382 | ||
3809 | int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id) | 4383 | static struct sk_buff * |
4384 | ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id) | ||
3810 | { | 4385 | { |
3811 | struct wmi_vdev_down_cmd *cmd; | 4386 | struct wmi_vdev_down_cmd *cmd; |
3812 | struct sk_buff *skb; | 4387 | struct sk_buff *skb; |
3813 | 4388 | ||
3814 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4389 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3815 | if (!skb) | 4390 | if (!skb) |
3816 | return -ENOMEM; | 4391 | return ERR_PTR(-ENOMEM); |
3817 | 4392 | ||
3818 | cmd = (struct wmi_vdev_down_cmd *)skb->data; | 4393 | cmd = (struct wmi_vdev_down_cmd *)skb->data; |
3819 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4394 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
3820 | 4395 | ||
3821 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4396 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3822 | "wmi mgmt vdev down id 0x%x\n", vdev_id); | 4397 | "wmi mgmt vdev down id 0x%x\n", vdev_id); |
3823 | 4398 | return skb; | |
3824 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid); | ||
3825 | } | 4399 | } |
3826 | 4400 | ||
3827 | int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id, | 4401 | static struct sk_buff * |
3828 | u32 param_id, u32 param_value) | 4402 | ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id, |
4403 | u32 param_id, u32 param_value) | ||
3829 | { | 4404 | { |
3830 | struct wmi_vdev_set_param_cmd *cmd; | 4405 | struct wmi_vdev_set_param_cmd *cmd; |
3831 | struct sk_buff *skb; | 4406 | struct sk_buff *skb; |
@@ -3834,12 +4409,12 @@ int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id, | |||
3834 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4409 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3835 | "vdev param %d not supported by firmware\n", | 4410 | "vdev param %d not supported by firmware\n", |
3836 | param_id); | 4411 | param_id); |
3837 | return -EOPNOTSUPP; | 4412 | return ERR_PTR(-EOPNOTSUPP); |
3838 | } | 4413 | } |
3839 | 4414 | ||
3840 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4415 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3841 | if (!skb) | 4416 | if (!skb) |
3842 | return -ENOMEM; | 4417 | return ERR_PTR(-ENOMEM); |
3843 | 4418 | ||
3844 | cmd = (struct wmi_vdev_set_param_cmd *)skb->data; | 4419 | cmd = (struct wmi_vdev_set_param_cmd *)skb->data; |
3845 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4420 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -3849,24 +4424,24 @@ int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id, | |||
3849 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4424 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3850 | "wmi vdev id 0x%x set param %d value %d\n", | 4425 | "wmi vdev id 0x%x set param %d value %d\n", |
3851 | vdev_id, param_id, param_value); | 4426 | vdev_id, param_id, param_value); |
3852 | 4427 | return skb; | |
3853 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid); | ||
3854 | } | 4428 | } |
3855 | 4429 | ||
3856 | int ath10k_wmi_vdev_install_key(struct ath10k *ar, | 4430 | static struct sk_buff * |
3857 | const struct wmi_vdev_install_key_arg *arg) | 4431 | ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar, |
4432 | const struct wmi_vdev_install_key_arg *arg) | ||
3858 | { | 4433 | { |
3859 | struct wmi_vdev_install_key_cmd *cmd; | 4434 | struct wmi_vdev_install_key_cmd *cmd; |
3860 | struct sk_buff *skb; | 4435 | struct sk_buff *skb; |
3861 | 4436 | ||
3862 | if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) | 4437 | if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) |
3863 | return -EINVAL; | 4438 | return ERR_PTR(-EINVAL); |
3864 | if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) | 4439 | if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) |
3865 | return -EINVAL; | 4440 | return ERR_PTR(-EINVAL); |
3866 | 4441 | ||
3867 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); | 4442 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); |
3868 | if (!skb) | 4443 | if (!skb) |
3869 | return -ENOMEM; | 4444 | return ERR_PTR(-ENOMEM); |
3870 | 4445 | ||
3871 | cmd = (struct wmi_vdev_install_key_cmd *)skb->data; | 4446 | cmd = (struct wmi_vdev_install_key_cmd *)skb->data; |
3872 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | 4447 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); |
@@ -3885,20 +4460,19 @@ int ath10k_wmi_vdev_install_key(struct ath10k *ar, | |||
3885 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4460 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3886 | "wmi vdev install key idx %d cipher %d len %d\n", | 4461 | "wmi vdev install key idx %d cipher %d len %d\n", |
3887 | arg->key_idx, arg->key_cipher, arg->key_len); | 4462 | arg->key_idx, arg->key_cipher, arg->key_len); |
3888 | return ath10k_wmi_cmd_send(ar, skb, | 4463 | return skb; |
3889 | ar->wmi.cmd->vdev_install_key_cmdid); | ||
3890 | } | 4464 | } |
3891 | 4465 | ||
3892 | int ath10k_wmi_vdev_spectral_conf(struct ath10k *ar, | 4466 | static struct sk_buff * |
3893 | const struct wmi_vdev_spectral_conf_arg *arg) | 4467 | ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar, |
4468 | const struct wmi_vdev_spectral_conf_arg *arg) | ||
3894 | { | 4469 | { |
3895 | struct wmi_vdev_spectral_conf_cmd *cmd; | 4470 | struct wmi_vdev_spectral_conf_cmd *cmd; |
3896 | struct sk_buff *skb; | 4471 | struct sk_buff *skb; |
3897 | u32 cmdid; | ||
3898 | 4472 | ||
3899 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4473 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3900 | if (!skb) | 4474 | if (!skb) |
3901 | return -ENOMEM; | 4475 | return ERR_PTR(-ENOMEM); |
3902 | 4476 | ||
3903 | cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; | 4477 | cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; |
3904 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); | 4478 | cmd->vdev_id = __cpu_to_le32(arg->vdev_id); |
@@ -3921,39 +4495,38 @@ int ath10k_wmi_vdev_spectral_conf(struct ath10k *ar, | |||
3921 | cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); | 4495 | cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); |
3922 | cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); | 4496 | cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); |
3923 | 4497 | ||
3924 | cmdid = ar->wmi.cmd->vdev_spectral_scan_configure_cmdid; | 4498 | return skb; |
3925 | return ath10k_wmi_cmd_send(ar, skb, cmdid); | ||
3926 | } | 4499 | } |
3927 | 4500 | ||
3928 | int ath10k_wmi_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, u32 trigger, | 4501 | static struct sk_buff * |
3929 | u32 enable) | 4502 | ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, |
4503 | u32 trigger, u32 enable) | ||
3930 | { | 4504 | { |
3931 | struct wmi_vdev_spectral_enable_cmd *cmd; | 4505 | struct wmi_vdev_spectral_enable_cmd *cmd; |
3932 | struct sk_buff *skb; | 4506 | struct sk_buff *skb; |
3933 | u32 cmdid; | ||
3934 | 4507 | ||
3935 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4508 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3936 | if (!skb) | 4509 | if (!skb) |
3937 | return -ENOMEM; | 4510 | return ERR_PTR(-ENOMEM); |
3938 | 4511 | ||
3939 | cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; | 4512 | cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; |
3940 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4513 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
3941 | cmd->trigger_cmd = __cpu_to_le32(trigger); | 4514 | cmd->trigger_cmd = __cpu_to_le32(trigger); |
3942 | cmd->enable_cmd = __cpu_to_le32(enable); | 4515 | cmd->enable_cmd = __cpu_to_le32(enable); |
3943 | 4516 | ||
3944 | cmdid = ar->wmi.cmd->vdev_spectral_scan_enable_cmdid; | 4517 | return skb; |
3945 | return ath10k_wmi_cmd_send(ar, skb, cmdid); | ||
3946 | } | 4518 | } |
3947 | 4519 | ||
3948 | int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id, | 4520 | static struct sk_buff * |
3949 | const u8 peer_addr[ETH_ALEN]) | 4521 | ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id, |
4522 | const u8 peer_addr[ETH_ALEN]) | ||
3950 | { | 4523 | { |
3951 | struct wmi_peer_create_cmd *cmd; | 4524 | struct wmi_peer_create_cmd *cmd; |
3952 | struct sk_buff *skb; | 4525 | struct sk_buff *skb; |
3953 | 4526 | ||
3954 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4527 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3955 | if (!skb) | 4528 | if (!skb) |
3956 | return -ENOMEM; | 4529 | return ERR_PTR(-ENOMEM); |
3957 | 4530 | ||
3958 | cmd = (struct wmi_peer_create_cmd *)skb->data; | 4531 | cmd = (struct wmi_peer_create_cmd *)skb->data; |
3959 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4532 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -3962,18 +4535,19 @@ int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id, | |||
3962 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4535 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3963 | "wmi peer create vdev_id %d peer_addr %pM\n", | 4536 | "wmi peer create vdev_id %d peer_addr %pM\n", |
3964 | vdev_id, peer_addr); | 4537 | vdev_id, peer_addr); |
3965 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid); | 4538 | return skb; |
3966 | } | 4539 | } |
3967 | 4540 | ||
3968 | int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id, | 4541 | static struct sk_buff * |
3969 | const u8 peer_addr[ETH_ALEN]) | 4542 | ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id, |
4543 | const u8 peer_addr[ETH_ALEN]) | ||
3970 | { | 4544 | { |
3971 | struct wmi_peer_delete_cmd *cmd; | 4545 | struct wmi_peer_delete_cmd *cmd; |
3972 | struct sk_buff *skb; | 4546 | struct sk_buff *skb; |
3973 | 4547 | ||
3974 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4548 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3975 | if (!skb) | 4549 | if (!skb) |
3976 | return -ENOMEM; | 4550 | return ERR_PTR(-ENOMEM); |
3977 | 4551 | ||
3978 | cmd = (struct wmi_peer_delete_cmd *)skb->data; | 4552 | cmd = (struct wmi_peer_delete_cmd *)skb->data; |
3979 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4553 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -3982,18 +4556,19 @@ int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id, | |||
3982 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4556 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
3983 | "wmi peer delete vdev_id %d peer_addr %pM\n", | 4557 | "wmi peer delete vdev_id %d peer_addr %pM\n", |
3984 | vdev_id, peer_addr); | 4558 | vdev_id, peer_addr); |
3985 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid); | 4559 | return skb; |
3986 | } | 4560 | } |
3987 | 4561 | ||
3988 | int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id, | 4562 | static struct sk_buff * |
3989 | const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) | 4563 | ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id, |
4564 | const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) | ||
3990 | { | 4565 | { |
3991 | struct wmi_peer_flush_tids_cmd *cmd; | 4566 | struct wmi_peer_flush_tids_cmd *cmd; |
3992 | struct sk_buff *skb; | 4567 | struct sk_buff *skb; |
3993 | 4568 | ||
3994 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4569 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
3995 | if (!skb) | 4570 | if (!skb) |
3996 | return -ENOMEM; | 4571 | return ERR_PTR(-ENOMEM); |
3997 | 4572 | ||
3998 | cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; | 4573 | cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; |
3999 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4574 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -4003,19 +4578,21 @@ int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id, | |||
4003 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4578 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4004 | "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", | 4579 | "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", |
4005 | vdev_id, peer_addr, tid_bitmap); | 4580 | vdev_id, peer_addr, tid_bitmap); |
4006 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid); | 4581 | return skb; |
4007 | } | 4582 | } |
4008 | 4583 | ||
4009 | int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id, | 4584 | static struct sk_buff * |
4010 | const u8 *peer_addr, enum wmi_peer_param param_id, | 4585 | ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id, |
4011 | u32 param_value) | 4586 | const u8 *peer_addr, |
4587 | enum wmi_peer_param param_id, | ||
4588 | u32 param_value) | ||
4012 | { | 4589 | { |
4013 | struct wmi_peer_set_param_cmd *cmd; | 4590 | struct wmi_peer_set_param_cmd *cmd; |
4014 | struct sk_buff *skb; | 4591 | struct sk_buff *skb; |
4015 | 4592 | ||
4016 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4593 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4017 | if (!skb) | 4594 | if (!skb) |
4018 | return -ENOMEM; | 4595 | return ERR_PTR(-ENOMEM); |
4019 | 4596 | ||
4020 | cmd = (struct wmi_peer_set_param_cmd *)skb->data; | 4597 | cmd = (struct wmi_peer_set_param_cmd *)skb->data; |
4021 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4598 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -4026,19 +4603,19 @@ int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id, | |||
4026 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4603 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4027 | "wmi vdev %d peer 0x%pM set param %d value %d\n", | 4604 | "wmi vdev %d peer 0x%pM set param %d value %d\n", |
4028 | vdev_id, peer_addr, param_id, param_value); | 4605 | vdev_id, peer_addr, param_id, param_value); |
4029 | 4606 | return skb; | |
4030 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid); | ||
4031 | } | 4607 | } |
4032 | 4608 | ||
4033 | int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id, | 4609 | static struct sk_buff * |
4034 | enum wmi_sta_ps_mode psmode) | 4610 | ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id, |
4611 | enum wmi_sta_ps_mode psmode) | ||
4035 | { | 4612 | { |
4036 | struct wmi_sta_powersave_mode_cmd *cmd; | 4613 | struct wmi_sta_powersave_mode_cmd *cmd; |
4037 | struct sk_buff *skb; | 4614 | struct sk_buff *skb; |
4038 | 4615 | ||
4039 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4616 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4040 | if (!skb) | 4617 | if (!skb) |
4041 | return -ENOMEM; | 4618 | return ERR_PTR(-ENOMEM); |
4042 | 4619 | ||
4043 | cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; | 4620 | cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; |
4044 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4621 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -4047,21 +4624,20 @@ int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id, | |||
4047 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4624 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4048 | "wmi set powersave id 0x%x mode %d\n", | 4625 | "wmi set powersave id 0x%x mode %d\n", |
4049 | vdev_id, psmode); | 4626 | vdev_id, psmode); |
4050 | 4627 | return skb; | |
4051 | return ath10k_wmi_cmd_send(ar, skb, | ||
4052 | ar->wmi.cmd->sta_powersave_mode_cmdid); | ||
4053 | } | 4628 | } |
4054 | 4629 | ||
4055 | int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id, | 4630 | static struct sk_buff * |
4056 | enum wmi_sta_powersave_param param_id, | 4631 | ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id, |
4057 | u32 value) | 4632 | enum wmi_sta_powersave_param param_id, |
4633 | u32 value) | ||
4058 | { | 4634 | { |
4059 | struct wmi_sta_powersave_param_cmd *cmd; | 4635 | struct wmi_sta_powersave_param_cmd *cmd; |
4060 | struct sk_buff *skb; | 4636 | struct sk_buff *skb; |
4061 | 4637 | ||
4062 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4638 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4063 | if (!skb) | 4639 | if (!skb) |
4064 | return -ENOMEM; | 4640 | return ERR_PTR(-ENOMEM); |
4065 | 4641 | ||
4066 | cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; | 4642 | cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; |
4067 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4643 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -4071,22 +4647,22 @@ int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id, | |||
4071 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4647 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4072 | "wmi sta ps param vdev_id 0x%x param %d value %d\n", | 4648 | "wmi sta ps param vdev_id 0x%x param %d value %d\n", |
4073 | vdev_id, param_id, value); | 4649 | vdev_id, param_id, value); |
4074 | return ath10k_wmi_cmd_send(ar, skb, | 4650 | return skb; |
4075 | ar->wmi.cmd->sta_powersave_param_cmdid); | ||
4076 | } | 4651 | } |
4077 | 4652 | ||
4078 | int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac, | 4653 | static struct sk_buff * |
4079 | enum wmi_ap_ps_peer_param param_id, u32 value) | 4654 | ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac, |
4655 | enum wmi_ap_ps_peer_param param_id, u32 value) | ||
4080 | { | 4656 | { |
4081 | struct wmi_ap_ps_peer_cmd *cmd; | 4657 | struct wmi_ap_ps_peer_cmd *cmd; |
4082 | struct sk_buff *skb; | 4658 | struct sk_buff *skb; |
4083 | 4659 | ||
4084 | if (!mac) | 4660 | if (!mac) |
4085 | return -EINVAL; | 4661 | return ERR_PTR(-EINVAL); |
4086 | 4662 | ||
4087 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4663 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4088 | if (!skb) | 4664 | if (!skb) |
4089 | return -ENOMEM; | 4665 | return ERR_PTR(-ENOMEM); |
4090 | 4666 | ||
4091 | cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; | 4667 | cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; |
4092 | cmd->vdev_id = __cpu_to_le32(vdev_id); | 4668 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
@@ -4097,13 +4673,12 @@ int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac, | |||
4097 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4673 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4098 | "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", | 4674 | "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", |
4099 | vdev_id, param_id, value, mac); | 4675 | vdev_id, param_id, value, mac); |
4100 | 4676 | return skb; | |
4101 | return ath10k_wmi_cmd_send(ar, skb, | ||
4102 | ar->wmi.cmd->ap_ps_peer_param_cmdid); | ||
4103 | } | 4677 | } |
4104 | 4678 | ||
4105 | int ath10k_wmi_scan_chan_list(struct ath10k *ar, | 4679 | static struct sk_buff * |
4106 | const struct wmi_scan_chan_list_arg *arg) | 4680 | ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar, |
4681 | const struct wmi_scan_chan_list_arg *arg) | ||
4107 | { | 4682 | { |
4108 | struct wmi_scan_chan_list_cmd *cmd; | 4683 | struct wmi_scan_chan_list_cmd *cmd; |
4109 | struct sk_buff *skb; | 4684 | struct sk_buff *skb; |
@@ -4116,7 +4691,7 @@ int ath10k_wmi_scan_chan_list(struct ath10k *ar, | |||
4116 | 4691 | ||
4117 | skb = ath10k_wmi_alloc_skb(ar, len); | 4692 | skb = ath10k_wmi_alloc_skb(ar, len); |
4118 | if (!skb) | 4693 | if (!skb) |
4119 | return -EINVAL; | 4694 | return ERR_PTR(-EINVAL); |
4120 | 4695 | ||
4121 | cmd = (struct wmi_scan_chan_list_cmd *)skb->data; | 4696 | cmd = (struct wmi_scan_chan_list_cmd *)skb->data; |
4122 | cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); | 4697 | cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); |
@@ -4128,7 +4703,7 @@ int ath10k_wmi_scan_chan_list(struct ath10k *ar, | |||
4128 | ath10k_wmi_put_wmi_channel(ci, ch); | 4703 | ath10k_wmi_put_wmi_channel(ci, ch); |
4129 | } | 4704 | } |
4130 | 4705 | ||
4131 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid); | 4706 | return skb; |
4132 | } | 4707 | } |
4133 | 4708 | ||
4134 | static void | 4709 | static void |
@@ -4209,12 +4784,9 @@ ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, | |||
4209 | cmd->info0 = __cpu_to_le32(info0); | 4784 | cmd->info0 = __cpu_to_le32(info0); |
4210 | } | 4785 | } |
4211 | 4786 | ||
4212 | int ath10k_wmi_peer_assoc(struct ath10k *ar, | 4787 | static int |
4213 | const struct wmi_peer_assoc_complete_arg *arg) | 4788 | ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg) |
4214 | { | 4789 | { |
4215 | struct sk_buff *skb; | ||
4216 | int len; | ||
4217 | |||
4218 | if (arg->peer_mpdu_density > 16) | 4790 | if (arg->peer_mpdu_density > 16) |
4219 | return -EINVAL; | 4791 | return -EINVAL; |
4220 | if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) | 4792 | if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) |
@@ -4222,79 +4794,135 @@ int ath10k_wmi_peer_assoc(struct ath10k *ar, | |||
4222 | if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) | 4794 | if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) |
4223 | return -EINVAL; | 4795 | return -EINVAL; |
4224 | 4796 | ||
4225 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | 4797 | return 0; |
4226 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) | 4798 | } |
4227 | len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); | 4799 | |
4228 | else | 4800 | static struct sk_buff * |
4229 | len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); | 4801 | ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar, |
4230 | } else { | 4802 | const struct wmi_peer_assoc_complete_arg *arg) |
4231 | len = sizeof(struct wmi_main_peer_assoc_complete_cmd); | 4803 | { |
4232 | } | 4804 | size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd); |
4805 | struct sk_buff *skb; | ||
4806 | int ret; | ||
4807 | |||
4808 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | ||
4809 | if (ret) | ||
4810 | return ERR_PTR(ret); | ||
4233 | 4811 | ||
4234 | skb = ath10k_wmi_alloc_skb(ar, len); | 4812 | skb = ath10k_wmi_alloc_skb(ar, len); |
4235 | if (!skb) | 4813 | if (!skb) |
4236 | return -ENOMEM; | 4814 | return ERR_PTR(-ENOMEM); |
4237 | 4815 | ||
4238 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | 4816 | ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); |
4239 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) | 4817 | |
4240 | ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); | 4818 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4241 | else | 4819 | "wmi peer assoc vdev %d addr %pM (%s)\n", |
4242 | ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); | 4820 | arg->vdev_id, arg->addr, |
4243 | } else { | 4821 | arg->peer_reassoc ? "reassociate" : "new"); |
4244 | ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); | 4822 | return skb; |
4245 | } | 4823 | } |
4824 | |||
4825 | static struct sk_buff * | ||
4826 | ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar, | ||
4827 | const struct wmi_peer_assoc_complete_arg *arg) | ||
4828 | { | ||
4829 | size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); | ||
4830 | struct sk_buff *skb; | ||
4831 | int ret; | ||
4832 | |||
4833 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | ||
4834 | if (ret) | ||
4835 | return ERR_PTR(ret); | ||
4836 | |||
4837 | skb = ath10k_wmi_alloc_skb(ar, len); | ||
4838 | if (!skb) | ||
4839 | return ERR_PTR(-ENOMEM); | ||
4840 | |||
4841 | ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); | ||
4842 | |||
4843 | ath10k_dbg(ar, ATH10K_DBG_WMI, | ||
4844 | "wmi peer assoc vdev %d addr %pM (%s)\n", | ||
4845 | arg->vdev_id, arg->addr, | ||
4846 | arg->peer_reassoc ? "reassociate" : "new"); | ||
4847 | return skb; | ||
4848 | } | ||
4849 | |||
4850 | static struct sk_buff * | ||
4851 | ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar, | ||
4852 | const struct wmi_peer_assoc_complete_arg *arg) | ||
4853 | { | ||
4854 | size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); | ||
4855 | struct sk_buff *skb; | ||
4856 | int ret; | ||
4857 | |||
4858 | ret = ath10k_wmi_peer_assoc_check_arg(arg); | ||
4859 | if (ret) | ||
4860 | return ERR_PTR(ret); | ||
4861 | |||
4862 | skb = ath10k_wmi_alloc_skb(ar, len); | ||
4863 | if (!skb) | ||
4864 | return ERR_PTR(-ENOMEM); | ||
4865 | |||
4866 | ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); | ||
4246 | 4867 | ||
4247 | ath10k_dbg(ar, ATH10K_DBG_WMI, | 4868 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4248 | "wmi peer assoc vdev %d addr %pM (%s)\n", | 4869 | "wmi peer assoc vdev %d addr %pM (%s)\n", |
4249 | arg->vdev_id, arg->addr, | 4870 | arg->vdev_id, arg->addr, |
4250 | arg->peer_reassoc ? "reassociate" : "new"); | 4871 | arg->peer_reassoc ? "reassociate" : "new"); |
4251 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid); | 4872 | return skb; |
4873 | } | ||
4874 | |||
4875 | static struct sk_buff * | ||
4876 | ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar) | ||
4877 | { | ||
4878 | struct sk_buff *skb; | ||
4879 | |||
4880 | skb = ath10k_wmi_alloc_skb(ar, 0); | ||
4881 | if (!skb) | ||
4882 | return ERR_PTR(-ENOMEM); | ||
4883 | |||
4884 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n"); | ||
4885 | return skb; | ||
4252 | } | 4886 | } |
4253 | 4887 | ||
4254 | /* This function assumes the beacon is already DMA mapped */ | 4888 | /* This function assumes the beacon is already DMA mapped */ |
4255 | int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif) | 4889 | static struct sk_buff * |
4890 | ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn, | ||
4891 | size_t bcn_len, u32 bcn_paddr, bool dtim_zero, | ||
4892 | bool deliver_cab) | ||
4256 | { | 4893 | { |
4257 | struct wmi_bcn_tx_ref_cmd *cmd; | 4894 | struct wmi_bcn_tx_ref_cmd *cmd; |
4258 | struct sk_buff *skb; | 4895 | struct sk_buff *skb; |
4259 | struct sk_buff *beacon = arvif->beacon; | ||
4260 | struct ath10k *ar = arvif->ar; | ||
4261 | struct ieee80211_hdr *hdr; | 4896 | struct ieee80211_hdr *hdr; |
4262 | int ret; | ||
4263 | u16 fc; | 4897 | u16 fc; |
4264 | 4898 | ||
4265 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4899 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4266 | if (!skb) | 4900 | if (!skb) |
4267 | return -ENOMEM; | 4901 | return ERR_PTR(-ENOMEM); |
4268 | 4902 | ||
4269 | hdr = (struct ieee80211_hdr *)beacon->data; | 4903 | hdr = (struct ieee80211_hdr *)bcn; |
4270 | fc = le16_to_cpu(hdr->frame_control); | 4904 | fc = le16_to_cpu(hdr->frame_control); |
4271 | 4905 | ||
4272 | cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; | 4906 | cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; |
4273 | cmd->vdev_id = __cpu_to_le32(arvif->vdev_id); | 4907 | cmd->vdev_id = __cpu_to_le32(vdev_id); |
4274 | cmd->data_len = __cpu_to_le32(beacon->len); | 4908 | cmd->data_len = __cpu_to_le32(bcn_len); |
4275 | cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr); | 4909 | cmd->data_ptr = __cpu_to_le32(bcn_paddr); |
4276 | cmd->msdu_id = 0; | 4910 | cmd->msdu_id = 0; |
4277 | cmd->frame_control = __cpu_to_le32(fc); | 4911 | cmd->frame_control = __cpu_to_le32(fc); |
4278 | cmd->flags = 0; | 4912 | cmd->flags = 0; |
4279 | cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); | 4913 | cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); |
4280 | 4914 | ||
4281 | if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero) | 4915 | if (dtim_zero) |
4282 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); | 4916 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); |
4283 | 4917 | ||
4284 | if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab) | 4918 | if (deliver_cab) |
4285 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); | 4919 | cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); |
4286 | 4920 | ||
4287 | ret = ath10k_wmi_cmd_send_nowait(ar, skb, | 4921 | return skb; |
4288 | ar->wmi.cmd->pdev_send_bcn_cmdid); | ||
4289 | |||
4290 | if (ret) | ||
4291 | dev_kfree_skb(skb); | ||
4292 | |||
4293 | return ret; | ||
4294 | } | 4922 | } |
4295 | 4923 | ||
4296 | static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params, | 4924 | void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, |
4297 | const struct wmi_wmm_params_arg *arg) | 4925 | const struct wmi_wmm_params_arg *arg) |
4298 | { | 4926 | { |
4299 | params->cwmin = __cpu_to_le32(arg->cwmin); | 4927 | params->cwmin = __cpu_to_le32(arg->cwmin); |
4300 | params->cwmax = __cpu_to_le32(arg->cwmax); | 4928 | params->cwmax = __cpu_to_le32(arg->cwmax); |
@@ -4304,52 +4932,54 @@ static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params, | |||
4304 | params->no_ack = __cpu_to_le32(arg->no_ack); | 4932 | params->no_ack = __cpu_to_le32(arg->no_ack); |
4305 | } | 4933 | } |
4306 | 4934 | ||
4307 | int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar, | 4935 | static struct sk_buff * |
4308 | const struct wmi_pdev_set_wmm_params_arg *arg) | 4936 | ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar, |
4937 | const struct wmi_wmm_params_all_arg *arg) | ||
4309 | { | 4938 | { |
4310 | struct wmi_pdev_set_wmm_params *cmd; | 4939 | struct wmi_pdev_set_wmm_params *cmd; |
4311 | struct sk_buff *skb; | 4940 | struct sk_buff *skb; |
4312 | 4941 | ||
4313 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4942 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4314 | if (!skb) | 4943 | if (!skb) |
4315 | return -ENOMEM; | 4944 | return ERR_PTR(-ENOMEM); |
4316 | 4945 | ||
4317 | cmd = (struct wmi_pdev_set_wmm_params *)skb->data; | 4946 | cmd = (struct wmi_pdev_set_wmm_params *)skb->data; |
4318 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be); | 4947 | ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be); |
4319 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); | 4948 | ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); |
4320 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); | 4949 | ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); |
4321 | ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); | 4950 | ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); |
4322 | 4951 | ||
4323 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); | 4952 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); |
4324 | return ath10k_wmi_cmd_send(ar, skb, | 4953 | return skb; |
4325 | ar->wmi.cmd->pdev_set_wmm_params_cmdid); | ||
4326 | } | 4954 | } |
4327 | 4955 | ||
4328 | int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id) | 4956 | static struct sk_buff * |
4957 | ath10k_wmi_op_gen_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id) | ||
4329 | { | 4958 | { |
4330 | struct wmi_request_stats_cmd *cmd; | 4959 | struct wmi_request_stats_cmd *cmd; |
4331 | struct sk_buff *skb; | 4960 | struct sk_buff *skb; |
4332 | 4961 | ||
4333 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4962 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4334 | if (!skb) | 4963 | if (!skb) |
4335 | return -ENOMEM; | 4964 | return ERR_PTR(-ENOMEM); |
4336 | 4965 | ||
4337 | cmd = (struct wmi_request_stats_cmd *)skb->data; | 4966 | cmd = (struct wmi_request_stats_cmd *)skb->data; |
4338 | cmd->stats_id = __cpu_to_le32(stats_id); | 4967 | cmd->stats_id = __cpu_to_le32(stats_id); |
4339 | 4968 | ||
4340 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id); | 4969 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id); |
4341 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid); | 4970 | return skb; |
4342 | } | 4971 | } |
4343 | 4972 | ||
4344 | int ath10k_wmi_force_fw_hang(struct ath10k *ar, | 4973 | static struct sk_buff * |
4345 | enum wmi_force_fw_hang_type type, u32 delay_ms) | 4974 | ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar, |
4975 | enum wmi_force_fw_hang_type type, u32 delay_ms) | ||
4346 | { | 4976 | { |
4347 | struct wmi_force_fw_hang_cmd *cmd; | 4977 | struct wmi_force_fw_hang_cmd *cmd; |
4348 | struct sk_buff *skb; | 4978 | struct sk_buff *skb; |
4349 | 4979 | ||
4350 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 4980 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4351 | if (!skb) | 4981 | if (!skb) |
4352 | return -ENOMEM; | 4982 | return ERR_PTR(-ENOMEM); |
4353 | 4983 | ||
4354 | cmd = (struct wmi_force_fw_hang_cmd *)skb->data; | 4984 | cmd = (struct wmi_force_fw_hang_cmd *)skb->data; |
4355 | cmd->type = __cpu_to_le32(type); | 4985 | cmd->type = __cpu_to_le32(type); |
@@ -4357,10 +4987,12 @@ int ath10k_wmi_force_fw_hang(struct ath10k *ar, | |||
4357 | 4987 | ||
4358 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", | 4988 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", |
4359 | type, delay_ms); | 4989 | type, delay_ms); |
4360 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid); | 4990 | return skb; |
4361 | } | 4991 | } |
4362 | 4992 | ||
4363 | int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable) | 4993 | static struct sk_buff * |
4994 | ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable, | ||
4995 | u32 log_level) | ||
4364 | { | 4996 | { |
4365 | struct wmi_dbglog_cfg_cmd *cmd; | 4997 | struct wmi_dbglog_cfg_cmd *cmd; |
4366 | struct sk_buff *skb; | 4998 | struct sk_buff *skb; |
@@ -4368,12 +5000,12 @@ int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable) | |||
4368 | 5000 | ||
4369 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 5001 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4370 | if (!skb) | 5002 | if (!skb) |
4371 | return -ENOMEM; | 5003 | return ERR_PTR(-ENOMEM); |
4372 | 5004 | ||
4373 | cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; | 5005 | cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; |
4374 | 5006 | ||
4375 | if (module_enable) { | 5007 | if (module_enable) { |
4376 | cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE, | 5008 | cfg = SM(log_level, |
4377 | ATH10K_DBGLOG_CFG_LOG_LVL); | 5009 | ATH10K_DBGLOG_CFG_LOG_LVL); |
4378 | } else { | 5010 | } else { |
4379 | /* set back defaults, all modules with WARN level */ | 5011 | /* set back defaults, all modules with WARN level */ |
@@ -4393,57 +5025,449 @@ int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable) | |||
4393 | __le32_to_cpu(cmd->module_valid), | 5025 | __le32_to_cpu(cmd->module_valid), |
4394 | __le32_to_cpu(cmd->config_enable), | 5026 | __le32_to_cpu(cmd->config_enable), |
4395 | __le32_to_cpu(cmd->config_valid)); | 5027 | __le32_to_cpu(cmd->config_valid)); |
4396 | 5028 | return skb; | |
4397 | return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid); | ||
4398 | } | 5029 | } |
4399 | 5030 | ||
4400 | int ath10k_wmi_pdev_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) | 5031 | static struct sk_buff * |
5032 | ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) | ||
4401 | { | 5033 | { |
4402 | struct wmi_pdev_pktlog_enable_cmd *cmd; | 5034 | struct wmi_pdev_pktlog_enable_cmd *cmd; |
4403 | struct sk_buff *skb; | 5035 | struct sk_buff *skb; |
4404 | 5036 | ||
4405 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | 5037 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); |
4406 | if (!skb) | 5038 | if (!skb) |
4407 | return -ENOMEM; | 5039 | return ERR_PTR(-ENOMEM); |
4408 | 5040 | ||
4409 | ev_bitmap &= ATH10K_PKTLOG_ANY; | 5041 | ev_bitmap &= ATH10K_PKTLOG_ANY; |
4410 | ath10k_dbg(ar, ATH10K_DBG_WMI, | ||
4411 | "wmi enable pktlog filter:%x\n", ev_bitmap); | ||
4412 | 5042 | ||
4413 | cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; | 5043 | cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; |
4414 | cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); | 5044 | cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); |
4415 | return ath10k_wmi_cmd_send(ar, skb, | 5045 | |
4416 | ar->wmi.cmd->pdev_pktlog_enable_cmdid); | 5046 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n", |
5047 | ev_bitmap); | ||
5048 | return skb; | ||
4417 | } | 5049 | } |
4418 | 5050 | ||
4419 | int ath10k_wmi_pdev_pktlog_disable(struct ath10k *ar) | 5051 | static struct sk_buff * |
5052 | ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar) | ||
4420 | { | 5053 | { |
4421 | struct sk_buff *skb; | 5054 | struct sk_buff *skb; |
4422 | 5055 | ||
4423 | skb = ath10k_wmi_alloc_skb(ar, 0); | 5056 | skb = ath10k_wmi_alloc_skb(ar, 0); |
4424 | if (!skb) | 5057 | if (!skb) |
4425 | return -ENOMEM; | 5058 | return ERR_PTR(-ENOMEM); |
4426 | 5059 | ||
4427 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); | 5060 | ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); |
5061 | return skb; | ||
5062 | } | ||
5063 | |||
5064 | static struct sk_buff * | ||
5065 | ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period, | ||
5066 | u32 duration, u32 next_offset, | ||
5067 | u32 enabled) | ||
5068 | { | ||
5069 | struct wmi_pdev_set_quiet_cmd *cmd; | ||
5070 | struct sk_buff *skb; | ||
5071 | |||
5072 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | ||
5073 | if (!skb) | ||
5074 | return ERR_PTR(-ENOMEM); | ||
5075 | |||
5076 | cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data; | ||
5077 | cmd->period = __cpu_to_le32(period); | ||
5078 | cmd->duration = __cpu_to_le32(duration); | ||
5079 | cmd->next_start = __cpu_to_le32(next_offset); | ||
5080 | cmd->enabled = __cpu_to_le32(enabled); | ||
4428 | 5081 | ||
4429 | return ath10k_wmi_cmd_send(ar, skb, | 5082 | ath10k_dbg(ar, ATH10K_DBG_WMI, |
4430 | ar->wmi.cmd->pdev_pktlog_disable_cmdid); | 5083 | "wmi quiet param: period %u duration %u enabled %d\n", |
5084 | period, duration, enabled); | ||
5085 | return skb; | ||
4431 | } | 5086 | } |
4432 | 5087 | ||
4433 | int ath10k_wmi_attach(struct ath10k *ar) | 5088 | static struct sk_buff * |
5089 | ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id, | ||
5090 | const u8 *mac) | ||
4434 | { | 5091 | { |
4435 | if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { | 5092 | struct wmi_addba_clear_resp_cmd *cmd; |
4436 | if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) | 5093 | struct sk_buff *skb; |
4437 | ar->wmi.cmd = &wmi_10_2_cmd_map; | 5094 | |
4438 | else | 5095 | if (!mac) |
4439 | ar->wmi.cmd = &wmi_10x_cmd_map; | 5096 | return ERR_PTR(-EINVAL); |
5097 | |||
5098 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | ||
5099 | if (!skb) | ||
5100 | return ERR_PTR(-ENOMEM); | ||
5101 | |||
5102 | cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; | ||
5103 | cmd->vdev_id = __cpu_to_le32(vdev_id); | ||
5104 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | ||
5105 | |||
5106 | ath10k_dbg(ar, ATH10K_DBG_WMI, | ||
5107 | "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", | ||
5108 | vdev_id, mac); | ||
5109 | return skb; | ||
5110 | } | ||
5111 | |||
5112 | static struct sk_buff * | ||
5113 | ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | ||
5114 | u32 tid, u32 buf_size) | ||
5115 | { | ||
5116 | struct wmi_addba_send_cmd *cmd; | ||
5117 | struct sk_buff *skb; | ||
5118 | |||
5119 | if (!mac) | ||
5120 | return ERR_PTR(-EINVAL); | ||
5121 | |||
5122 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | ||
5123 | if (!skb) | ||
5124 | return ERR_PTR(-ENOMEM); | ||
5125 | |||
5126 | cmd = (struct wmi_addba_send_cmd *)skb->data; | ||
5127 | cmd->vdev_id = __cpu_to_le32(vdev_id); | ||
5128 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | ||
5129 | cmd->tid = __cpu_to_le32(tid); | ||
5130 | cmd->buffersize = __cpu_to_le32(buf_size); | ||
5131 | |||
5132 | ath10k_dbg(ar, ATH10K_DBG_WMI, | ||
5133 | "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", | ||
5134 | vdev_id, mac, tid, buf_size); | ||
5135 | return skb; | ||
5136 | } | ||
5137 | |||
5138 | static struct sk_buff * | ||
5139 | ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac, | ||
5140 | u32 tid, u32 status) | ||
5141 | { | ||
5142 | struct wmi_addba_setresponse_cmd *cmd; | ||
5143 | struct sk_buff *skb; | ||
5144 | |||
5145 | if (!mac) | ||
5146 | return ERR_PTR(-EINVAL); | ||
5147 | |||
5148 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | ||
5149 | if (!skb) | ||
5150 | return ERR_PTR(-ENOMEM); | ||
5151 | |||
5152 | cmd = (struct wmi_addba_setresponse_cmd *)skb->data; | ||
5153 | cmd->vdev_id = __cpu_to_le32(vdev_id); | ||
5154 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | ||
5155 | cmd->tid = __cpu_to_le32(tid); | ||
5156 | cmd->statuscode = __cpu_to_le32(status); | ||
5157 | |||
5158 | ath10k_dbg(ar, ATH10K_DBG_WMI, | ||
5159 | "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", | ||
5160 | vdev_id, mac, tid, status); | ||
5161 | return skb; | ||
5162 | } | ||
5163 | |||
5164 | static struct sk_buff * | ||
5165 | ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, | ||
5166 | u32 tid, u32 initiator, u32 reason) | ||
5167 | { | ||
5168 | struct wmi_delba_send_cmd *cmd; | ||
5169 | struct sk_buff *skb; | ||
5170 | |||
5171 | if (!mac) | ||
5172 | return ERR_PTR(-EINVAL); | ||
5173 | |||
5174 | skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); | ||
5175 | if (!skb) | ||
5176 | return ERR_PTR(-ENOMEM); | ||
5177 | |||
5178 | cmd = (struct wmi_delba_send_cmd *)skb->data; | ||
5179 | cmd->vdev_id = __cpu_to_le32(vdev_id); | ||
5180 | ether_addr_copy(cmd->peer_macaddr.addr, mac); | ||
5181 | cmd->tid = __cpu_to_le32(tid); | ||
5182 | cmd->initiator = __cpu_to_le32(initiator); | ||
5183 | cmd->reasoncode = __cpu_to_le32(reason); | ||
5184 | |||
5185 | ath10k_dbg(ar, ATH10K_DBG_WMI, | ||
5186 | "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", | ||
5187 | vdev_id, mac, tid, initiator, reason); | ||
5188 | return skb; | ||
5189 | } | ||
5190 | |||
5191 | static const struct wmi_ops wmi_ops = { | ||
5192 | .rx = ath10k_wmi_op_rx, | ||
5193 | .map_svc = wmi_main_svc_map, | ||
5194 | |||
5195 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | ||
5196 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | ||
5197 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | ||
5198 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | ||
5199 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | ||
5200 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | ||
5201 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, | ||
5202 | .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, | ||
5203 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | ||
5204 | .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats, | ||
5205 | |||
5206 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | ||
5207 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | ||
5208 | .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd, | ||
5209 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | ||
5210 | .gen_init = ath10k_wmi_op_gen_init, | ||
5211 | .gen_start_scan = ath10k_wmi_op_gen_start_scan, | ||
5212 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | ||
5213 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | ||
5214 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | ||
5215 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | ||
5216 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | ||
5217 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | ||
5218 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | ||
5219 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | ||
5220 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | ||
5221 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | ||
5222 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | ||
5223 | /* .gen_vdev_wmm_conf not implemented */ | ||
5224 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | ||
5225 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | ||
5226 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | ||
5227 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | ||
5228 | .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc, | ||
5229 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | ||
5230 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | ||
5231 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | ||
5232 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | ||
5233 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | ||
5234 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | ||
5235 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | ||
5236 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | ||
5237 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | ||
5238 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | ||
5239 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | ||
5240 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | ||
5241 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | ||
5242 | /* .gen_pdev_get_temperature not implemented */ | ||
5243 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, | ||
5244 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | ||
5245 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | ||
5246 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | ||
5247 | /* .gen_bcn_tmpl not implemented */ | ||
5248 | /* .gen_prb_tmpl not implemented */ | ||
5249 | /* .gen_p2p_go_bcn_ie not implemented */ | ||
5250 | }; | ||
5251 | |||
5252 | static const struct wmi_ops wmi_10_1_ops = { | ||
5253 | .rx = ath10k_wmi_10_1_op_rx, | ||
5254 | .map_svc = wmi_10x_svc_map, | ||
5255 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | ||
5256 | .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats, | ||
5257 | .gen_init = ath10k_wmi_10_1_op_gen_init, | ||
5258 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | ||
5259 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | ||
5260 | .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc, | ||
5261 | /* .gen_pdev_get_temperature not implemented */ | ||
5262 | |||
5263 | /* shared with main branch */ | ||
5264 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | ||
5265 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | ||
5266 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | ||
5267 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | ||
5268 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | ||
5269 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | ||
5270 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, | ||
5271 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | ||
5272 | |||
5273 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | ||
5274 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | ||
5275 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | ||
5276 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | ||
5277 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | ||
5278 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | ||
5279 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | ||
5280 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | ||
5281 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | ||
5282 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | ||
5283 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | ||
5284 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | ||
5285 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | ||
5286 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | ||
5287 | /* .gen_vdev_wmm_conf not implemented */ | ||
5288 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | ||
5289 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | ||
5290 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | ||
5291 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | ||
5292 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | ||
5293 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | ||
5294 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | ||
5295 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | ||
5296 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | ||
5297 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | ||
5298 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | ||
5299 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | ||
5300 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | ||
5301 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | ||
5302 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | ||
5303 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | ||
5304 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | ||
5305 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, | ||
5306 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | ||
5307 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | ||
5308 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | ||
5309 | /* .gen_bcn_tmpl not implemented */ | ||
5310 | /* .gen_prb_tmpl not implemented */ | ||
5311 | /* .gen_p2p_go_bcn_ie not implemented */ | ||
5312 | }; | ||
5313 | |||
5314 | static const struct wmi_ops wmi_10_2_ops = { | ||
5315 | .rx = ath10k_wmi_10_2_op_rx, | ||
5316 | .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats, | ||
5317 | .gen_init = ath10k_wmi_10_2_op_gen_init, | ||
5318 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | ||
5319 | /* .gen_pdev_get_temperature not implemented */ | ||
5320 | |||
5321 | /* shared with 10.1 */ | ||
5322 | .map_svc = wmi_10x_svc_map, | ||
5323 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | ||
5324 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | ||
5325 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | ||
5326 | |||
5327 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | ||
5328 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | ||
5329 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | ||
5330 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | ||
5331 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | ||
5332 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | ||
5333 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, | ||
5334 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | ||
5335 | |||
5336 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | ||
5337 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | ||
5338 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | ||
5339 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | ||
5340 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | ||
5341 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | ||
5342 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | ||
5343 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | ||
5344 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | ||
5345 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | ||
5346 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | ||
5347 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | ||
5348 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | ||
5349 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | ||
5350 | /* .gen_vdev_wmm_conf not implemented */ | ||
5351 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | ||
5352 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | ||
5353 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | ||
5354 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | ||
5355 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | ||
5356 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | ||
5357 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | ||
5358 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | ||
5359 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | ||
5360 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | ||
5361 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | ||
5362 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | ||
5363 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | ||
5364 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | ||
5365 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | ||
5366 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | ||
5367 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | ||
5368 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, | ||
5369 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | ||
5370 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | ||
5371 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | ||
5372 | }; | ||
4440 | 5373 | ||
5374 | static const struct wmi_ops wmi_10_2_4_ops = { | ||
5375 | .rx = ath10k_wmi_10_2_op_rx, | ||
5376 | .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats, | ||
5377 | .gen_init = ath10k_wmi_10_2_op_gen_init, | ||
5378 | .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, | ||
5379 | .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, | ||
5380 | |||
5381 | /* shared with 10.1 */ | ||
5382 | .map_svc = wmi_10x_svc_map, | ||
5383 | .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, | ||
5384 | .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, | ||
5385 | .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, | ||
5386 | |||
5387 | .pull_scan = ath10k_wmi_op_pull_scan_ev, | ||
5388 | .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, | ||
5389 | .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, | ||
5390 | .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, | ||
5391 | .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, | ||
5392 | .pull_swba = ath10k_wmi_op_pull_swba_ev, | ||
5393 | .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, | ||
5394 | .pull_rdy = ath10k_wmi_op_pull_rdy_ev, | ||
5395 | |||
5396 | .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, | ||
5397 | .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, | ||
5398 | .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, | ||
5399 | .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, | ||
5400 | .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, | ||
5401 | .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, | ||
5402 | .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, | ||
5403 | .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, | ||
5404 | .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, | ||
5405 | .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, | ||
5406 | .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, | ||
5407 | .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, | ||
5408 | .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, | ||
5409 | .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, | ||
5410 | .gen_peer_create = ath10k_wmi_op_gen_peer_create, | ||
5411 | .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, | ||
5412 | .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, | ||
5413 | .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, | ||
5414 | .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, | ||
5415 | .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, | ||
5416 | .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, | ||
5417 | .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, | ||
5418 | .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, | ||
5419 | .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, | ||
5420 | .gen_request_stats = ath10k_wmi_op_gen_request_stats, | ||
5421 | .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, | ||
5422 | .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, | ||
5423 | .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, | ||
5424 | .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, | ||
5425 | .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, | ||
5426 | .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, | ||
5427 | .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, | ||
5428 | .gen_addba_send = ath10k_wmi_op_gen_addba_send, | ||
5429 | .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, | ||
5430 | .gen_delba_send = ath10k_wmi_op_gen_delba_send, | ||
5431 | /* .gen_bcn_tmpl not implemented */ | ||
5432 | /* .gen_prb_tmpl not implemented */ | ||
5433 | /* .gen_p2p_go_bcn_ie not implemented */ | ||
5434 | }; | ||
5435 | |||
5436 | int ath10k_wmi_attach(struct ath10k *ar) | ||
5437 | { | ||
5438 | switch (ar->wmi.op_version) { | ||
5439 | case ATH10K_FW_WMI_OP_VERSION_10_2_4: | ||
5440 | ar->wmi.cmd = &wmi_10_2_4_cmd_map; | ||
5441 | ar->wmi.ops = &wmi_10_2_4_ops; | ||
5442 | ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map; | ||
5443 | ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map; | ||
5444 | break; | ||
5445 | case ATH10K_FW_WMI_OP_VERSION_10_2: | ||
5446 | ar->wmi.cmd = &wmi_10_2_cmd_map; | ||
5447 | ar->wmi.ops = &wmi_10_2_ops; | ||
4441 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; | 5448 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; |
4442 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | 5449 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; |
4443 | } else { | 5450 | break; |
5451 | case ATH10K_FW_WMI_OP_VERSION_10_1: | ||
5452 | ar->wmi.cmd = &wmi_10x_cmd_map; | ||
5453 | ar->wmi.ops = &wmi_10_1_ops; | ||
5454 | ar->wmi.vdev_param = &wmi_10x_vdev_param_map; | ||
5455 | ar->wmi.pdev_param = &wmi_10x_pdev_param_map; | ||
5456 | break; | ||
5457 | case ATH10K_FW_WMI_OP_VERSION_MAIN: | ||
4444 | ar->wmi.cmd = &wmi_cmd_map; | 5458 | ar->wmi.cmd = &wmi_cmd_map; |
5459 | ar->wmi.ops = &wmi_ops; | ||
4445 | ar->wmi.vdev_param = &wmi_vdev_param_map; | 5460 | ar->wmi.vdev_param = &wmi_vdev_param_map; |
4446 | ar->wmi.pdev_param = &wmi_pdev_param_map; | 5461 | ar->wmi.pdev_param = &wmi_pdev_param_map; |
5462 | break; | ||
5463 | case ATH10K_FW_WMI_OP_VERSION_TLV: | ||
5464 | ath10k_wmi_tlv_attach(ar); | ||
5465 | break; | ||
5466 | case ATH10K_FW_WMI_OP_VERSION_UNSET: | ||
5467 | case ATH10K_FW_WMI_OP_VERSION_MAX: | ||
5468 | ath10k_err(ar, "unsupported WMI op version: %d\n", | ||
5469 | ar->wmi.op_version); | ||
5470 | return -EINVAL; | ||
4447 | } | 5471 | } |
4448 | 5472 | ||
4449 | init_completion(&ar->wmi.service_ready); | 5473 | init_completion(&ar->wmi.service_ready); |