diff options
Diffstat (limited to 'drivers/net/ethernet')
64 files changed, 890 insertions, 495 deletions
diff --git a/drivers/net/ethernet/3com/3c59x.c b/drivers/net/ethernet/3com/3c59x.c index 059c7414e303..3fe45c705933 100644 --- a/drivers/net/ethernet/3com/3c59x.c +++ b/drivers/net/ethernet/3com/3c59x.c | |||
@@ -2177,10 +2177,10 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2177 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; | 2177 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
2178 | 2178 | ||
2179 | vp->tx_ring[entry].frag[i+1].addr = | 2179 | vp->tx_ring[entry].frag[i+1].addr = |
2180 | cpu_to_le32(pci_map_single( | 2180 | cpu_to_le32(skb_frag_dma_map( |
2181 | VORTEX_PCI(vp), | 2181 | &VORTEX_PCI(vp)->dev, |
2182 | (void *)skb_frag_address(frag), | 2182 | frag, |
2183 | skb_frag_size(frag), PCI_DMA_TODEVICE)); | 2183 | frag->page_offset, frag->size, DMA_TO_DEVICE)); |
2184 | 2184 | ||
2185 | if (i == skb_shinfo(skb)->nr_frags-1) | 2185 | if (i == skb_shinfo(skb)->nr_frags-1) |
2186 | vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(skb_frag_size(frag)|LAST_FRAG); | 2186 | vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(skb_frag_size(frag)|LAST_FRAG); |
diff --git a/drivers/net/ethernet/aeroflex/greth.c b/drivers/net/ethernet/aeroflex/greth.c index 23578dfee249..3005155e412b 100644 --- a/drivers/net/ethernet/aeroflex/greth.c +++ b/drivers/net/ethernet/aeroflex/greth.c | |||
@@ -123,6 +123,12 @@ static inline void greth_enable_tx(struct greth_private *greth) | |||
123 | GRETH_REGORIN(greth->regs->control, GRETH_TXEN); | 123 | GRETH_REGORIN(greth->regs->control, GRETH_TXEN); |
124 | } | 124 | } |
125 | 125 | ||
126 | static inline void greth_enable_tx_and_irq(struct greth_private *greth) | ||
127 | { | ||
128 | wmb(); /* BDs must been written to memory before enabling TX */ | ||
129 | GRETH_REGORIN(greth->regs->control, GRETH_TXEN | GRETH_TXI); | ||
130 | } | ||
131 | |||
126 | static inline void greth_disable_tx(struct greth_private *greth) | 132 | static inline void greth_disable_tx(struct greth_private *greth) |
127 | { | 133 | { |
128 | GRETH_REGANDIN(greth->regs->control, ~GRETH_TXEN); | 134 | GRETH_REGANDIN(greth->regs->control, ~GRETH_TXEN); |
@@ -447,29 +453,30 @@ out: | |||
447 | return err; | 453 | return err; |
448 | } | 454 | } |
449 | 455 | ||
456 | static inline u16 greth_num_free_bds(u16 tx_last, u16 tx_next) | ||
457 | { | ||
458 | if (tx_next < tx_last) | ||
459 | return (tx_last - tx_next) - 1; | ||
460 | else | ||
461 | return GRETH_TXBD_NUM - (tx_next - tx_last) - 1; | ||
462 | } | ||
450 | 463 | ||
451 | static netdev_tx_t | 464 | static netdev_tx_t |
452 | greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev) | 465 | greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev) |
453 | { | 466 | { |
454 | struct greth_private *greth = netdev_priv(dev); | 467 | struct greth_private *greth = netdev_priv(dev); |
455 | struct greth_bd *bdp; | 468 | struct greth_bd *bdp; |
456 | u32 status = 0, dma_addr, ctrl; | 469 | u32 status, dma_addr; |
457 | int curr_tx, nr_frags, i, err = NETDEV_TX_OK; | 470 | int curr_tx, nr_frags, i, err = NETDEV_TX_OK; |
458 | unsigned long flags; | 471 | unsigned long flags; |
472 | u16 tx_last; | ||
459 | 473 | ||
460 | nr_frags = skb_shinfo(skb)->nr_frags; | 474 | nr_frags = skb_shinfo(skb)->nr_frags; |
475 | tx_last = greth->tx_last; | ||
476 | rmb(); /* tx_last is updated by the poll task */ | ||
461 | 477 | ||
462 | /* Clean TX Ring */ | 478 | if (greth_num_free_bds(tx_last, greth->tx_next) < nr_frags + 1) { |
463 | greth_clean_tx_gbit(dev); | ||
464 | |||
465 | if (greth->tx_free < nr_frags + 1) { | ||
466 | spin_lock_irqsave(&greth->devlock, flags);/*save from poll/irq*/ | ||
467 | ctrl = GRETH_REGLOAD(greth->regs->control); | ||
468 | /* Enable TX IRQ only if not already in poll() routine */ | ||
469 | if (ctrl & GRETH_RXI) | ||
470 | GRETH_REGSAVE(greth->regs->control, ctrl | GRETH_TXI); | ||
471 | netif_stop_queue(dev); | 479 | netif_stop_queue(dev); |
472 | spin_unlock_irqrestore(&greth->devlock, flags); | ||
473 | err = NETDEV_TX_BUSY; | 480 | err = NETDEV_TX_BUSY; |
474 | goto out; | 481 | goto out; |
475 | } | 482 | } |
@@ -488,6 +495,8 @@ greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev) | |||
488 | /* Linear buf */ | 495 | /* Linear buf */ |
489 | if (nr_frags != 0) | 496 | if (nr_frags != 0) |
490 | status = GRETH_TXBD_MORE; | 497 | status = GRETH_TXBD_MORE; |
498 | else | ||
499 | status = GRETH_BD_IE; | ||
491 | 500 | ||
492 | if (skb->ip_summed == CHECKSUM_PARTIAL) | 501 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
493 | status |= GRETH_TXBD_CSALL; | 502 | status |= GRETH_TXBD_CSALL; |
@@ -545,14 +554,12 @@ greth_start_xmit_gbit(struct sk_buff *skb, struct net_device *dev) | |||
545 | 554 | ||
546 | /* Enable the descriptor chain by enabling the first descriptor */ | 555 | /* Enable the descriptor chain by enabling the first descriptor */ |
547 | bdp = greth->tx_bd_base + greth->tx_next; | 556 | bdp = greth->tx_bd_base + greth->tx_next; |
548 | greth_write_bd(&bdp->stat, greth_read_bd(&bdp->stat) | GRETH_BD_EN); | 557 | greth_write_bd(&bdp->stat, |
549 | greth->tx_next = curr_tx; | 558 | greth_read_bd(&bdp->stat) | GRETH_BD_EN); |
550 | greth->tx_free -= nr_frags + 1; | ||
551 | |||
552 | wmb(); | ||
553 | 559 | ||
554 | spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/ | 560 | spin_lock_irqsave(&greth->devlock, flags); /*save from poll/irq*/ |
555 | greth_enable_tx(greth); | 561 | greth->tx_next = curr_tx; |
562 | greth_enable_tx_and_irq(greth); | ||
556 | spin_unlock_irqrestore(&greth->devlock, flags); | 563 | spin_unlock_irqrestore(&greth->devlock, flags); |
557 | 564 | ||
558 | return NETDEV_TX_OK; | 565 | return NETDEV_TX_OK; |
@@ -648,7 +655,6 @@ static void greth_clean_tx(struct net_device *dev) | |||
648 | if (greth->tx_free > 0) { | 655 | if (greth->tx_free > 0) { |
649 | netif_wake_queue(dev); | 656 | netif_wake_queue(dev); |
650 | } | 657 | } |
651 | |||
652 | } | 658 | } |
653 | 659 | ||
654 | static inline void greth_update_tx_stats(struct net_device *dev, u32 stat) | 660 | static inline void greth_update_tx_stats(struct net_device *dev, u32 stat) |
@@ -670,20 +676,22 @@ static void greth_clean_tx_gbit(struct net_device *dev) | |||
670 | { | 676 | { |
671 | struct greth_private *greth; | 677 | struct greth_private *greth; |
672 | struct greth_bd *bdp, *bdp_last_frag; | 678 | struct greth_bd *bdp, *bdp_last_frag; |
673 | struct sk_buff *skb; | 679 | struct sk_buff *skb = NULL; |
674 | u32 stat; | 680 | u32 stat; |
675 | int nr_frags, i; | 681 | int nr_frags, i; |
682 | u16 tx_last; | ||
676 | 683 | ||
677 | greth = netdev_priv(dev); | 684 | greth = netdev_priv(dev); |
685 | tx_last = greth->tx_last; | ||
678 | 686 | ||
679 | while (greth->tx_free < GRETH_TXBD_NUM) { | 687 | while (tx_last != greth->tx_next) { |
680 | 688 | ||
681 | skb = greth->tx_skbuff[greth->tx_last]; | 689 | skb = greth->tx_skbuff[tx_last]; |
682 | 690 | ||
683 | nr_frags = skb_shinfo(skb)->nr_frags; | 691 | nr_frags = skb_shinfo(skb)->nr_frags; |
684 | 692 | ||
685 | /* We only clean fully completed SKBs */ | 693 | /* We only clean fully completed SKBs */ |
686 | bdp_last_frag = greth->tx_bd_base + SKIP_TX(greth->tx_last, nr_frags); | 694 | bdp_last_frag = greth->tx_bd_base + SKIP_TX(tx_last, nr_frags); |
687 | 695 | ||
688 | GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX); | 696 | GRETH_REGSAVE(greth->regs->status, GRETH_INT_TE | GRETH_INT_TX); |
689 | mb(); | 697 | mb(); |
@@ -692,14 +700,14 @@ static void greth_clean_tx_gbit(struct net_device *dev) | |||
692 | if (stat & GRETH_BD_EN) | 700 | if (stat & GRETH_BD_EN) |
693 | break; | 701 | break; |
694 | 702 | ||
695 | greth->tx_skbuff[greth->tx_last] = NULL; | 703 | greth->tx_skbuff[tx_last] = NULL; |
696 | 704 | ||
697 | greth_update_tx_stats(dev, stat); | 705 | greth_update_tx_stats(dev, stat); |
698 | dev->stats.tx_bytes += skb->len; | 706 | dev->stats.tx_bytes += skb->len; |
699 | 707 | ||
700 | bdp = greth->tx_bd_base + greth->tx_last; | 708 | bdp = greth->tx_bd_base + tx_last; |
701 | 709 | ||
702 | greth->tx_last = NEXT_TX(greth->tx_last); | 710 | tx_last = NEXT_TX(tx_last); |
703 | 711 | ||
704 | dma_unmap_single(greth->dev, | 712 | dma_unmap_single(greth->dev, |
705 | greth_read_bd(&bdp->addr), | 713 | greth_read_bd(&bdp->addr), |
@@ -708,21 +716,26 @@ static void greth_clean_tx_gbit(struct net_device *dev) | |||
708 | 716 | ||
709 | for (i = 0; i < nr_frags; i++) { | 717 | for (i = 0; i < nr_frags; i++) { |
710 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; | 718 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
711 | bdp = greth->tx_bd_base + greth->tx_last; | 719 | bdp = greth->tx_bd_base + tx_last; |
712 | 720 | ||
713 | dma_unmap_page(greth->dev, | 721 | dma_unmap_page(greth->dev, |
714 | greth_read_bd(&bdp->addr), | 722 | greth_read_bd(&bdp->addr), |
715 | skb_frag_size(frag), | 723 | skb_frag_size(frag), |
716 | DMA_TO_DEVICE); | 724 | DMA_TO_DEVICE); |
717 | 725 | ||
718 | greth->tx_last = NEXT_TX(greth->tx_last); | 726 | tx_last = NEXT_TX(tx_last); |
719 | } | 727 | } |
720 | greth->tx_free += nr_frags+1; | ||
721 | dev_kfree_skb(skb); | 728 | dev_kfree_skb(skb); |
722 | } | 729 | } |
730 | if (skb) { /* skb is set only if the above while loop was entered */ | ||
731 | wmb(); | ||
732 | greth->tx_last = tx_last; | ||
723 | 733 | ||
724 | if (netif_queue_stopped(dev) && (greth->tx_free > (MAX_SKB_FRAGS+1))) | 734 | if (netif_queue_stopped(dev) && |
725 | netif_wake_queue(dev); | 735 | (greth_num_free_bds(tx_last, greth->tx_next) > |
736 | (MAX_SKB_FRAGS+1))) | ||
737 | netif_wake_queue(dev); | ||
738 | } | ||
726 | } | 739 | } |
727 | 740 | ||
728 | static int greth_rx(struct net_device *dev, int limit) | 741 | static int greth_rx(struct net_device *dev, int limit) |
@@ -965,16 +978,12 @@ static int greth_poll(struct napi_struct *napi, int budget) | |||
965 | greth = container_of(napi, struct greth_private, napi); | 978 | greth = container_of(napi, struct greth_private, napi); |
966 | 979 | ||
967 | restart_txrx_poll: | 980 | restart_txrx_poll: |
968 | if (netif_queue_stopped(greth->netdev)) { | ||
969 | if (greth->gbit_mac) | ||
970 | greth_clean_tx_gbit(greth->netdev); | ||
971 | else | ||
972 | greth_clean_tx(greth->netdev); | ||
973 | } | ||
974 | |||
975 | if (greth->gbit_mac) { | 981 | if (greth->gbit_mac) { |
982 | greth_clean_tx_gbit(greth->netdev); | ||
976 | work_done += greth_rx_gbit(greth->netdev, budget - work_done); | 983 | work_done += greth_rx_gbit(greth->netdev, budget - work_done); |
977 | } else { | 984 | } else { |
985 | if (netif_queue_stopped(greth->netdev)) | ||
986 | greth_clean_tx(greth->netdev); | ||
978 | work_done += greth_rx(greth->netdev, budget - work_done); | 987 | work_done += greth_rx(greth->netdev, budget - work_done); |
979 | } | 988 | } |
980 | 989 | ||
@@ -983,7 +992,8 @@ restart_txrx_poll: | |||
983 | spin_lock_irqsave(&greth->devlock, flags); | 992 | spin_lock_irqsave(&greth->devlock, flags); |
984 | 993 | ||
985 | ctrl = GRETH_REGLOAD(greth->regs->control); | 994 | ctrl = GRETH_REGLOAD(greth->regs->control); |
986 | if (netif_queue_stopped(greth->netdev)) { | 995 | if ((greth->gbit_mac && (greth->tx_last != greth->tx_next)) || |
996 | (!greth->gbit_mac && netif_queue_stopped(greth->netdev))) { | ||
987 | GRETH_REGSAVE(greth->regs->control, | 997 | GRETH_REGSAVE(greth->regs->control, |
988 | ctrl | GRETH_TXI | GRETH_RXI); | 998 | ctrl | GRETH_TXI | GRETH_RXI); |
989 | mask = GRETH_INT_RX | GRETH_INT_RE | | 999 | mask = GRETH_INT_RX | GRETH_INT_RE | |
diff --git a/drivers/net/ethernet/aeroflex/greth.h b/drivers/net/ethernet/aeroflex/greth.h index 232a622a85b7..ae16ac94daf8 100644 --- a/drivers/net/ethernet/aeroflex/greth.h +++ b/drivers/net/ethernet/aeroflex/greth.h | |||
@@ -107,7 +107,7 @@ struct greth_private { | |||
107 | 107 | ||
108 | u16 tx_next; | 108 | u16 tx_next; |
109 | u16 tx_last; | 109 | u16 tx_last; |
110 | u16 tx_free; | 110 | u16 tx_free; /* only used on 10/100Mbit */ |
111 | u16 rx_cur; | 111 | u16 rx_cur; |
112 | 112 | ||
113 | struct greth_regs *regs; /* Address of controller registers. */ | 113 | struct greth_regs *regs; /* Address of controller registers. */ |
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c b/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c index 346592dca33c..a3c11355a34d 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-debugfs.c | |||
@@ -272,8 +272,8 @@ static ssize_t xpcs_reg_value_read(struct file *filp, char __user *buffer, | |||
272 | struct xgbe_prv_data *pdata = filp->private_data; | 272 | struct xgbe_prv_data *pdata = filp->private_data; |
273 | unsigned int value; | 273 | unsigned int value; |
274 | 274 | ||
275 | value = pdata->hw_if.read_mmd_regs(pdata, pdata->debugfs_xpcs_mmd, | 275 | value = XMDIO_READ(pdata, pdata->debugfs_xpcs_mmd, |
276 | pdata->debugfs_xpcs_reg); | 276 | pdata->debugfs_xpcs_reg); |
277 | 277 | ||
278 | return xgbe_common_read(buffer, count, ppos, value); | 278 | return xgbe_common_read(buffer, count, ppos, value); |
279 | } | 279 | } |
@@ -290,8 +290,8 @@ static ssize_t xpcs_reg_value_write(struct file *filp, | |||
290 | if (len < 0) | 290 | if (len < 0) |
291 | return len; | 291 | return len; |
292 | 292 | ||
293 | pdata->hw_if.write_mmd_regs(pdata, pdata->debugfs_xpcs_mmd, | 293 | XMDIO_WRITE(pdata, pdata->debugfs_xpcs_mmd, pdata->debugfs_xpcs_reg, |
294 | pdata->debugfs_xpcs_reg, value); | 294 | value); |
295 | 295 | ||
296 | return len; | 296 | return len; |
297 | } | 297 | } |
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c index edaca4496264..ea273836d999 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c | |||
@@ -348,7 +348,7 @@ static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata) | |||
348 | 348 | ||
349 | /* Clear MAC flow control */ | 349 | /* Clear MAC flow control */ |
350 | max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; | 350 | max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; |
351 | q_count = min_t(unsigned int, pdata->rx_q_count, max_q_count); | 351 | q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); |
352 | reg = MAC_Q0TFCR; | 352 | reg = MAC_Q0TFCR; |
353 | for (i = 0; i < q_count; i++) { | 353 | for (i = 0; i < q_count; i++) { |
354 | reg_val = XGMAC_IOREAD(pdata, reg); | 354 | reg_val = XGMAC_IOREAD(pdata, reg); |
@@ -373,7 +373,7 @@ static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata) | |||
373 | 373 | ||
374 | /* Set MAC flow control */ | 374 | /* Set MAC flow control */ |
375 | max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; | 375 | max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; |
376 | q_count = min_t(unsigned int, pdata->rx_q_count, max_q_count); | 376 | q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); |
377 | reg = MAC_Q0TFCR; | 377 | reg = MAC_Q0TFCR; |
378 | for (i = 0; i < q_count; i++) { | 378 | for (i = 0; i < q_count; i++) { |
379 | reg_val = XGMAC_IOREAD(pdata, reg); | 379 | reg_val = XGMAC_IOREAD(pdata, reg); |
@@ -509,8 +509,8 @@ static void xgbe_enable_mac_interrupts(struct xgbe_prv_data *pdata) | |||
509 | XGMAC_IOWRITE(pdata, MAC_IER, mac_ier); | 509 | XGMAC_IOWRITE(pdata, MAC_IER, mac_ier); |
510 | 510 | ||
511 | /* Enable all counter interrupts */ | 511 | /* Enable all counter interrupts */ |
512 | XGMAC_IOWRITE_BITS(pdata, MMC_RIER, ALL_INTERRUPTS, 0xff); | 512 | XGMAC_IOWRITE_BITS(pdata, MMC_RIER, ALL_INTERRUPTS, 0xffffffff); |
513 | XGMAC_IOWRITE_BITS(pdata, MMC_TIER, ALL_INTERRUPTS, 0xff); | 513 | XGMAC_IOWRITE_BITS(pdata, MMC_TIER, ALL_INTERRUPTS, 0xffffffff); |
514 | } | 514 | } |
515 | 515 | ||
516 | static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata) | 516 | static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata) |
@@ -1633,6 +1633,9 @@ static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata) | |||
1633 | { | 1633 | { |
1634 | unsigned int i, count; | 1634 | unsigned int i, count; |
1635 | 1635 | ||
1636 | if (XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER) < 0x21) | ||
1637 | return 0; | ||
1638 | |||
1636 | for (i = 0; i < pdata->tx_q_count; i++) | 1639 | for (i = 0; i < pdata->tx_q_count; i++) |
1637 | XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, FTQ, 1); | 1640 | XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, FTQ, 1); |
1638 | 1641 | ||
@@ -1703,8 +1706,8 @@ static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata) | |||
1703 | XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP); | 1706 | XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP); |
1704 | } | 1707 | } |
1705 | 1708 | ||
1706 | static unsigned int xgbe_calculate_per_queue_fifo(unsigned long fifo_size, | 1709 | static unsigned int xgbe_calculate_per_queue_fifo(unsigned int fifo_size, |
1707 | unsigned char queue_count) | 1710 | unsigned int queue_count) |
1708 | { | 1711 | { |
1709 | unsigned int q_fifo_size = 0; | 1712 | unsigned int q_fifo_size = 0; |
1710 | enum xgbe_mtl_fifo_size p_fifo = XGMAC_MTL_FIFO_SIZE_256; | 1713 | enum xgbe_mtl_fifo_size p_fifo = XGMAC_MTL_FIFO_SIZE_256; |
@@ -1748,6 +1751,10 @@ static unsigned int xgbe_calculate_per_queue_fifo(unsigned long fifo_size, | |||
1748 | q_fifo_size = XGBE_FIFO_SIZE_KB(256); | 1751 | q_fifo_size = XGBE_FIFO_SIZE_KB(256); |
1749 | break; | 1752 | break; |
1750 | } | 1753 | } |
1754 | |||
1755 | /* The configured value is not the actual amount of fifo RAM */ | ||
1756 | q_fifo_size = min_t(unsigned int, XGBE_FIFO_MAX, q_fifo_size); | ||
1757 | |||
1751 | q_fifo_size = q_fifo_size / queue_count; | 1758 | q_fifo_size = q_fifo_size / queue_count; |
1752 | 1759 | ||
1753 | /* Set the queue fifo size programmable value */ | 1760 | /* Set the queue fifo size programmable value */ |
@@ -1947,6 +1954,32 @@ static void xgbe_config_vlan_support(struct xgbe_prv_data *pdata) | |||
1947 | xgbe_disable_rx_vlan_stripping(pdata); | 1954 | xgbe_disable_rx_vlan_stripping(pdata); |
1948 | } | 1955 | } |
1949 | 1956 | ||
1957 | static u64 xgbe_mmc_read(struct xgbe_prv_data *pdata, unsigned int reg_lo) | ||
1958 | { | ||
1959 | bool read_hi; | ||
1960 | u64 val; | ||
1961 | |||
1962 | switch (reg_lo) { | ||
1963 | /* These registers are always 64 bit */ | ||
1964 | case MMC_TXOCTETCOUNT_GB_LO: | ||
1965 | case MMC_TXOCTETCOUNT_G_LO: | ||
1966 | case MMC_RXOCTETCOUNT_GB_LO: | ||
1967 | case MMC_RXOCTETCOUNT_G_LO: | ||
1968 | read_hi = true; | ||
1969 | break; | ||
1970 | |||
1971 | default: | ||
1972 | read_hi = false; | ||
1973 | }; | ||
1974 | |||
1975 | val = XGMAC_IOREAD(pdata, reg_lo); | ||
1976 | |||
1977 | if (read_hi) | ||
1978 | val |= ((u64)XGMAC_IOREAD(pdata, reg_lo + 4) << 32); | ||
1979 | |||
1980 | return val; | ||
1981 | } | ||
1982 | |||
1950 | static void xgbe_tx_mmc_int(struct xgbe_prv_data *pdata) | 1983 | static void xgbe_tx_mmc_int(struct xgbe_prv_data *pdata) |
1951 | { | 1984 | { |
1952 | struct xgbe_mmc_stats *stats = &pdata->mmc_stats; | 1985 | struct xgbe_mmc_stats *stats = &pdata->mmc_stats; |
@@ -1954,75 +1987,75 @@ static void xgbe_tx_mmc_int(struct xgbe_prv_data *pdata) | |||
1954 | 1987 | ||
1955 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_GB)) | 1988 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_GB)) |
1956 | stats->txoctetcount_gb += | 1989 | stats->txoctetcount_gb += |
1957 | XGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_GB_LO); | 1990 | xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO); |
1958 | 1991 | ||
1959 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_GB)) | 1992 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_GB)) |
1960 | stats->txframecount_gb += | 1993 | stats->txframecount_gb += |
1961 | XGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_GB_LO); | 1994 | xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO); |
1962 | 1995 | ||
1963 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_G)) | 1996 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_G)) |
1964 | stats->txbroadcastframes_g += | 1997 | stats->txbroadcastframes_g += |
1965 | XGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_G_LO); | 1998 | xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO); |
1966 | 1999 | ||
1967 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_G)) | 2000 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_G)) |
1968 | stats->txmulticastframes_g += | 2001 | stats->txmulticastframes_g += |
1969 | XGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_G_LO); | 2002 | xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO); |
1970 | 2003 | ||
1971 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX64OCTETS_GB)) | 2004 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX64OCTETS_GB)) |
1972 | stats->tx64octets_gb += | 2005 | stats->tx64octets_gb += |
1973 | XGMAC_IOREAD(pdata, MMC_TX64OCTETS_GB_LO); | 2006 | xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO); |
1974 | 2007 | ||
1975 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX65TO127OCTETS_GB)) | 2008 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX65TO127OCTETS_GB)) |
1976 | stats->tx65to127octets_gb += | 2009 | stats->tx65to127octets_gb += |
1977 | XGMAC_IOREAD(pdata, MMC_TX65TO127OCTETS_GB_LO); | 2010 | xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO); |
1978 | 2011 | ||
1979 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX128TO255OCTETS_GB)) | 2012 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX128TO255OCTETS_GB)) |
1980 | stats->tx128to255octets_gb += | 2013 | stats->tx128to255octets_gb += |
1981 | XGMAC_IOREAD(pdata, MMC_TX128TO255OCTETS_GB_LO); | 2014 | xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO); |
1982 | 2015 | ||
1983 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX256TO511OCTETS_GB)) | 2016 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX256TO511OCTETS_GB)) |
1984 | stats->tx256to511octets_gb += | 2017 | stats->tx256to511octets_gb += |
1985 | XGMAC_IOREAD(pdata, MMC_TX256TO511OCTETS_GB_LO); | 2018 | xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO); |
1986 | 2019 | ||
1987 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX512TO1023OCTETS_GB)) | 2020 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX512TO1023OCTETS_GB)) |
1988 | stats->tx512to1023octets_gb += | 2021 | stats->tx512to1023octets_gb += |
1989 | XGMAC_IOREAD(pdata, MMC_TX512TO1023OCTETS_GB_LO); | 2022 | xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO); |
1990 | 2023 | ||
1991 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX1024TOMAXOCTETS_GB)) | 2024 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TX1024TOMAXOCTETS_GB)) |
1992 | stats->tx1024tomaxoctets_gb += | 2025 | stats->tx1024tomaxoctets_gb += |
1993 | XGMAC_IOREAD(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); | 2026 | xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); |
1994 | 2027 | ||
1995 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNICASTFRAMES_GB)) | 2028 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNICASTFRAMES_GB)) |
1996 | stats->txunicastframes_gb += | 2029 | stats->txunicastframes_gb += |
1997 | XGMAC_IOREAD(pdata, MMC_TXUNICASTFRAMES_GB_LO); | 2030 | xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO); |
1998 | 2031 | ||
1999 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_GB)) | 2032 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXMULTICASTFRAMES_GB)) |
2000 | stats->txmulticastframes_gb += | 2033 | stats->txmulticastframes_gb += |
2001 | XGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_GB_LO); | 2034 | xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO); |
2002 | 2035 | ||
2003 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_GB)) | 2036 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXBROADCASTFRAMES_GB)) |
2004 | stats->txbroadcastframes_g += | 2037 | stats->txbroadcastframes_g += |
2005 | XGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_GB_LO); | 2038 | xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO); |
2006 | 2039 | ||
2007 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNDERFLOWERROR)) | 2040 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXUNDERFLOWERROR)) |
2008 | stats->txunderflowerror += | 2041 | stats->txunderflowerror += |
2009 | XGMAC_IOREAD(pdata, MMC_TXUNDERFLOWERROR_LO); | 2042 | xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO); |
2010 | 2043 | ||
2011 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_G)) | 2044 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXOCTETCOUNT_G)) |
2012 | stats->txoctetcount_g += | 2045 | stats->txoctetcount_g += |
2013 | XGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_G_LO); | 2046 | xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO); |
2014 | 2047 | ||
2015 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_G)) | 2048 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXFRAMECOUNT_G)) |
2016 | stats->txframecount_g += | 2049 | stats->txframecount_g += |
2017 | XGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_G_LO); | 2050 | xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO); |
2018 | 2051 | ||
2019 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXPAUSEFRAMES)) | 2052 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXPAUSEFRAMES)) |
2020 | stats->txpauseframes += | 2053 | stats->txpauseframes += |
2021 | XGMAC_IOREAD(pdata, MMC_TXPAUSEFRAMES_LO); | 2054 | xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO); |
2022 | 2055 | ||
2023 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXVLANFRAMES_G)) | 2056 | if (XGMAC_GET_BITS(mmc_isr, MMC_TISR, TXVLANFRAMES_G)) |
2024 | stats->txvlanframes_g += | 2057 | stats->txvlanframes_g += |
2025 | XGMAC_IOREAD(pdata, MMC_TXVLANFRAMES_G_LO); | 2058 | xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO); |
2026 | } | 2059 | } |
2027 | 2060 | ||
2028 | static void xgbe_rx_mmc_int(struct xgbe_prv_data *pdata) | 2061 | static void xgbe_rx_mmc_int(struct xgbe_prv_data *pdata) |
@@ -2032,95 +2065,95 @@ static void xgbe_rx_mmc_int(struct xgbe_prv_data *pdata) | |||
2032 | 2065 | ||
2033 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFRAMECOUNT_GB)) | 2066 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFRAMECOUNT_GB)) |
2034 | stats->rxframecount_gb += | 2067 | stats->rxframecount_gb += |
2035 | XGMAC_IOREAD(pdata, MMC_RXFRAMECOUNT_GB_LO); | 2068 | xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO); |
2036 | 2069 | ||
2037 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_GB)) | 2070 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_GB)) |
2038 | stats->rxoctetcount_gb += | 2071 | stats->rxoctetcount_gb += |
2039 | XGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_GB_LO); | 2072 | xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO); |
2040 | 2073 | ||
2041 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_G)) | 2074 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOCTETCOUNT_G)) |
2042 | stats->rxoctetcount_g += | 2075 | stats->rxoctetcount_g += |
2043 | XGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_G_LO); | 2076 | xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO); |
2044 | 2077 | ||
2045 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXBROADCASTFRAMES_G)) | 2078 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXBROADCASTFRAMES_G)) |
2046 | stats->rxbroadcastframes_g += | 2079 | stats->rxbroadcastframes_g += |
2047 | XGMAC_IOREAD(pdata, MMC_RXBROADCASTFRAMES_G_LO); | 2080 | xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO); |
2048 | 2081 | ||
2049 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXMULTICASTFRAMES_G)) | 2082 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXMULTICASTFRAMES_G)) |
2050 | stats->rxmulticastframes_g += | 2083 | stats->rxmulticastframes_g += |
2051 | XGMAC_IOREAD(pdata, MMC_RXMULTICASTFRAMES_G_LO); | 2084 | xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO); |
2052 | 2085 | ||
2053 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXCRCERROR)) | 2086 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXCRCERROR)) |
2054 | stats->rxcrcerror += | 2087 | stats->rxcrcerror += |
2055 | XGMAC_IOREAD(pdata, MMC_RXCRCERROR_LO); | 2088 | xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO); |
2056 | 2089 | ||
2057 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXRUNTERROR)) | 2090 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXRUNTERROR)) |
2058 | stats->rxrunterror += | 2091 | stats->rxrunterror += |
2059 | XGMAC_IOREAD(pdata, MMC_RXRUNTERROR); | 2092 | xgbe_mmc_read(pdata, MMC_RXRUNTERROR); |
2060 | 2093 | ||
2061 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXJABBERERROR)) | 2094 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXJABBERERROR)) |
2062 | stats->rxjabbererror += | 2095 | stats->rxjabbererror += |
2063 | XGMAC_IOREAD(pdata, MMC_RXJABBERERROR); | 2096 | xgbe_mmc_read(pdata, MMC_RXJABBERERROR); |
2064 | 2097 | ||
2065 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNDERSIZE_G)) | 2098 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNDERSIZE_G)) |
2066 | stats->rxundersize_g += | 2099 | stats->rxundersize_g += |
2067 | XGMAC_IOREAD(pdata, MMC_RXUNDERSIZE_G); | 2100 | xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G); |
2068 | 2101 | ||
2069 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOVERSIZE_G)) | 2102 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOVERSIZE_G)) |
2070 | stats->rxoversize_g += | 2103 | stats->rxoversize_g += |
2071 | XGMAC_IOREAD(pdata, MMC_RXOVERSIZE_G); | 2104 | xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G); |
2072 | 2105 | ||
2073 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX64OCTETS_GB)) | 2106 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX64OCTETS_GB)) |
2074 | stats->rx64octets_gb += | 2107 | stats->rx64octets_gb += |
2075 | XGMAC_IOREAD(pdata, MMC_RX64OCTETS_GB_LO); | 2108 | xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO); |
2076 | 2109 | ||
2077 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX65TO127OCTETS_GB)) | 2110 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX65TO127OCTETS_GB)) |
2078 | stats->rx65to127octets_gb += | 2111 | stats->rx65to127octets_gb += |
2079 | XGMAC_IOREAD(pdata, MMC_RX65TO127OCTETS_GB_LO); | 2112 | xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO); |
2080 | 2113 | ||
2081 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX128TO255OCTETS_GB)) | 2114 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX128TO255OCTETS_GB)) |
2082 | stats->rx128to255octets_gb += | 2115 | stats->rx128to255octets_gb += |
2083 | XGMAC_IOREAD(pdata, MMC_RX128TO255OCTETS_GB_LO); | 2116 | xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO); |
2084 | 2117 | ||
2085 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX256TO511OCTETS_GB)) | 2118 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX256TO511OCTETS_GB)) |
2086 | stats->rx256to511octets_gb += | 2119 | stats->rx256to511octets_gb += |
2087 | XGMAC_IOREAD(pdata, MMC_RX256TO511OCTETS_GB_LO); | 2120 | xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO); |
2088 | 2121 | ||
2089 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX512TO1023OCTETS_GB)) | 2122 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX512TO1023OCTETS_GB)) |
2090 | stats->rx512to1023octets_gb += | 2123 | stats->rx512to1023octets_gb += |
2091 | XGMAC_IOREAD(pdata, MMC_RX512TO1023OCTETS_GB_LO); | 2124 | xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO); |
2092 | 2125 | ||
2093 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX1024TOMAXOCTETS_GB)) | 2126 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RX1024TOMAXOCTETS_GB)) |
2094 | stats->rx1024tomaxoctets_gb += | 2127 | stats->rx1024tomaxoctets_gb += |
2095 | XGMAC_IOREAD(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); | 2128 | xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); |
2096 | 2129 | ||
2097 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNICASTFRAMES_G)) | 2130 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXUNICASTFRAMES_G)) |
2098 | stats->rxunicastframes_g += | 2131 | stats->rxunicastframes_g += |
2099 | XGMAC_IOREAD(pdata, MMC_RXUNICASTFRAMES_G_LO); | 2132 | xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO); |
2100 | 2133 | ||
2101 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXLENGTHERROR)) | 2134 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXLENGTHERROR)) |
2102 | stats->rxlengtherror += | 2135 | stats->rxlengtherror += |
2103 | XGMAC_IOREAD(pdata, MMC_RXLENGTHERROR_LO); | 2136 | xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO); |
2104 | 2137 | ||
2105 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOUTOFRANGETYPE)) | 2138 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXOUTOFRANGETYPE)) |
2106 | stats->rxoutofrangetype += | 2139 | stats->rxoutofrangetype += |
2107 | XGMAC_IOREAD(pdata, MMC_RXOUTOFRANGETYPE_LO); | 2140 | xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO); |
2108 | 2141 | ||
2109 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXPAUSEFRAMES)) | 2142 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXPAUSEFRAMES)) |
2110 | stats->rxpauseframes += | 2143 | stats->rxpauseframes += |
2111 | XGMAC_IOREAD(pdata, MMC_RXPAUSEFRAMES_LO); | 2144 | xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO); |
2112 | 2145 | ||
2113 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFIFOOVERFLOW)) | 2146 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXFIFOOVERFLOW)) |
2114 | stats->rxfifooverflow += | 2147 | stats->rxfifooverflow += |
2115 | XGMAC_IOREAD(pdata, MMC_RXFIFOOVERFLOW_LO); | 2148 | xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO); |
2116 | 2149 | ||
2117 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXVLANFRAMES_GB)) | 2150 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXVLANFRAMES_GB)) |
2118 | stats->rxvlanframes_gb += | 2151 | stats->rxvlanframes_gb += |
2119 | XGMAC_IOREAD(pdata, MMC_RXVLANFRAMES_GB_LO); | 2152 | xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO); |
2120 | 2153 | ||
2121 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXWATCHDOGERROR)) | 2154 | if (XGMAC_GET_BITS(mmc_isr, MMC_RISR, RXWATCHDOGERROR)) |
2122 | stats->rxwatchdogerror += | 2155 | stats->rxwatchdogerror += |
2123 | XGMAC_IOREAD(pdata, MMC_RXWATCHDOGERROR); | 2156 | xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR); |
2124 | } | 2157 | } |
2125 | 2158 | ||
2126 | static void xgbe_read_mmc_stats(struct xgbe_prv_data *pdata) | 2159 | static void xgbe_read_mmc_stats(struct xgbe_prv_data *pdata) |
@@ -2131,127 +2164,127 @@ static void xgbe_read_mmc_stats(struct xgbe_prv_data *pdata) | |||
2131 | XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1); | 2164 | XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1); |
2132 | 2165 | ||
2133 | stats->txoctetcount_gb += | 2166 | stats->txoctetcount_gb += |
2134 | XGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_GB_LO); | 2167 | xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO); |
2135 | 2168 | ||
2136 | stats->txframecount_gb += | 2169 | stats->txframecount_gb += |
2137 | XGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_GB_LO); | 2170 | xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO); |
2138 | 2171 | ||
2139 | stats->txbroadcastframes_g += | 2172 | stats->txbroadcastframes_g += |
2140 | XGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_G_LO); | 2173 | xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO); |
2141 | 2174 | ||
2142 | stats->txmulticastframes_g += | 2175 | stats->txmulticastframes_g += |
2143 | XGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_G_LO); | 2176 | xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO); |
2144 | 2177 | ||
2145 | stats->tx64octets_gb += | 2178 | stats->tx64octets_gb += |
2146 | XGMAC_IOREAD(pdata, MMC_TX64OCTETS_GB_LO); | 2179 | xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO); |
2147 | 2180 | ||
2148 | stats->tx65to127octets_gb += | 2181 | stats->tx65to127octets_gb += |
2149 | XGMAC_IOREAD(pdata, MMC_TX65TO127OCTETS_GB_LO); | 2182 | xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO); |
2150 | 2183 | ||
2151 | stats->tx128to255octets_gb += | 2184 | stats->tx128to255octets_gb += |
2152 | XGMAC_IOREAD(pdata, MMC_TX128TO255OCTETS_GB_LO); | 2185 | xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO); |
2153 | 2186 | ||
2154 | stats->tx256to511octets_gb += | 2187 | stats->tx256to511octets_gb += |
2155 | XGMAC_IOREAD(pdata, MMC_TX256TO511OCTETS_GB_LO); | 2188 | xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO); |
2156 | 2189 | ||
2157 | stats->tx512to1023octets_gb += | 2190 | stats->tx512to1023octets_gb += |
2158 | XGMAC_IOREAD(pdata, MMC_TX512TO1023OCTETS_GB_LO); | 2191 | xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO); |
2159 | 2192 | ||
2160 | stats->tx1024tomaxoctets_gb += | 2193 | stats->tx1024tomaxoctets_gb += |
2161 | XGMAC_IOREAD(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); | 2194 | xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); |
2162 | 2195 | ||
2163 | stats->txunicastframes_gb += | 2196 | stats->txunicastframes_gb += |
2164 | XGMAC_IOREAD(pdata, MMC_TXUNICASTFRAMES_GB_LO); | 2197 | xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO); |
2165 | 2198 | ||
2166 | stats->txmulticastframes_gb += | 2199 | stats->txmulticastframes_gb += |
2167 | XGMAC_IOREAD(pdata, MMC_TXMULTICASTFRAMES_GB_LO); | 2200 | xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO); |
2168 | 2201 | ||
2169 | stats->txbroadcastframes_g += | 2202 | stats->txbroadcastframes_g += |
2170 | XGMAC_IOREAD(pdata, MMC_TXBROADCASTFRAMES_GB_LO); | 2203 | xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO); |
2171 | 2204 | ||
2172 | stats->txunderflowerror += | 2205 | stats->txunderflowerror += |
2173 | XGMAC_IOREAD(pdata, MMC_TXUNDERFLOWERROR_LO); | 2206 | xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO); |
2174 | 2207 | ||
2175 | stats->txoctetcount_g += | 2208 | stats->txoctetcount_g += |
2176 | XGMAC_IOREAD(pdata, MMC_TXOCTETCOUNT_G_LO); | 2209 | xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO); |
2177 | 2210 | ||
2178 | stats->txframecount_g += | 2211 | stats->txframecount_g += |
2179 | XGMAC_IOREAD(pdata, MMC_TXFRAMECOUNT_G_LO); | 2212 | xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO); |
2180 | 2213 | ||
2181 | stats->txpauseframes += | 2214 | stats->txpauseframes += |
2182 | XGMAC_IOREAD(pdata, MMC_TXPAUSEFRAMES_LO); | 2215 | xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO); |
2183 | 2216 | ||
2184 | stats->txvlanframes_g += | 2217 | stats->txvlanframes_g += |
2185 | XGMAC_IOREAD(pdata, MMC_TXVLANFRAMES_G_LO); | 2218 | xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO); |
2186 | 2219 | ||
2187 | stats->rxframecount_gb += | 2220 | stats->rxframecount_gb += |
2188 | XGMAC_IOREAD(pdata, MMC_RXFRAMECOUNT_GB_LO); | 2221 | xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO); |
2189 | 2222 | ||
2190 | stats->rxoctetcount_gb += | 2223 | stats->rxoctetcount_gb += |
2191 | XGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_GB_LO); | 2224 | xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO); |
2192 | 2225 | ||
2193 | stats->rxoctetcount_g += | 2226 | stats->rxoctetcount_g += |
2194 | XGMAC_IOREAD(pdata, MMC_RXOCTETCOUNT_G_LO); | 2227 | xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO); |
2195 | 2228 | ||
2196 | stats->rxbroadcastframes_g += | 2229 | stats->rxbroadcastframes_g += |
2197 | XGMAC_IOREAD(pdata, MMC_RXBROADCASTFRAMES_G_LO); | 2230 | xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO); |
2198 | 2231 | ||
2199 | stats->rxmulticastframes_g += | 2232 | stats->rxmulticastframes_g += |
2200 | XGMAC_IOREAD(pdata, MMC_RXMULTICASTFRAMES_G_LO); | 2233 | xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO); |
2201 | 2234 | ||
2202 | stats->rxcrcerror += | 2235 | stats->rxcrcerror += |
2203 | XGMAC_IOREAD(pdata, MMC_RXCRCERROR_LO); | 2236 | xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO); |
2204 | 2237 | ||
2205 | stats->rxrunterror += | 2238 | stats->rxrunterror += |
2206 | XGMAC_IOREAD(pdata, MMC_RXRUNTERROR); | 2239 | xgbe_mmc_read(pdata, MMC_RXRUNTERROR); |
2207 | 2240 | ||
2208 | stats->rxjabbererror += | 2241 | stats->rxjabbererror += |
2209 | XGMAC_IOREAD(pdata, MMC_RXJABBERERROR); | 2242 | xgbe_mmc_read(pdata, MMC_RXJABBERERROR); |
2210 | 2243 | ||
2211 | stats->rxundersize_g += | 2244 | stats->rxundersize_g += |
2212 | XGMAC_IOREAD(pdata, MMC_RXUNDERSIZE_G); | 2245 | xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G); |
2213 | 2246 | ||
2214 | stats->rxoversize_g += | 2247 | stats->rxoversize_g += |
2215 | XGMAC_IOREAD(pdata, MMC_RXOVERSIZE_G); | 2248 | xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G); |
2216 | 2249 | ||
2217 | stats->rx64octets_gb += | 2250 | stats->rx64octets_gb += |
2218 | XGMAC_IOREAD(pdata, MMC_RX64OCTETS_GB_LO); | 2251 | xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO); |
2219 | 2252 | ||
2220 | stats->rx65to127octets_gb += | 2253 | stats->rx65to127octets_gb += |
2221 | XGMAC_IOREAD(pdata, MMC_RX65TO127OCTETS_GB_LO); | 2254 | xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO); |
2222 | 2255 | ||
2223 | stats->rx128to255octets_gb += | 2256 | stats->rx128to255octets_gb += |
2224 | XGMAC_IOREAD(pdata, MMC_RX128TO255OCTETS_GB_LO); | 2257 | xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO); |
2225 | 2258 | ||
2226 | stats->rx256to511octets_gb += | 2259 | stats->rx256to511octets_gb += |
2227 | XGMAC_IOREAD(pdata, MMC_RX256TO511OCTETS_GB_LO); | 2260 | xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO); |
2228 | 2261 | ||
2229 | stats->rx512to1023octets_gb += | 2262 | stats->rx512to1023octets_gb += |
2230 | XGMAC_IOREAD(pdata, MMC_RX512TO1023OCTETS_GB_LO); | 2263 | xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO); |
2231 | 2264 | ||
2232 | stats->rx1024tomaxoctets_gb += | 2265 | stats->rx1024tomaxoctets_gb += |
2233 | XGMAC_IOREAD(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); | 2266 | xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); |
2234 | 2267 | ||
2235 | stats->rxunicastframes_g += | 2268 | stats->rxunicastframes_g += |
2236 | XGMAC_IOREAD(pdata, MMC_RXUNICASTFRAMES_G_LO); | 2269 | xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO); |
2237 | 2270 | ||
2238 | stats->rxlengtherror += | 2271 | stats->rxlengtherror += |
2239 | XGMAC_IOREAD(pdata, MMC_RXLENGTHERROR_LO); | 2272 | xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO); |
2240 | 2273 | ||
2241 | stats->rxoutofrangetype += | 2274 | stats->rxoutofrangetype += |
2242 | XGMAC_IOREAD(pdata, MMC_RXOUTOFRANGETYPE_LO); | 2275 | xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO); |
2243 | 2276 | ||
2244 | stats->rxpauseframes += | 2277 | stats->rxpauseframes += |
2245 | XGMAC_IOREAD(pdata, MMC_RXPAUSEFRAMES_LO); | 2278 | xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO); |
2246 | 2279 | ||
2247 | stats->rxfifooverflow += | 2280 | stats->rxfifooverflow += |
2248 | XGMAC_IOREAD(pdata, MMC_RXFIFOOVERFLOW_LO); | 2281 | xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO); |
2249 | 2282 | ||
2250 | stats->rxvlanframes_gb += | 2283 | stats->rxvlanframes_gb += |
2251 | XGMAC_IOREAD(pdata, MMC_RXVLANFRAMES_GB_LO); | 2284 | xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO); |
2252 | 2285 | ||
2253 | stats->rxwatchdogerror += | 2286 | stats->rxwatchdogerror += |
2254 | XGMAC_IOREAD(pdata, MMC_RXWATCHDOGERROR); | 2287 | xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR); |
2255 | 2288 | ||
2256 | /* Un-freeze counters */ | 2289 | /* Un-freeze counters */ |
2257 | XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0); | 2290 | XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0); |
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c index dc84f7193c2d..b26d75856553 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c | |||
@@ -361,6 +361,8 @@ void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata) | |||
361 | 361 | ||
362 | memset(hw_feat, 0, sizeof(*hw_feat)); | 362 | memset(hw_feat, 0, sizeof(*hw_feat)); |
363 | 363 | ||
364 | hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR); | ||
365 | |||
364 | /* Hardware feature register 0 */ | 366 | /* Hardware feature register 0 */ |
365 | hw_feat->gmii = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL); | 367 | hw_feat->gmii = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL); |
366 | hw_feat->vlhash = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH); | 368 | hw_feat->vlhash = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH); |
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c index a076aca138a1..46f613028e9c 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c | |||
@@ -361,15 +361,16 @@ static void xgbe_get_drvinfo(struct net_device *netdev, | |||
361 | struct ethtool_drvinfo *drvinfo) | 361 | struct ethtool_drvinfo *drvinfo) |
362 | { | 362 | { |
363 | struct xgbe_prv_data *pdata = netdev_priv(netdev); | 363 | struct xgbe_prv_data *pdata = netdev_priv(netdev); |
364 | struct xgbe_hw_features *hw_feat = &pdata->hw_feat; | ||
364 | 365 | ||
365 | strlcpy(drvinfo->driver, XGBE_DRV_NAME, sizeof(drvinfo->driver)); | 366 | strlcpy(drvinfo->driver, XGBE_DRV_NAME, sizeof(drvinfo->driver)); |
366 | strlcpy(drvinfo->version, XGBE_DRV_VERSION, sizeof(drvinfo->version)); | 367 | strlcpy(drvinfo->version, XGBE_DRV_VERSION, sizeof(drvinfo->version)); |
367 | strlcpy(drvinfo->bus_info, dev_name(pdata->dev), | 368 | strlcpy(drvinfo->bus_info, dev_name(pdata->dev), |
368 | sizeof(drvinfo->bus_info)); | 369 | sizeof(drvinfo->bus_info)); |
369 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "%d.%d.%d", | 370 | snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), "%d.%d.%d", |
370 | XGMAC_IOREAD_BITS(pdata, MAC_VR, USERVER), | 371 | XGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER), |
371 | XGMAC_IOREAD_BITS(pdata, MAC_VR, DEVID), | 372 | XGMAC_GET_BITS(hw_feat->version, MAC_VR, DEVID), |
372 | XGMAC_IOREAD_BITS(pdata, MAC_VR, SNPSVER)); | 373 | XGMAC_GET_BITS(hw_feat->version, MAC_VR, SNPSVER)); |
373 | drvinfo->n_stats = XGBE_STATS_COUNT; | 374 | drvinfo->n_stats = XGBE_STATS_COUNT; |
374 | } | 375 | } |
375 | 376 | ||
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-main.c b/drivers/net/ethernet/amd/xgbe/xgbe-main.c index 8aa6a9353f7b..bdf9cfa70e88 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe-main.c +++ b/drivers/net/ethernet/amd/xgbe/xgbe-main.c | |||
@@ -172,7 +172,7 @@ static struct xgbe_channel *xgbe_alloc_rings(struct xgbe_prv_data *pdata) | |||
172 | } | 172 | } |
173 | 173 | ||
174 | if (i < pdata->rx_ring_count) { | 174 | if (i < pdata->rx_ring_count) { |
175 | spin_lock_init(&tx_ring->lock); | 175 | spin_lock_init(&rx_ring->lock); |
176 | channel->rx_ring = rx_ring++; | 176 | channel->rx_ring = rx_ring++; |
177 | } | 177 | } |
178 | 178 | ||
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h index 07bf70a82908..e9fe6e6ddcc3 100644 --- a/drivers/net/ethernet/amd/xgbe/xgbe.h +++ b/drivers/net/ethernet/amd/xgbe/xgbe.h | |||
@@ -183,6 +183,7 @@ | |||
183 | #define XGMAC_DRIVER_CONTEXT 1 | 183 | #define XGMAC_DRIVER_CONTEXT 1 |
184 | #define XGMAC_IOCTL_CONTEXT 2 | 184 | #define XGMAC_IOCTL_CONTEXT 2 |
185 | 185 | ||
186 | #define XGBE_FIFO_MAX 81920 | ||
186 | #define XGBE_FIFO_SIZE_B(x) (x) | 187 | #define XGBE_FIFO_SIZE_B(x) (x) |
187 | #define XGBE_FIFO_SIZE_KB(x) (x * 1024) | 188 | #define XGBE_FIFO_SIZE_KB(x) (x * 1024) |
188 | 189 | ||
@@ -526,6 +527,9 @@ struct xgbe_desc_if { | |||
526 | * or configurations are present in the device. | 527 | * or configurations are present in the device. |
527 | */ | 528 | */ |
528 | struct xgbe_hw_features { | 529 | struct xgbe_hw_features { |
530 | /* HW Version */ | ||
531 | unsigned int version; | ||
532 | |||
529 | /* HW Feature Register0 */ | 533 | /* HW Feature Register0 */ |
530 | unsigned int gmii; /* 1000 Mbps support */ | 534 | unsigned int gmii; /* 1000 Mbps support */ |
531 | unsigned int vlhash; /* VLAN Hash Filter */ | 535 | unsigned int vlhash; /* VLAN Hash Filter */ |
diff --git a/drivers/net/ethernet/apm/xgene/Kconfig b/drivers/net/ethernet/apm/xgene/Kconfig index 616dff6d3f5f..f4054d242f3c 100644 --- a/drivers/net/ethernet/apm/xgene/Kconfig +++ b/drivers/net/ethernet/apm/xgene/Kconfig | |||
@@ -1,5 +1,6 @@ | |||
1 | config NET_XGENE | 1 | config NET_XGENE |
2 | tristate "APM X-Gene SoC Ethernet Driver" | 2 | tristate "APM X-Gene SoC Ethernet Driver" |
3 | depends on HAS_DMA | ||
3 | select PHYLIB | 4 | select PHYLIB |
4 | help | 5 | help |
5 | This is the Ethernet driver for the on-chip ethernet interface on the | 6 | This is the Ethernet driver for the on-chip ethernet interface on the |
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c index e1a8f4e19983..e4222af2baa6 100644 --- a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c +++ b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c | |||
@@ -563,15 +563,21 @@ static void xgene_enet_free_desc_rings(struct xgene_enet_pdata *pdata) | |||
563 | struct xgene_enet_desc_ring *ring; | 563 | struct xgene_enet_desc_ring *ring; |
564 | 564 | ||
565 | ring = pdata->tx_ring; | 565 | ring = pdata->tx_ring; |
566 | if (ring && ring->cp_ring && ring->cp_ring->cp_skb) | 566 | if (ring) { |
567 | devm_kfree(dev, ring->cp_ring->cp_skb); | 567 | if (ring->cp_ring && ring->cp_ring->cp_skb) |
568 | xgene_enet_free_desc_ring(ring); | 568 | devm_kfree(dev, ring->cp_ring->cp_skb); |
569 | xgene_enet_free_desc_ring(ring); | ||
570 | } | ||
569 | 571 | ||
570 | ring = pdata->rx_ring; | 572 | ring = pdata->rx_ring; |
571 | if (ring && ring->buf_pool && ring->buf_pool->rx_skb) | 573 | if (ring) { |
572 | devm_kfree(dev, ring->buf_pool->rx_skb); | 574 | if (ring->buf_pool) { |
573 | xgene_enet_free_desc_ring(ring->buf_pool); | 575 | if (ring->buf_pool->rx_skb) |
574 | xgene_enet_free_desc_ring(ring); | 576 | devm_kfree(dev, ring->buf_pool->rx_skb); |
577 | xgene_enet_free_desc_ring(ring->buf_pool); | ||
578 | } | ||
579 | xgene_enet_free_desc_ring(ring); | ||
580 | } | ||
575 | } | 581 | } |
576 | 582 | ||
577 | static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring( | 583 | static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring( |
diff --git a/drivers/net/ethernet/broadcom/Kconfig b/drivers/net/ethernet/broadcom/Kconfig index 7dcfb19a31c8..d8d07a818b89 100644 --- a/drivers/net/ethernet/broadcom/Kconfig +++ b/drivers/net/ethernet/broadcom/Kconfig | |||
@@ -84,7 +84,7 @@ config BNX2 | |||
84 | 84 | ||
85 | config CNIC | 85 | config CNIC |
86 | tristate "QLogic CNIC support" | 86 | tristate "QLogic CNIC support" |
87 | depends on PCI | 87 | depends on PCI && (IPV6 || IPV6=n) |
88 | select BNX2 | 88 | select BNX2 |
89 | select UIO | 89 | select UIO |
90 | ---help--- | 90 | ---help--- |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c index 4e6c82e20224..4ccc806b1150 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c | |||
@@ -483,11 +483,7 @@ static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue, | |||
483 | 483 | ||
484 | #ifdef BNX2X_STOP_ON_ERROR | 484 | #ifdef BNX2X_STOP_ON_ERROR |
485 | fp->tpa_queue_used |= (1 << queue); | 485 | fp->tpa_queue_used |= (1 << queue); |
486 | #ifdef _ASM_GENERIC_INT_L64_H | ||
487 | DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n", | ||
488 | #else | ||
489 | DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", | 486 | DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n", |
490 | #endif | ||
491 | fp->tpa_queue_used); | 487 | fp->tpa_queue_used); |
492 | #endif | 488 | #endif |
493 | } | 489 | } |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h index 5ba8af50c84f..c4daa068f1db 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_hsi.h | |||
@@ -2233,7 +2233,12 @@ struct shmem2_region { | |||
2233 | u32 reserved3; /* Offset 0x14C */ | 2233 | u32 reserved3; /* Offset 0x14C */ |
2234 | u32 reserved4; /* Offset 0x150 */ | 2234 | u32 reserved4; /* Offset 0x150 */ |
2235 | u32 link_attr_sync[PORT_MAX]; /* Offset 0x154 */ | 2235 | u32 link_attr_sync[PORT_MAX]; /* Offset 0x154 */ |
2236 | #define LINK_ATTR_SYNC_KR2_ENABLE (1<<0) | 2236 | #define LINK_ATTR_SYNC_KR2_ENABLE 0x00000001 |
2237 | #define LINK_SFP_EEPROM_COMP_CODE_MASK 0x0000ff00 | ||
2238 | #define LINK_SFP_EEPROM_COMP_CODE_SHIFT 8 | ||
2239 | #define LINK_SFP_EEPROM_COMP_CODE_SR 0x00001000 | ||
2240 | #define LINK_SFP_EEPROM_COMP_CODE_LR 0x00002000 | ||
2241 | #define LINK_SFP_EEPROM_COMP_CODE_LRM 0x00004000 | ||
2237 | 2242 | ||
2238 | u32 reserved5[2]; | 2243 | u32 reserved5[2]; |
2239 | u32 reserved6[PORT_MAX]; | 2244 | u32 reserved6[PORT_MAX]; |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index 53fb4fa61b40..549549eaf580 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | |||
@@ -154,15 +154,22 @@ typedef int (*read_sfp_module_eeprom_func_p)(struct bnx2x_phy *phy, | |||
154 | LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE) | 154 | LINK_STATUS_LINK_PARTNER_ASYMMETRIC_PAUSE) |
155 | 155 | ||
156 | #define SFP_EEPROM_CON_TYPE_ADDR 0x2 | 156 | #define SFP_EEPROM_CON_TYPE_ADDR 0x2 |
157 | #define SFP_EEPROM_CON_TYPE_VAL_UNKNOWN 0x0 | ||
157 | #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 | 158 | #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 |
158 | #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21 | 159 | #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21 |
159 | #define SFP_EEPROM_CON_TYPE_VAL_RJ45 0x22 | 160 | #define SFP_EEPROM_CON_TYPE_VAL_RJ45 0x22 |
160 | 161 | ||
161 | 162 | ||
162 | #define SFP_EEPROM_COMP_CODE_ADDR 0x3 | 163 | #define SFP_EEPROM_10G_COMP_CODE_ADDR 0x3 |
163 | #define SFP_EEPROM_COMP_CODE_SR_MASK (1<<4) | 164 | #define SFP_EEPROM_10G_COMP_CODE_SR_MASK (1<<4) |
164 | #define SFP_EEPROM_COMP_CODE_LR_MASK (1<<5) | 165 | #define SFP_EEPROM_10G_COMP_CODE_LR_MASK (1<<5) |
165 | #define SFP_EEPROM_COMP_CODE_LRM_MASK (1<<6) | 166 | #define SFP_EEPROM_10G_COMP_CODE_LRM_MASK (1<<6) |
167 | |||
168 | #define SFP_EEPROM_1G_COMP_CODE_ADDR 0x6 | ||
169 | #define SFP_EEPROM_1G_COMP_CODE_SX (1<<0) | ||
170 | #define SFP_EEPROM_1G_COMP_CODE_LX (1<<1) | ||
171 | #define SFP_EEPROM_1G_COMP_CODE_CX (1<<2) | ||
172 | #define SFP_EEPROM_1G_COMP_CODE_BASE_T (1<<3) | ||
166 | 173 | ||
167 | #define SFP_EEPROM_FC_TX_TECH_ADDR 0x8 | 174 | #define SFP_EEPROM_FC_TX_TECH_ADDR 0x8 |
168 | #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE 0x4 | 175 | #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE 0x4 |
@@ -3633,8 +3640,8 @@ static void bnx2x_warpcore_enable_AN_KR2(struct bnx2x_phy *phy, | |||
3633 | reg_set[i].val); | 3640 | reg_set[i].val); |
3634 | 3641 | ||
3635 | /* Start KR2 work-around timer which handles BCM8073 link-parner */ | 3642 | /* Start KR2 work-around timer which handles BCM8073 link-parner */ |
3636 | vars->link_attr_sync |= LINK_ATTR_SYNC_KR2_ENABLE; | 3643 | params->link_attr_sync |= LINK_ATTR_SYNC_KR2_ENABLE; |
3637 | bnx2x_update_link_attr(params, vars->link_attr_sync); | 3644 | bnx2x_update_link_attr(params, params->link_attr_sync); |
3638 | } | 3645 | } |
3639 | 3646 | ||
3640 | static void bnx2x_disable_kr2(struct link_params *params, | 3647 | static void bnx2x_disable_kr2(struct link_params *params, |
@@ -3666,8 +3673,8 @@ static void bnx2x_disable_kr2(struct link_params *params, | |||
3666 | for (i = 0; i < ARRAY_SIZE(reg_set); i++) | 3673 | for (i = 0; i < ARRAY_SIZE(reg_set); i++) |
3667 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, | 3674 | bnx2x_cl45_write(bp, phy, reg_set[i].devad, reg_set[i].reg, |
3668 | reg_set[i].val); | 3675 | reg_set[i].val); |
3669 | vars->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE; | 3676 | params->link_attr_sync &= ~LINK_ATTR_SYNC_KR2_ENABLE; |
3670 | bnx2x_update_link_attr(params, vars->link_attr_sync); | 3677 | bnx2x_update_link_attr(params, params->link_attr_sync); |
3671 | 3678 | ||
3672 | vars->check_kr2_recovery_cnt = CHECK_KR2_RECOVERY_CNT; | 3679 | vars->check_kr2_recovery_cnt = CHECK_KR2_RECOVERY_CNT; |
3673 | } | 3680 | } |
@@ -4810,7 +4817,7 @@ void bnx2x_link_status_update(struct link_params *params, | |||
4810 | ~FEATURE_CONFIG_PFC_ENABLED; | 4817 | ~FEATURE_CONFIG_PFC_ENABLED; |
4811 | 4818 | ||
4812 | if (SHMEM2_HAS(bp, link_attr_sync)) | 4819 | if (SHMEM2_HAS(bp, link_attr_sync)) |
4813 | vars->link_attr_sync = SHMEM2_RD(bp, | 4820 | params->link_attr_sync = SHMEM2_RD(bp, |
4814 | link_attr_sync[params->port]); | 4821 | link_attr_sync[params->port]); |
4815 | 4822 | ||
4816 | DP(NETIF_MSG_LINK, "link_status 0x%x phy_link_up %x int_mask 0x%x\n", | 4823 | DP(NETIF_MSG_LINK, "link_status 0x%x phy_link_up %x int_mask 0x%x\n", |
@@ -8057,21 +8064,24 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy, | |||
8057 | { | 8064 | { |
8058 | struct bnx2x *bp = params->bp; | 8065 | struct bnx2x *bp = params->bp; |
8059 | u32 sync_offset = 0, phy_idx, media_types; | 8066 | u32 sync_offset = 0, phy_idx, media_types; |
8060 | u8 gport, val[2], check_limiting_mode = 0; | 8067 | u8 val[SFP_EEPROM_FC_TX_TECH_ADDR + 1], check_limiting_mode = 0; |
8061 | *edc_mode = EDC_MODE_LIMITING; | 8068 | *edc_mode = EDC_MODE_LIMITING; |
8062 | phy->media_type = ETH_PHY_UNSPECIFIED; | 8069 | phy->media_type = ETH_PHY_UNSPECIFIED; |
8063 | /* First check for copper cable */ | 8070 | /* First check for copper cable */ |
8064 | if (bnx2x_read_sfp_module_eeprom(phy, | 8071 | if (bnx2x_read_sfp_module_eeprom(phy, |
8065 | params, | 8072 | params, |
8066 | I2C_DEV_ADDR_A0, | 8073 | I2C_DEV_ADDR_A0, |
8067 | SFP_EEPROM_CON_TYPE_ADDR, | 8074 | 0, |
8068 | 2, | 8075 | SFP_EEPROM_FC_TX_TECH_ADDR + 1, |
8069 | (u8 *)val) != 0) { | 8076 | (u8 *)val) != 0) { |
8070 | DP(NETIF_MSG_LINK, "Failed to read from SFP+ module EEPROM\n"); | 8077 | DP(NETIF_MSG_LINK, "Failed to read from SFP+ module EEPROM\n"); |
8071 | return -EINVAL; | 8078 | return -EINVAL; |
8072 | } | 8079 | } |
8073 | 8080 | params->link_attr_sync &= ~LINK_SFP_EEPROM_COMP_CODE_MASK; | |
8074 | switch (val[0]) { | 8081 | params->link_attr_sync |= val[SFP_EEPROM_10G_COMP_CODE_ADDR] << |
8082 | LINK_SFP_EEPROM_COMP_CODE_SHIFT; | ||
8083 | bnx2x_update_link_attr(params, params->link_attr_sync); | ||
8084 | switch (val[SFP_EEPROM_CON_TYPE_ADDR]) { | ||
8075 | case SFP_EEPROM_CON_TYPE_VAL_COPPER: | 8085 | case SFP_EEPROM_CON_TYPE_VAL_COPPER: |
8076 | { | 8086 | { |
8077 | u8 copper_module_type; | 8087 | u8 copper_module_type; |
@@ -8079,17 +8089,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy, | |||
8079 | /* Check if its active cable (includes SFP+ module) | 8089 | /* Check if its active cable (includes SFP+ module) |
8080 | * of passive cable | 8090 | * of passive cable |
8081 | */ | 8091 | */ |
8082 | if (bnx2x_read_sfp_module_eeprom(phy, | 8092 | copper_module_type = val[SFP_EEPROM_FC_TX_TECH_ADDR]; |
8083 | params, | ||
8084 | I2C_DEV_ADDR_A0, | ||
8085 | SFP_EEPROM_FC_TX_TECH_ADDR, | ||
8086 | 1, | ||
8087 | &copper_module_type) != 0) { | ||
8088 | DP(NETIF_MSG_LINK, | ||
8089 | "Failed to read copper-cable-type" | ||
8090 | " from SFP+ EEPROM\n"); | ||
8091 | return -EINVAL; | ||
8092 | } | ||
8093 | 8093 | ||
8094 | if (copper_module_type & | 8094 | if (copper_module_type & |
8095 | SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE) { | 8095 | SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE) { |
@@ -8115,16 +8115,18 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy, | |||
8115 | } | 8115 | } |
8116 | break; | 8116 | break; |
8117 | } | 8117 | } |
8118 | case SFP_EEPROM_CON_TYPE_VAL_UNKNOWN: | ||
8118 | case SFP_EEPROM_CON_TYPE_VAL_LC: | 8119 | case SFP_EEPROM_CON_TYPE_VAL_LC: |
8119 | case SFP_EEPROM_CON_TYPE_VAL_RJ45: | 8120 | case SFP_EEPROM_CON_TYPE_VAL_RJ45: |
8120 | check_limiting_mode = 1; | 8121 | check_limiting_mode = 1; |
8121 | if ((val[1] & (SFP_EEPROM_COMP_CODE_SR_MASK | | 8122 | if ((val[SFP_EEPROM_10G_COMP_CODE_ADDR] & |
8122 | SFP_EEPROM_COMP_CODE_LR_MASK | | 8123 | (SFP_EEPROM_10G_COMP_CODE_SR_MASK | |
8123 | SFP_EEPROM_COMP_CODE_LRM_MASK)) == 0) { | 8124 | SFP_EEPROM_10G_COMP_CODE_LR_MASK | |
8125 | SFP_EEPROM_10G_COMP_CODE_LRM_MASK)) == 0) { | ||
8124 | DP(NETIF_MSG_LINK, "1G SFP module detected\n"); | 8126 | DP(NETIF_MSG_LINK, "1G SFP module detected\n"); |
8125 | gport = params->port; | ||
8126 | phy->media_type = ETH_PHY_SFP_1G_FIBER; | 8127 | phy->media_type = ETH_PHY_SFP_1G_FIBER; |
8127 | if (phy->req_line_speed != SPEED_1000) { | 8128 | if (phy->req_line_speed != SPEED_1000) { |
8129 | u8 gport = params->port; | ||
8128 | phy->req_line_speed = SPEED_1000; | 8130 | phy->req_line_speed = SPEED_1000; |
8129 | if (!CHIP_IS_E1x(bp)) { | 8131 | if (!CHIP_IS_E1x(bp)) { |
8130 | gport = BP_PATH(bp) + | 8132 | gport = BP_PATH(bp) + |
@@ -8134,6 +8136,12 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy, | |||
8134 | "Warning: Link speed was forced to 1000Mbps. Current SFP module in port %d is not compliant with 10G Ethernet\n", | 8136 | "Warning: Link speed was forced to 1000Mbps. Current SFP module in port %d is not compliant with 10G Ethernet\n", |
8135 | gport); | 8137 | gport); |
8136 | } | 8138 | } |
8139 | if (val[SFP_EEPROM_1G_COMP_CODE_ADDR] & | ||
8140 | SFP_EEPROM_1G_COMP_CODE_BASE_T) { | ||
8141 | bnx2x_sfp_set_transmitter(params, phy, 0); | ||
8142 | msleep(40); | ||
8143 | bnx2x_sfp_set_transmitter(params, phy, 1); | ||
8144 | } | ||
8137 | } else { | 8145 | } else { |
8138 | int idx, cfg_idx = 0; | 8146 | int idx, cfg_idx = 0; |
8139 | DP(NETIF_MSG_LINK, "10G Optic module detected\n"); | 8147 | DP(NETIF_MSG_LINK, "10G Optic module detected\n"); |
@@ -8149,7 +8157,7 @@ static int bnx2x_get_edc_mode(struct bnx2x_phy *phy, | |||
8149 | break; | 8157 | break; |
8150 | default: | 8158 | default: |
8151 | DP(NETIF_MSG_LINK, "Unable to determine module type 0x%x !!!\n", | 8159 | DP(NETIF_MSG_LINK, "Unable to determine module type 0x%x !!!\n", |
8152 | val[0]); | 8160 | val[SFP_EEPROM_CON_TYPE_ADDR]); |
8153 | return -EINVAL; | 8161 | return -EINVAL; |
8154 | } | 8162 | } |
8155 | sync_offset = params->shmem_base + | 8163 | sync_offset = params->shmem_base + |
@@ -13507,7 +13515,7 @@ static void bnx2x_check_kr2_wa(struct link_params *params, | |||
13507 | 13515 | ||
13508 | sigdet = bnx2x_warpcore_get_sigdet(phy, params); | 13516 | sigdet = bnx2x_warpcore_get_sigdet(phy, params); |
13509 | if (!sigdet) { | 13517 | if (!sigdet) { |
13510 | if (!(vars->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { | 13518 | if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { |
13511 | bnx2x_kr2_recovery(params, vars, phy); | 13519 | bnx2x_kr2_recovery(params, vars, phy); |
13512 | DP(NETIF_MSG_LINK, "No sigdet\n"); | 13520 | DP(NETIF_MSG_LINK, "No sigdet\n"); |
13513 | } | 13521 | } |
@@ -13525,7 +13533,7 @@ static void bnx2x_check_kr2_wa(struct link_params *params, | |||
13525 | 13533 | ||
13526 | /* CL73 has not begun yet */ | 13534 | /* CL73 has not begun yet */ |
13527 | if (base_page == 0) { | 13535 | if (base_page == 0) { |
13528 | if (!(vars->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { | 13536 | if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { |
13529 | bnx2x_kr2_recovery(params, vars, phy); | 13537 | bnx2x_kr2_recovery(params, vars, phy); |
13530 | DP(NETIF_MSG_LINK, "No BP\n"); | 13538 | DP(NETIF_MSG_LINK, "No BP\n"); |
13531 | } | 13539 | } |
@@ -13541,7 +13549,7 @@ static void bnx2x_check_kr2_wa(struct link_params *params, | |||
13541 | ((next_page & 0xe0) == 0x20)))); | 13549 | ((next_page & 0xe0) == 0x20)))); |
13542 | 13550 | ||
13543 | /* In case KR2 is already disabled, check if we need to re-enable it */ | 13551 | /* In case KR2 is already disabled, check if we need to re-enable it */ |
13544 | if (!(vars->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { | 13552 | if (!(params->link_attr_sync & LINK_ATTR_SYNC_KR2_ENABLE)) { |
13545 | if (!not_kr2_device) { | 13553 | if (!not_kr2_device) { |
13546 | DP(NETIF_MSG_LINK, "BP=0x%x, NP=0x%x\n", base_page, | 13554 | DP(NETIF_MSG_LINK, "BP=0x%x, NP=0x%x\n", base_page, |
13547 | next_page); | 13555 | next_page); |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h index 389f5f8cb0a3..d9cce4c3899b 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h | |||
@@ -323,6 +323,9 @@ struct link_params { | |||
323 | #define LINK_FLAGS_INT_DISABLED (1<<0) | 323 | #define LINK_FLAGS_INT_DISABLED (1<<0) |
324 | #define PHY_INITIALIZED (1<<1) | 324 | #define PHY_INITIALIZED (1<<1) |
325 | u32 lfa_base; | 325 | u32 lfa_base; |
326 | |||
327 | /* The same definitions as the shmem2 parameter */ | ||
328 | u32 link_attr_sync; | ||
326 | }; | 329 | }; |
327 | 330 | ||
328 | /* Output parameters */ | 331 | /* Output parameters */ |
@@ -364,8 +367,6 @@ struct link_vars { | |||
364 | u8 rx_tx_asic_rst; | 367 | u8 rx_tx_asic_rst; |
365 | u8 turn_to_run_wc_rt; | 368 | u8 turn_to_run_wc_rt; |
366 | u16 rsrv2; | 369 | u16 rsrv2; |
367 | /* The same definitions as the shmem2 parameter */ | ||
368 | u32 link_attr_sync; | ||
369 | }; | 370 | }; |
370 | 371 | ||
371 | /***********************************************************/ | 372 | /***********************************************************/ |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c index c13364b6cc19..d1c093dcb054 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | |||
@@ -6849,6 +6849,37 @@ static void bnx2x__common_init_phy(struct bnx2x *bp) | |||
6849 | bnx2x_release_phy_lock(bp); | 6849 | bnx2x_release_phy_lock(bp); |
6850 | } | 6850 | } |
6851 | 6851 | ||
6852 | static void bnx2x_config_endianity(struct bnx2x *bp, u32 val) | ||
6853 | { | ||
6854 | REG_WR(bp, PXP2_REG_RQ_QM_ENDIAN_M, val); | ||
6855 | REG_WR(bp, PXP2_REG_RQ_TM_ENDIAN_M, val); | ||
6856 | REG_WR(bp, PXP2_REG_RQ_SRC_ENDIAN_M, val); | ||
6857 | REG_WR(bp, PXP2_REG_RQ_CDU_ENDIAN_M, val); | ||
6858 | REG_WR(bp, PXP2_REG_RQ_DBG_ENDIAN_M, val); | ||
6859 | |||
6860 | /* make sure this value is 0 */ | ||
6861 | REG_WR(bp, PXP2_REG_RQ_HC_ENDIAN_M, 0); | ||
6862 | |||
6863 | REG_WR(bp, PXP2_REG_RD_QM_SWAP_MODE, val); | ||
6864 | REG_WR(bp, PXP2_REG_RD_TM_SWAP_MODE, val); | ||
6865 | REG_WR(bp, PXP2_REG_RD_SRC_SWAP_MODE, val); | ||
6866 | REG_WR(bp, PXP2_REG_RD_CDURD_SWAP_MODE, val); | ||
6867 | } | ||
6868 | |||
6869 | static void bnx2x_set_endianity(struct bnx2x *bp) | ||
6870 | { | ||
6871 | #ifdef __BIG_ENDIAN | ||
6872 | bnx2x_config_endianity(bp, 1); | ||
6873 | #else | ||
6874 | bnx2x_config_endianity(bp, 0); | ||
6875 | #endif | ||
6876 | } | ||
6877 | |||
6878 | static void bnx2x_reset_endianity(struct bnx2x *bp) | ||
6879 | { | ||
6880 | bnx2x_config_endianity(bp, 0); | ||
6881 | } | ||
6882 | |||
6852 | /** | 6883 | /** |
6853 | * bnx2x_init_hw_common - initialize the HW at the COMMON phase. | 6884 | * bnx2x_init_hw_common - initialize the HW at the COMMON phase. |
6854 | * | 6885 | * |
@@ -6915,23 +6946,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp) | |||
6915 | 6946 | ||
6916 | bnx2x_init_block(bp, BLOCK_PXP2, PHASE_COMMON); | 6947 | bnx2x_init_block(bp, BLOCK_PXP2, PHASE_COMMON); |
6917 | bnx2x_init_pxp(bp); | 6948 | bnx2x_init_pxp(bp); |
6918 | 6949 | bnx2x_set_endianity(bp); | |
6919 | #ifdef __BIG_ENDIAN | ||
6920 | REG_WR(bp, PXP2_REG_RQ_QM_ENDIAN_M, 1); | ||
6921 | REG_WR(bp, PXP2_REG_RQ_TM_ENDIAN_M, 1); | ||
6922 | REG_WR(bp, PXP2_REG_RQ_SRC_ENDIAN_M, 1); | ||
6923 | REG_WR(bp, PXP2_REG_RQ_CDU_ENDIAN_M, 1); | ||
6924 | REG_WR(bp, PXP2_REG_RQ_DBG_ENDIAN_M, 1); | ||
6925 | /* make sure this value is 0 */ | ||
6926 | REG_WR(bp, PXP2_REG_RQ_HC_ENDIAN_M, 0); | ||
6927 | |||
6928 | /* REG_WR(bp, PXP2_REG_RD_PBF_SWAP_MODE, 1); */ | ||
6929 | REG_WR(bp, PXP2_REG_RD_QM_SWAP_MODE, 1); | ||
6930 | REG_WR(bp, PXP2_REG_RD_TM_SWAP_MODE, 1); | ||
6931 | REG_WR(bp, PXP2_REG_RD_SRC_SWAP_MODE, 1); | ||
6932 | REG_WR(bp, PXP2_REG_RD_CDURD_SWAP_MODE, 1); | ||
6933 | #endif | ||
6934 | |||
6935 | bnx2x_ilt_init_page_size(bp, INITOP_SET); | 6950 | bnx2x_ilt_init_page_size(bp, INITOP_SET); |
6936 | 6951 | ||
6937 | if (CHIP_REV_IS_FPGA(bp) && CHIP_IS_E1H(bp)) | 6952 | if (CHIP_REV_IS_FPGA(bp) && CHIP_IS_E1H(bp)) |
@@ -10052,6 +10067,8 @@ static void bnx2x_prev_unload_close_mac(struct bnx2x *bp, | |||
10052 | } | 10067 | } |
10053 | 10068 | ||
10054 | #define BNX2X_PREV_UNDI_PROD_ADDR(p) (BAR_TSTRORM_INTMEM + 0x1508 + ((p) << 4)) | 10069 | #define BNX2X_PREV_UNDI_PROD_ADDR(p) (BAR_TSTRORM_INTMEM + 0x1508 + ((p) << 4)) |
10070 | #define BNX2X_PREV_UNDI_PROD_ADDR_H(f) (BAR_TSTRORM_INTMEM + \ | ||
10071 | 0x1848 + ((f) << 4)) | ||
10055 | #define BNX2X_PREV_UNDI_RCQ(val) ((val) & 0xffff) | 10072 | #define BNX2X_PREV_UNDI_RCQ(val) ((val) & 0xffff) |
10056 | #define BNX2X_PREV_UNDI_BD(val) ((val) >> 16 & 0xffff) | 10073 | #define BNX2X_PREV_UNDI_BD(val) ((val) >> 16 & 0xffff) |
10057 | #define BNX2X_PREV_UNDI_PROD(rcq, bd) ((bd) << 16 | (rcq)) | 10074 | #define BNX2X_PREV_UNDI_PROD(rcq, bd) ((bd) << 16 | (rcq)) |
@@ -10059,8 +10076,6 @@ static void bnx2x_prev_unload_close_mac(struct bnx2x *bp, | |||
10059 | #define BCM_5710_UNDI_FW_MF_MAJOR (0x07) | 10076 | #define BCM_5710_UNDI_FW_MF_MAJOR (0x07) |
10060 | #define BCM_5710_UNDI_FW_MF_MINOR (0x08) | 10077 | #define BCM_5710_UNDI_FW_MF_MINOR (0x08) |
10061 | #define BCM_5710_UNDI_FW_MF_VERS (0x05) | 10078 | #define BCM_5710_UNDI_FW_MF_VERS (0x05) |
10062 | #define BNX2X_PREV_UNDI_MF_PORT(p) (BAR_TSTRORM_INTMEM + 0x150c + ((p) << 4)) | ||
10063 | #define BNX2X_PREV_UNDI_MF_FUNC(f) (BAR_TSTRORM_INTMEM + 0x184c + ((f) << 4)) | ||
10064 | 10079 | ||
10065 | static bool bnx2x_prev_is_after_undi(struct bnx2x *bp) | 10080 | static bool bnx2x_prev_is_after_undi(struct bnx2x *bp) |
10066 | { | 10081 | { |
@@ -10079,72 +10094,25 @@ static bool bnx2x_prev_is_after_undi(struct bnx2x *bp) | |||
10079 | return false; | 10094 | return false; |
10080 | } | 10095 | } |
10081 | 10096 | ||
10082 | static bool bnx2x_prev_unload_undi_fw_supports_mf(struct bnx2x *bp) | 10097 | static void bnx2x_prev_unload_undi_inc(struct bnx2x *bp, u8 inc) |
10083 | { | ||
10084 | u8 major, minor, version; | ||
10085 | u32 fw; | ||
10086 | |||
10087 | /* Must check that FW is loaded */ | ||
10088 | if (!(REG_RD(bp, MISC_REG_RESET_REG_1) & | ||
10089 | MISC_REGISTERS_RESET_REG_1_RST_XSEM)) { | ||
10090 | BNX2X_DEV_INFO("XSEM is reset - UNDI MF FW is not loaded\n"); | ||
10091 | return false; | ||
10092 | } | ||
10093 | |||
10094 | /* Read Currently loaded FW version */ | ||
10095 | fw = REG_RD(bp, XSEM_REG_PRAM); | ||
10096 | major = fw & 0xff; | ||
10097 | minor = (fw >> 0x8) & 0xff; | ||
10098 | version = (fw >> 0x10) & 0xff; | ||
10099 | BNX2X_DEV_INFO("Loaded FW: 0x%08x: Major 0x%02x Minor 0x%02x Version 0x%02x\n", | ||
10100 | fw, major, minor, version); | ||
10101 | |||
10102 | if (major > BCM_5710_UNDI_FW_MF_MAJOR) | ||
10103 | return true; | ||
10104 | |||
10105 | if ((major == BCM_5710_UNDI_FW_MF_MAJOR) && | ||
10106 | (minor > BCM_5710_UNDI_FW_MF_MINOR)) | ||
10107 | return true; | ||
10108 | |||
10109 | if ((major == BCM_5710_UNDI_FW_MF_MAJOR) && | ||
10110 | (minor == BCM_5710_UNDI_FW_MF_MINOR) && | ||
10111 | (version >= BCM_5710_UNDI_FW_MF_VERS)) | ||
10112 | return true; | ||
10113 | |||
10114 | return false; | ||
10115 | } | ||
10116 | |||
10117 | static void bnx2x_prev_unload_undi_mf(struct bnx2x *bp) | ||
10118 | { | ||
10119 | int i; | ||
10120 | |||
10121 | /* Due to legacy (FW) code, the first function on each engine has a | ||
10122 | * different offset macro from the rest of the functions. | ||
10123 | * Setting this for all 8 functions is harmless regardless of whether | ||
10124 | * this is actually a multi-function device. | ||
10125 | */ | ||
10126 | for (i = 0; i < 2; i++) | ||
10127 | REG_WR(bp, BNX2X_PREV_UNDI_MF_PORT(i), 1); | ||
10128 | |||
10129 | for (i = 2; i < 8; i++) | ||
10130 | REG_WR(bp, BNX2X_PREV_UNDI_MF_FUNC(i - 2), 1); | ||
10131 | |||
10132 | BNX2X_DEV_INFO("UNDI FW (MF) set to discard\n"); | ||
10133 | } | ||
10134 | |||
10135 | static void bnx2x_prev_unload_undi_inc(struct bnx2x *bp, u8 port, u8 inc) | ||
10136 | { | 10098 | { |
10137 | u16 rcq, bd; | 10099 | u16 rcq, bd; |
10138 | u32 tmp_reg = REG_RD(bp, BNX2X_PREV_UNDI_PROD_ADDR(port)); | 10100 | u32 addr, tmp_reg; |
10101 | |||
10102 | if (BP_FUNC(bp) < 2) | ||
10103 | addr = BNX2X_PREV_UNDI_PROD_ADDR(BP_PORT(bp)); | ||
10104 | else | ||
10105 | addr = BNX2X_PREV_UNDI_PROD_ADDR_H(BP_FUNC(bp) - 2); | ||
10139 | 10106 | ||
10107 | tmp_reg = REG_RD(bp, addr); | ||
10140 | rcq = BNX2X_PREV_UNDI_RCQ(tmp_reg) + inc; | 10108 | rcq = BNX2X_PREV_UNDI_RCQ(tmp_reg) + inc; |
10141 | bd = BNX2X_PREV_UNDI_BD(tmp_reg) + inc; | 10109 | bd = BNX2X_PREV_UNDI_BD(tmp_reg) + inc; |
10142 | 10110 | ||
10143 | tmp_reg = BNX2X_PREV_UNDI_PROD(rcq, bd); | 10111 | tmp_reg = BNX2X_PREV_UNDI_PROD(rcq, bd); |
10144 | REG_WR(bp, BNX2X_PREV_UNDI_PROD_ADDR(port), tmp_reg); | 10112 | REG_WR(bp, addr, tmp_reg); |
10145 | 10113 | ||
10146 | BNX2X_DEV_INFO("UNDI producer [%d] rings bd -> 0x%04x, rcq -> 0x%04x\n", | 10114 | BNX2X_DEV_INFO("UNDI producer [%d/%d][%08x] rings bd -> 0x%04x, rcq -> 0x%04x\n", |
10147 | port, bd, rcq); | 10115 | BP_PORT(bp), BP_FUNC(bp), addr, bd, rcq); |
10148 | } | 10116 | } |
10149 | 10117 | ||
10150 | static int bnx2x_prev_mcp_done(struct bnx2x *bp) | 10118 | static int bnx2x_prev_mcp_done(struct bnx2x *bp) |
@@ -10383,7 +10351,6 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) | |||
10383 | /* Reset should be performed after BRB is emptied */ | 10351 | /* Reset should be performed after BRB is emptied */ |
10384 | if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) { | 10352 | if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) { |
10385 | u32 timer_count = 1000; | 10353 | u32 timer_count = 1000; |
10386 | bool need_write = true; | ||
10387 | 10354 | ||
10388 | /* Close the MAC Rx to prevent BRB from filling up */ | 10355 | /* Close the MAC Rx to prevent BRB from filling up */ |
10389 | bnx2x_prev_unload_close_mac(bp, &mac_vals); | 10356 | bnx2x_prev_unload_close_mac(bp, &mac_vals); |
@@ -10420,20 +10387,10 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) | |||
10420 | else | 10387 | else |
10421 | timer_count--; | 10388 | timer_count--; |
10422 | 10389 | ||
10423 | /* New UNDI FW supports MF and contains better | 10390 | /* If UNDI resides in memory, manually increment it */ |
10424 | * cleaning methods - might be redundant but harmless. | 10391 | if (prev_undi) |
10425 | */ | 10392 | bnx2x_prev_unload_undi_inc(bp, 1); |
10426 | if (bnx2x_prev_unload_undi_fw_supports_mf(bp)) { | 10393 | |
10427 | if (need_write) { | ||
10428 | bnx2x_prev_unload_undi_mf(bp); | ||
10429 | need_write = false; | ||
10430 | } | ||
10431 | } else if (prev_undi) { | ||
10432 | /* If UNDI resides in memory, | ||
10433 | * manually increment it | ||
10434 | */ | ||
10435 | bnx2x_prev_unload_undi_inc(bp, BP_PORT(bp), 1); | ||
10436 | } | ||
10437 | udelay(10); | 10394 | udelay(10); |
10438 | } | 10395 | } |
10439 | 10396 | ||
@@ -13227,9 +13184,15 @@ static void __bnx2x_remove(struct pci_dev *pdev, | |||
13227 | bnx2x_iov_remove_one(bp); | 13184 | bnx2x_iov_remove_one(bp); |
13228 | 13185 | ||
13229 | /* Power on: we can't let PCI layer write to us while we are in D3 */ | 13186 | /* Power on: we can't let PCI layer write to us while we are in D3 */ |
13230 | if (IS_PF(bp)) | 13187 | if (IS_PF(bp)) { |
13231 | bnx2x_set_power_state(bp, PCI_D0); | 13188 | bnx2x_set_power_state(bp, PCI_D0); |
13232 | 13189 | ||
13190 | /* Set endianity registers to reset values in case next driver | ||
13191 | * boots in different endianty environment. | ||
13192 | */ | ||
13193 | bnx2x_reset_endianity(bp); | ||
13194 | } | ||
13195 | |||
13233 | /* Disable MSI/MSI-X */ | 13196 | /* Disable MSI/MSI-X */ |
13234 | bnx2x_disable_msi(bp); | 13197 | bnx2x_disable_msi(bp); |
13235 | 13198 | ||
diff --git a/drivers/net/ethernet/broadcom/cnic.c b/drivers/net/ethernet/broadcom/cnic.c index 27861a6c7ca5..a6a9f284c8dd 100644 --- a/drivers/net/ethernet/broadcom/cnic.c +++ b/drivers/net/ethernet/broadcom/cnic.c | |||
@@ -31,7 +31,7 @@ | |||
31 | #include <linux/if_vlan.h> | 31 | #include <linux/if_vlan.h> |
32 | #include <linux/prefetch.h> | 32 | #include <linux/prefetch.h> |
33 | #include <linux/random.h> | 33 | #include <linux/random.h> |
34 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | 34 | #if IS_ENABLED(CONFIG_VLAN_8021Q) |
35 | #define BCM_VLAN 1 | 35 | #define BCM_VLAN 1 |
36 | #endif | 36 | #endif |
37 | #include <net/ip.h> | 37 | #include <net/ip.h> |
@@ -3685,7 +3685,7 @@ static int cnic_get_v4_route(struct sockaddr_in *dst_addr, | |||
3685 | static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr, | 3685 | static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr, |
3686 | struct dst_entry **dst) | 3686 | struct dst_entry **dst) |
3687 | { | 3687 | { |
3688 | #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE)) | 3688 | #if IS_ENABLED(CONFIG_IPV6) |
3689 | struct flowi6 fl6; | 3689 | struct flowi6 fl6; |
3690 | 3690 | ||
3691 | memset(&fl6, 0, sizeof(fl6)); | 3691 | memset(&fl6, 0, sizeof(fl6)); |
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 3ac5d23454a8..cb77ae93d89a 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c | |||
@@ -11617,6 +11617,12 @@ static int tg3_open(struct net_device *dev) | |||
11617 | struct tg3 *tp = netdev_priv(dev); | 11617 | struct tg3 *tp = netdev_priv(dev); |
11618 | int err; | 11618 | int err; |
11619 | 11619 | ||
11620 | if (tp->pcierr_recovery) { | ||
11621 | netdev_err(dev, "Failed to open device. PCI error recovery " | ||
11622 | "in progress\n"); | ||
11623 | return -EAGAIN; | ||
11624 | } | ||
11625 | |||
11620 | if (tp->fw_needed) { | 11626 | if (tp->fw_needed) { |
11621 | err = tg3_request_firmware(tp); | 11627 | err = tg3_request_firmware(tp); |
11622 | if (tg3_asic_rev(tp) == ASIC_REV_57766) { | 11628 | if (tg3_asic_rev(tp) == ASIC_REV_57766) { |
@@ -11674,6 +11680,12 @@ static int tg3_close(struct net_device *dev) | |||
11674 | { | 11680 | { |
11675 | struct tg3 *tp = netdev_priv(dev); | 11681 | struct tg3 *tp = netdev_priv(dev); |
11676 | 11682 | ||
11683 | if (tp->pcierr_recovery) { | ||
11684 | netdev_err(dev, "Failed to close device. PCI error recovery " | ||
11685 | "in progress\n"); | ||
11686 | return -EAGAIN; | ||
11687 | } | ||
11688 | |||
11677 | tg3_ptp_fini(tp); | 11689 | tg3_ptp_fini(tp); |
11678 | 11690 | ||
11679 | tg3_stop(tp); | 11691 | tg3_stop(tp); |
@@ -17561,6 +17573,7 @@ static int tg3_init_one(struct pci_dev *pdev, | |||
17561 | tp->rx_mode = TG3_DEF_RX_MODE; | 17573 | tp->rx_mode = TG3_DEF_RX_MODE; |
17562 | tp->tx_mode = TG3_DEF_TX_MODE; | 17574 | tp->tx_mode = TG3_DEF_TX_MODE; |
17563 | tp->irq_sync = 1; | 17575 | tp->irq_sync = 1; |
17576 | tp->pcierr_recovery = false; | ||
17564 | 17577 | ||
17565 | if (tg3_debug > 0) | 17578 | if (tg3_debug > 0) |
17566 | tp->msg_enable = tg3_debug; | 17579 | tp->msg_enable = tg3_debug; |
@@ -18071,6 +18084,8 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev, | |||
18071 | 18084 | ||
18072 | rtnl_lock(); | 18085 | rtnl_lock(); |
18073 | 18086 | ||
18087 | tp->pcierr_recovery = true; | ||
18088 | |||
18074 | /* We probably don't have netdev yet */ | 18089 | /* We probably don't have netdev yet */ |
18075 | if (!netdev || !netif_running(netdev)) | 18090 | if (!netdev || !netif_running(netdev)) |
18076 | goto done; | 18091 | goto done; |
@@ -18195,6 +18210,7 @@ static void tg3_io_resume(struct pci_dev *pdev) | |||
18195 | tg3_phy_start(tp); | 18210 | tg3_phy_start(tp); |
18196 | 18211 | ||
18197 | done: | 18212 | done: |
18213 | tp->pcierr_recovery = false; | ||
18198 | rtnl_unlock(); | 18214 | rtnl_unlock(); |
18199 | } | 18215 | } |
18200 | 18216 | ||
diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h index 461accaf0aa4..31c9f8295953 100644 --- a/drivers/net/ethernet/broadcom/tg3.h +++ b/drivers/net/ethernet/broadcom/tg3.h | |||
@@ -3407,6 +3407,7 @@ struct tg3 { | |||
3407 | 3407 | ||
3408 | struct device *hwmon_dev; | 3408 | struct device *hwmon_dev; |
3409 | bool link_up; | 3409 | bool link_up; |
3410 | bool pcierr_recovery; | ||
3410 | }; | 3411 | }; |
3411 | 3412 | ||
3412 | /* Accessor macros for chip and asic attributes | 3413 | /* Accessor macros for chip and asic attributes |
diff --git a/drivers/net/ethernet/brocade/bna/bnad.c b/drivers/net/ethernet/brocade/bna/bnad.c index ff8cae5e2535..ffc92a41d75b 100644 --- a/drivers/net/ethernet/brocade/bna/bnad.c +++ b/drivers/net/ethernet/brocade/bna/bnad.c | |||
@@ -2506,7 +2506,7 @@ bnad_tso_prepare(struct bnad *bnad, struct sk_buff *skb) | |||
2506 | * For TSO, the TCP checksum field is seeded with pseudo-header sum | 2506 | * For TSO, the TCP checksum field is seeded with pseudo-header sum |
2507 | * excluding the length field. | 2507 | * excluding the length field. |
2508 | */ | 2508 | */ |
2509 | if (skb->protocol == htons(ETH_P_IP)) { | 2509 | if (vlan_get_protocol(skb) == htons(ETH_P_IP)) { |
2510 | struct iphdr *iph = ip_hdr(skb); | 2510 | struct iphdr *iph = ip_hdr(skb); |
2511 | 2511 | ||
2512 | /* Do we really need these? */ | 2512 | /* Do we really need these? */ |
@@ -2870,12 +2870,13 @@ bnad_txq_wi_prepare(struct bnad *bnad, struct bna_tcb *tcb, | |||
2870 | } | 2870 | } |
2871 | 2871 | ||
2872 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | 2872 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
2873 | __be16 net_proto = vlan_get_protocol(skb); | ||
2873 | u8 proto = 0; | 2874 | u8 proto = 0; |
2874 | 2875 | ||
2875 | if (skb->protocol == htons(ETH_P_IP)) | 2876 | if (net_proto == htons(ETH_P_IP)) |
2876 | proto = ip_hdr(skb)->protocol; | 2877 | proto = ip_hdr(skb)->protocol; |
2877 | #ifdef NETIF_F_IPV6_CSUM | 2878 | #ifdef NETIF_F_IPV6_CSUM |
2878 | else if (skb->protocol == htons(ETH_P_IPV6)) { | 2879 | else if (net_proto == htons(ETH_P_IPV6)) { |
2879 | /* nexthdr may not be TCP immediately. */ | 2880 | /* nexthdr may not be TCP immediately. */ |
2880 | proto = ipv6_hdr(skb)->nexthdr; | 2881 | proto = ipv6_hdr(skb)->nexthdr; |
2881 | } | 2882 | } |
diff --git a/drivers/net/ethernet/calxeda/Kconfig b/drivers/net/ethernet/calxeda/Kconfig index 184a063bed5f..07d2201530d2 100644 --- a/drivers/net/ethernet/calxeda/Kconfig +++ b/drivers/net/ethernet/calxeda/Kconfig | |||
@@ -1,6 +1,7 @@ | |||
1 | config NET_CALXEDA_XGMAC | 1 | config NET_CALXEDA_XGMAC |
2 | tristate "Calxeda 1G/10G XGMAC Ethernet driver" | 2 | tristate "Calxeda 1G/10G XGMAC Ethernet driver" |
3 | depends on HAS_IOMEM && HAS_DMA | 3 | depends on HAS_IOMEM && HAS_DMA |
4 | depends on ARCH_HIGHBANK || COMPILE_TEST | ||
4 | select CRC32 | 5 | select CRC32 |
5 | help | 6 | help |
6 | This is the driver for the XGMAC Ethernet IP block found on Calxeda | 7 | This is the driver for the XGMAC Ethernet IP block found on Calxeda |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index d57282172ea5..c067b7888ac4 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | |||
@@ -652,6 +652,7 @@ struct adapter { | |||
652 | struct tid_info tids; | 652 | struct tid_info tids; |
653 | void **tid_release_head; | 653 | void **tid_release_head; |
654 | spinlock_t tid_release_lock; | 654 | spinlock_t tid_release_lock; |
655 | struct workqueue_struct *workq; | ||
655 | struct work_struct tid_release_task; | 656 | struct work_struct tid_release_task; |
656 | struct work_struct db_full_task; | 657 | struct work_struct db_full_task; |
657 | struct work_struct db_drop_task; | 658 | struct work_struct db_drop_task; |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 1afee70ce856..8c34811a1128 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |||
@@ -643,8 +643,6 @@ static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok) | |||
643 | return ret; | 643 | return ret; |
644 | } | 644 | } |
645 | 645 | ||
646 | static struct workqueue_struct *workq; | ||
647 | |||
648 | /** | 646 | /** |
649 | * link_start - enable a port | 647 | * link_start - enable a port |
650 | * @dev: the port to enable | 648 | * @dev: the port to enable |
@@ -1255,7 +1253,9 @@ freeout: t4_free_sge_resources(adap); | |||
1255 | goto freeout; | 1253 | goto freeout; |
1256 | } | 1254 | } |
1257 | 1255 | ||
1258 | t4_write_reg(adap, MPS_TRC_RSS_CONTROL, | 1256 | t4_write_reg(adap, is_t4(adap->params.chip) ? |
1257 | MPS_TRC_RSS_CONTROL : | ||
1258 | MPS_T5_TRC_RSS_CONTROL, | ||
1259 | RSSCONTROL(netdev2pinfo(adap->port[0])->tx_chan) | | 1259 | RSSCONTROL(netdev2pinfo(adap->port[0])->tx_chan) | |
1260 | QUEUENUMBER(s->ethrxq[0].rspq.abs_id)); | 1260 | QUEUENUMBER(s->ethrxq[0].rspq.abs_id)); |
1261 | return 0; | 1261 | return 0; |
@@ -1763,7 +1763,8 @@ static void get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
1763 | 0xd004, 0xd03c, | 1763 | 0xd004, 0xd03c, |
1764 | 0xdfc0, 0xdfe0, | 1764 | 0xdfc0, 0xdfe0, |
1765 | 0xe000, 0xea7c, | 1765 | 0xe000, 0xea7c, |
1766 | 0xf000, 0x11190, | 1766 | 0xf000, 0x11110, |
1767 | 0x11118, 0x11190, | ||
1767 | 0x19040, 0x1906c, | 1768 | 0x19040, 0x1906c, |
1768 | 0x19078, 0x19080, | 1769 | 0x19078, 0x19080, |
1769 | 0x1908c, 0x19124, | 1770 | 0x1908c, 0x19124, |
@@ -1970,7 +1971,8 @@ static void get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
1970 | 0xd004, 0xd03c, | 1971 | 0xd004, 0xd03c, |
1971 | 0xdfc0, 0xdfe0, | 1972 | 0xdfc0, 0xdfe0, |
1972 | 0xe000, 0x11088, | 1973 | 0xe000, 0x11088, |
1973 | 0x1109c, 0x1117c, | 1974 | 0x1109c, 0x11110, |
1975 | 0x11118, 0x1117c, | ||
1974 | 0x11190, 0x11204, | 1976 | 0x11190, 0x11204, |
1975 | 0x19040, 0x1906c, | 1977 | 0x19040, 0x1906c, |
1976 | 0x19078, 0x19080, | 1978 | 0x19078, 0x19080, |
@@ -3340,7 +3342,7 @@ static void cxgb4_queue_tid_release(struct tid_info *t, unsigned int chan, | |||
3340 | adap->tid_release_head = (void **)((uintptr_t)p | chan); | 3342 | adap->tid_release_head = (void **)((uintptr_t)p | chan); |
3341 | if (!adap->tid_release_task_busy) { | 3343 | if (!adap->tid_release_task_busy) { |
3342 | adap->tid_release_task_busy = true; | 3344 | adap->tid_release_task_busy = true; |
3343 | queue_work(workq, &adap->tid_release_task); | 3345 | queue_work(adap->workq, &adap->tid_release_task); |
3344 | } | 3346 | } |
3345 | spin_unlock_bh(&adap->tid_release_lock); | 3347 | spin_unlock_bh(&adap->tid_release_lock); |
3346 | } | 3348 | } |
@@ -4140,7 +4142,7 @@ void t4_db_full(struct adapter *adap) | |||
4140 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL); | 4142 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL); |
4141 | t4_set_reg_field(adap, SGE_INT_ENABLE3, | 4143 | t4_set_reg_field(adap, SGE_INT_ENABLE3, |
4142 | DBFIFO_HP_INT | DBFIFO_LP_INT, 0); | 4144 | DBFIFO_HP_INT | DBFIFO_LP_INT, 0); |
4143 | queue_work(workq, &adap->db_full_task); | 4145 | queue_work(adap->workq, &adap->db_full_task); |
4144 | } | 4146 | } |
4145 | } | 4147 | } |
4146 | 4148 | ||
@@ -4150,7 +4152,7 @@ void t4_db_dropped(struct adapter *adap) | |||
4150 | disable_dbs(adap); | 4152 | disable_dbs(adap); |
4151 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL); | 4153 | notify_rdma_uld(adap, CXGB4_CONTROL_DB_FULL); |
4152 | } | 4154 | } |
4153 | queue_work(workq, &adap->db_drop_task); | 4155 | queue_work(adap->workq, &adap->db_drop_task); |
4154 | } | 4156 | } |
4155 | 4157 | ||
4156 | static void uld_attach(struct adapter *adap, unsigned int uld) | 4158 | static void uld_attach(struct adapter *adap, unsigned int uld) |
@@ -5957,7 +5959,8 @@ static int adap_init0(struct adapter *adap) | |||
5957 | params[3] = FW_PARAM_PFVF(CQ_END); | 5959 | params[3] = FW_PARAM_PFVF(CQ_END); |
5958 | params[4] = FW_PARAM_PFVF(OCQ_START); | 5960 | params[4] = FW_PARAM_PFVF(OCQ_START); |
5959 | params[5] = FW_PARAM_PFVF(OCQ_END); | 5961 | params[5] = FW_PARAM_PFVF(OCQ_END); |
5960 | ret = t4_query_params(adap, 0, 0, 0, 6, params, val); | 5962 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 6, params, |
5963 | val); | ||
5961 | if (ret < 0) | 5964 | if (ret < 0) |
5962 | goto bye; | 5965 | goto bye; |
5963 | adap->vres.qp.start = val[0]; | 5966 | adap->vres.qp.start = val[0]; |
@@ -5969,7 +5972,8 @@ static int adap_init0(struct adapter *adap) | |||
5969 | 5972 | ||
5970 | params[0] = FW_PARAM_DEV(MAXORDIRD_QP); | 5973 | params[0] = FW_PARAM_DEV(MAXORDIRD_QP); |
5971 | params[1] = FW_PARAM_DEV(MAXIRD_ADAPTER); | 5974 | params[1] = FW_PARAM_DEV(MAXIRD_ADAPTER); |
5972 | ret = t4_query_params(adap, 0, 0, 0, 2, params, val); | 5975 | ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2, params, |
5976 | val); | ||
5973 | if (ret < 0) { | 5977 | if (ret < 0) { |
5974 | adap->params.max_ordird_qp = 8; | 5978 | adap->params.max_ordird_qp = 8; |
5975 | adap->params.max_ird_adapter = 32 * adap->tids.ntids; | 5979 | adap->params.max_ird_adapter = 32 * adap->tids.ntids; |
@@ -6517,6 +6521,12 @@ static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6517 | goto out_disable_device; | 6521 | goto out_disable_device; |
6518 | } | 6522 | } |
6519 | 6523 | ||
6524 | adapter->workq = create_singlethread_workqueue("cxgb4"); | ||
6525 | if (!adapter->workq) { | ||
6526 | err = -ENOMEM; | ||
6527 | goto out_free_adapter; | ||
6528 | } | ||
6529 | |||
6520 | /* PCI device has been enabled */ | 6530 | /* PCI device has been enabled */ |
6521 | adapter->flags |= DEV_ENABLED; | 6531 | adapter->flags |= DEV_ENABLED; |
6522 | 6532 | ||
@@ -6715,6 +6725,9 @@ sriov: | |||
6715 | out_unmap_bar0: | 6725 | out_unmap_bar0: |
6716 | iounmap(adapter->regs); | 6726 | iounmap(adapter->regs); |
6717 | out_free_adapter: | 6727 | out_free_adapter: |
6728 | if (adapter->workq) | ||
6729 | destroy_workqueue(adapter->workq); | ||
6730 | |||
6718 | kfree(adapter); | 6731 | kfree(adapter); |
6719 | out_disable_device: | 6732 | out_disable_device: |
6720 | pci_disable_pcie_error_reporting(pdev); | 6733 | pci_disable_pcie_error_reporting(pdev); |
@@ -6736,6 +6749,11 @@ static void remove_one(struct pci_dev *pdev) | |||
6736 | if (adapter) { | 6749 | if (adapter) { |
6737 | int i; | 6750 | int i; |
6738 | 6751 | ||
6752 | /* Tear down per-adapter Work Queue first since it can contain | ||
6753 | * references to our adapter data structure. | ||
6754 | */ | ||
6755 | destroy_workqueue(adapter->workq); | ||
6756 | |||
6739 | if (is_offload(adapter)) | 6757 | if (is_offload(adapter)) |
6740 | detach_ulds(adapter); | 6758 | detach_ulds(adapter); |
6741 | 6759 | ||
@@ -6788,20 +6806,14 @@ static int __init cxgb4_init_module(void) | |||
6788 | { | 6806 | { |
6789 | int ret; | 6807 | int ret; |
6790 | 6808 | ||
6791 | workq = create_singlethread_workqueue("cxgb4"); | ||
6792 | if (!workq) | ||
6793 | return -ENOMEM; | ||
6794 | |||
6795 | /* Debugfs support is optional, just warn if this fails */ | 6809 | /* Debugfs support is optional, just warn if this fails */ |
6796 | cxgb4_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); | 6810 | cxgb4_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); |
6797 | if (!cxgb4_debugfs_root) | 6811 | if (!cxgb4_debugfs_root) |
6798 | pr_warn("could not create debugfs entry, continuing\n"); | 6812 | pr_warn("could not create debugfs entry, continuing\n"); |
6799 | 6813 | ||
6800 | ret = pci_register_driver(&cxgb4_driver); | 6814 | ret = pci_register_driver(&cxgb4_driver); |
6801 | if (ret < 0) { | 6815 | if (ret < 0) |
6802 | debugfs_remove(cxgb4_debugfs_root); | 6816 | debugfs_remove(cxgb4_debugfs_root); |
6803 | destroy_workqueue(workq); | ||
6804 | } | ||
6805 | 6817 | ||
6806 | register_inet6addr_notifier(&cxgb4_inet6addr_notifier); | 6818 | register_inet6addr_notifier(&cxgb4_inet6addr_notifier); |
6807 | 6819 | ||
@@ -6813,8 +6825,6 @@ static void __exit cxgb4_cleanup_module(void) | |||
6813 | unregister_inet6addr_notifier(&cxgb4_inet6addr_notifier); | 6825 | unregister_inet6addr_notifier(&cxgb4_inet6addr_notifier); |
6814 | pci_unregister_driver(&cxgb4_driver); | 6826 | pci_unregister_driver(&cxgb4_driver); |
6815 | debugfs_remove(cxgb4_debugfs_root); /* NULL ok */ | 6827 | debugfs_remove(cxgb4_debugfs_root); /* NULL ok */ |
6816 | flush_workqueue(workq); | ||
6817 | destroy_workqueue(workq); | ||
6818 | } | 6828 | } |
6819 | 6829 | ||
6820 | module_init(cxgb4_init_module); | 6830 | module_init(cxgb4_init_module); |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c index b0bba32d69d5..d22d728d4e5c 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/sge.c +++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c | |||
@@ -2303,7 +2303,8 @@ int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, | |||
2303 | FW_EQ_ETH_CMD_PFN(adap->fn) | FW_EQ_ETH_CMD_VFN(0)); | 2303 | FW_EQ_ETH_CMD_PFN(adap->fn) | FW_EQ_ETH_CMD_VFN(0)); |
2304 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC | | 2304 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC | |
2305 | FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); | 2305 | FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); |
2306 | c.viid_pkd = htonl(FW_EQ_ETH_CMD_VIID(pi->viid)); | 2306 | c.viid_pkd = htonl(FW_EQ_ETH_CMD_AUTOEQUEQE | |
2307 | FW_EQ_ETH_CMD_VIID(pi->viid)); | ||
2307 | c.fetchszm_to_iqid = htonl(FW_EQ_ETH_CMD_HOSTFCMODE(2) | | 2308 | c.fetchszm_to_iqid = htonl(FW_EQ_ETH_CMD_HOSTFCMODE(2) | |
2308 | FW_EQ_ETH_CMD_PCIECHN(pi->tx_chan) | | 2309 | FW_EQ_ETH_CMD_PCIECHN(pi->tx_chan) | |
2309 | FW_EQ_ETH_CMD_FETCHRO(1) | | 2310 | FW_EQ_ETH_CMD_FETCHRO(1) | |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index a853133d8db8..41d04462b72e 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
@@ -168,6 +168,34 @@ void t4_hw_pci_read_cfg4(struct adapter *adap, int reg, u32 *val) | |||
168 | } | 168 | } |
169 | 169 | ||
170 | /* | 170 | /* |
171 | * t4_report_fw_error - report firmware error | ||
172 | * @adap: the adapter | ||
173 | * | ||
174 | * The adapter firmware can indicate error conditions to the host. | ||
175 | * If the firmware has indicated an error, print out the reason for | ||
176 | * the firmware error. | ||
177 | */ | ||
178 | static void t4_report_fw_error(struct adapter *adap) | ||
179 | { | ||
180 | static const char *const reason[] = { | ||
181 | "Crash", /* PCIE_FW_EVAL_CRASH */ | ||
182 | "During Device Preparation", /* PCIE_FW_EVAL_PREP */ | ||
183 | "During Device Configuration", /* PCIE_FW_EVAL_CONF */ | ||
184 | "During Device Initialization", /* PCIE_FW_EVAL_INIT */ | ||
185 | "Unexpected Event", /* PCIE_FW_EVAL_UNEXPECTEDEVENT */ | ||
186 | "Insufficient Airflow", /* PCIE_FW_EVAL_OVERHEAT */ | ||
187 | "Device Shutdown", /* PCIE_FW_EVAL_DEVICESHUTDOWN */ | ||
188 | "Reserved", /* reserved */ | ||
189 | }; | ||
190 | u32 pcie_fw; | ||
191 | |||
192 | pcie_fw = t4_read_reg(adap, MA_PCIE_FW); | ||
193 | if (pcie_fw & FW_PCIE_FW_ERR) | ||
194 | dev_err(adap->pdev_dev, "Firmware reports adapter error: %s\n", | ||
195 | reason[FW_PCIE_FW_EVAL_GET(pcie_fw)]); | ||
196 | } | ||
197 | |||
198 | /* | ||
171 | * Get the reply to a mailbox command and store it in @rpl in big-endian order. | 199 | * Get the reply to a mailbox command and store it in @rpl in big-endian order. |
172 | */ | 200 | */ |
173 | static void get_mbox_rpl(struct adapter *adap, __be64 *rpl, int nflit, | 201 | static void get_mbox_rpl(struct adapter *adap, __be64 *rpl, int nflit, |
@@ -300,6 +328,7 @@ int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, | |||
300 | dump_mbox(adap, mbox, data_reg); | 328 | dump_mbox(adap, mbox, data_reg); |
301 | dev_err(adap->pdev_dev, "command %#x in mailbox %d timed out\n", | 329 | dev_err(adap->pdev_dev, "command %#x in mailbox %d timed out\n", |
302 | *(const u8 *)cmd, mbox); | 330 | *(const u8 *)cmd, mbox); |
331 | t4_report_fw_error(adap); | ||
303 | return -ETIMEDOUT; | 332 | return -ETIMEDOUT; |
304 | } | 333 | } |
305 | 334 | ||
@@ -566,6 +595,7 @@ int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, | |||
566 | #define VPD_BASE 0x400 | 595 | #define VPD_BASE 0x400 |
567 | #define VPD_BASE_OLD 0 | 596 | #define VPD_BASE_OLD 0 |
568 | #define VPD_LEN 1024 | 597 | #define VPD_LEN 1024 |
598 | #define CHELSIO_VPD_UNIQUE_ID 0x82 | ||
569 | 599 | ||
570 | /** | 600 | /** |
571 | * t4_seeprom_wp - enable/disable EEPROM write protection | 601 | * t4_seeprom_wp - enable/disable EEPROM write protection |
@@ -603,7 +633,14 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p) | |||
603 | ret = pci_read_vpd(adapter->pdev, VPD_BASE, sizeof(u32), vpd); | 633 | ret = pci_read_vpd(adapter->pdev, VPD_BASE, sizeof(u32), vpd); |
604 | if (ret < 0) | 634 | if (ret < 0) |
605 | goto out; | 635 | goto out; |
606 | addr = *vpd == 0x82 ? VPD_BASE : VPD_BASE_OLD; | 636 | |
637 | /* The VPD shall have a unique identifier specified by the PCI SIG. | ||
638 | * For chelsio adapters, the identifier is 0x82. The first byte of a VPD | ||
639 | * shall be CHELSIO_VPD_UNIQUE_ID (0x82). The VPD programming software | ||
640 | * is expected to automatically put this entry at the | ||
641 | * beginning of the VPD. | ||
642 | */ | ||
643 | addr = *vpd == CHELSIO_VPD_UNIQUE_ID ? VPD_BASE : VPD_BASE_OLD; | ||
607 | 644 | ||
608 | ret = pci_read_vpd(adapter->pdev, addr, VPD_LEN, vpd); | 645 | ret = pci_read_vpd(adapter->pdev, addr, VPD_LEN, vpd); |
609 | if (ret < 0) | 646 | if (ret < 0) |
@@ -667,6 +704,7 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p) | |||
667 | i = pci_vpd_info_field_size(vpd + sn - PCI_VPD_INFO_FLD_HDR_SIZE); | 704 | i = pci_vpd_info_field_size(vpd + sn - PCI_VPD_INFO_FLD_HDR_SIZE); |
668 | memcpy(p->sn, vpd + sn, min(i, SERNUM_LEN)); | 705 | memcpy(p->sn, vpd + sn, min(i, SERNUM_LEN)); |
669 | strim(p->sn); | 706 | strim(p->sn); |
707 | i = pci_vpd_info_field_size(vpd + pn - PCI_VPD_INFO_FLD_HDR_SIZE); | ||
670 | memcpy(p->pn, vpd + pn, min(i, PN_LEN)); | 708 | memcpy(p->pn, vpd + pn, min(i, PN_LEN)); |
671 | strim(p->pn); | 709 | strim(p->pn); |
672 | 710 | ||
@@ -1394,15 +1432,18 @@ static void pcie_intr_handler(struct adapter *adapter) | |||
1394 | 1432 | ||
1395 | int fat; | 1433 | int fat; |
1396 | 1434 | ||
1397 | fat = t4_handle_intr_status(adapter, | 1435 | if (is_t4(adapter->params.chip)) |
1398 | PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS, | 1436 | fat = t4_handle_intr_status(adapter, |
1399 | sysbus_intr_info) + | 1437 | PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS, |
1400 | t4_handle_intr_status(adapter, | 1438 | sysbus_intr_info) + |
1401 | PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS, | 1439 | t4_handle_intr_status(adapter, |
1402 | pcie_port_intr_info) + | 1440 | PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS, |
1403 | t4_handle_intr_status(adapter, PCIE_INT_CAUSE, | 1441 | pcie_port_intr_info) + |
1404 | is_t4(adapter->params.chip) ? | 1442 | t4_handle_intr_status(adapter, PCIE_INT_CAUSE, |
1405 | pcie_intr_info : t5_pcie_intr_info); | 1443 | pcie_intr_info); |
1444 | else | ||
1445 | fat = t4_handle_intr_status(adapter, PCIE_INT_CAUSE, | ||
1446 | t5_pcie_intr_info); | ||
1406 | 1447 | ||
1407 | if (fat) | 1448 | if (fat) |
1408 | t4_fatal_err(adapter); | 1449 | t4_fatal_err(adapter); |
@@ -1521,6 +1562,9 @@ static void cim_intr_handler(struct adapter *adapter) | |||
1521 | 1562 | ||
1522 | int fat; | 1563 | int fat; |
1523 | 1564 | ||
1565 | if (t4_read_reg(adapter, MA_PCIE_FW) & FW_PCIE_FW_ERR) | ||
1566 | t4_report_fw_error(adapter); | ||
1567 | |||
1524 | fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE, | 1568 | fat = t4_handle_intr_status(adapter, CIM_HOST_INT_CAUSE, |
1525 | cim_intr_info) + | 1569 | cim_intr_info) + |
1526 | t4_handle_intr_status(adapter, CIM_HOST_UPACC_INT_CAUSE, | 1570 | t4_handle_intr_status(adapter, CIM_HOST_UPACC_INT_CAUSE, |
@@ -1768,10 +1812,16 @@ static void ma_intr_handler(struct adapter *adap) | |||
1768 | { | 1812 | { |
1769 | u32 v, status = t4_read_reg(adap, MA_INT_CAUSE); | 1813 | u32 v, status = t4_read_reg(adap, MA_INT_CAUSE); |
1770 | 1814 | ||
1771 | if (status & MEM_PERR_INT_CAUSE) | 1815 | if (status & MEM_PERR_INT_CAUSE) { |
1772 | dev_alert(adap->pdev_dev, | 1816 | dev_alert(adap->pdev_dev, |
1773 | "MA parity error, parity status %#x\n", | 1817 | "MA parity error, parity status %#x\n", |
1774 | t4_read_reg(adap, MA_PARITY_ERROR_STATUS)); | 1818 | t4_read_reg(adap, MA_PARITY_ERROR_STATUS)); |
1819 | if (is_t5(adap->params.chip)) | ||
1820 | dev_alert(adap->pdev_dev, | ||
1821 | "MA parity error, parity status %#x\n", | ||
1822 | t4_read_reg(adap, | ||
1823 | MA_PARITY_ERROR_STATUS2)); | ||
1824 | } | ||
1775 | if (status & MEM_WRAP_INT_CAUSE) { | 1825 | if (status & MEM_WRAP_INT_CAUSE) { |
1776 | v = t4_read_reg(adap, MA_INT_WRAP_STATUS); | 1826 | v = t4_read_reg(adap, MA_INT_WRAP_STATUS); |
1777 | dev_alert(adap->pdev_dev, "MA address wrap-around error by " | 1827 | dev_alert(adap->pdev_dev, "MA address wrap-around error by " |
@@ -2733,12 +2783,16 @@ retry: | |||
2733 | /* | 2783 | /* |
2734 | * Issue the HELLO command to the firmware. If it's not successful | 2784 | * Issue the HELLO command to the firmware. If it's not successful |
2735 | * but indicates that we got a "busy" or "timeout" condition, retry | 2785 | * but indicates that we got a "busy" or "timeout" condition, retry |
2736 | * the HELLO until we exhaust our retry limit. | 2786 | * the HELLO until we exhaust our retry limit. If we do exceed our |
2787 | * retry limit, check to see if the firmware left us any error | ||
2788 | * information and report that if so. | ||
2737 | */ | 2789 | */ |
2738 | ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), &c); | 2790 | ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), &c); |
2739 | if (ret < 0) { | 2791 | if (ret < 0) { |
2740 | if ((ret == -EBUSY || ret == -ETIMEDOUT) && retries-- > 0) | 2792 | if ((ret == -EBUSY || ret == -ETIMEDOUT) && retries-- > 0) |
2741 | goto retry; | 2793 | goto retry; |
2794 | if (t4_read_reg(adap, MA_PCIE_FW) & FW_PCIE_FW_ERR) | ||
2795 | t4_report_fw_error(adap); | ||
2742 | return ret; | 2796 | return ret; |
2743 | } | 2797 | } |
2744 | 2798 | ||
@@ -3742,6 +3796,7 @@ int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl) | |||
3742 | lc->link_ok = link_ok; | 3796 | lc->link_ok = link_ok; |
3743 | lc->speed = speed; | 3797 | lc->speed = speed; |
3744 | lc->fc = fc; | 3798 | lc->fc = fc; |
3799 | lc->supported = be16_to_cpu(p->u.info.pcap); | ||
3745 | t4_os_link_changed(adap, port, link_ok); | 3800 | t4_os_link_changed(adap, port, link_ok); |
3746 | } | 3801 | } |
3747 | if (mod != pi->mod_type) { | 3802 | if (mod != pi->mod_type) { |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h index e3146e83df20..39fb325474f7 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | |||
@@ -511,6 +511,7 @@ | |||
511 | #define MEM_WRAP_CLIENT_NUM_GET(x) (((x) & MEM_WRAP_CLIENT_NUM_MASK) >> MEM_WRAP_CLIENT_NUM_SHIFT) | 511 | #define MEM_WRAP_CLIENT_NUM_GET(x) (((x) & MEM_WRAP_CLIENT_NUM_MASK) >> MEM_WRAP_CLIENT_NUM_SHIFT) |
512 | #define MA_PCIE_FW 0x30b8 | 512 | #define MA_PCIE_FW 0x30b8 |
513 | #define MA_PARITY_ERROR_STATUS 0x77f4 | 513 | #define MA_PARITY_ERROR_STATUS 0x77f4 |
514 | #define MA_PARITY_ERROR_STATUS2 0x7804 | ||
514 | 515 | ||
515 | #define MA_EXT_MEMORY1_BAR 0x7808 | 516 | #define MA_EXT_MEMORY1_BAR 0x7808 |
516 | #define EDC_0_BASE_ADDR 0x7900 | 517 | #define EDC_0_BASE_ADDR 0x7900 |
@@ -959,6 +960,7 @@ | |||
959 | #define TRCMULTIFILTER 0x00000001U | 960 | #define TRCMULTIFILTER 0x00000001U |
960 | 961 | ||
961 | #define MPS_TRC_RSS_CONTROL 0x9808 | 962 | #define MPS_TRC_RSS_CONTROL 0x9808 |
963 | #define MPS_T5_TRC_RSS_CONTROL 0xa00c | ||
962 | #define RSSCONTROL_MASK 0x00ff0000U | 964 | #define RSSCONTROL_MASK 0x00ff0000U |
963 | #define RSSCONTROL_SHIFT 16 | 965 | #define RSSCONTROL_SHIFT 16 |
964 | #define RSSCONTROL(x) ((x) << RSSCONTROL_SHIFT) | 966 | #define RSSCONTROL(x) ((x) << RSSCONTROL_SHIFT) |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index 0549170d7e2e..3409756a85b9 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | |||
@@ -1227,6 +1227,7 @@ struct fw_eq_eth_cmd { | |||
1227 | #define FW_EQ_ETH_CMD_CIDXFTHRESH(x) ((x) << 16) | 1227 | #define FW_EQ_ETH_CMD_CIDXFTHRESH(x) ((x) << 16) |
1228 | #define FW_EQ_ETH_CMD_EQSIZE(x) ((x) << 0) | 1228 | #define FW_EQ_ETH_CMD_EQSIZE(x) ((x) << 0) |
1229 | 1229 | ||
1230 | #define FW_EQ_ETH_CMD_AUTOEQUEQE (1U << 30) | ||
1230 | #define FW_EQ_ETH_CMD_VIID(x) ((x) << 16) | 1231 | #define FW_EQ_ETH_CMD_VIID(x) ((x) << 16) |
1231 | 1232 | ||
1232 | struct fw_eq_ctrl_cmd { | 1233 | struct fw_eq_ctrl_cmd { |
@@ -2227,6 +2228,10 @@ struct fw_debug_cmd { | |||
2227 | #define FW_PCIE_FW_MASTER(x) ((x) << FW_PCIE_FW_MASTER_SHIFT) | 2228 | #define FW_PCIE_FW_MASTER(x) ((x) << FW_PCIE_FW_MASTER_SHIFT) |
2228 | #define FW_PCIE_FW_MASTER_GET(x) (((x) >> FW_PCIE_FW_MASTER_SHIFT) & \ | 2229 | #define FW_PCIE_FW_MASTER_GET(x) (((x) >> FW_PCIE_FW_MASTER_SHIFT) & \ |
2229 | FW_PCIE_FW_MASTER_MASK) | 2230 | FW_PCIE_FW_MASTER_MASK) |
2231 | #define FW_PCIE_FW_EVAL_MASK 0x7 | ||
2232 | #define FW_PCIE_FW_EVAL_SHIFT 24 | ||
2233 | #define FW_PCIE_FW_EVAL_GET(x) (((x) >> FW_PCIE_FW_EVAL_SHIFT) & \ | ||
2234 | FW_PCIE_FW_EVAL_MASK) | ||
2230 | 2235 | ||
2231 | struct fw_hdr { | 2236 | struct fw_hdr { |
2232 | u8 ver; | 2237 | u8 ver; |
diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c index bdfa80ca5e31..a5fb9493dee8 100644 --- a/drivers/net/ethernet/chelsio/cxgb4vf/sge.c +++ b/drivers/net/ethernet/chelsio/cxgb4vf/sge.c | |||
@@ -2250,7 +2250,8 @@ int t4vf_sge_alloc_eth_txq(struct adapter *adapter, struct sge_eth_txq *txq, | |||
2250 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_ALLOC | | 2250 | cmd.alloc_to_len16 = cpu_to_be32(FW_EQ_ETH_CMD_ALLOC | |
2251 | FW_EQ_ETH_CMD_EQSTART | | 2251 | FW_EQ_ETH_CMD_EQSTART | |
2252 | FW_LEN16(cmd)); | 2252 | FW_LEN16(cmd)); |
2253 | cmd.viid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_VIID(pi->viid)); | 2253 | cmd.viid_pkd = cpu_to_be32(FW_EQ_ETH_CMD_AUTOEQUEQE | |
2254 | FW_EQ_ETH_CMD_VIID(pi->viid)); | ||
2254 | cmd.fetchszm_to_iqid = | 2255 | cmd.fetchszm_to_iqid = |
2255 | cpu_to_be32(FW_EQ_ETH_CMD_HOSTFCMODE(SGE_HOSTFCMODE_STPG) | | 2256 | cpu_to_be32(FW_EQ_ETH_CMD_HOSTFCMODE(SGE_HOSTFCMODE_STPG) | |
2256 | FW_EQ_ETH_CMD_PCIECHN(pi->port_id) | | 2257 | FW_EQ_ETH_CMD_PCIECHN(pi->port_id) | |
diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h index 9f7fa644a397..ee41d98b44b6 100644 --- a/drivers/net/ethernet/freescale/fec.h +++ b/drivers/net/ethernet/freescale/fec.h | |||
@@ -275,6 +275,9 @@ struct fec_enet_private { | |||
275 | struct clk *clk_enet_out; | 275 | struct clk *clk_enet_out; |
276 | struct clk *clk_ptp; | 276 | struct clk *clk_ptp; |
277 | 277 | ||
278 | bool ptp_clk_on; | ||
279 | struct mutex ptp_clk_mutex; | ||
280 | |||
278 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ | 281 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ |
279 | unsigned char *tx_bounce[TX_RING_SIZE]; | 282 | unsigned char *tx_bounce[TX_RING_SIZE]; |
280 | struct sk_buff *tx_skbuff[TX_RING_SIZE]; | 283 | struct sk_buff *tx_skbuff[TX_RING_SIZE]; |
@@ -335,7 +338,7 @@ struct fec_enet_private { | |||
335 | u32 cycle_speed; | 338 | u32 cycle_speed; |
336 | int hwts_rx_en; | 339 | int hwts_rx_en; |
337 | int hwts_tx_en; | 340 | int hwts_tx_en; |
338 | struct timer_list time_keep; | 341 | struct delayed_work time_keep; |
339 | struct regulator *reg_phy; | 342 | struct regulator *reg_phy; |
340 | }; | 343 | }; |
341 | 344 | ||
diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c index 4f87dffcb9b2..89355a719625 100644 --- a/drivers/net/ethernet/freescale/fec_main.c +++ b/drivers/net/ethernet/freescale/fec_main.c | |||
@@ -1611,17 +1611,27 @@ static int fec_enet_clk_enable(struct net_device *ndev, bool enable) | |||
1611 | goto failed_clk_enet_out; | 1611 | goto failed_clk_enet_out; |
1612 | } | 1612 | } |
1613 | if (fep->clk_ptp) { | 1613 | if (fep->clk_ptp) { |
1614 | mutex_lock(&fep->ptp_clk_mutex); | ||
1614 | ret = clk_prepare_enable(fep->clk_ptp); | 1615 | ret = clk_prepare_enable(fep->clk_ptp); |
1615 | if (ret) | 1616 | if (ret) { |
1617 | mutex_unlock(&fep->ptp_clk_mutex); | ||
1616 | goto failed_clk_ptp; | 1618 | goto failed_clk_ptp; |
1619 | } else { | ||
1620 | fep->ptp_clk_on = true; | ||
1621 | } | ||
1622 | mutex_unlock(&fep->ptp_clk_mutex); | ||
1617 | } | 1623 | } |
1618 | } else { | 1624 | } else { |
1619 | clk_disable_unprepare(fep->clk_ahb); | 1625 | clk_disable_unprepare(fep->clk_ahb); |
1620 | clk_disable_unprepare(fep->clk_ipg); | 1626 | clk_disable_unprepare(fep->clk_ipg); |
1621 | if (fep->clk_enet_out) | 1627 | if (fep->clk_enet_out) |
1622 | clk_disable_unprepare(fep->clk_enet_out); | 1628 | clk_disable_unprepare(fep->clk_enet_out); |
1623 | if (fep->clk_ptp) | 1629 | if (fep->clk_ptp) { |
1630 | mutex_lock(&fep->ptp_clk_mutex); | ||
1624 | clk_disable_unprepare(fep->clk_ptp); | 1631 | clk_disable_unprepare(fep->clk_ptp); |
1632 | fep->ptp_clk_on = false; | ||
1633 | mutex_unlock(&fep->ptp_clk_mutex); | ||
1634 | } | ||
1625 | } | 1635 | } |
1626 | 1636 | ||
1627 | return 0; | 1637 | return 0; |
@@ -2625,6 +2635,8 @@ fec_probe(struct platform_device *pdev) | |||
2625 | if (IS_ERR(fep->clk_enet_out)) | 2635 | if (IS_ERR(fep->clk_enet_out)) |
2626 | fep->clk_enet_out = NULL; | 2636 | fep->clk_enet_out = NULL; |
2627 | 2637 | ||
2638 | fep->ptp_clk_on = false; | ||
2639 | mutex_init(&fep->ptp_clk_mutex); | ||
2628 | fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp"); | 2640 | fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp"); |
2629 | fep->bufdesc_ex = | 2641 | fep->bufdesc_ex = |
2630 | pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX; | 2642 | pdev->id_entry->driver_data & FEC_QUIRK_HAS_BUFDESC_EX; |
@@ -2715,10 +2727,10 @@ fec_drv_remove(struct platform_device *pdev) | |||
2715 | struct net_device *ndev = platform_get_drvdata(pdev); | 2727 | struct net_device *ndev = platform_get_drvdata(pdev); |
2716 | struct fec_enet_private *fep = netdev_priv(ndev); | 2728 | struct fec_enet_private *fep = netdev_priv(ndev); |
2717 | 2729 | ||
2730 | cancel_delayed_work_sync(&fep->time_keep); | ||
2718 | cancel_work_sync(&fep->tx_timeout_work); | 2731 | cancel_work_sync(&fep->tx_timeout_work); |
2719 | unregister_netdev(ndev); | 2732 | unregister_netdev(ndev); |
2720 | fec_enet_mii_remove(fep); | 2733 | fec_enet_mii_remove(fep); |
2721 | del_timer_sync(&fep->time_keep); | ||
2722 | if (fep->reg_phy) | 2734 | if (fep->reg_phy) |
2723 | regulator_disable(fep->reg_phy); | 2735 | regulator_disable(fep->reg_phy); |
2724 | if (fep->ptp_clock) | 2736 | if (fep->ptp_clock) |
diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c index 82386b29914a..cca3617a2321 100644 --- a/drivers/net/ethernet/freescale/fec_ptp.c +++ b/drivers/net/ethernet/freescale/fec_ptp.c | |||
@@ -245,12 +245,20 @@ static int fec_ptp_settime(struct ptp_clock_info *ptp, | |||
245 | u64 ns; | 245 | u64 ns; |
246 | unsigned long flags; | 246 | unsigned long flags; |
247 | 247 | ||
248 | mutex_lock(&fep->ptp_clk_mutex); | ||
249 | /* Check the ptp clock */ | ||
250 | if (!fep->ptp_clk_on) { | ||
251 | mutex_unlock(&fep->ptp_clk_mutex); | ||
252 | return -EINVAL; | ||
253 | } | ||
254 | |||
248 | ns = ts->tv_sec * 1000000000ULL; | 255 | ns = ts->tv_sec * 1000000000ULL; |
249 | ns += ts->tv_nsec; | 256 | ns += ts->tv_nsec; |
250 | 257 | ||
251 | spin_lock_irqsave(&fep->tmreg_lock, flags); | 258 | spin_lock_irqsave(&fep->tmreg_lock, flags); |
252 | timecounter_init(&fep->tc, &fep->cc, ns); | 259 | timecounter_init(&fep->tc, &fep->cc, ns); |
253 | spin_unlock_irqrestore(&fep->tmreg_lock, flags); | 260 | spin_unlock_irqrestore(&fep->tmreg_lock, flags); |
261 | mutex_unlock(&fep->ptp_clk_mutex); | ||
254 | return 0; | 262 | return 0; |
255 | } | 263 | } |
256 | 264 | ||
@@ -338,17 +346,22 @@ int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr) | |||
338 | * fec_time_keep - call timecounter_read every second to avoid timer overrun | 346 | * fec_time_keep - call timecounter_read every second to avoid timer overrun |
339 | * because ENET just support 32bit counter, will timeout in 4s | 347 | * because ENET just support 32bit counter, will timeout in 4s |
340 | */ | 348 | */ |
341 | static void fec_time_keep(unsigned long _data) | 349 | static void fec_time_keep(struct work_struct *work) |
342 | { | 350 | { |
343 | struct fec_enet_private *fep = (struct fec_enet_private *)_data; | 351 | struct delayed_work *dwork = to_delayed_work(work); |
352 | struct fec_enet_private *fep = container_of(dwork, struct fec_enet_private, time_keep); | ||
344 | u64 ns; | 353 | u64 ns; |
345 | unsigned long flags; | 354 | unsigned long flags; |
346 | 355 | ||
347 | spin_lock_irqsave(&fep->tmreg_lock, flags); | 356 | mutex_lock(&fep->ptp_clk_mutex); |
348 | ns = timecounter_read(&fep->tc); | 357 | if (fep->ptp_clk_on) { |
349 | spin_unlock_irqrestore(&fep->tmreg_lock, flags); | 358 | spin_lock_irqsave(&fep->tmreg_lock, flags); |
359 | ns = timecounter_read(&fep->tc); | ||
360 | spin_unlock_irqrestore(&fep->tmreg_lock, flags); | ||
361 | } | ||
362 | mutex_unlock(&fep->ptp_clk_mutex); | ||
350 | 363 | ||
351 | mod_timer(&fep->time_keep, jiffies + HZ); | 364 | schedule_delayed_work(&fep->time_keep, HZ); |
352 | } | 365 | } |
353 | 366 | ||
354 | /** | 367 | /** |
@@ -386,15 +399,13 @@ void fec_ptp_init(struct platform_device *pdev) | |||
386 | 399 | ||
387 | fec_ptp_start_cyclecounter(ndev); | 400 | fec_ptp_start_cyclecounter(ndev); |
388 | 401 | ||
389 | init_timer(&fep->time_keep); | 402 | INIT_DELAYED_WORK(&fep->time_keep, fec_time_keep); |
390 | fep->time_keep.data = (unsigned long)fep; | ||
391 | fep->time_keep.function = fec_time_keep; | ||
392 | fep->time_keep.expires = jiffies + HZ; | ||
393 | add_timer(&fep->time_keep); | ||
394 | 403 | ||
395 | fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev); | 404 | fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev); |
396 | if (IS_ERR(fep->ptp_clock)) { | 405 | if (IS_ERR(fep->ptp_clock)) { |
397 | fep->ptp_clock = NULL; | 406 | fep->ptp_clock = NULL; |
398 | pr_err("ptp_clock_register failed\n"); | 407 | pr_err("ptp_clock_register failed\n"); |
399 | } | 408 | } |
409 | |||
410 | schedule_delayed_work(&fep->time_keep, HZ); | ||
400 | } | 411 | } |
diff --git a/drivers/net/ethernet/ibm/ehea/ehea_main.c b/drivers/net/ethernet/ibm/ehea/ehea_main.c index a0b418e007a0..566b17db135a 100644 --- a/drivers/net/ethernet/ibm/ehea/ehea_main.c +++ b/drivers/net/ethernet/ibm/ehea/ehea_main.c | |||
@@ -1994,7 +1994,7 @@ static void xmit_common(struct sk_buff *skb, struct ehea_swqe *swqe) | |||
1994 | { | 1994 | { |
1995 | swqe->tx_control |= EHEA_SWQE_IMM_DATA_PRESENT | EHEA_SWQE_CRC; | 1995 | swqe->tx_control |= EHEA_SWQE_IMM_DATA_PRESENT | EHEA_SWQE_CRC; |
1996 | 1996 | ||
1997 | if (skb->protocol != htons(ETH_P_IP)) | 1997 | if (vlan_get_protocol(skb) != htons(ETH_P_IP)) |
1998 | return; | 1998 | return; |
1999 | 1999 | ||
2000 | if (skb->ip_summed == CHECKSUM_PARTIAL) | 2000 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
diff --git a/drivers/net/ethernet/ibm/ibmveth.c b/drivers/net/ethernet/ibm/ibmveth.c index c9127562bd22..21978cc019e7 100644 --- a/drivers/net/ethernet/ibm/ibmveth.c +++ b/drivers/net/ethernet/ibm/ibmveth.c | |||
@@ -292,6 +292,18 @@ failure: | |||
292 | atomic_add(buffers_added, &(pool->available)); | 292 | atomic_add(buffers_added, &(pool->available)); |
293 | } | 293 | } |
294 | 294 | ||
295 | /* | ||
296 | * The final 8 bytes of the buffer list is a counter of frames dropped | ||
297 | * because there was not a buffer in the buffer list capable of holding | ||
298 | * the frame. | ||
299 | */ | ||
300 | static void ibmveth_update_rx_no_buffer(struct ibmveth_adapter *adapter) | ||
301 | { | ||
302 | __be64 *p = adapter->buffer_list_addr + 4096 - 8; | ||
303 | |||
304 | adapter->rx_no_buffer = be64_to_cpup(p); | ||
305 | } | ||
306 | |||
295 | /* replenish routine */ | 307 | /* replenish routine */ |
296 | static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) | 308 | static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) |
297 | { | 309 | { |
@@ -307,8 +319,7 @@ static void ibmveth_replenish_task(struct ibmveth_adapter *adapter) | |||
307 | ibmveth_replenish_buffer_pool(adapter, pool); | 319 | ibmveth_replenish_buffer_pool(adapter, pool); |
308 | } | 320 | } |
309 | 321 | ||
310 | adapter->rx_no_buffer = *(u64 *)(((char*)adapter->buffer_list_addr) + | 322 | ibmveth_update_rx_no_buffer(adapter); |
311 | 4096 - 8); | ||
312 | } | 323 | } |
313 | 324 | ||
314 | /* empty and free ana buffer pool - also used to do cleanup in error paths */ | 325 | /* empty and free ana buffer pool - also used to do cleanup in error paths */ |
@@ -698,8 +709,7 @@ static int ibmveth_close(struct net_device *netdev) | |||
698 | 709 | ||
699 | free_irq(netdev->irq, netdev); | 710 | free_irq(netdev->irq, netdev); |
700 | 711 | ||
701 | adapter->rx_no_buffer = *(u64 *)(((char *)adapter->buffer_list_addr) + | 712 | ibmveth_update_rx_no_buffer(adapter); |
702 | 4096 - 8); | ||
703 | 713 | ||
704 | ibmveth_cleanup(adapter); | 714 | ibmveth_cleanup(adapter); |
705 | 715 | ||
diff --git a/drivers/net/ethernet/intel/e1000/e1000_main.c b/drivers/net/ethernet/intel/e1000/e1000_main.c index cbc330b301cd..ad3d5d12173f 100644 --- a/drivers/net/ethernet/intel/e1000/e1000_main.c +++ b/drivers/net/ethernet/intel/e1000/e1000_main.c | |||
@@ -2674,7 +2674,8 @@ set_itr_now: | |||
2674 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | 2674 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 |
2675 | 2675 | ||
2676 | static int e1000_tso(struct e1000_adapter *adapter, | 2676 | static int e1000_tso(struct e1000_adapter *adapter, |
2677 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb) | 2677 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb, |
2678 | __be16 protocol) | ||
2678 | { | 2679 | { |
2679 | struct e1000_context_desc *context_desc; | 2680 | struct e1000_context_desc *context_desc; |
2680 | struct e1000_buffer *buffer_info; | 2681 | struct e1000_buffer *buffer_info; |
@@ -2692,7 +2693,7 @@ static int e1000_tso(struct e1000_adapter *adapter, | |||
2692 | 2693 | ||
2693 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); | 2694 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
2694 | mss = skb_shinfo(skb)->gso_size; | 2695 | mss = skb_shinfo(skb)->gso_size; |
2695 | if (skb->protocol == htons(ETH_P_IP)) { | 2696 | if (protocol == htons(ETH_P_IP)) { |
2696 | struct iphdr *iph = ip_hdr(skb); | 2697 | struct iphdr *iph = ip_hdr(skb); |
2697 | iph->tot_len = 0; | 2698 | iph->tot_len = 0; |
2698 | iph->check = 0; | 2699 | iph->check = 0; |
@@ -2702,7 +2703,7 @@ static int e1000_tso(struct e1000_adapter *adapter, | |||
2702 | 0); | 2703 | 0); |
2703 | cmd_length = E1000_TXD_CMD_IP; | 2704 | cmd_length = E1000_TXD_CMD_IP; |
2704 | ipcse = skb_transport_offset(skb) - 1; | 2705 | ipcse = skb_transport_offset(skb) - 1; |
2705 | } else if (skb->protocol == htons(ETH_P_IPV6)) { | 2706 | } else if (skb_is_gso_v6(skb)) { |
2706 | ipv6_hdr(skb)->payload_len = 0; | 2707 | ipv6_hdr(skb)->payload_len = 0; |
2707 | tcp_hdr(skb)->check = | 2708 | tcp_hdr(skb)->check = |
2708 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, | 2709 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, |
@@ -2745,7 +2746,8 @@ static int e1000_tso(struct e1000_adapter *adapter, | |||
2745 | } | 2746 | } |
2746 | 2747 | ||
2747 | static bool e1000_tx_csum(struct e1000_adapter *adapter, | 2748 | static bool e1000_tx_csum(struct e1000_adapter *adapter, |
2748 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb) | 2749 | struct e1000_tx_ring *tx_ring, struct sk_buff *skb, |
2750 | __be16 protocol) | ||
2749 | { | 2751 | { |
2750 | struct e1000_context_desc *context_desc; | 2752 | struct e1000_context_desc *context_desc; |
2751 | struct e1000_buffer *buffer_info; | 2753 | struct e1000_buffer *buffer_info; |
@@ -2756,7 +2758,7 @@ static bool e1000_tx_csum(struct e1000_adapter *adapter, | |||
2756 | if (skb->ip_summed != CHECKSUM_PARTIAL) | 2758 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
2757 | return false; | 2759 | return false; |
2758 | 2760 | ||
2759 | switch (skb->protocol) { | 2761 | switch (protocol) { |
2760 | case cpu_to_be16(ETH_P_IP): | 2762 | case cpu_to_be16(ETH_P_IP): |
2761 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) | 2763 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
2762 | cmd_len |= E1000_TXD_CMD_TCP; | 2764 | cmd_len |= E1000_TXD_CMD_TCP; |
@@ -3097,6 +3099,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, | |||
3097 | int count = 0; | 3099 | int count = 0; |
3098 | int tso; | 3100 | int tso; |
3099 | unsigned int f; | 3101 | unsigned int f; |
3102 | __be16 protocol = vlan_get_protocol(skb); | ||
3100 | 3103 | ||
3101 | /* This goes back to the question of how to logically map a Tx queue | 3104 | /* This goes back to the question of how to logically map a Tx queue |
3102 | * to a flow. Right now, performance is impacted slightly negatively | 3105 | * to a flow. Right now, performance is impacted slightly negatively |
@@ -3210,7 +3213,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, | |||
3210 | 3213 | ||
3211 | first = tx_ring->next_to_use; | 3214 | first = tx_ring->next_to_use; |
3212 | 3215 | ||
3213 | tso = e1000_tso(adapter, tx_ring, skb); | 3216 | tso = e1000_tso(adapter, tx_ring, skb, protocol); |
3214 | if (tso < 0) { | 3217 | if (tso < 0) { |
3215 | dev_kfree_skb_any(skb); | 3218 | dev_kfree_skb_any(skb); |
3216 | return NETDEV_TX_OK; | 3219 | return NETDEV_TX_OK; |
@@ -3220,10 +3223,10 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, | |||
3220 | if (likely(hw->mac_type != e1000_82544)) | 3223 | if (likely(hw->mac_type != e1000_82544)) |
3221 | tx_ring->last_tx_tso = true; | 3224 | tx_ring->last_tx_tso = true; |
3222 | tx_flags |= E1000_TX_FLAGS_TSO; | 3225 | tx_flags |= E1000_TX_FLAGS_TSO; |
3223 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb))) | 3226 | } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol))) |
3224 | tx_flags |= E1000_TX_FLAGS_CSUM; | 3227 | tx_flags |= E1000_TX_FLAGS_CSUM; |
3225 | 3228 | ||
3226 | if (likely(skb->protocol == htons(ETH_P_IP))) | 3229 | if (protocol == htons(ETH_P_IP)) |
3227 | tx_flags |= E1000_TX_FLAGS_IPV4; | 3230 | tx_flags |= E1000_TX_FLAGS_IPV4; |
3228 | 3231 | ||
3229 | if (unlikely(skb->no_fcs)) | 3232 | if (unlikely(skb->no_fcs)) |
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c index 65c3aef2bd36..247335d2c7ec 100644 --- a/drivers/net/ethernet/intel/e1000e/netdev.c +++ b/drivers/net/ethernet/intel/e1000e/netdev.c | |||
@@ -5164,7 +5164,8 @@ link_up: | |||
5164 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 | 5164 | #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000 |
5165 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 | 5165 | #define E1000_TX_FLAGS_VLAN_SHIFT 16 |
5166 | 5166 | ||
5167 | static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) | 5167 | static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb, |
5168 | __be16 protocol) | ||
5168 | { | 5169 | { |
5169 | struct e1000_context_desc *context_desc; | 5170 | struct e1000_context_desc *context_desc; |
5170 | struct e1000_buffer *buffer_info; | 5171 | struct e1000_buffer *buffer_info; |
@@ -5183,7 +5184,7 @@ static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) | |||
5183 | 5184 | ||
5184 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); | 5185 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
5185 | mss = skb_shinfo(skb)->gso_size; | 5186 | mss = skb_shinfo(skb)->gso_size; |
5186 | if (skb->protocol == htons(ETH_P_IP)) { | 5187 | if (protocol == htons(ETH_P_IP)) { |
5187 | struct iphdr *iph = ip_hdr(skb); | 5188 | struct iphdr *iph = ip_hdr(skb); |
5188 | iph->tot_len = 0; | 5189 | iph->tot_len = 0; |
5189 | iph->check = 0; | 5190 | iph->check = 0; |
@@ -5231,7 +5232,8 @@ static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb) | |||
5231 | return 1; | 5232 | return 1; |
5232 | } | 5233 | } |
5233 | 5234 | ||
5234 | static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) | 5235 | static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb, |
5236 | __be16 protocol) | ||
5235 | { | 5237 | { |
5236 | struct e1000_adapter *adapter = tx_ring->adapter; | 5238 | struct e1000_adapter *adapter = tx_ring->adapter; |
5237 | struct e1000_context_desc *context_desc; | 5239 | struct e1000_context_desc *context_desc; |
@@ -5239,16 +5241,10 @@ static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb) | |||
5239 | unsigned int i; | 5241 | unsigned int i; |
5240 | u8 css; | 5242 | u8 css; |
5241 | u32 cmd_len = E1000_TXD_CMD_DEXT; | 5243 | u32 cmd_len = E1000_TXD_CMD_DEXT; |
5242 | __be16 protocol; | ||
5243 | 5244 | ||
5244 | if (skb->ip_summed != CHECKSUM_PARTIAL) | 5245 | if (skb->ip_summed != CHECKSUM_PARTIAL) |
5245 | return false; | 5246 | return false; |
5246 | 5247 | ||
5247 | if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) | ||
5248 | protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; | ||
5249 | else | ||
5250 | protocol = skb->protocol; | ||
5251 | |||
5252 | switch (protocol) { | 5248 | switch (protocol) { |
5253 | case cpu_to_be16(ETH_P_IP): | 5249 | case cpu_to_be16(ETH_P_IP): |
5254 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) | 5250 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
@@ -5546,6 +5542,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, | |||
5546 | int count = 0; | 5542 | int count = 0; |
5547 | int tso; | 5543 | int tso; |
5548 | unsigned int f; | 5544 | unsigned int f; |
5545 | __be16 protocol = vlan_get_protocol(skb); | ||
5549 | 5546 | ||
5550 | if (test_bit(__E1000_DOWN, &adapter->state)) { | 5547 | if (test_bit(__E1000_DOWN, &adapter->state)) { |
5551 | dev_kfree_skb_any(skb); | 5548 | dev_kfree_skb_any(skb); |
@@ -5620,7 +5617,7 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, | |||
5620 | 5617 | ||
5621 | first = tx_ring->next_to_use; | 5618 | first = tx_ring->next_to_use; |
5622 | 5619 | ||
5623 | tso = e1000_tso(tx_ring, skb); | 5620 | tso = e1000_tso(tx_ring, skb, protocol); |
5624 | if (tso < 0) { | 5621 | if (tso < 0) { |
5625 | dev_kfree_skb_any(skb); | 5622 | dev_kfree_skb_any(skb); |
5626 | return NETDEV_TX_OK; | 5623 | return NETDEV_TX_OK; |
@@ -5628,14 +5625,14 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, | |||
5628 | 5625 | ||
5629 | if (tso) | 5626 | if (tso) |
5630 | tx_flags |= E1000_TX_FLAGS_TSO; | 5627 | tx_flags |= E1000_TX_FLAGS_TSO; |
5631 | else if (e1000_tx_csum(tx_ring, skb)) | 5628 | else if (e1000_tx_csum(tx_ring, skb, protocol)) |
5632 | tx_flags |= E1000_TX_FLAGS_CSUM; | 5629 | tx_flags |= E1000_TX_FLAGS_CSUM; |
5633 | 5630 | ||
5634 | /* Old method was to assume IPv4 packet by default if TSO was enabled. | 5631 | /* Old method was to assume IPv4 packet by default if TSO was enabled. |
5635 | * 82571 hardware supports TSO capabilities for IPv6 as well... | 5632 | * 82571 hardware supports TSO capabilities for IPv6 as well... |
5636 | * no longer assume, we must. | 5633 | * no longer assume, we must. |
5637 | */ | 5634 | */ |
5638 | if (skb->protocol == htons(ETH_P_IP)) | 5635 | if (protocol == htons(ETH_P_IP)) |
5639 | tx_flags |= E1000_TX_FLAGS_IPV4; | 5636 | tx_flags |= E1000_TX_FLAGS_IPV4; |
5640 | 5637 | ||
5641 | if (unlikely(skb->no_fcs)) | 5638 | if (unlikely(skb->no_fcs)) |
diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c index bb7fe98b3a6c..537b6216971d 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c +++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c | |||
@@ -247,7 +247,7 @@ void i40e_ptp_rx_hang(struct i40e_vsi *vsi) | |||
247 | u32 prttsyn_stat; | 247 | u32 prttsyn_stat; |
248 | int n; | 248 | int n; |
249 | 249 | ||
250 | if (pf->flags & I40E_FLAG_PTP) | 250 | if (!(pf->flags & I40E_FLAG_PTP)) |
251 | return; | 251 | return; |
252 | 252 | ||
253 | prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_1); | 253 | prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_1); |
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c index a51aa37b7b5a..369848e107f8 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c +++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c | |||
@@ -2295,7 +2295,7 @@ static netdev_tx_t i40e_xmit_frame_ring(struct sk_buff *skb, | |||
2295 | goto out_drop; | 2295 | goto out_drop; |
2296 | 2296 | ||
2297 | /* obtain protocol of skb */ | 2297 | /* obtain protocol of skb */ |
2298 | protocol = skb->protocol; | 2298 | protocol = vlan_get_protocol(skb); |
2299 | 2299 | ||
2300 | /* record the location of the first descriptor for this packet */ | 2300 | /* record the location of the first descriptor for this packet */ |
2301 | first = &tx_ring->tx_bi[tx_ring->next_to_use]; | 2301 | first = &tx_ring->tx_bi[tx_ring->next_to_use]; |
diff --git a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c index 89672551dce9..3ac6a0d2f143 100644 --- a/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c +++ b/drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c | |||
@@ -1003,11 +1003,19 @@ int i40e_pci_sriov_configure(struct pci_dev *pdev, int num_vfs) | |||
1003 | static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode, | 1003 | static int i40e_vc_send_msg_to_vf(struct i40e_vf *vf, u32 v_opcode, |
1004 | u32 v_retval, u8 *msg, u16 msglen) | 1004 | u32 v_retval, u8 *msg, u16 msglen) |
1005 | { | 1005 | { |
1006 | struct i40e_pf *pf = vf->pf; | 1006 | struct i40e_pf *pf; |
1007 | struct i40e_hw *hw = &pf->hw; | 1007 | struct i40e_hw *hw; |
1008 | int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | 1008 | int abs_vf_id; |
1009 | i40e_status aq_ret; | 1009 | i40e_status aq_ret; |
1010 | 1010 | ||
1011 | /* validate the request */ | ||
1012 | if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs) | ||
1013 | return -EINVAL; | ||
1014 | |||
1015 | pf = vf->pf; | ||
1016 | hw = &pf->hw; | ||
1017 | abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | ||
1018 | |||
1011 | /* single place to detect unsuccessful return values */ | 1019 | /* single place to detect unsuccessful return values */ |
1012 | if (v_retval) { | 1020 | if (v_retval) { |
1013 | vf->num_invalid_msgs++; | 1021 | vf->num_invalid_msgs++; |
@@ -1928,17 +1936,20 @@ static void i40e_vc_vf_broadcast(struct i40e_pf *pf, | |||
1928 | { | 1936 | { |
1929 | struct i40e_hw *hw = &pf->hw; | 1937 | struct i40e_hw *hw = &pf->hw; |
1930 | struct i40e_vf *vf = pf->vf; | 1938 | struct i40e_vf *vf = pf->vf; |
1931 | int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | ||
1932 | int i; | 1939 | int i; |
1933 | 1940 | ||
1934 | for (i = 0; i < pf->num_alloc_vfs; i++) { | 1941 | for (i = 0; i < pf->num_alloc_vfs; i++, vf++) { |
1942 | int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | ||
1943 | /* Not all vfs are enabled so skip the ones that are not */ | ||
1944 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) && | ||
1945 | !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) | ||
1946 | continue; | ||
1947 | |||
1935 | /* Ignore return value on purpose - a given VF may fail, but | 1948 | /* Ignore return value on purpose - a given VF may fail, but |
1936 | * we need to keep going and send to all of them | 1949 | * we need to keep going and send to all of them |
1937 | */ | 1950 | */ |
1938 | i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval, | 1951 | i40e_aq_send_msg_to_vf(hw, abs_vf_id, v_opcode, v_retval, |
1939 | msg, msglen, NULL); | 1952 | msg, msglen, NULL); |
1940 | vf++; | ||
1941 | abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | ||
1942 | } | 1953 | } |
1943 | } | 1954 | } |
1944 | 1955 | ||
@@ -1954,12 +1965,12 @@ void i40e_vc_notify_link_state(struct i40e_pf *pf) | |||
1954 | struct i40e_hw *hw = &pf->hw; | 1965 | struct i40e_hw *hw = &pf->hw; |
1955 | struct i40e_vf *vf = pf->vf; | 1966 | struct i40e_vf *vf = pf->vf; |
1956 | struct i40e_link_status *ls = &pf->hw.phy.link_info; | 1967 | struct i40e_link_status *ls = &pf->hw.phy.link_info; |
1957 | int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | ||
1958 | int i; | 1968 | int i; |
1959 | 1969 | ||
1960 | pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE; | 1970 | pfe.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE; |
1961 | pfe.severity = I40E_PF_EVENT_SEVERITY_INFO; | 1971 | pfe.severity = I40E_PF_EVENT_SEVERITY_INFO; |
1962 | for (i = 0; i < pf->num_alloc_vfs; i++) { | 1972 | for (i = 0; i < pf->num_alloc_vfs; i++, vf++) { |
1973 | int abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | ||
1963 | if (vf->link_forced) { | 1974 | if (vf->link_forced) { |
1964 | pfe.event_data.link_event.link_status = vf->link_up; | 1975 | pfe.event_data.link_event.link_status = vf->link_up; |
1965 | pfe.event_data.link_event.link_speed = | 1976 | pfe.event_data.link_event.link_speed = |
@@ -1972,8 +1983,6 @@ void i40e_vc_notify_link_state(struct i40e_pf *pf) | |||
1972 | i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT, | 1983 | i40e_aq_send_msg_to_vf(hw, abs_vf_id, I40E_VIRTCHNL_OP_EVENT, |
1973 | 0, (u8 *)&pfe, sizeof(pfe), | 1984 | 0, (u8 *)&pfe, sizeof(pfe), |
1974 | NULL); | 1985 | NULL); |
1975 | vf++; | ||
1976 | abs_vf_id = vf->vf_id + hw->func_caps.vf_base_id; | ||
1977 | } | 1986 | } |
1978 | } | 1987 | } |
1979 | 1988 | ||
@@ -2002,7 +2011,18 @@ void i40e_vc_notify_reset(struct i40e_pf *pf) | |||
2002 | void i40e_vc_notify_vf_reset(struct i40e_vf *vf) | 2011 | void i40e_vc_notify_vf_reset(struct i40e_vf *vf) |
2003 | { | 2012 | { |
2004 | struct i40e_virtchnl_pf_event pfe; | 2013 | struct i40e_virtchnl_pf_event pfe; |
2005 | int abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id; | 2014 | int abs_vf_id; |
2015 | |||
2016 | /* validate the request */ | ||
2017 | if (!vf || vf->vf_id >= vf->pf->num_alloc_vfs) | ||
2018 | return; | ||
2019 | |||
2020 | /* verify if the VF is in either init or active before proceeding */ | ||
2021 | if (!test_bit(I40E_VF_STAT_INIT, &vf->vf_states) && | ||
2022 | !test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) | ||
2023 | return; | ||
2024 | |||
2025 | abs_vf_id = vf->vf_id + vf->pf->hw.func_caps.vf_base_id; | ||
2006 | 2026 | ||
2007 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; | 2027 | pfe.event = I40E_VIRTCHNL_EVENT_RESET_IMPENDING; |
2008 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; | 2028 | pfe.severity = I40E_PF_EVENT_SEVERITY_CERTAIN_DOOM; |
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c index 79bf96ca6489..95a3ec236b49 100644 --- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c +++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c | |||
@@ -1597,7 +1597,7 @@ static netdev_tx_t i40e_xmit_frame_ring(struct sk_buff *skb, | |||
1597 | goto out_drop; | 1597 | goto out_drop; |
1598 | 1598 | ||
1599 | /* obtain protocol of skb */ | 1599 | /* obtain protocol of skb */ |
1600 | protocol = skb->protocol; | 1600 | protocol = vlan_get_protocol(skb); |
1601 | 1601 | ||
1602 | /* record the location of the first descriptor for this packet */ | 1602 | /* record the location of the first descriptor for this packet */ |
1603 | first = &tx_ring->tx_bi[tx_ring->next_to_use]; | 1603 | first = &tx_ring->tx_bi[tx_ring->next_to_use]; |
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c index c9f1d1b7ef37..ade067de1689 100644 --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/mbus.h> | 20 | #include <linux/mbus.h> |
21 | #include <linux/module.h> | 21 | #include <linux/module.h> |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | #include <linux/if_vlan.h> | ||
23 | #include <net/ip.h> | 24 | #include <net/ip.h> |
24 | #include <net/ipv6.h> | 25 | #include <net/ipv6.h> |
25 | #include <linux/io.h> | 26 | #include <linux/io.h> |
@@ -1371,15 +1372,16 @@ static u32 mvneta_skb_tx_csum(struct mvneta_port *pp, struct sk_buff *skb) | |||
1371 | { | 1372 | { |
1372 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | 1373 | if (skb->ip_summed == CHECKSUM_PARTIAL) { |
1373 | int ip_hdr_len = 0; | 1374 | int ip_hdr_len = 0; |
1375 | __be16 l3_proto = vlan_get_protocol(skb); | ||
1374 | u8 l4_proto; | 1376 | u8 l4_proto; |
1375 | 1377 | ||
1376 | if (skb->protocol == htons(ETH_P_IP)) { | 1378 | if (l3_proto == htons(ETH_P_IP)) { |
1377 | struct iphdr *ip4h = ip_hdr(skb); | 1379 | struct iphdr *ip4h = ip_hdr(skb); |
1378 | 1380 | ||
1379 | /* Calculate IPv4 checksum and L4 checksum */ | 1381 | /* Calculate IPv4 checksum and L4 checksum */ |
1380 | ip_hdr_len = ip4h->ihl; | 1382 | ip_hdr_len = ip4h->ihl; |
1381 | l4_proto = ip4h->protocol; | 1383 | l4_proto = ip4h->protocol; |
1382 | } else if (skb->protocol == htons(ETH_P_IPV6)) { | 1384 | } else if (l3_proto == htons(ETH_P_IPV6)) { |
1383 | struct ipv6hdr *ip6h = ipv6_hdr(skb); | 1385 | struct ipv6hdr *ip6h = ipv6_hdr(skb); |
1384 | 1386 | ||
1385 | /* Read l4_protocol from one of IPv6 extra headers */ | 1387 | /* Read l4_protocol from one of IPv6 extra headers */ |
@@ -1390,7 +1392,7 @@ static u32 mvneta_skb_tx_csum(struct mvneta_port *pp, struct sk_buff *skb) | |||
1390 | return MVNETA_TX_L4_CSUM_NOT; | 1392 | return MVNETA_TX_L4_CSUM_NOT; |
1391 | 1393 | ||
1392 | return mvneta_txq_desc_csum(skb_network_offset(skb), | 1394 | return mvneta_txq_desc_csum(skb_network_offset(skb), |
1393 | skb->protocol, ip_hdr_len, l4_proto); | 1395 | l3_proto, ip_hdr_len, l4_proto); |
1394 | } | 1396 | } |
1395 | 1397 | ||
1396 | return MVNETA_TX_L4_CSUM_NOT; | 1398 | return MVNETA_TX_L4_CSUM_NOT; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c index bb536aa613f4..abddcf8c40aa 100644 --- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c +++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c | |||
@@ -474,39 +474,12 @@ static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *ad | |||
474 | int qpn, u64 *reg_id) | 474 | int qpn, u64 *reg_id) |
475 | { | 475 | { |
476 | int err; | 476 | int err; |
477 | struct mlx4_spec_list spec_eth_outer = { {NULL} }; | ||
478 | struct mlx4_spec_list spec_vxlan = { {NULL} }; | ||
479 | struct mlx4_spec_list spec_eth_inner = { {NULL} }; | ||
480 | |||
481 | struct mlx4_net_trans_rule rule = { | ||
482 | .queue_mode = MLX4_NET_TRANS_Q_FIFO, | ||
483 | .exclusive = 0, | ||
484 | .allow_loopback = 1, | ||
485 | .promisc_mode = MLX4_FS_REGULAR, | ||
486 | .priority = MLX4_DOMAIN_NIC, | ||
487 | }; | ||
488 | |||
489 | __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); | ||
490 | 477 | ||
491 | if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) | 478 | if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) |
492 | return 0; /* do nothing */ | 479 | return 0; /* do nothing */ |
493 | 480 | ||
494 | rule.port = priv->port; | 481 | err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn, |
495 | rule.qpn = qpn; | 482 | MLX4_DOMAIN_NIC, reg_id); |
496 | INIT_LIST_HEAD(&rule.list); | ||
497 | |||
498 | spec_eth_outer.id = MLX4_NET_TRANS_RULE_ID_ETH; | ||
499 | memcpy(spec_eth_outer.eth.dst_mac, addr, ETH_ALEN); | ||
500 | memcpy(spec_eth_outer.eth.dst_mac_msk, &mac_mask, ETH_ALEN); | ||
501 | |||
502 | spec_vxlan.id = MLX4_NET_TRANS_RULE_ID_VXLAN; /* any vxlan header */ | ||
503 | spec_eth_inner.id = MLX4_NET_TRANS_RULE_ID_ETH; /* any inner eth header */ | ||
504 | |||
505 | list_add_tail(&spec_eth_outer.list, &rule.list); | ||
506 | list_add_tail(&spec_vxlan.list, &rule.list); | ||
507 | list_add_tail(&spec_eth_inner.list, &rule.list); | ||
508 | |||
509 | err = mlx4_flow_attach(priv->mdev->dev, &rule, reg_id); | ||
510 | if (err) { | 483 | if (err) { |
511 | en_err(priv, "failed to add vxlan steering rule, err %d\n", err); | 484 | en_err(priv, "failed to add vxlan steering rule, err %d\n", err); |
512 | return err; | 485 | return err; |
diff --git a/drivers/net/ethernet/mellanox/mlx4/mcg.c b/drivers/net/ethernet/mellanox/mlx4/mcg.c index d80e7a6fac74..ca0f98c95105 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mcg.c +++ b/drivers/net/ethernet/mellanox/mlx4/mcg.c | |||
@@ -1020,6 +1020,44 @@ int mlx4_flow_detach(struct mlx4_dev *dev, u64 reg_id) | |||
1020 | } | 1020 | } |
1021 | EXPORT_SYMBOL_GPL(mlx4_flow_detach); | 1021 | EXPORT_SYMBOL_GPL(mlx4_flow_detach); |
1022 | 1022 | ||
1023 | int mlx4_tunnel_steer_add(struct mlx4_dev *dev, unsigned char *addr, | ||
1024 | int port, int qpn, u16 prio, u64 *reg_id) | ||
1025 | { | ||
1026 | int err; | ||
1027 | struct mlx4_spec_list spec_eth_outer = { {NULL} }; | ||
1028 | struct mlx4_spec_list spec_vxlan = { {NULL} }; | ||
1029 | struct mlx4_spec_list spec_eth_inner = { {NULL} }; | ||
1030 | |||
1031 | struct mlx4_net_trans_rule rule = { | ||
1032 | .queue_mode = MLX4_NET_TRANS_Q_FIFO, | ||
1033 | .exclusive = 0, | ||
1034 | .allow_loopback = 1, | ||
1035 | .promisc_mode = MLX4_FS_REGULAR, | ||
1036 | }; | ||
1037 | |||
1038 | __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16); | ||
1039 | |||
1040 | rule.port = port; | ||
1041 | rule.qpn = qpn; | ||
1042 | rule.priority = prio; | ||
1043 | INIT_LIST_HEAD(&rule.list); | ||
1044 | |||
1045 | spec_eth_outer.id = MLX4_NET_TRANS_RULE_ID_ETH; | ||
1046 | memcpy(spec_eth_outer.eth.dst_mac, addr, ETH_ALEN); | ||
1047 | memcpy(spec_eth_outer.eth.dst_mac_msk, &mac_mask, ETH_ALEN); | ||
1048 | |||
1049 | spec_vxlan.id = MLX4_NET_TRANS_RULE_ID_VXLAN; /* any vxlan header */ | ||
1050 | spec_eth_inner.id = MLX4_NET_TRANS_RULE_ID_ETH; /* any inner eth header */ | ||
1051 | |||
1052 | list_add_tail(&spec_eth_outer.list, &rule.list); | ||
1053 | list_add_tail(&spec_vxlan.list, &rule.list); | ||
1054 | list_add_tail(&spec_eth_inner.list, &rule.list); | ||
1055 | |||
1056 | err = mlx4_flow_attach(dev, &rule, reg_id); | ||
1057 | return err; | ||
1058 | } | ||
1059 | EXPORT_SYMBOL(mlx4_tunnel_steer_add); | ||
1060 | |||
1023 | int mlx4_FLOW_STEERING_IB_UC_QP_RANGE(struct mlx4_dev *dev, u32 min_range_qpn, | 1061 | int mlx4_FLOW_STEERING_IB_UC_QP_RANGE(struct mlx4_dev *dev, u32 min_range_qpn, |
1024 | u32 max_range_qpn) | 1062 | u32 max_range_qpn) |
1025 | { | 1063 | { |
diff --git a/drivers/net/ethernet/moxa/moxart_ether.c b/drivers/net/ethernet/moxa/moxart_ether.c index 5020fd47825d..2f12c88c66ab 100644 --- a/drivers/net/ethernet/moxa/moxart_ether.c +++ b/drivers/net/ethernet/moxa/moxart_ether.c | |||
@@ -206,7 +206,7 @@ static int moxart_rx_poll(struct napi_struct *napi, int budget) | |||
206 | int rx_head = priv->rx_head; | 206 | int rx_head = priv->rx_head; |
207 | int rx = 0; | 207 | int rx = 0; |
208 | 208 | ||
209 | while (1) { | 209 | while (rx < budget) { |
210 | desc = priv->rx_desc_base + (RX_REG_DESC_SIZE * rx_head); | 210 | desc = priv->rx_desc_base + (RX_REG_DESC_SIZE * rx_head); |
211 | desc0 = readl(desc + RX_REG_OFFSET_DESC0); | 211 | desc0 = readl(desc + RX_REG_OFFSET_DESC0); |
212 | 212 | ||
@@ -218,7 +218,7 @@ static int moxart_rx_poll(struct napi_struct *napi, int budget) | |||
218 | net_dbg_ratelimited("packet error\n"); | 218 | net_dbg_ratelimited("packet error\n"); |
219 | priv->stats.rx_dropped++; | 219 | priv->stats.rx_dropped++; |
220 | priv->stats.rx_errors++; | 220 | priv->stats.rx_errors++; |
221 | continue; | 221 | goto rx_next; |
222 | } | 222 | } |
223 | 223 | ||
224 | len = desc0 & RX_DESC0_FRAME_LEN_MASK; | 224 | len = desc0 & RX_DESC0_FRAME_LEN_MASK; |
@@ -226,13 +226,19 @@ static int moxart_rx_poll(struct napi_struct *napi, int budget) | |||
226 | if (len > RX_BUF_SIZE) | 226 | if (len > RX_BUF_SIZE) |
227 | len = RX_BUF_SIZE; | 227 | len = RX_BUF_SIZE; |
228 | 228 | ||
229 | skb = build_skb(priv->rx_buf[rx_head], priv->rx_buf_size); | 229 | dma_sync_single_for_cpu(&ndev->dev, |
230 | priv->rx_mapping[rx_head], | ||
231 | priv->rx_buf_size, DMA_FROM_DEVICE); | ||
232 | skb = netdev_alloc_skb_ip_align(ndev, len); | ||
233 | |||
230 | if (unlikely(!skb)) { | 234 | if (unlikely(!skb)) { |
231 | net_dbg_ratelimited("build_skb failed\n"); | 235 | net_dbg_ratelimited("netdev_alloc_skb_ip_align failed\n"); |
232 | priv->stats.rx_dropped++; | 236 | priv->stats.rx_dropped++; |
233 | priv->stats.rx_errors++; | 237 | priv->stats.rx_errors++; |
238 | goto rx_next; | ||
234 | } | 239 | } |
235 | 240 | ||
241 | memcpy(skb->data, priv->rx_buf[rx_head], len); | ||
236 | skb_put(skb, len); | 242 | skb_put(skb, len); |
237 | skb->protocol = eth_type_trans(skb, ndev); | 243 | skb->protocol = eth_type_trans(skb, ndev); |
238 | napi_gro_receive(&priv->napi, skb); | 244 | napi_gro_receive(&priv->napi, skb); |
@@ -244,18 +250,15 @@ static int moxart_rx_poll(struct napi_struct *napi, int budget) | |||
244 | if (desc0 & RX_DESC0_MULTICAST) | 250 | if (desc0 & RX_DESC0_MULTICAST) |
245 | priv->stats.multicast++; | 251 | priv->stats.multicast++; |
246 | 252 | ||
253 | rx_next: | ||
247 | writel(RX_DESC0_DMA_OWN, desc + RX_REG_OFFSET_DESC0); | 254 | writel(RX_DESC0_DMA_OWN, desc + RX_REG_OFFSET_DESC0); |
248 | 255 | ||
249 | rx_head = RX_NEXT(rx_head); | 256 | rx_head = RX_NEXT(rx_head); |
250 | priv->rx_head = rx_head; | 257 | priv->rx_head = rx_head; |
251 | |||
252 | if (rx >= budget) | ||
253 | break; | ||
254 | } | 258 | } |
255 | 259 | ||
256 | if (rx < budget) { | 260 | if (rx < budget) { |
257 | napi_gro_flush(napi, false); | 261 | napi_complete(napi); |
258 | __napi_complete(napi); | ||
259 | } | 262 | } |
260 | 263 | ||
261 | priv->reg_imr |= RPKT_FINISH_M; | 264 | priv->reg_imr |= RPKT_FINISH_M; |
@@ -346,10 +349,12 @@ static int moxart_mac_start_xmit(struct sk_buff *skb, struct net_device *ndev) | |||
346 | len = ETH_ZLEN; | 349 | len = ETH_ZLEN; |
347 | } | 350 | } |
348 | 351 | ||
349 | txdes1 = readl(desc + TX_REG_OFFSET_DESC1); | 352 | dma_sync_single_for_device(&ndev->dev, priv->tx_mapping[tx_head], |
350 | txdes1 |= TX_DESC1_LTS | TX_DESC1_FTS; | 353 | priv->tx_buf_size, DMA_TO_DEVICE); |
351 | txdes1 &= ~(TX_DESC1_FIFO_COMPLETE | TX_DESC1_INTR_COMPLETE); | 354 | |
352 | txdes1 |= (len & TX_DESC1_BUF_SIZE_MASK); | 355 | txdes1 = TX_DESC1_LTS | TX_DESC1_FTS | (len & TX_DESC1_BUF_SIZE_MASK); |
356 | if (tx_head == TX_DESC_NUM_MASK) | ||
357 | txdes1 |= TX_DESC1_END; | ||
353 | writel(txdes1, desc + TX_REG_OFFSET_DESC1); | 358 | writel(txdes1, desc + TX_REG_OFFSET_DESC1); |
354 | writel(TX_DESC0_DMA_OWN, desc + TX_REG_OFFSET_DESC0); | 359 | writel(TX_DESC0_DMA_OWN, desc + TX_REG_OFFSET_DESC0); |
355 | 360 | ||
@@ -465,8 +470,7 @@ static int moxart_mac_probe(struct platform_device *pdev) | |||
465 | spin_lock_init(&priv->txlock); | 470 | spin_lock_init(&priv->txlock); |
466 | 471 | ||
467 | priv->tx_buf_size = TX_BUF_SIZE; | 472 | priv->tx_buf_size = TX_BUF_SIZE; |
468 | priv->rx_buf_size = RX_BUF_SIZE + | 473 | priv->rx_buf_size = RX_BUF_SIZE; |
469 | SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); | ||
470 | 474 | ||
471 | priv->tx_desc_base = dma_alloc_coherent(NULL, TX_REG_DESC_SIZE * | 475 | priv->tx_desc_base = dma_alloc_coherent(NULL, TX_REG_DESC_SIZE * |
472 | TX_DESC_NUM, &priv->tx_base, | 476 | TX_DESC_NUM, &priv->tx_base, |
diff --git a/drivers/net/ethernet/nxp/lpc_eth.c b/drivers/net/ethernet/nxp/lpc_eth.c index 8706c0dbd0c3..a44a03c45014 100644 --- a/drivers/net/ethernet/nxp/lpc_eth.c +++ b/drivers/net/ethernet/nxp/lpc_eth.c | |||
@@ -1220,6 +1220,9 @@ static int lpc_eth_open(struct net_device *ndev) | |||
1220 | 1220 | ||
1221 | __lpc_eth_clock_enable(pldat, true); | 1221 | __lpc_eth_clock_enable(pldat, true); |
1222 | 1222 | ||
1223 | /* Suspended PHY makes LPC ethernet core block, so resume now */ | ||
1224 | phy_resume(pldat->phy_dev); | ||
1225 | |||
1223 | /* Reset and initialize */ | 1226 | /* Reset and initialize */ |
1224 | __lpc_eth_reset(pldat); | 1227 | __lpc_eth_reset(pldat); |
1225 | __lpc_eth_init(pldat); | 1228 | __lpc_eth_init(pldat); |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h index 16039d1497b8..b84f5ea3d659 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | |||
@@ -268,7 +268,7 @@ struct qlcnic_fdt { | |||
268 | u16 cksum; | 268 | u16 cksum; |
269 | u16 unused; | 269 | u16 unused; |
270 | u8 model[16]; | 270 | u8 model[16]; |
271 | u16 mfg_id; | 271 | u8 mfg_id; |
272 | u16 id; | 272 | u16 id; |
273 | u8 flag; | 273 | u8 flag; |
274 | u8 erase_cmd; | 274 | u8 erase_cmd; |
@@ -2362,6 +2362,19 @@ static inline u32 qlcnic_get_vnic_func_count(struct qlcnic_adapter *adapter) | |||
2362 | return QLC_DEFAULT_VNIC_COUNT; | 2362 | return QLC_DEFAULT_VNIC_COUNT; |
2363 | } | 2363 | } |
2364 | 2364 | ||
2365 | static inline void qlcnic_swap32_buffer(u32 *buffer, int count) | ||
2366 | { | ||
2367 | #if defined(__BIG_ENDIAN) | ||
2368 | u32 *tmp = buffer; | ||
2369 | int i; | ||
2370 | |||
2371 | for (i = 0; i < count; i++) { | ||
2372 | *tmp = swab32(*tmp); | ||
2373 | tmp++; | ||
2374 | } | ||
2375 | #endif | ||
2376 | } | ||
2377 | |||
2365 | #ifdef CONFIG_QLCNIC_HWMON | 2378 | #ifdef CONFIG_QLCNIC_HWMON |
2366 | void qlcnic_register_hwmon_dev(struct qlcnic_adapter *); | 2379 | void qlcnic_register_hwmon_dev(struct qlcnic_adapter *); |
2367 | void qlcnic_unregister_hwmon_dev(struct qlcnic_adapter *); | 2380 | void qlcnic_unregister_hwmon_dev(struct qlcnic_adapter *); |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c index a4a4ec0b68f8..476e4998ef99 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c | |||
@@ -2603,7 +2603,7 @@ int qlcnic_83xx_lockless_flash_read32(struct qlcnic_adapter *adapter, | |||
2603 | } | 2603 | } |
2604 | 2604 | ||
2605 | qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_DIRECT_WINDOW, | 2605 | qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_DIRECT_WINDOW, |
2606 | (addr)); | 2606 | (addr & 0xFFFF0000)); |
2607 | 2607 | ||
2608 | range = flash_offset + (count * sizeof(u32)); | 2608 | range = flash_offset + (count * sizeof(u32)); |
2609 | /* Check if data is spread across multiple sectors */ | 2609 | /* Check if data is spread across multiple sectors */ |
@@ -2753,7 +2753,7 @@ int qlcnic_83xx_read_flash_descriptor_table(struct qlcnic_adapter *adapter) | |||
2753 | ret = qlcnic_83xx_lockless_flash_read32(adapter, QLCNIC_FDT_LOCATION, | 2753 | ret = qlcnic_83xx_lockless_flash_read32(adapter, QLCNIC_FDT_LOCATION, |
2754 | (u8 *)&adapter->ahw->fdt, | 2754 | (u8 *)&adapter->ahw->fdt, |
2755 | count); | 2755 | count); |
2756 | 2756 | qlcnic_swap32_buffer((u32 *)&adapter->ahw->fdt, count); | |
2757 | qlcnic_83xx_unlock_flash(adapter); | 2757 | qlcnic_83xx_unlock_flash(adapter); |
2758 | return ret; | 2758 | return ret; |
2759 | } | 2759 | } |
@@ -2788,7 +2788,7 @@ int qlcnic_83xx_erase_flash_sector(struct qlcnic_adapter *adapter, | |||
2788 | 2788 | ||
2789 | addr1 = (sector_start_addr & 0xFF) << 16; | 2789 | addr1 = (sector_start_addr & 0xFF) << 16; |
2790 | addr2 = (sector_start_addr & 0xFF0000) >> 16; | 2790 | addr2 = (sector_start_addr & 0xFF0000) >> 16; |
2791 | reversed_addr = addr1 | addr2; | 2791 | reversed_addr = addr1 | addr2 | (sector_start_addr & 0xFF00); |
2792 | 2792 | ||
2793 | qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA, | 2793 | qlcnic_83xx_wrt_reg_indirect(adapter, QLC_83XX_FLASH_WRDATA, |
2794 | reversed_addr); | 2794 | reversed_addr); |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c index f33559b72528..86783e1afcf7 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c | |||
@@ -1378,31 +1378,45 @@ static int qlcnic_83xx_copy_fw_file(struct qlcnic_adapter *adapter) | |||
1378 | { | 1378 | { |
1379 | struct qlc_83xx_fw_info *fw_info = adapter->ahw->fw_info; | 1379 | struct qlc_83xx_fw_info *fw_info = adapter->ahw->fw_info; |
1380 | const struct firmware *fw = fw_info->fw; | 1380 | const struct firmware *fw = fw_info->fw; |
1381 | u32 dest, *p_cache; | 1381 | u32 dest, *p_cache, *temp; |
1382 | int i, ret = -EIO; | 1382 | int i, ret = -EIO; |
1383 | __le32 *temp_le; | ||
1383 | u8 data[16]; | 1384 | u8 data[16]; |
1384 | size_t size; | 1385 | size_t size; |
1385 | u64 addr; | 1386 | u64 addr; |
1386 | 1387 | ||
1388 | temp = kzalloc(fw->size, GFP_KERNEL); | ||
1389 | if (!temp) { | ||
1390 | release_firmware(fw); | ||
1391 | fw_info->fw = NULL; | ||
1392 | return -ENOMEM; | ||
1393 | } | ||
1394 | |||
1395 | temp_le = (__le32 *)fw->data; | ||
1396 | |||
1397 | /* FW image in file is in little endian, swap the data to nullify | ||
1398 | * the effect of writel() operation on big endian platform. | ||
1399 | */ | ||
1400 | for (i = 0; i < fw->size / sizeof(u32); i++) | ||
1401 | temp[i] = __le32_to_cpu(temp_le[i]); | ||
1402 | |||
1387 | dest = QLCRDX(adapter->ahw, QLCNIC_FW_IMAGE_ADDR); | 1403 | dest = QLCRDX(adapter->ahw, QLCNIC_FW_IMAGE_ADDR); |
1388 | size = (fw->size & ~0xF); | 1404 | size = (fw->size & ~0xF); |
1389 | p_cache = (u32 *)fw->data; | 1405 | p_cache = temp; |
1390 | addr = (u64)dest; | 1406 | addr = (u64)dest; |
1391 | 1407 | ||
1392 | ret = qlcnic_ms_mem_write128(adapter, addr, | 1408 | ret = qlcnic_ms_mem_write128(adapter, addr, |
1393 | p_cache, size / 16); | 1409 | p_cache, size / 16); |
1394 | if (ret) { | 1410 | if (ret) { |
1395 | dev_err(&adapter->pdev->dev, "MS memory write failed\n"); | 1411 | dev_err(&adapter->pdev->dev, "MS memory write failed\n"); |
1396 | release_firmware(fw); | 1412 | goto exit; |
1397 | fw_info->fw = NULL; | ||
1398 | return -EIO; | ||
1399 | } | 1413 | } |
1400 | 1414 | ||
1401 | /* alignment check */ | 1415 | /* alignment check */ |
1402 | if (fw->size & 0xF) { | 1416 | if (fw->size & 0xF) { |
1403 | addr = dest + size; | 1417 | addr = dest + size; |
1404 | for (i = 0; i < (fw->size & 0xF); i++) | 1418 | for (i = 0; i < (fw->size & 0xF); i++) |
1405 | data[i] = fw->data[size + i]; | 1419 | data[i] = temp[size + i]; |
1406 | for (; i < 16; i++) | 1420 | for (; i < 16; i++) |
1407 | data[i] = 0; | 1421 | data[i] = 0; |
1408 | ret = qlcnic_ms_mem_write128(adapter, addr, | 1422 | ret = qlcnic_ms_mem_write128(adapter, addr, |
@@ -1410,15 +1424,16 @@ static int qlcnic_83xx_copy_fw_file(struct qlcnic_adapter *adapter) | |||
1410 | if (ret) { | 1424 | if (ret) { |
1411 | dev_err(&adapter->pdev->dev, | 1425 | dev_err(&adapter->pdev->dev, |
1412 | "MS memory write failed\n"); | 1426 | "MS memory write failed\n"); |
1413 | release_firmware(fw); | 1427 | goto exit; |
1414 | fw_info->fw = NULL; | ||
1415 | return -EIO; | ||
1416 | } | 1428 | } |
1417 | } | 1429 | } |
1430 | |||
1431 | exit: | ||
1418 | release_firmware(fw); | 1432 | release_firmware(fw); |
1419 | fw_info->fw = NULL; | 1433 | fw_info->fw = NULL; |
1434 | kfree(temp); | ||
1420 | 1435 | ||
1421 | return 0; | 1436 | return ret; |
1422 | } | 1437 | } |
1423 | 1438 | ||
1424 | static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter) | 1439 | static void qlcnic_83xx_dump_pause_control_regs(struct qlcnic_adapter *adapter) |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c index e46fc39d425d..c9f57fb84b9e 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_minidump.c | |||
@@ -47,15 +47,26 @@ struct qlcnic_common_entry_hdr { | |||
47 | u32 type; | 47 | u32 type; |
48 | u32 offset; | 48 | u32 offset; |
49 | u32 cap_size; | 49 | u32 cap_size; |
50 | #if defined(__LITTLE_ENDIAN) | ||
50 | u8 mask; | 51 | u8 mask; |
51 | u8 rsvd[2]; | 52 | u8 rsvd[2]; |
52 | u8 flags; | 53 | u8 flags; |
54 | #else | ||
55 | u8 flags; | ||
56 | u8 rsvd[2]; | ||
57 | u8 mask; | ||
58 | #endif | ||
53 | } __packed; | 59 | } __packed; |
54 | 60 | ||
55 | struct __crb { | 61 | struct __crb { |
56 | u32 addr; | 62 | u32 addr; |
63 | #if defined(__LITTLE_ENDIAN) | ||
57 | u8 stride; | 64 | u8 stride; |
58 | u8 rsvd1[3]; | 65 | u8 rsvd1[3]; |
66 | #else | ||
67 | u8 rsvd1[3]; | ||
68 | u8 stride; | ||
69 | #endif | ||
59 | u32 data_size; | 70 | u32 data_size; |
60 | u32 no_ops; | 71 | u32 no_ops; |
61 | u32 rsvd2[4]; | 72 | u32 rsvd2[4]; |
@@ -63,15 +74,28 @@ struct __crb { | |||
63 | 74 | ||
64 | struct __ctrl { | 75 | struct __ctrl { |
65 | u32 addr; | 76 | u32 addr; |
77 | #if defined(__LITTLE_ENDIAN) | ||
66 | u8 stride; | 78 | u8 stride; |
67 | u8 index_a; | 79 | u8 index_a; |
68 | u16 timeout; | 80 | u16 timeout; |
81 | #else | ||
82 | u16 timeout; | ||
83 | u8 index_a; | ||
84 | u8 stride; | ||
85 | #endif | ||
69 | u32 data_size; | 86 | u32 data_size; |
70 | u32 no_ops; | 87 | u32 no_ops; |
88 | #if defined(__LITTLE_ENDIAN) | ||
71 | u8 opcode; | 89 | u8 opcode; |
72 | u8 index_v; | 90 | u8 index_v; |
73 | u8 shl_val; | 91 | u8 shl_val; |
74 | u8 shr_val; | 92 | u8 shr_val; |
93 | #else | ||
94 | u8 shr_val; | ||
95 | u8 shl_val; | ||
96 | u8 index_v; | ||
97 | u8 opcode; | ||
98 | #endif | ||
75 | u32 val1; | 99 | u32 val1; |
76 | u32 val2; | 100 | u32 val2; |
77 | u32 val3; | 101 | u32 val3; |
@@ -79,16 +103,27 @@ struct __ctrl { | |||
79 | 103 | ||
80 | struct __cache { | 104 | struct __cache { |
81 | u32 addr; | 105 | u32 addr; |
106 | #if defined(__LITTLE_ENDIAN) | ||
82 | u16 stride; | 107 | u16 stride; |
83 | u16 init_tag_val; | 108 | u16 init_tag_val; |
109 | #else | ||
110 | u16 init_tag_val; | ||
111 | u16 stride; | ||
112 | #endif | ||
84 | u32 size; | 113 | u32 size; |
85 | u32 no_ops; | 114 | u32 no_ops; |
86 | u32 ctrl_addr; | 115 | u32 ctrl_addr; |
87 | u32 ctrl_val; | 116 | u32 ctrl_val; |
88 | u32 read_addr; | 117 | u32 read_addr; |
118 | #if defined(__LITTLE_ENDIAN) | ||
89 | u8 read_addr_stride; | 119 | u8 read_addr_stride; |
90 | u8 read_addr_num; | 120 | u8 read_addr_num; |
91 | u8 rsvd1[2]; | 121 | u8 rsvd1[2]; |
122 | #else | ||
123 | u8 rsvd1[2]; | ||
124 | u8 read_addr_num; | ||
125 | u8 read_addr_stride; | ||
126 | #endif | ||
92 | } __packed; | 127 | } __packed; |
93 | 128 | ||
94 | struct __ocm { | 129 | struct __ocm { |
@@ -122,23 +157,39 @@ struct __mux { | |||
122 | 157 | ||
123 | struct __queue { | 158 | struct __queue { |
124 | u32 sel_addr; | 159 | u32 sel_addr; |
160 | #if defined(__LITTLE_ENDIAN) | ||
125 | u16 stride; | 161 | u16 stride; |
126 | u8 rsvd[2]; | 162 | u8 rsvd[2]; |
163 | #else | ||
164 | u8 rsvd[2]; | ||
165 | u16 stride; | ||
166 | #endif | ||
127 | u32 size; | 167 | u32 size; |
128 | u32 no_ops; | 168 | u32 no_ops; |
129 | u8 rsvd2[8]; | 169 | u8 rsvd2[8]; |
130 | u32 read_addr; | 170 | u32 read_addr; |
171 | #if defined(__LITTLE_ENDIAN) | ||
131 | u8 read_addr_stride; | 172 | u8 read_addr_stride; |
132 | u8 read_addr_cnt; | 173 | u8 read_addr_cnt; |
133 | u8 rsvd3[2]; | 174 | u8 rsvd3[2]; |
175 | #else | ||
176 | u8 rsvd3[2]; | ||
177 | u8 read_addr_cnt; | ||
178 | u8 read_addr_stride; | ||
179 | #endif | ||
134 | } __packed; | 180 | } __packed; |
135 | 181 | ||
136 | struct __pollrd { | 182 | struct __pollrd { |
137 | u32 sel_addr; | 183 | u32 sel_addr; |
138 | u32 read_addr; | 184 | u32 read_addr; |
139 | u32 sel_val; | 185 | u32 sel_val; |
186 | #if defined(__LITTLE_ENDIAN) | ||
140 | u16 sel_val_stride; | 187 | u16 sel_val_stride; |
141 | u16 no_ops; | 188 | u16 no_ops; |
189 | #else | ||
190 | u16 no_ops; | ||
191 | u16 sel_val_stride; | ||
192 | #endif | ||
142 | u32 poll_wait; | 193 | u32 poll_wait; |
143 | u32 poll_mask; | 194 | u32 poll_mask; |
144 | u32 data_size; | 195 | u32 data_size; |
@@ -153,9 +204,15 @@ struct __mux2 { | |||
153 | u32 no_ops; | 204 | u32 no_ops; |
154 | u32 sel_val_mask; | 205 | u32 sel_val_mask; |
155 | u32 read_addr; | 206 | u32 read_addr; |
207 | #if defined(__LITTLE_ENDIAN) | ||
156 | u8 sel_val_stride; | 208 | u8 sel_val_stride; |
157 | u8 data_size; | 209 | u8 data_size; |
158 | u8 rsvd[2]; | 210 | u8 rsvd[2]; |
211 | #else | ||
212 | u8 rsvd[2]; | ||
213 | u8 data_size; | ||
214 | u8 sel_val_stride; | ||
215 | #endif | ||
159 | } __packed; | 216 | } __packed; |
160 | 217 | ||
161 | struct __pollrdmwr { | 218 | struct __pollrdmwr { |
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c index f5786d5792df..59a721fba018 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c | |||
@@ -280,6 +280,7 @@ static ssize_t qlcnic_sysfs_read_crb(struct file *filp, struct kobject *kobj, | |||
280 | if (ret != 0) | 280 | if (ret != 0) |
281 | return ret; | 281 | return ret; |
282 | qlcnic_read_crb(adapter, buf, offset, size); | 282 | qlcnic_read_crb(adapter, buf, offset, size); |
283 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
283 | 284 | ||
284 | return size; | 285 | return size; |
285 | } | 286 | } |
@@ -296,6 +297,7 @@ static ssize_t qlcnic_sysfs_write_crb(struct file *filp, struct kobject *kobj, | |||
296 | if (ret != 0) | 297 | if (ret != 0) |
297 | return ret; | 298 | return ret; |
298 | 299 | ||
300 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
299 | qlcnic_write_crb(adapter, buf, offset, size); | 301 | qlcnic_write_crb(adapter, buf, offset, size); |
300 | return size; | 302 | return size; |
301 | } | 303 | } |
@@ -329,6 +331,7 @@ static ssize_t qlcnic_sysfs_read_mem(struct file *filp, struct kobject *kobj, | |||
329 | return -EIO; | 331 | return -EIO; |
330 | 332 | ||
331 | memcpy(buf, &data, size); | 333 | memcpy(buf, &data, size); |
334 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
332 | 335 | ||
333 | return size; | 336 | return size; |
334 | } | 337 | } |
@@ -346,6 +349,7 @@ static ssize_t qlcnic_sysfs_write_mem(struct file *filp, struct kobject *kobj, | |||
346 | if (ret != 0) | 349 | if (ret != 0) |
347 | return ret; | 350 | return ret; |
348 | 351 | ||
352 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
349 | memcpy(&data, buf, size); | 353 | memcpy(&data, buf, size); |
350 | 354 | ||
351 | if (qlcnic_pci_mem_write_2M(adapter, offset, data)) | 355 | if (qlcnic_pci_mem_write_2M(adapter, offset, data)) |
@@ -412,6 +416,7 @@ static ssize_t qlcnic_sysfs_write_pm_config(struct file *filp, | |||
412 | if (rem) | 416 | if (rem) |
413 | return QL_STATUS_INVALID_PARAM; | 417 | return QL_STATUS_INVALID_PARAM; |
414 | 418 | ||
419 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
415 | pm_cfg = (struct qlcnic_pm_func_cfg *)buf; | 420 | pm_cfg = (struct qlcnic_pm_func_cfg *)buf; |
416 | ret = validate_pm_config(adapter, pm_cfg, count); | 421 | ret = validate_pm_config(adapter, pm_cfg, count); |
417 | 422 | ||
@@ -474,6 +479,7 @@ static ssize_t qlcnic_sysfs_read_pm_config(struct file *filp, | |||
474 | pm_cfg[pci_func].dest_npar = 0; | 479 | pm_cfg[pci_func].dest_npar = 0; |
475 | pm_cfg[pci_func].pci_func = i; | 480 | pm_cfg[pci_func].pci_func = i; |
476 | } | 481 | } |
482 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
477 | return size; | 483 | return size; |
478 | } | 484 | } |
479 | 485 | ||
@@ -555,6 +561,7 @@ static ssize_t qlcnic_sysfs_write_esw_config(struct file *file, | |||
555 | if (rem) | 561 | if (rem) |
556 | return QL_STATUS_INVALID_PARAM; | 562 | return QL_STATUS_INVALID_PARAM; |
557 | 563 | ||
564 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
558 | esw_cfg = (struct qlcnic_esw_func_cfg *)buf; | 565 | esw_cfg = (struct qlcnic_esw_func_cfg *)buf; |
559 | ret = validate_esw_config(adapter, esw_cfg, count); | 566 | ret = validate_esw_config(adapter, esw_cfg, count); |
560 | if (ret) | 567 | if (ret) |
@@ -649,6 +656,7 @@ static ssize_t qlcnic_sysfs_read_esw_config(struct file *file, | |||
649 | if (qlcnic_get_eswitch_port_config(adapter, &esw_cfg[pci_func])) | 656 | if (qlcnic_get_eswitch_port_config(adapter, &esw_cfg[pci_func])) |
650 | return QL_STATUS_INVALID_PARAM; | 657 | return QL_STATUS_INVALID_PARAM; |
651 | } | 658 | } |
659 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
652 | return size; | 660 | return size; |
653 | } | 661 | } |
654 | 662 | ||
@@ -688,6 +696,7 @@ static ssize_t qlcnic_sysfs_write_npar_config(struct file *file, | |||
688 | if (rem) | 696 | if (rem) |
689 | return QL_STATUS_INVALID_PARAM; | 697 | return QL_STATUS_INVALID_PARAM; |
690 | 698 | ||
699 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
691 | np_cfg = (struct qlcnic_npar_func_cfg *)buf; | 700 | np_cfg = (struct qlcnic_npar_func_cfg *)buf; |
692 | ret = validate_npar_config(adapter, np_cfg, count); | 701 | ret = validate_npar_config(adapter, np_cfg, count); |
693 | if (ret) | 702 | if (ret) |
@@ -759,6 +768,7 @@ static ssize_t qlcnic_sysfs_read_npar_config(struct file *file, | |||
759 | np_cfg[pci_func].max_tx_queues = nic_info.max_tx_ques; | 768 | np_cfg[pci_func].max_tx_queues = nic_info.max_tx_ques; |
760 | np_cfg[pci_func].max_rx_queues = nic_info.max_rx_ques; | 769 | np_cfg[pci_func].max_rx_queues = nic_info.max_rx_ques; |
761 | } | 770 | } |
771 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
762 | return size; | 772 | return size; |
763 | } | 773 | } |
764 | 774 | ||
@@ -916,6 +926,7 @@ static ssize_t qlcnic_sysfs_read_pci_config(struct file *file, | |||
916 | 926 | ||
917 | pci_cfg = (struct qlcnic_pci_func_cfg *)buf; | 927 | pci_cfg = (struct qlcnic_pci_func_cfg *)buf; |
918 | count = size / sizeof(struct qlcnic_pci_func_cfg); | 928 | count = size / sizeof(struct qlcnic_pci_func_cfg); |
929 | qlcnic_swap32_buffer((u32 *)pci_info, size / sizeof(u32)); | ||
919 | for (i = 0; i < count; i++) { | 930 | for (i = 0; i < count; i++) { |
920 | pci_cfg[i].pci_func = pci_info[i].id; | 931 | pci_cfg[i].pci_func = pci_info[i].id; |
921 | pci_cfg[i].func_type = pci_info[i].type; | 932 | pci_cfg[i].func_type = pci_info[i].type; |
@@ -969,6 +980,7 @@ static ssize_t qlcnic_83xx_sysfs_flash_read_handler(struct file *filp, | |||
969 | } | 980 | } |
970 | 981 | ||
971 | qlcnic_83xx_unlock_flash(adapter); | 982 | qlcnic_83xx_unlock_flash(adapter); |
983 | qlcnic_swap32_buffer((u32 *)p_read_buf, count); | ||
972 | memcpy(buf, p_read_buf, size); | 984 | memcpy(buf, p_read_buf, size); |
973 | kfree(p_read_buf); | 985 | kfree(p_read_buf); |
974 | 986 | ||
@@ -986,9 +998,10 @@ static int qlcnic_83xx_sysfs_flash_bulk_write(struct qlcnic_adapter *adapter, | |||
986 | if (!p_cache) | 998 | if (!p_cache) |
987 | return -ENOMEM; | 999 | return -ENOMEM; |
988 | 1000 | ||
1001 | count = size / sizeof(u32); | ||
1002 | qlcnic_swap32_buffer((u32 *)buf, count); | ||
989 | memcpy(p_cache, buf, size); | 1003 | memcpy(p_cache, buf, size); |
990 | p_src = p_cache; | 1004 | p_src = p_cache; |
991 | count = size / sizeof(u32); | ||
992 | 1005 | ||
993 | if (qlcnic_83xx_lock_flash(adapter) != 0) { | 1006 | if (qlcnic_83xx_lock_flash(adapter) != 0) { |
994 | kfree(p_cache); | 1007 | kfree(p_cache); |
@@ -1053,6 +1066,7 @@ static int qlcnic_83xx_sysfs_flash_write(struct qlcnic_adapter *adapter, | |||
1053 | if (!p_cache) | 1066 | if (!p_cache) |
1054 | return -ENOMEM; | 1067 | return -ENOMEM; |
1055 | 1068 | ||
1069 | qlcnic_swap32_buffer((u32 *)buf, size / sizeof(u32)); | ||
1056 | memcpy(p_cache, buf, size); | 1070 | memcpy(p_cache, buf, size); |
1057 | p_src = p_cache; | 1071 | p_src = p_cache; |
1058 | count = size / sizeof(u32); | 1072 | count = size / sizeof(u32); |
diff --git a/drivers/net/ethernet/qlogic/qlge/qlge_main.c b/drivers/net/ethernet/qlogic/qlge/qlge_main.c index 188626e2a861..3e96f269150d 100644 --- a/drivers/net/ethernet/qlogic/qlge/qlge_main.c +++ b/drivers/net/ethernet/qlogic/qlge/qlge_main.c | |||
@@ -2556,6 +2556,7 @@ static int ql_tso(struct sk_buff *skb, struct ob_mac_tso_iocb_req *mac_iocb_ptr) | |||
2556 | 2556 | ||
2557 | if (skb_is_gso(skb)) { | 2557 | if (skb_is_gso(skb)) { |
2558 | int err; | 2558 | int err; |
2559 | __be16 l3_proto = vlan_get_protocol(skb); | ||
2559 | 2560 | ||
2560 | err = skb_cow_head(skb, 0); | 2561 | err = skb_cow_head(skb, 0); |
2561 | if (err < 0) | 2562 | if (err < 0) |
@@ -2572,7 +2573,7 @@ static int ql_tso(struct sk_buff *skb, struct ob_mac_tso_iocb_req *mac_iocb_ptr) | |||
2572 | << OB_MAC_TRANSPORT_HDR_SHIFT); | 2573 | << OB_MAC_TRANSPORT_HDR_SHIFT); |
2573 | mac_iocb_ptr->mss = cpu_to_le16(skb_shinfo(skb)->gso_size); | 2574 | mac_iocb_ptr->mss = cpu_to_le16(skb_shinfo(skb)->gso_size); |
2574 | mac_iocb_ptr->flags2 |= OB_MAC_TSO_IOCB_LSO; | 2575 | mac_iocb_ptr->flags2 |= OB_MAC_TSO_IOCB_LSO; |
2575 | if (likely(skb->protocol == htons(ETH_P_IP))) { | 2576 | if (likely(l3_proto == htons(ETH_P_IP))) { |
2576 | struct iphdr *iph = ip_hdr(skb); | 2577 | struct iphdr *iph = ip_hdr(skb); |
2577 | iph->check = 0; | 2578 | iph->check = 0; |
2578 | mac_iocb_ptr->flags1 |= OB_MAC_TSO_IOCB_IP4; | 2579 | mac_iocb_ptr->flags1 |= OB_MAC_TSO_IOCB_IP4; |
@@ -2580,7 +2581,7 @@ static int ql_tso(struct sk_buff *skb, struct ob_mac_tso_iocb_req *mac_iocb_ptr) | |||
2580 | iph->daddr, 0, | 2581 | iph->daddr, 0, |
2581 | IPPROTO_TCP, | 2582 | IPPROTO_TCP, |
2582 | 0); | 2583 | 0); |
2583 | } else if (skb->protocol == htons(ETH_P_IPV6)) { | 2584 | } else if (l3_proto == htons(ETH_P_IPV6)) { |
2584 | mac_iocb_ptr->flags1 |= OB_MAC_TSO_IOCB_IP6; | 2585 | mac_iocb_ptr->flags1 |= OB_MAC_TSO_IOCB_IP6; |
2585 | tcp_hdr(skb)->check = | 2586 | tcp_hdr(skb)->check = |
2586 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, | 2587 | ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, |
diff --git a/drivers/net/ethernet/renesas/Kconfig b/drivers/net/ethernet/renesas/Kconfig index 9e757c792d84..196e98a2d93b 100644 --- a/drivers/net/ethernet/renesas/Kconfig +++ b/drivers/net/ethernet/renesas/Kconfig | |||
@@ -5,6 +5,7 @@ | |||
5 | config SH_ETH | 5 | config SH_ETH |
6 | tristate "Renesas SuperH Ethernet support" | 6 | tristate "Renesas SuperH Ethernet support" |
7 | depends on HAS_DMA | 7 | depends on HAS_DMA |
8 | depends on ARCH_SHMOBILE || SUPERH || COMPILE_TEST | ||
8 | select CRC32 | 9 | select CRC32 |
9 | select MII | 10 | select MII |
10 | select MDIO_BITBANG | 11 | select MDIO_BITBANG |
diff --git a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c index c553f6b5a913..cf28daba4346 100644 --- a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c +++ b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c | |||
@@ -28,7 +28,7 @@ | |||
28 | 28 | ||
29 | #include "stmmac.h" | 29 | #include "stmmac.h" |
30 | 30 | ||
31 | static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | 31 | static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) |
32 | { | 32 | { |
33 | struct stmmac_priv *priv = (struct stmmac_priv *)p; | 33 | struct stmmac_priv *priv = (struct stmmac_priv *)p; |
34 | unsigned int txsize = priv->dma_tx_size; | 34 | unsigned int txsize = priv->dma_tx_size; |
@@ -47,7 +47,9 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
47 | 47 | ||
48 | desc->des2 = dma_map_single(priv->device, skb->data, | 48 | desc->des2 = dma_map_single(priv->device, skb->data, |
49 | bmax, DMA_TO_DEVICE); | 49 | bmax, DMA_TO_DEVICE); |
50 | priv->tx_skbuff_dma[entry] = desc->des2; | 50 | if (dma_mapping_error(priv->device, desc->des2)) |
51 | return -1; | ||
52 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
51 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, STMMAC_CHAIN_MODE); | 53 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, STMMAC_CHAIN_MODE); |
52 | 54 | ||
53 | while (len != 0) { | 55 | while (len != 0) { |
@@ -59,7 +61,9 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
59 | desc->des2 = dma_map_single(priv->device, | 61 | desc->des2 = dma_map_single(priv->device, |
60 | (skb->data + bmax * i), | 62 | (skb->data + bmax * i), |
61 | bmax, DMA_TO_DEVICE); | 63 | bmax, DMA_TO_DEVICE); |
62 | priv->tx_skbuff_dma[entry] = desc->des2; | 64 | if (dma_mapping_error(priv->device, desc->des2)) |
65 | return -1; | ||
66 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
63 | priv->hw->desc->prepare_tx_desc(desc, 0, bmax, csum, | 67 | priv->hw->desc->prepare_tx_desc(desc, 0, bmax, csum, |
64 | STMMAC_CHAIN_MODE); | 68 | STMMAC_CHAIN_MODE); |
65 | priv->hw->desc->set_tx_owner(desc); | 69 | priv->hw->desc->set_tx_owner(desc); |
@@ -69,7 +73,9 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
69 | desc->des2 = dma_map_single(priv->device, | 73 | desc->des2 = dma_map_single(priv->device, |
70 | (skb->data + bmax * i), len, | 74 | (skb->data + bmax * i), len, |
71 | DMA_TO_DEVICE); | 75 | DMA_TO_DEVICE); |
72 | priv->tx_skbuff_dma[entry] = desc->des2; | 76 | if (dma_mapping_error(priv->device, desc->des2)) |
77 | return -1; | ||
78 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
73 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, | 79 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, |
74 | STMMAC_CHAIN_MODE); | 80 | STMMAC_CHAIN_MODE); |
75 | priv->hw->desc->set_tx_owner(desc); | 81 | priv->hw->desc->set_tx_owner(desc); |
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index de507c32036c..593e6c4144a7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h | |||
@@ -220,10 +220,10 @@ enum dma_irq_status { | |||
220 | handle_tx = 0x8, | 220 | handle_tx = 0x8, |
221 | }; | 221 | }; |
222 | 222 | ||
223 | #define CORE_IRQ_TX_PATH_IN_LPI_MODE (1 << 1) | 223 | #define CORE_IRQ_TX_PATH_IN_LPI_MODE (1 << 0) |
224 | #define CORE_IRQ_TX_PATH_EXIT_LPI_MODE (1 << 2) | 224 | #define CORE_IRQ_TX_PATH_EXIT_LPI_MODE (1 << 1) |
225 | #define CORE_IRQ_RX_PATH_IN_LPI_MODE (1 << 3) | 225 | #define CORE_IRQ_RX_PATH_IN_LPI_MODE (1 << 2) |
226 | #define CORE_IRQ_RX_PATH_EXIT_LPI_MODE (1 << 4) | 226 | #define CORE_IRQ_RX_PATH_EXIT_LPI_MODE (1 << 3) |
227 | 227 | ||
228 | #define CORE_PCS_ANE_COMPLETE (1 << 5) | 228 | #define CORE_PCS_ANE_COMPLETE (1 << 5) |
229 | #define CORE_PCS_LINK_STATUS (1 << 6) | 229 | #define CORE_PCS_LINK_STATUS (1 << 6) |
@@ -287,7 +287,7 @@ struct dma_features { | |||
287 | 287 | ||
288 | /* Default LPI timers */ | 288 | /* Default LPI timers */ |
289 | #define STMMAC_DEFAULT_LIT_LS 0x3E8 | 289 | #define STMMAC_DEFAULT_LIT_LS 0x3E8 |
290 | #define STMMAC_DEFAULT_TWT_LS 0x0 | 290 | #define STMMAC_DEFAULT_TWT_LS 0x1E |
291 | 291 | ||
292 | #define STMMAC_CHAIN_MODE 0x1 | 292 | #define STMMAC_CHAIN_MODE 0x1 |
293 | #define STMMAC_RING_MODE 0x2 | 293 | #define STMMAC_RING_MODE 0x2 |
@@ -425,7 +425,7 @@ struct stmmac_mode_ops { | |||
425 | void (*init) (void *des, dma_addr_t phy_addr, unsigned int size, | 425 | void (*init) (void *des, dma_addr_t phy_addr, unsigned int size, |
426 | unsigned int extend_desc); | 426 | unsigned int extend_desc); |
427 | unsigned int (*is_jumbo_frm) (int len, int ehn_desc); | 427 | unsigned int (*is_jumbo_frm) (int len, int ehn_desc); |
428 | unsigned int (*jumbo_frm) (void *priv, struct sk_buff *skb, int csum); | 428 | int (*jumbo_frm)(void *priv, struct sk_buff *skb, int csum); |
429 | int (*set_16kib_bfsize)(int mtu); | 429 | int (*set_16kib_bfsize)(int mtu); |
430 | void (*init_desc3)(struct dma_desc *p); | 430 | void (*init_desc3)(struct dma_desc *p); |
431 | void (*refill_desc3) (void *priv, struct dma_desc *p); | 431 | void (*refill_desc3) (void *priv, struct dma_desc *p); |
@@ -445,6 +445,7 @@ struct mac_device_info { | |||
445 | int multicast_filter_bins; | 445 | int multicast_filter_bins; |
446 | int unicast_filter_entries; | 446 | int unicast_filter_entries; |
447 | int mcast_bits_log2; | 447 | int mcast_bits_log2; |
448 | unsigned int rx_csum; | ||
448 | }; | 449 | }; |
449 | 450 | ||
450 | struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr, int mcbins, | 451 | struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr, int mcbins, |
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h index 71b5419256c1..64d8f56a9c17 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h | |||
@@ -153,7 +153,7 @@ enum inter_frame_gap { | |||
153 | #define GMAC_CONTROL_RE 0x00000004 /* Receiver Enable */ | 153 | #define GMAC_CONTROL_RE 0x00000004 /* Receiver Enable */ |
154 | 154 | ||
155 | #define GMAC_CORE_INIT (GMAC_CONTROL_JD | GMAC_CONTROL_PS | GMAC_CONTROL_ACS | \ | 155 | #define GMAC_CORE_INIT (GMAC_CONTROL_JD | GMAC_CONTROL_PS | GMAC_CONTROL_ACS | \ |
156 | GMAC_CONTROL_BE) | 156 | GMAC_CONTROL_BE | GMAC_CONTROL_DCRS) |
157 | 157 | ||
158 | /* GMAC Frame Filter defines */ | 158 | /* GMAC Frame Filter defines */ |
159 | #define GMAC_FRAME_FILTER_PR 0x00000001 /* Promiscuous Mode */ | 159 | #define GMAC_FRAME_FILTER_PR 0x00000001 /* Promiscuous Mode */ |
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c index d8ef18786a1c..5efe60ea6526 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c | |||
@@ -58,7 +58,11 @@ static int dwmac1000_rx_ipc_enable(struct mac_device_info *hw) | |||
58 | void __iomem *ioaddr = hw->pcsr; | 58 | void __iomem *ioaddr = hw->pcsr; |
59 | u32 value = readl(ioaddr + GMAC_CONTROL); | 59 | u32 value = readl(ioaddr + GMAC_CONTROL); |
60 | 60 | ||
61 | value |= GMAC_CONTROL_IPC; | 61 | if (hw->rx_csum) |
62 | value |= GMAC_CONTROL_IPC; | ||
63 | else | ||
64 | value &= ~GMAC_CONTROL_IPC; | ||
65 | |||
62 | writel(value, ioaddr + GMAC_CONTROL); | 66 | writel(value, ioaddr + GMAC_CONTROL); |
63 | 67 | ||
64 | value = readl(ioaddr + GMAC_CONTROL); | 68 | value = readl(ioaddr + GMAC_CONTROL); |
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc.h b/drivers/net/ethernet/stmicro/stmmac/mmc.h index 8607488cbcfc..192c2491330b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/mmc.h +++ b/drivers/net/ethernet/stmicro/stmmac/mmc.h | |||
@@ -68,7 +68,7 @@ struct stmmac_counters { | |||
68 | unsigned int mmc_rx_octetcount_g; | 68 | unsigned int mmc_rx_octetcount_g; |
69 | unsigned int mmc_rx_broadcastframe_g; | 69 | unsigned int mmc_rx_broadcastframe_g; |
70 | unsigned int mmc_rx_multicastframe_g; | 70 | unsigned int mmc_rx_multicastframe_g; |
71 | unsigned int mmc_rx_crc_errror; | 71 | unsigned int mmc_rx_crc_error; |
72 | unsigned int mmc_rx_align_error; | 72 | unsigned int mmc_rx_align_error; |
73 | unsigned int mmc_rx_run_error; | 73 | unsigned int mmc_rx_run_error; |
74 | unsigned int mmc_rx_jabber_error; | 74 | unsigned int mmc_rx_jabber_error; |
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c index 50617c5a0bdb..08c483bd2ec7 100644 --- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c | |||
@@ -196,7 +196,7 @@ void dwmac_mmc_read(void __iomem *ioaddr, struct stmmac_counters *mmc) | |||
196 | mmc->mmc_rx_octetcount_g += readl(ioaddr + MMC_RX_OCTETCOUNT_G); | 196 | mmc->mmc_rx_octetcount_g += readl(ioaddr + MMC_RX_OCTETCOUNT_G); |
197 | mmc->mmc_rx_broadcastframe_g += readl(ioaddr + MMC_RX_BROADCASTFRAME_G); | 197 | mmc->mmc_rx_broadcastframe_g += readl(ioaddr + MMC_RX_BROADCASTFRAME_G); |
198 | mmc->mmc_rx_multicastframe_g += readl(ioaddr + MMC_RX_MULTICASTFRAME_G); | 198 | mmc->mmc_rx_multicastframe_g += readl(ioaddr + MMC_RX_MULTICASTFRAME_G); |
199 | mmc->mmc_rx_crc_errror += readl(ioaddr + MMC_RX_CRC_ERRROR); | 199 | mmc->mmc_rx_crc_error += readl(ioaddr + MMC_RX_CRC_ERRROR); |
200 | mmc->mmc_rx_align_error += readl(ioaddr + MMC_RX_ALIGN_ERROR); | 200 | mmc->mmc_rx_align_error += readl(ioaddr + MMC_RX_ALIGN_ERROR); |
201 | mmc->mmc_rx_run_error += readl(ioaddr + MMC_RX_RUN_ERROR); | 201 | mmc->mmc_rx_run_error += readl(ioaddr + MMC_RX_RUN_ERROR); |
202 | mmc->mmc_rx_jabber_error += readl(ioaddr + MMC_RX_JABBER_ERROR); | 202 | mmc->mmc_rx_jabber_error += readl(ioaddr + MMC_RX_JABBER_ERROR); |
diff --git a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c index 650a4be6bce5..5dd50c6cda5b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c +++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c | |||
@@ -28,7 +28,7 @@ | |||
28 | 28 | ||
29 | #include "stmmac.h" | 29 | #include "stmmac.h" |
30 | 30 | ||
31 | static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | 31 | static int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) |
32 | { | 32 | { |
33 | struct stmmac_priv *priv = (struct stmmac_priv *)p; | 33 | struct stmmac_priv *priv = (struct stmmac_priv *)p; |
34 | unsigned int txsize = priv->dma_tx_size; | 34 | unsigned int txsize = priv->dma_tx_size; |
@@ -53,7 +53,10 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
53 | 53 | ||
54 | desc->des2 = dma_map_single(priv->device, skb->data, | 54 | desc->des2 = dma_map_single(priv->device, skb->data, |
55 | bmax, DMA_TO_DEVICE); | 55 | bmax, DMA_TO_DEVICE); |
56 | priv->tx_skbuff_dma[entry] = desc->des2; | 56 | if (dma_mapping_error(priv->device, desc->des2)) |
57 | return -1; | ||
58 | |||
59 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
57 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 60 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; |
58 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, | 61 | priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum, |
59 | STMMAC_RING_MODE); | 62 | STMMAC_RING_MODE); |
@@ -68,7 +71,9 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
68 | 71 | ||
69 | desc->des2 = dma_map_single(priv->device, skb->data + bmax, | 72 | desc->des2 = dma_map_single(priv->device, skb->data + bmax, |
70 | len, DMA_TO_DEVICE); | 73 | len, DMA_TO_DEVICE); |
71 | priv->tx_skbuff_dma[entry] = desc->des2; | 74 | if (dma_mapping_error(priv->device, desc->des2)) |
75 | return -1; | ||
76 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
72 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 77 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; |
73 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, | 78 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum, |
74 | STMMAC_RING_MODE); | 79 | STMMAC_RING_MODE); |
@@ -77,7 +82,9 @@ static unsigned int stmmac_jumbo_frm(void *p, struct sk_buff *skb, int csum) | |||
77 | } else { | 82 | } else { |
78 | desc->des2 = dma_map_single(priv->device, skb->data, | 83 | desc->des2 = dma_map_single(priv->device, skb->data, |
79 | nopaged_len, DMA_TO_DEVICE); | 84 | nopaged_len, DMA_TO_DEVICE); |
80 | priv->tx_skbuff_dma[entry] = desc->des2; | 85 | if (dma_mapping_error(priv->device, desc->des2)) |
86 | return -1; | ||
87 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
81 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; | 88 | desc->des3 = desc->des2 + BUF_SIZE_4KiB; |
82 | priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len, csum, | 89 | priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len, csum, |
83 | STMMAC_RING_MODE); | 90 | STMMAC_RING_MODE); |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h index ca01035634a7..58097c0e2ad5 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h | |||
@@ -34,6 +34,11 @@ | |||
34 | #include <linux/ptp_clock_kernel.h> | 34 | #include <linux/ptp_clock_kernel.h> |
35 | #include <linux/reset.h> | 35 | #include <linux/reset.h> |
36 | 36 | ||
37 | struct stmmac_tx_info { | ||
38 | dma_addr_t buf; | ||
39 | bool map_as_page; | ||
40 | }; | ||
41 | |||
37 | struct stmmac_priv { | 42 | struct stmmac_priv { |
38 | /* Frequently used values are kept adjacent for cache effect */ | 43 | /* Frequently used values are kept adjacent for cache effect */ |
39 | struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; | 44 | struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; |
@@ -45,7 +50,7 @@ struct stmmac_priv { | |||
45 | u32 tx_count_frames; | 50 | u32 tx_count_frames; |
46 | u32 tx_coal_frames; | 51 | u32 tx_coal_frames; |
47 | u32 tx_coal_timer; | 52 | u32 tx_coal_timer; |
48 | dma_addr_t *tx_skbuff_dma; | 53 | struct stmmac_tx_info *tx_skbuff_dma; |
49 | dma_addr_t dma_tx_phy; | 54 | dma_addr_t dma_tx_phy; |
50 | int tx_coalesce; | 55 | int tx_coalesce; |
51 | int hwts_tx_en; | 56 | int hwts_tx_en; |
@@ -105,6 +110,8 @@ struct stmmac_priv { | |||
105 | struct ptp_clock *ptp_clock; | 110 | struct ptp_clock *ptp_clock; |
106 | struct ptp_clock_info ptp_clock_ops; | 111 | struct ptp_clock_info ptp_clock_ops; |
107 | unsigned int default_addend; | 112 | unsigned int default_addend; |
113 | struct clk *clk_ptp_ref; | ||
114 | unsigned int clk_ptp_rate; | ||
108 | u32 adv_ts; | 115 | u32 adv_ts; |
109 | int use_riwt; | 116 | int use_riwt; |
110 | int irq_wake; | 117 | int irq_wake; |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 9af50bae4dde..cf4f38db1c0a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | |||
@@ -175,7 +175,7 @@ static const struct stmmac_stats stmmac_mmc[] = { | |||
175 | STMMAC_MMC_STAT(mmc_rx_octetcount_g), | 175 | STMMAC_MMC_STAT(mmc_rx_octetcount_g), |
176 | STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), | 176 | STMMAC_MMC_STAT(mmc_rx_broadcastframe_g), |
177 | STMMAC_MMC_STAT(mmc_rx_multicastframe_g), | 177 | STMMAC_MMC_STAT(mmc_rx_multicastframe_g), |
178 | STMMAC_MMC_STAT(mmc_rx_crc_errror), | 178 | STMMAC_MMC_STAT(mmc_rx_crc_error), |
179 | STMMAC_MMC_STAT(mmc_rx_align_error), | 179 | STMMAC_MMC_STAT(mmc_rx_align_error), |
180 | STMMAC_MMC_STAT(mmc_rx_run_error), | 180 | STMMAC_MMC_STAT(mmc_rx_run_error), |
181 | STMMAC_MMC_STAT(mmc_rx_jabber_error), | 181 | STMMAC_MMC_STAT(mmc_rx_jabber_error), |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 08addd653728..6e6ee226de04 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | |||
@@ -275,6 +275,7 @@ static void stmmac_eee_ctrl_timer(unsigned long arg) | |||
275 | */ | 275 | */ |
276 | bool stmmac_eee_init(struct stmmac_priv *priv) | 276 | bool stmmac_eee_init(struct stmmac_priv *priv) |
277 | { | 277 | { |
278 | char *phy_bus_name = priv->plat->phy_bus_name; | ||
278 | bool ret = false; | 279 | bool ret = false; |
279 | 280 | ||
280 | /* Using PCS we cannot dial with the phy registers at this stage | 281 | /* Using PCS we cannot dial with the phy registers at this stage |
@@ -284,6 +285,10 @@ bool stmmac_eee_init(struct stmmac_priv *priv) | |||
284 | (priv->pcs == STMMAC_PCS_RTBI)) | 285 | (priv->pcs == STMMAC_PCS_RTBI)) |
285 | goto out; | 286 | goto out; |
286 | 287 | ||
288 | /* Never init EEE in case of a switch is attached */ | ||
289 | if (phy_bus_name && (!strcmp(phy_bus_name, "fixed"))) | ||
290 | goto out; | ||
291 | |||
287 | /* MAC core supports the EEE feature. */ | 292 | /* MAC core supports the EEE feature. */ |
288 | if (priv->dma_cap.eee) { | 293 | if (priv->dma_cap.eee) { |
289 | int tx_lpi_timer = priv->tx_lpi_timer; | 294 | int tx_lpi_timer = priv->tx_lpi_timer; |
@@ -316,10 +321,9 @@ bool stmmac_eee_init(struct stmmac_priv *priv) | |||
316 | priv->hw->mac->set_eee_timer(priv->hw, | 321 | priv->hw->mac->set_eee_timer(priv->hw, |
317 | STMMAC_DEFAULT_LIT_LS, | 322 | STMMAC_DEFAULT_LIT_LS, |
318 | tx_lpi_timer); | 323 | tx_lpi_timer); |
319 | } else | 324 | } |
320 | /* Set HW EEE according to the speed */ | 325 | /* Set HW EEE according to the speed */ |
321 | priv->hw->mac->set_eee_pls(priv->hw, | 326 | priv->hw->mac->set_eee_pls(priv->hw, priv->phydev->link); |
322 | priv->phydev->link); | ||
323 | 327 | ||
324 | pr_debug("stmmac: Energy-Efficient Ethernet initialized\n"); | 328 | pr_debug("stmmac: Energy-Efficient Ethernet initialized\n"); |
325 | 329 | ||
@@ -603,16 +607,16 @@ static int stmmac_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr) | |||
603 | /* calculate default added value: | 607 | /* calculate default added value: |
604 | * formula is : | 608 | * formula is : |
605 | * addend = (2^32)/freq_div_ratio; | 609 | * addend = (2^32)/freq_div_ratio; |
606 | * where, freq_div_ratio = STMMAC_SYSCLOCK/50MHz | 610 | * where, freq_div_ratio = clk_ptp_ref_i/50MHz |
607 | * hence, addend = ((2^32) * 50MHz)/STMMAC_SYSCLOCK; | 611 | * hence, addend = ((2^32) * 50MHz)/clk_ptp_ref_i; |
608 | * NOTE: STMMAC_SYSCLOCK should be >= 50MHz to | 612 | * NOTE: clk_ptp_ref_i should be >= 50MHz to |
609 | * achive 20ns accuracy. | 613 | * achive 20ns accuracy. |
610 | * | 614 | * |
611 | * 2^x * y == (y << x), hence | 615 | * 2^x * y == (y << x), hence |
612 | * 2^32 * 50000000 ==> (50000000 << 32) | 616 | * 2^32 * 50000000 ==> (50000000 << 32) |
613 | */ | 617 | */ |
614 | temp = (u64) (50000000ULL << 32); | 618 | temp = (u64) (50000000ULL << 32); |
615 | priv->default_addend = div_u64(temp, STMMAC_SYSCLOCK); | 619 | priv->default_addend = div_u64(temp, priv->clk_ptp_rate); |
616 | priv->hw->ptp->config_addend(priv->ioaddr, | 620 | priv->hw->ptp->config_addend(priv->ioaddr, |
617 | priv->default_addend); | 621 | priv->default_addend); |
618 | 622 | ||
@@ -638,6 +642,16 @@ static int stmmac_init_ptp(struct stmmac_priv *priv) | |||
638 | if (!(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) | 642 | if (!(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)) |
639 | return -EOPNOTSUPP; | 643 | return -EOPNOTSUPP; |
640 | 644 | ||
645 | /* Fall-back to main clock in case of no PTP ref is passed */ | ||
646 | priv->clk_ptp_ref = devm_clk_get(priv->device, "clk_ptp_ref"); | ||
647 | if (IS_ERR(priv->clk_ptp_ref)) { | ||
648 | priv->clk_ptp_rate = clk_get_rate(priv->stmmac_clk); | ||
649 | priv->clk_ptp_ref = NULL; | ||
650 | } else { | ||
651 | clk_prepare_enable(priv->clk_ptp_ref); | ||
652 | priv->clk_ptp_rate = clk_get_rate(priv->clk_ptp_ref); | ||
653 | } | ||
654 | |||
641 | priv->adv_ts = 0; | 655 | priv->adv_ts = 0; |
642 | if (priv->dma_cap.atime_stamp && priv->extend_desc) | 656 | if (priv->dma_cap.atime_stamp && priv->extend_desc) |
643 | priv->adv_ts = 1; | 657 | priv->adv_ts = 1; |
@@ -657,6 +671,8 @@ static int stmmac_init_ptp(struct stmmac_priv *priv) | |||
657 | 671 | ||
658 | static void stmmac_release_ptp(struct stmmac_priv *priv) | 672 | static void stmmac_release_ptp(struct stmmac_priv *priv) |
659 | { | 673 | { |
674 | if (priv->clk_ptp_ref) | ||
675 | clk_disable_unprepare(priv->clk_ptp_ref); | ||
660 | stmmac_ptp_unregister(priv); | 676 | stmmac_ptp_unregister(priv); |
661 | } | 677 | } |
662 | 678 | ||
@@ -1061,7 +1077,8 @@ static int init_dma_desc_rings(struct net_device *dev) | |||
1061 | else | 1077 | else |
1062 | p = priv->dma_tx + i; | 1078 | p = priv->dma_tx + i; |
1063 | p->des2 = 0; | 1079 | p->des2 = 0; |
1064 | priv->tx_skbuff_dma[i] = 0; | 1080 | priv->tx_skbuff_dma[i].buf = 0; |
1081 | priv->tx_skbuff_dma[i].map_as_page = false; | ||
1065 | priv->tx_skbuff[i] = NULL; | 1082 | priv->tx_skbuff[i] = NULL; |
1066 | } | 1083 | } |
1067 | 1084 | ||
@@ -1100,17 +1117,24 @@ static void dma_free_tx_skbufs(struct stmmac_priv *priv) | |||
1100 | else | 1117 | else |
1101 | p = priv->dma_tx + i; | 1118 | p = priv->dma_tx + i; |
1102 | 1119 | ||
1103 | if (priv->tx_skbuff_dma[i]) { | 1120 | if (priv->tx_skbuff_dma[i].buf) { |
1104 | dma_unmap_single(priv->device, | 1121 | if (priv->tx_skbuff_dma[i].map_as_page) |
1105 | priv->tx_skbuff_dma[i], | 1122 | dma_unmap_page(priv->device, |
1106 | priv->hw->desc->get_tx_len(p), | 1123 | priv->tx_skbuff_dma[i].buf, |
1107 | DMA_TO_DEVICE); | 1124 | priv->hw->desc->get_tx_len(p), |
1108 | priv->tx_skbuff_dma[i] = 0; | 1125 | DMA_TO_DEVICE); |
1126 | else | ||
1127 | dma_unmap_single(priv->device, | ||
1128 | priv->tx_skbuff_dma[i].buf, | ||
1129 | priv->hw->desc->get_tx_len(p), | ||
1130 | DMA_TO_DEVICE); | ||
1109 | } | 1131 | } |
1110 | 1132 | ||
1111 | if (priv->tx_skbuff[i] != NULL) { | 1133 | if (priv->tx_skbuff[i] != NULL) { |
1112 | dev_kfree_skb_any(priv->tx_skbuff[i]); | 1134 | dev_kfree_skb_any(priv->tx_skbuff[i]); |
1113 | priv->tx_skbuff[i] = NULL; | 1135 | priv->tx_skbuff[i] = NULL; |
1136 | priv->tx_skbuff_dma[i].buf = 0; | ||
1137 | priv->tx_skbuff_dma[i].map_as_page = false; | ||
1114 | } | 1138 | } |
1115 | } | 1139 | } |
1116 | } | 1140 | } |
@@ -1131,7 +1155,8 @@ static int alloc_dma_desc_resources(struct stmmac_priv *priv) | |||
1131 | if (!priv->rx_skbuff) | 1155 | if (!priv->rx_skbuff) |
1132 | goto err_rx_skbuff; | 1156 | goto err_rx_skbuff; |
1133 | 1157 | ||
1134 | priv->tx_skbuff_dma = kmalloc_array(txsize, sizeof(dma_addr_t), | 1158 | priv->tx_skbuff_dma = kmalloc_array(txsize, |
1159 | sizeof(*priv->tx_skbuff_dma), | ||
1135 | GFP_KERNEL); | 1160 | GFP_KERNEL); |
1136 | if (!priv->tx_skbuff_dma) | 1161 | if (!priv->tx_skbuff_dma) |
1137 | goto err_tx_skbuff_dma; | 1162 | goto err_tx_skbuff_dma; |
@@ -1293,12 +1318,19 @@ static void stmmac_tx_clean(struct stmmac_priv *priv) | |||
1293 | pr_debug("%s: curr %d, dirty %d\n", __func__, | 1318 | pr_debug("%s: curr %d, dirty %d\n", __func__, |
1294 | priv->cur_tx, priv->dirty_tx); | 1319 | priv->cur_tx, priv->dirty_tx); |
1295 | 1320 | ||
1296 | if (likely(priv->tx_skbuff_dma[entry])) { | 1321 | if (likely(priv->tx_skbuff_dma[entry].buf)) { |
1297 | dma_unmap_single(priv->device, | 1322 | if (priv->tx_skbuff_dma[entry].map_as_page) |
1298 | priv->tx_skbuff_dma[entry], | 1323 | dma_unmap_page(priv->device, |
1299 | priv->hw->desc->get_tx_len(p), | 1324 | priv->tx_skbuff_dma[entry].buf, |
1300 | DMA_TO_DEVICE); | 1325 | priv->hw->desc->get_tx_len(p), |
1301 | priv->tx_skbuff_dma[entry] = 0; | 1326 | DMA_TO_DEVICE); |
1327 | else | ||
1328 | dma_unmap_single(priv->device, | ||
1329 | priv->tx_skbuff_dma[entry].buf, | ||
1330 | priv->hw->desc->get_tx_len(p), | ||
1331 | DMA_TO_DEVICE); | ||
1332 | priv->tx_skbuff_dma[entry].buf = 0; | ||
1333 | priv->tx_skbuff_dma[entry].map_as_page = false; | ||
1302 | } | 1334 | } |
1303 | priv->hw->mode->clean_desc3(priv, p); | 1335 | priv->hw->mode->clean_desc3(priv, p); |
1304 | 1336 | ||
@@ -1637,6 +1669,13 @@ static int stmmac_hw_setup(struct net_device *dev) | |||
1637 | /* Initialize the MAC Core */ | 1669 | /* Initialize the MAC Core */ |
1638 | priv->hw->mac->core_init(priv->hw, dev->mtu); | 1670 | priv->hw->mac->core_init(priv->hw, dev->mtu); |
1639 | 1671 | ||
1672 | ret = priv->hw->mac->rx_ipc(priv->hw); | ||
1673 | if (!ret) { | ||
1674 | pr_warn(" RX IPC Checksum Offload disabled\n"); | ||
1675 | priv->plat->rx_coe = STMMAC_RX_COE_NONE; | ||
1676 | priv->hw->rx_csum = 0; | ||
1677 | } | ||
1678 | |||
1640 | /* Enable the MAC Rx/Tx */ | 1679 | /* Enable the MAC Rx/Tx */ |
1641 | stmmac_set_mac(priv->ioaddr, true); | 1680 | stmmac_set_mac(priv->ioaddr, true); |
1642 | 1681 | ||
@@ -1887,12 +1926,16 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1887 | if (likely(!is_jumbo)) { | 1926 | if (likely(!is_jumbo)) { |
1888 | desc->des2 = dma_map_single(priv->device, skb->data, | 1927 | desc->des2 = dma_map_single(priv->device, skb->data, |
1889 | nopaged_len, DMA_TO_DEVICE); | 1928 | nopaged_len, DMA_TO_DEVICE); |
1890 | priv->tx_skbuff_dma[entry] = desc->des2; | 1929 | if (dma_mapping_error(priv->device, desc->des2)) |
1930 | goto dma_map_err; | ||
1931 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
1891 | priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len, | 1932 | priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len, |
1892 | csum_insertion, priv->mode); | 1933 | csum_insertion, priv->mode); |
1893 | } else { | 1934 | } else { |
1894 | desc = first; | 1935 | desc = first; |
1895 | entry = priv->hw->mode->jumbo_frm(priv, skb, csum_insertion); | 1936 | entry = priv->hw->mode->jumbo_frm(priv, skb, csum_insertion); |
1937 | if (unlikely(entry < 0)) | ||
1938 | goto dma_map_err; | ||
1896 | } | 1939 | } |
1897 | 1940 | ||
1898 | for (i = 0; i < nfrags; i++) { | 1941 | for (i = 0; i < nfrags; i++) { |
@@ -1908,7 +1951,11 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1908 | 1951 | ||
1909 | desc->des2 = skb_frag_dma_map(priv->device, frag, 0, len, | 1952 | desc->des2 = skb_frag_dma_map(priv->device, frag, 0, len, |
1910 | DMA_TO_DEVICE); | 1953 | DMA_TO_DEVICE); |
1911 | priv->tx_skbuff_dma[entry] = desc->des2; | 1954 | if (dma_mapping_error(priv->device, desc->des2)) |
1955 | goto dma_map_err; /* should reuse desc w/o issues */ | ||
1956 | |||
1957 | priv->tx_skbuff_dma[entry].buf = desc->des2; | ||
1958 | priv->tx_skbuff_dma[entry].map_as_page = true; | ||
1912 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion, | 1959 | priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion, |
1913 | priv->mode); | 1960 | priv->mode); |
1914 | wmb(); | 1961 | wmb(); |
@@ -1975,7 +2022,12 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1975 | priv->hw->dma->enable_dma_transmission(priv->ioaddr); | 2022 | priv->hw->dma->enable_dma_transmission(priv->ioaddr); |
1976 | 2023 | ||
1977 | spin_unlock(&priv->tx_lock); | 2024 | spin_unlock(&priv->tx_lock); |
2025 | return NETDEV_TX_OK; | ||
1978 | 2026 | ||
2027 | dma_map_err: | ||
2028 | dev_err(priv->device, "Tx dma map failed\n"); | ||
2029 | dev_kfree_skb(skb); | ||
2030 | priv->dev->stats.tx_dropped++; | ||
1979 | return NETDEV_TX_OK; | 2031 | return NETDEV_TX_OK; |
1980 | } | 2032 | } |
1981 | 2033 | ||
@@ -2028,7 +2080,12 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv) | |||
2028 | priv->rx_skbuff_dma[entry] = | 2080 | priv->rx_skbuff_dma[entry] = |
2029 | dma_map_single(priv->device, skb->data, bfsize, | 2081 | dma_map_single(priv->device, skb->data, bfsize, |
2030 | DMA_FROM_DEVICE); | 2082 | DMA_FROM_DEVICE); |
2031 | 2083 | if (dma_mapping_error(priv->device, | |
2084 | priv->rx_skbuff_dma[entry])) { | ||
2085 | dev_err(priv->device, "Rx dma map failed\n"); | ||
2086 | dev_kfree_skb(skb); | ||
2087 | break; | ||
2088 | } | ||
2032 | p->des2 = priv->rx_skbuff_dma[entry]; | 2089 | p->des2 = priv->rx_skbuff_dma[entry]; |
2033 | 2090 | ||
2034 | priv->hw->mode->refill_desc3(priv, p); | 2091 | priv->hw->mode->refill_desc3(priv, p); |
@@ -2055,7 +2112,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit) | |||
2055 | unsigned int entry = priv->cur_rx % rxsize; | 2112 | unsigned int entry = priv->cur_rx % rxsize; |
2056 | unsigned int next_entry; | 2113 | unsigned int next_entry; |
2057 | unsigned int count = 0; | 2114 | unsigned int count = 0; |
2058 | int coe = priv->plat->rx_coe; | 2115 | int coe = priv->hw->rx_csum; |
2059 | 2116 | ||
2060 | if (netif_msg_rx_status(priv)) { | 2117 | if (netif_msg_rx_status(priv)) { |
2061 | pr_debug("%s: descriptor ring:\n", __func__); | 2118 | pr_debug("%s: descriptor ring:\n", __func__); |
@@ -2276,8 +2333,7 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev, | |||
2276 | 2333 | ||
2277 | if (priv->plat->rx_coe == STMMAC_RX_COE_NONE) | 2334 | if (priv->plat->rx_coe == STMMAC_RX_COE_NONE) |
2278 | features &= ~NETIF_F_RXCSUM; | 2335 | features &= ~NETIF_F_RXCSUM; |
2279 | else if (priv->plat->rx_coe == STMMAC_RX_COE_TYPE1) | 2336 | |
2280 | features &= ~NETIF_F_IPV6_CSUM; | ||
2281 | if (!priv->plat->tx_coe) | 2337 | if (!priv->plat->tx_coe) |
2282 | features &= ~NETIF_F_ALL_CSUM; | 2338 | features &= ~NETIF_F_ALL_CSUM; |
2283 | 2339 | ||
@@ -2292,6 +2348,24 @@ static netdev_features_t stmmac_fix_features(struct net_device *dev, | |||
2292 | return features; | 2348 | return features; |
2293 | } | 2349 | } |
2294 | 2350 | ||
2351 | static int stmmac_set_features(struct net_device *netdev, | ||
2352 | netdev_features_t features) | ||
2353 | { | ||
2354 | struct stmmac_priv *priv = netdev_priv(netdev); | ||
2355 | |||
2356 | /* Keep the COE Type in case of csum is supporting */ | ||
2357 | if (features & NETIF_F_RXCSUM) | ||
2358 | priv->hw->rx_csum = priv->plat->rx_coe; | ||
2359 | else | ||
2360 | priv->hw->rx_csum = 0; | ||
2361 | /* No check needed because rx_coe has been set before and it will be | ||
2362 | * fixed in case of issue. | ||
2363 | */ | ||
2364 | priv->hw->mac->rx_ipc(priv->hw); | ||
2365 | |||
2366 | return 0; | ||
2367 | } | ||
2368 | |||
2295 | /** | 2369 | /** |
2296 | * stmmac_interrupt - main ISR | 2370 | * stmmac_interrupt - main ISR |
2297 | * @irq: interrupt number. | 2371 | * @irq: interrupt number. |
@@ -2572,6 +2646,7 @@ static const struct net_device_ops stmmac_netdev_ops = { | |||
2572 | .ndo_stop = stmmac_release, | 2646 | .ndo_stop = stmmac_release, |
2573 | .ndo_change_mtu = stmmac_change_mtu, | 2647 | .ndo_change_mtu = stmmac_change_mtu, |
2574 | .ndo_fix_features = stmmac_fix_features, | 2648 | .ndo_fix_features = stmmac_fix_features, |
2649 | .ndo_set_features = stmmac_set_features, | ||
2575 | .ndo_set_rx_mode = stmmac_set_rx_mode, | 2650 | .ndo_set_rx_mode = stmmac_set_rx_mode, |
2576 | .ndo_tx_timeout = stmmac_tx_timeout, | 2651 | .ndo_tx_timeout = stmmac_tx_timeout, |
2577 | .ndo_do_ioctl = stmmac_ioctl, | 2652 | .ndo_do_ioctl = stmmac_ioctl, |
@@ -2592,7 +2667,6 @@ static const struct net_device_ops stmmac_netdev_ops = { | |||
2592 | */ | 2667 | */ |
2593 | static int stmmac_hw_init(struct stmmac_priv *priv) | 2668 | static int stmmac_hw_init(struct stmmac_priv *priv) |
2594 | { | 2669 | { |
2595 | int ret; | ||
2596 | struct mac_device_info *mac; | 2670 | struct mac_device_info *mac; |
2597 | 2671 | ||
2598 | /* Identify the MAC HW device */ | 2672 | /* Identify the MAC HW device */ |
@@ -2649,15 +2723,11 @@ static int stmmac_hw_init(struct stmmac_priv *priv) | |||
2649 | /* To use alternate (extended) or normal descriptor structures */ | 2723 | /* To use alternate (extended) or normal descriptor structures */ |
2650 | stmmac_selec_desc_mode(priv); | 2724 | stmmac_selec_desc_mode(priv); |
2651 | 2725 | ||
2652 | ret = priv->hw->mac->rx_ipc(priv->hw); | 2726 | if (priv->plat->rx_coe) { |
2653 | if (!ret) { | 2727 | priv->hw->rx_csum = priv->plat->rx_coe; |
2654 | pr_warn(" RX IPC Checksum Offload not configured.\n"); | ||
2655 | priv->plat->rx_coe = STMMAC_RX_COE_NONE; | ||
2656 | } | ||
2657 | |||
2658 | if (priv->plat->rx_coe) | ||
2659 | pr_info(" RX Checksum Offload Engine supported (type %d)\n", | 2728 | pr_info(" RX Checksum Offload Engine supported (type %d)\n", |
2660 | priv->plat->rx_coe); | 2729 | priv->plat->rx_coe); |
2730 | } | ||
2661 | if (priv->plat->tx_coe) | 2731 | if (priv->plat->tx_coe) |
2662 | pr_info(" TX Checksum insertion supported\n"); | 2732 | pr_info(" TX Checksum insertion supported\n"); |
2663 | 2733 | ||
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c index b7ad3565566c..c5ee79d8a8c5 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | |||
@@ -206,6 +206,7 @@ void stmmac_ptp_unregister(struct stmmac_priv *priv) | |||
206 | { | 206 | { |
207 | if (priv->ptp_clock) { | 207 | if (priv->ptp_clock) { |
208 | ptp_clock_unregister(priv->ptp_clock); | 208 | ptp_clock_unregister(priv->ptp_clock); |
209 | priv->ptp_clock = NULL; | ||
209 | pr_debug("Removed PTP HW clock successfully on %s\n", | 210 | pr_debug("Removed PTP HW clock successfully on %s\n", |
210 | priv->dev->name); | 211 | priv->dev->name); |
211 | } | 212 | } |
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h index 3dbc047622fa..4535df37c227 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h | |||
@@ -25,8 +25,6 @@ | |||
25 | #ifndef __STMMAC_PTP_H__ | 25 | #ifndef __STMMAC_PTP_H__ |
26 | #define __STMMAC_PTP_H__ | 26 | #define __STMMAC_PTP_H__ |
27 | 27 | ||
28 | #define STMMAC_SYSCLOCK 62500000 | ||
29 | |||
30 | /* IEEE 1588 PTP register offsets */ | 28 | /* IEEE 1588 PTP register offsets */ |
31 | #define PTP_TCR 0x0700 /* Timestamp Control Reg */ | 29 | #define PTP_TCR 0x0700 /* Timestamp Control Reg */ |
32 | #define PTP_SSIR 0x0704 /* Sub-Second Increment Reg */ | 30 | #define PTP_SSIR 0x0704 /* Sub-Second Increment Reg */ |