diff options
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 72 |
1 files changed, 50 insertions, 22 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index 03fbfd1fb3df..ab4674684acc 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | |||
| @@ -772,7 +772,7 @@ struct fw_ldst_cmd { | |||
| 772 | } addrval; | 772 | } addrval; |
| 773 | struct fw_ldst_idctxt { | 773 | struct fw_ldst_idctxt { |
| 774 | __be32 physid; | 774 | __be32 physid; |
| 775 | __be32 msg_pkd; | 775 | __be32 msg_ctxtflush; |
| 776 | __be32 ctxt_data7; | 776 | __be32 ctxt_data7; |
| 777 | __be32 ctxt_data6; | 777 | __be32 ctxt_data6; |
| 778 | __be32 ctxt_data5; | 778 | __be32 ctxt_data5; |
| @@ -788,15 +788,27 @@ struct fw_ldst_cmd { | |||
| 788 | __be16 vctl; | 788 | __be16 vctl; |
| 789 | __be16 rval; | 789 | __be16 rval; |
| 790 | } mdio; | 790 | } mdio; |
| 791 | struct fw_ldst_mps { | 791 | union fw_ldst_mps { |
| 792 | __be16 fid_ctl; | 792 | struct fw_ldst_mps_rplc { |
| 793 | __be16 rplcpf_pkd; | 793 | __be16 fid_idx; |
| 794 | __be32 rplc127_96; | 794 | __be16 rplcpf_pkd; |
| 795 | __be32 rplc95_64; | 795 | __be32 rplc255_224; |
| 796 | __be32 rplc63_32; | 796 | __be32 rplc223_192; |
| 797 | __be32 rplc31_0; | 797 | __be32 rplc191_160; |
| 798 | __be32 atrb; | 798 | __be32 rplc159_128; |
| 799 | __be16 vlan[16]; | 799 | __be32 rplc127_96; |
| 800 | __be32 rplc95_64; | ||
| 801 | __be32 rplc63_32; | ||
| 802 | __be32 rplc31_0; | ||
| 803 | } rplc; | ||
| 804 | struct fw_ldst_mps_atrb { | ||
| 805 | __be16 fid_mpsid; | ||
| 806 | __be16 r2[3]; | ||
| 807 | __be32 r3[2]; | ||
| 808 | __be32 r4; | ||
| 809 | __be32 atrb; | ||
| 810 | __be16 vlan[16]; | ||
| 811 | } atrb; | ||
| 800 | } mps; | 812 | } mps; |
| 801 | struct fw_ldst_func { | 813 | struct fw_ldst_func { |
| 802 | u8 access_ctl; | 814 | u8 access_ctl; |
| @@ -822,6 +834,10 @@ struct fw_ldst_cmd { | |||
| 822 | #define FW_LDST_CMD_MSG_S 31 | 834 | #define FW_LDST_CMD_MSG_S 31 |
| 823 | #define FW_LDST_CMD_MSG_V(x) ((x) << FW_LDST_CMD_MSG_S) | 835 | #define FW_LDST_CMD_MSG_V(x) ((x) << FW_LDST_CMD_MSG_S) |
| 824 | 836 | ||
| 837 | #define FW_LDST_CMD_CTXTFLUSH_S 30 | ||
| 838 | #define FW_LDST_CMD_CTXTFLUSH_V(x) ((x) << FW_LDST_CMD_CTXTFLUSH_S) | ||
| 839 | #define FW_LDST_CMD_CTXTFLUSH_F FW_LDST_CMD_CTXTFLUSH_V(1U) | ||
| 840 | |||
| 825 | #define FW_LDST_CMD_PADDR_S 8 | 841 | #define FW_LDST_CMD_PADDR_S 8 |
| 826 | #define FW_LDST_CMD_PADDR_V(x) ((x) << FW_LDST_CMD_PADDR_S) | 842 | #define FW_LDST_CMD_PADDR_V(x) ((x) << FW_LDST_CMD_PADDR_S) |
| 827 | 843 | ||
| @@ -831,8 +847,8 @@ struct fw_ldst_cmd { | |||
| 831 | #define FW_LDST_CMD_FID_S 15 | 847 | #define FW_LDST_CMD_FID_S 15 |
| 832 | #define FW_LDST_CMD_FID_V(x) ((x) << FW_LDST_CMD_FID_S) | 848 | #define FW_LDST_CMD_FID_V(x) ((x) << FW_LDST_CMD_FID_S) |
| 833 | 849 | ||
| 834 | #define FW_LDST_CMD_CTL_S 0 | 850 | #define FW_LDST_CMD_IDX_S 0 |
| 835 | #define FW_LDST_CMD_CTL_V(x) ((x) << FW_LDST_CMD_CTL_S) | 851 | #define FW_LDST_CMD_IDX_V(x) ((x) << FW_LDST_CMD_IDX_S) |
| 836 | 852 | ||
| 837 | #define FW_LDST_CMD_RPLCPF_S 0 | 853 | #define FW_LDST_CMD_RPLCPF_S 0 |
| 838 | #define FW_LDST_CMD_RPLCPF_V(x) ((x) << FW_LDST_CMD_RPLCPF_S) | 854 | #define FW_LDST_CMD_RPLCPF_V(x) ((x) << FW_LDST_CMD_RPLCPF_S) |
| @@ -1061,6 +1077,7 @@ enum fw_params_param_dev { | |||
| 1061 | FW_PARAMS_PARAM_DEV_FWREV = 0x0B, | 1077 | FW_PARAMS_PARAM_DEV_FWREV = 0x0B, |
| 1062 | FW_PARAMS_PARAM_DEV_TPREV = 0x0C, | 1078 | FW_PARAMS_PARAM_DEV_TPREV = 0x0C, |
| 1063 | FW_PARAMS_PARAM_DEV_CF = 0x0D, | 1079 | FW_PARAMS_PARAM_DEV_CF = 0x0D, |
| 1080 | FW_PARAMS_PARAM_DEV_PHYFW = 0x0F, | ||
| 1064 | FW_PARAMS_PARAM_DEV_DIAG = 0x11, | 1081 | FW_PARAMS_PARAM_DEV_DIAG = 0x11, |
| 1065 | FW_PARAMS_PARAM_DEV_MAXORDIRD_QP = 0x13, /* max supported QP IRD/ORD */ | 1082 | FW_PARAMS_PARAM_DEV_MAXORDIRD_QP = 0x13, /* max supported QP IRD/ORD */ |
| 1066 | FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER = 0x14, /* max supported adap IRD */ | 1083 | FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER = 0x14, /* max supported adap IRD */ |
| @@ -1123,6 +1140,12 @@ enum fw_params_param_dmaq { | |||
| 1123 | FW_PARAMS_PARAM_DMAQ_EQ_CMPLIQID_CTRL = 0x11, | 1140 | FW_PARAMS_PARAM_DMAQ_EQ_CMPLIQID_CTRL = 0x11, |
| 1124 | FW_PARAMS_PARAM_DMAQ_EQ_SCHEDCLASS_ETH = 0x12, | 1141 | FW_PARAMS_PARAM_DMAQ_EQ_SCHEDCLASS_ETH = 0x12, |
| 1125 | FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH = 0x13, | 1142 | FW_PARAMS_PARAM_DMAQ_EQ_DCBPRIO_ETH = 0x13, |
| 1143 | FW_PARAMS_PARAM_DMAQ_CONM_CTXT = 0x20, | ||
| 1144 | }; | ||
| 1145 | |||
| 1146 | enum fw_params_param_dev_phyfw { | ||
| 1147 | FW_PARAMS_PARAM_DEV_PHYFW_DOWNLOAD = 0x00, | ||
| 1148 | FW_PARAMS_PARAM_DEV_PHYFW_VERSION = 0x01, | ||
| 1126 | }; | 1149 | }; |
| 1127 | 1150 | ||
| 1128 | enum fw_params_param_dev_diag { | 1151 | enum fw_params_param_dev_diag { |
| @@ -1377,6 +1400,7 @@ struct fw_iq_cmd { | |||
| 1377 | 1400 | ||
| 1378 | #define FW_IQ_CMD_IQFLINTCONGEN_S 27 | 1401 | #define FW_IQ_CMD_IQFLINTCONGEN_S 27 |
| 1379 | #define FW_IQ_CMD_IQFLINTCONGEN_V(x) ((x) << FW_IQ_CMD_IQFLINTCONGEN_S) | 1402 | #define FW_IQ_CMD_IQFLINTCONGEN_V(x) ((x) << FW_IQ_CMD_IQFLINTCONGEN_S) |
| 1403 | #define FW_IQ_CMD_IQFLINTCONGEN_F FW_IQ_CMD_IQFLINTCONGEN_V(1U) | ||
| 1380 | 1404 | ||
| 1381 | #define FW_IQ_CMD_IQFLINTISCSIC_S 26 | 1405 | #define FW_IQ_CMD_IQFLINTISCSIC_S 26 |
| 1382 | #define FW_IQ_CMD_IQFLINTISCSIC_V(x) ((x) << FW_IQ_CMD_IQFLINTISCSIC_S) | 1406 | #define FW_IQ_CMD_IQFLINTISCSIC_V(x) ((x) << FW_IQ_CMD_IQFLINTISCSIC_S) |
| @@ -1399,6 +1423,7 @@ struct fw_iq_cmd { | |||
| 1399 | 1423 | ||
| 1400 | #define FW_IQ_CMD_FL0CONGCIF_S 11 | 1424 | #define FW_IQ_CMD_FL0CONGCIF_S 11 |
| 1401 | #define FW_IQ_CMD_FL0CONGCIF_V(x) ((x) << FW_IQ_CMD_FL0CONGCIF_S) | 1425 | #define FW_IQ_CMD_FL0CONGCIF_V(x) ((x) << FW_IQ_CMD_FL0CONGCIF_S) |
| 1426 | #define FW_IQ_CMD_FL0CONGCIF_F FW_IQ_CMD_FL0CONGCIF_V(1U) | ||
| 1402 | 1427 | ||
| 1403 | #define FW_IQ_CMD_FL0ONCHIP_S 10 | 1428 | #define FW_IQ_CMD_FL0ONCHIP_S 10 |
| 1404 | #define FW_IQ_CMD_FL0ONCHIP_V(x) ((x) << FW_IQ_CMD_FL0ONCHIP_S) | 1429 | #define FW_IQ_CMD_FL0ONCHIP_V(x) ((x) << FW_IQ_CMD_FL0ONCHIP_S) |
| @@ -1589,6 +1614,7 @@ struct fw_eq_eth_cmd { | |||
| 1589 | 1614 | ||
| 1590 | #define FW_EQ_ETH_CMD_FETCHRO_S 22 | 1615 | #define FW_EQ_ETH_CMD_FETCHRO_S 22 |
| 1591 | #define FW_EQ_ETH_CMD_FETCHRO_V(x) ((x) << FW_EQ_ETH_CMD_FETCHRO_S) | 1616 | #define FW_EQ_ETH_CMD_FETCHRO_V(x) ((x) << FW_EQ_ETH_CMD_FETCHRO_S) |
| 1617 | #define FW_EQ_ETH_CMD_FETCHRO_F FW_EQ_ETH_CMD_FETCHRO_V(1U) | ||
| 1592 | 1618 | ||
| 1593 | #define FW_EQ_ETH_CMD_HOSTFCMODE_S 20 | 1619 | #define FW_EQ_ETH_CMD_HOSTFCMODE_S 20 |
| 1594 | #define FW_EQ_ETH_CMD_HOSTFCMODE_V(x) ((x) << FW_EQ_ETH_CMD_HOSTFCMODE_S) | 1620 | #define FW_EQ_ETH_CMD_HOSTFCMODE_V(x) ((x) << FW_EQ_ETH_CMD_HOSTFCMODE_S) |
| @@ -2526,13 +2552,8 @@ enum fw_port_mod_sub_type { | |||
| 2526 | FW_PORT_MOD_SUB_TYPE_TWINAX_7 = 0xC, | 2552 | FW_PORT_MOD_SUB_TYPE_TWINAX_7 = 0xC, |
| 2527 | }; | 2553 | }; |
| 2528 | 2554 | ||
| 2529 | /* port stats */ | ||
| 2530 | #define FW_NUM_PORT_STATS 50 | ||
| 2531 | #define FW_NUM_PORT_TX_STATS 23 | ||
| 2532 | #define FW_NUM_PORT_RX_STATS 27 | ||
| 2533 | |||
| 2534 | enum fw_port_stats_tx_index { | 2555 | enum fw_port_stats_tx_index { |
| 2535 | FW_STAT_TX_PORT_BYTES_IX, | 2556 | FW_STAT_TX_PORT_BYTES_IX = 0, |
| 2536 | FW_STAT_TX_PORT_FRAMES_IX, | 2557 | FW_STAT_TX_PORT_FRAMES_IX, |
| 2537 | FW_STAT_TX_PORT_BCAST_IX, | 2558 | FW_STAT_TX_PORT_BCAST_IX, |
| 2538 | FW_STAT_TX_PORT_MCAST_IX, | 2559 | FW_STAT_TX_PORT_MCAST_IX, |
| @@ -2554,11 +2575,12 @@ enum fw_port_stats_tx_index { | |||
| 2554 | FW_STAT_TX_PORT_PPP4_IX, | 2575 | FW_STAT_TX_PORT_PPP4_IX, |
| 2555 | FW_STAT_TX_PORT_PPP5_IX, | 2576 | FW_STAT_TX_PORT_PPP5_IX, |
| 2556 | FW_STAT_TX_PORT_PPP6_IX, | 2577 | FW_STAT_TX_PORT_PPP6_IX, |
| 2557 | FW_STAT_TX_PORT_PPP7_IX | 2578 | FW_STAT_TX_PORT_PPP7_IX, |
| 2579 | FW_NUM_PORT_TX_STATS | ||
| 2558 | }; | 2580 | }; |
| 2559 | 2581 | ||
| 2560 | enum fw_port_stat_rx_index { | 2582 | enum fw_port_stat_rx_index { |
| 2561 | FW_STAT_RX_PORT_BYTES_IX, | 2583 | FW_STAT_RX_PORT_BYTES_IX = 0, |
| 2562 | FW_STAT_RX_PORT_FRAMES_IX, | 2584 | FW_STAT_RX_PORT_FRAMES_IX, |
| 2563 | FW_STAT_RX_PORT_BCAST_IX, | 2585 | FW_STAT_RX_PORT_BCAST_IX, |
| 2564 | FW_STAT_RX_PORT_MCAST_IX, | 2586 | FW_STAT_RX_PORT_MCAST_IX, |
| @@ -2584,9 +2606,14 @@ enum fw_port_stat_rx_index { | |||
| 2584 | FW_STAT_RX_PORT_PPP5_IX, | 2606 | FW_STAT_RX_PORT_PPP5_IX, |
| 2585 | FW_STAT_RX_PORT_PPP6_IX, | 2607 | FW_STAT_RX_PORT_PPP6_IX, |
| 2586 | FW_STAT_RX_PORT_PPP7_IX, | 2608 | FW_STAT_RX_PORT_PPP7_IX, |
| 2587 | FW_STAT_RX_PORT_LESS_64B_IX | 2609 | FW_STAT_RX_PORT_LESS_64B_IX, |
| 2610 | FW_STAT_RX_PORT_MAC_ERROR_IX, | ||
| 2611 | FW_NUM_PORT_RX_STATS | ||
| 2588 | }; | 2612 | }; |
| 2589 | 2613 | ||
| 2614 | /* port stats */ | ||
| 2615 | #define FW_NUM_PORT_STATS (FW_NUM_PORT_TX_STATS + FW_NUM_PORT_RX_STATS) | ||
| 2616 | |||
| 2590 | struct fw_port_stats_cmd { | 2617 | struct fw_port_stats_cmd { |
| 2591 | __be32 op_to_portid; | 2618 | __be32 op_to_portid; |
| 2592 | __be32 retval_len16; | 2619 | __be32 retval_len16; |
| @@ -3015,7 +3042,8 @@ struct fw_hdr { | |||
| 3015 | 3042 | ||
| 3016 | enum fw_hdr_chip { | 3043 | enum fw_hdr_chip { |
| 3017 | FW_HDR_CHIP_T4, | 3044 | FW_HDR_CHIP_T4, |
| 3018 | FW_HDR_CHIP_T5 | 3045 | FW_HDR_CHIP_T5, |
| 3046 | FW_HDR_CHIP_T6 | ||
| 3019 | }; | 3047 | }; |
| 3020 | 3048 | ||
| 3021 | #define FW_HDR_FW_VER_MAJOR_S 24 | 3049 | #define FW_HDR_FW_VER_MAJOR_S 24 |
