diff options
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/t4_hw.c')
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | 62 |
1 files changed, 42 insertions, 20 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 32eec15fe4c2..22f3af5166bf 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
@@ -109,7 +109,7 @@ void t4_set_reg_field(struct adapter *adapter, unsigned int addr, u32 mask, | |||
109 | * Reads registers that are accessed indirectly through an address/data | 109 | * Reads registers that are accessed indirectly through an address/data |
110 | * register pair. | 110 | * register pair. |
111 | */ | 111 | */ |
112 | static void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, | 112 | void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, |
113 | unsigned int data_reg, u32 *vals, | 113 | unsigned int data_reg, u32 *vals, |
114 | unsigned int nregs, unsigned int start_idx) | 114 | unsigned int nregs, unsigned int start_idx) |
115 | { | 115 | { |
@@ -648,12 +648,12 @@ static int sf1_read(struct adapter *adapter, unsigned int byte_cnt, int cont, | |||
648 | 648 | ||
649 | if (!byte_cnt || byte_cnt > 4) | 649 | if (!byte_cnt || byte_cnt > 4) |
650 | return -EINVAL; | 650 | return -EINVAL; |
651 | if (t4_read_reg(adapter, SF_OP) & BUSY) | 651 | if (t4_read_reg(adapter, SF_OP) & SF_BUSY) |
652 | return -EBUSY; | 652 | return -EBUSY; |
653 | cont = cont ? SF_CONT : 0; | 653 | cont = cont ? SF_CONT : 0; |
654 | lock = lock ? SF_LOCK : 0; | 654 | lock = lock ? SF_LOCK : 0; |
655 | t4_write_reg(adapter, SF_OP, lock | cont | BYTECNT(byte_cnt - 1)); | 655 | t4_write_reg(adapter, SF_OP, lock | cont | BYTECNT(byte_cnt - 1)); |
656 | ret = t4_wait_op_done(adapter, SF_OP, BUSY, 0, SF_ATTEMPTS, 5); | 656 | ret = t4_wait_op_done(adapter, SF_OP, SF_BUSY, 0, SF_ATTEMPTS, 5); |
657 | if (!ret) | 657 | if (!ret) |
658 | *valp = t4_read_reg(adapter, SF_DATA); | 658 | *valp = t4_read_reg(adapter, SF_DATA); |
659 | return ret; | 659 | return ret; |
@@ -676,14 +676,14 @@ static int sf1_write(struct adapter *adapter, unsigned int byte_cnt, int cont, | |||
676 | { | 676 | { |
677 | if (!byte_cnt || byte_cnt > 4) | 677 | if (!byte_cnt || byte_cnt > 4) |
678 | return -EINVAL; | 678 | return -EINVAL; |
679 | if (t4_read_reg(adapter, SF_OP) & BUSY) | 679 | if (t4_read_reg(adapter, SF_OP) & SF_BUSY) |
680 | return -EBUSY; | 680 | return -EBUSY; |
681 | cont = cont ? SF_CONT : 0; | 681 | cont = cont ? SF_CONT : 0; |
682 | lock = lock ? SF_LOCK : 0; | 682 | lock = lock ? SF_LOCK : 0; |
683 | t4_write_reg(adapter, SF_DATA, val); | 683 | t4_write_reg(adapter, SF_DATA, val); |
684 | t4_write_reg(adapter, SF_OP, lock | | 684 | t4_write_reg(adapter, SF_OP, lock | |
685 | cont | BYTECNT(byte_cnt - 1) | OP_WR); | 685 | cont | BYTECNT(byte_cnt - 1) | OP_WR); |
686 | return t4_wait_op_done(adapter, SF_OP, BUSY, 0, SF_ATTEMPTS, 5); | 686 | return t4_wait_op_done(adapter, SF_OP, SF_BUSY, 0, SF_ATTEMPTS, 5); |
687 | } | 687 | } |
688 | 688 | ||
689 | /** | 689 | /** |
@@ -2003,7 +2003,7 @@ void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, | |||
2003 | * | 2003 | * |
2004 | * Initialize the congestion control parameters. | 2004 | * Initialize the congestion control parameters. |
2005 | */ | 2005 | */ |
2006 | static void __devinit init_cong_ctrl(unsigned short *a, unsigned short *b) | 2006 | static void init_cong_ctrl(unsigned short *a, unsigned short *b) |
2007 | { | 2007 | { |
2008 | a[0] = a[1] = a[2] = a[3] = a[4] = a[5] = a[6] = a[7] = a[8] = 1; | 2008 | a[0] = a[1] = a[2] = a[3] = a[4] = a[5] = a[6] = a[7] = a[8] = 1; |
2009 | a[9] = 2; | 2009 | a[9] = 2; |
@@ -2252,14 +2252,14 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, | |||
2252 | t4_write_reg(adap, EPIO_REG(DATA0), mask0); | 2252 | t4_write_reg(adap, EPIO_REG(DATA0), mask0); |
2253 | t4_write_reg(adap, EPIO_REG(OP), ADDRESS(i) | EPIOWR); | 2253 | t4_write_reg(adap, EPIO_REG(OP), ADDRESS(i) | EPIOWR); |
2254 | t4_read_reg(adap, EPIO_REG(OP)); /* flush */ | 2254 | t4_read_reg(adap, EPIO_REG(OP)); /* flush */ |
2255 | if (t4_read_reg(adap, EPIO_REG(OP)) & BUSY) | 2255 | if (t4_read_reg(adap, EPIO_REG(OP)) & SF_BUSY) |
2256 | return -ETIMEDOUT; | 2256 | return -ETIMEDOUT; |
2257 | 2257 | ||
2258 | /* write CRC */ | 2258 | /* write CRC */ |
2259 | t4_write_reg(adap, EPIO_REG(DATA0), crc); | 2259 | t4_write_reg(adap, EPIO_REG(DATA0), crc); |
2260 | t4_write_reg(adap, EPIO_REG(OP), ADDRESS(i + 32) | EPIOWR); | 2260 | t4_write_reg(adap, EPIO_REG(OP), ADDRESS(i + 32) | EPIOWR); |
2261 | t4_read_reg(adap, EPIO_REG(OP)); /* flush */ | 2261 | t4_read_reg(adap, EPIO_REG(OP)); /* flush */ |
2262 | if (t4_read_reg(adap, EPIO_REG(OP)) & BUSY) | 2262 | if (t4_read_reg(adap, EPIO_REG(OP)) & SF_BUSY) |
2263 | return -ETIMEDOUT; | 2263 | return -ETIMEDOUT; |
2264 | } | 2264 | } |
2265 | #undef EPIO_REG | 2265 | #undef EPIO_REG |
@@ -2268,6 +2268,26 @@ int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, | |||
2268 | return 0; | 2268 | return 0; |
2269 | } | 2269 | } |
2270 | 2270 | ||
2271 | /* t4_mk_filtdelwr - create a delete filter WR | ||
2272 | * @ftid: the filter ID | ||
2273 | * @wr: the filter work request to populate | ||
2274 | * @qid: ingress queue to receive the delete notification | ||
2275 | * | ||
2276 | * Creates a filter work request to delete the supplied filter. If @qid is | ||
2277 | * negative the delete notification is suppressed. | ||
2278 | */ | ||
2279 | void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid) | ||
2280 | { | ||
2281 | memset(wr, 0, sizeof(*wr)); | ||
2282 | wr->op_pkd = htonl(FW_WR_OP(FW_FILTER_WR)); | ||
2283 | wr->len16_pkd = htonl(FW_WR_LEN16(sizeof(*wr) / 16)); | ||
2284 | wr->tid_to_iq = htonl(V_FW_FILTER_WR_TID(ftid) | | ||
2285 | V_FW_FILTER_WR_NOREPLY(qid < 0)); | ||
2286 | wr->del_filter_to_l2tix = htonl(F_FW_FILTER_WR_DEL_FILTER); | ||
2287 | if (qid >= 0) | ||
2288 | wr->rx_chan_rx_rpl_iq = htons(V_FW_FILTER_WR_RX_RPL_IQ(qid)); | ||
2289 | } | ||
2290 | |||
2271 | #define INIT_CMD(var, cmd, rd_wr) do { \ | 2291 | #define INIT_CMD(var, cmd, rd_wr) do { \ |
2272 | (var).op_to_write = htonl(FW_CMD_OP(FW_##cmd##_CMD) | \ | 2292 | (var).op_to_write = htonl(FW_CMD_OP(FW_##cmd##_CMD) | \ |
2273 | FW_CMD_REQUEST | FW_CMD_##rd_wr); \ | 2293 | FW_CMD_REQUEST | FW_CMD_##rd_wr); \ |
@@ -2405,7 +2425,7 @@ int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, | |||
2405 | retry: | 2425 | retry: |
2406 | memset(&c, 0, sizeof(c)); | 2426 | memset(&c, 0, sizeof(c)); |
2407 | INIT_CMD(c, HELLO, WRITE); | 2427 | INIT_CMD(c, HELLO, WRITE); |
2408 | c.err_to_mbasyncnot = htonl( | 2428 | c.err_to_clearinit = htonl( |
2409 | FW_HELLO_CMD_MASTERDIS(master == MASTER_CANT) | | 2429 | FW_HELLO_CMD_MASTERDIS(master == MASTER_CANT) | |
2410 | FW_HELLO_CMD_MASTERFORCE(master == MASTER_MUST) | | 2430 | FW_HELLO_CMD_MASTERFORCE(master == MASTER_MUST) | |
2411 | FW_HELLO_CMD_MBMASTER(master == MASTER_MUST ? mbox : | 2431 | FW_HELLO_CMD_MBMASTER(master == MASTER_MUST ? mbox : |
@@ -2426,7 +2446,7 @@ retry: | |||
2426 | return ret; | 2446 | return ret; |
2427 | } | 2447 | } |
2428 | 2448 | ||
2429 | v = ntohl(c.err_to_mbasyncnot); | 2449 | v = ntohl(c.err_to_clearinit); |
2430 | master_mbox = FW_HELLO_CMD_MBMASTER_GET(v); | 2450 | master_mbox = FW_HELLO_CMD_MBMASTER_GET(v); |
2431 | if (state) { | 2451 | if (state) { |
2432 | if (v & FW_HELLO_CMD_ERR) | 2452 | if (v & FW_HELLO_CMD_ERR) |
@@ -2519,6 +2539,7 @@ int t4_fw_bye(struct adapter *adap, unsigned int mbox) | |||
2519 | { | 2539 | { |
2520 | struct fw_bye_cmd c; | 2540 | struct fw_bye_cmd c; |
2521 | 2541 | ||
2542 | memset(&c, 0, sizeof(c)); | ||
2522 | INIT_CMD(c, BYE, WRITE); | 2543 | INIT_CMD(c, BYE, WRITE); |
2523 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2544 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
2524 | } | 2545 | } |
@@ -2535,6 +2556,7 @@ int t4_early_init(struct adapter *adap, unsigned int mbox) | |||
2535 | { | 2556 | { |
2536 | struct fw_initialize_cmd c; | 2557 | struct fw_initialize_cmd c; |
2537 | 2558 | ||
2559 | memset(&c, 0, sizeof(c)); | ||
2538 | INIT_CMD(c, INITIALIZE, WRITE); | 2560 | INIT_CMD(c, INITIALIZE, WRITE); |
2539 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2561 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
2540 | } | 2562 | } |
@@ -2551,6 +2573,7 @@ int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset) | |||
2551 | { | 2573 | { |
2552 | struct fw_reset_cmd c; | 2574 | struct fw_reset_cmd c; |
2553 | 2575 | ||
2576 | memset(&c, 0, sizeof(c)); | ||
2554 | INIT_CMD(c, RESET, WRITE); | 2577 | INIT_CMD(c, RESET, WRITE); |
2555 | c.val = htonl(reset); | 2578 | c.val = htonl(reset); |
2556 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2579 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
@@ -2771,7 +2794,7 @@ int t4_fw_config_file(struct adapter *adap, unsigned int mbox, | |||
2771 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 2794 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
2772 | FW_CMD_REQUEST | | 2795 | FW_CMD_REQUEST | |
2773 | FW_CMD_READ); | 2796 | FW_CMD_READ); |
2774 | caps_cmd.retval_len16 = | 2797 | caps_cmd.cfvalid_to_len16 = |
2775 | htonl(FW_CAPS_CONFIG_CMD_CFVALID | | 2798 | htonl(FW_CAPS_CONFIG_CMD_CFVALID | |
2776 | FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | | 2799 | FW_CAPS_CONFIG_CMD_MEMTYPE_CF(mtype) | |
2777 | FW_CAPS_CONFIG_CMD_MEMADDR64K_CF(maddr >> 16) | | 2800 | FW_CAPS_CONFIG_CMD_MEMADDR64K_CF(maddr >> 16) | |
@@ -2794,7 +2817,7 @@ int t4_fw_config_file(struct adapter *adap, unsigned int mbox, | |||
2794 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | | 2817 | htonl(FW_CMD_OP(FW_CAPS_CONFIG_CMD) | |
2795 | FW_CMD_REQUEST | | 2818 | FW_CMD_REQUEST | |
2796 | FW_CMD_WRITE); | 2819 | FW_CMD_WRITE); |
2797 | caps_cmd.retval_len16 = htonl(FW_LEN16(caps_cmd)); | 2820 | caps_cmd.cfvalid_to_len16 = htonl(FW_LEN16(caps_cmd)); |
2798 | return t4_wr_mbox(adap, mbox, &caps_cmd, sizeof(caps_cmd), NULL); | 2821 | return t4_wr_mbox(adap, mbox, &caps_cmd, sizeof(caps_cmd), NULL); |
2799 | } | 2822 | } |
2800 | 2823 | ||
@@ -2828,7 +2851,7 @@ int t4_fixup_host_params(struct adapter *adap, unsigned int page_size, | |||
2828 | HOSTPAGESIZEPF7(sge_hps)); | 2851 | HOSTPAGESIZEPF7(sge_hps)); |
2829 | 2852 | ||
2830 | t4_set_reg_field(adap, SGE_CONTROL, | 2853 | t4_set_reg_field(adap, SGE_CONTROL, |
2831 | INGPADBOUNDARY(INGPADBOUNDARY_MASK) | | 2854 | INGPADBOUNDARY_MASK | |
2832 | EGRSTATUSPAGESIZE_MASK, | 2855 | EGRSTATUSPAGESIZE_MASK, |
2833 | INGPADBOUNDARY(fl_align_log - 5) | | 2856 | INGPADBOUNDARY(fl_align_log - 5) | |
2834 | EGRSTATUSPAGESIZE(stat_len != 64)); | 2857 | EGRSTATUSPAGESIZE(stat_len != 64)); |
@@ -3278,6 +3301,7 @@ int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, | |||
3278 | { | 3301 | { |
3279 | struct fw_vi_enable_cmd c; | 3302 | struct fw_vi_enable_cmd c; |
3280 | 3303 | ||
3304 | memset(&c, 0, sizeof(c)); | ||
3281 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | | 3305 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | |
3282 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); | 3306 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); |
3283 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); | 3307 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); |
@@ -3436,8 +3460,7 @@ int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl) | |||
3436 | return 0; | 3460 | return 0; |
3437 | } | 3461 | } |
3438 | 3462 | ||
3439 | static void __devinit get_pci_mode(struct adapter *adapter, | 3463 | static void get_pci_mode(struct adapter *adapter, struct pci_params *p) |
3440 | struct pci_params *p) | ||
3441 | { | 3464 | { |
3442 | u16 val; | 3465 | u16 val; |
3443 | 3466 | ||
@@ -3456,8 +3479,7 @@ static void __devinit get_pci_mode(struct adapter *adapter, | |||
3456 | * Initializes the SW state maintained for each link, including the link's | 3479 | * Initializes the SW state maintained for each link, including the link's |
3457 | * capabilities and default speed/flow-control/autonegotiation settings. | 3480 | * capabilities and default speed/flow-control/autonegotiation settings. |
3458 | */ | 3481 | */ |
3459 | static void __devinit init_link_config(struct link_config *lc, | 3482 | static void init_link_config(struct link_config *lc, unsigned int caps) |
3460 | unsigned int caps) | ||
3461 | { | 3483 | { |
3462 | lc->supported = caps; | 3484 | lc->supported = caps; |
3463 | lc->requested_speed = 0; | 3485 | lc->requested_speed = 0; |
@@ -3481,7 +3503,7 @@ int t4_wait_dev_ready(struct adapter *adap) | |||
3481 | return t4_read_reg(adap, PL_WHOAMI) != 0xffffffff ? 0 : -EIO; | 3503 | return t4_read_reg(adap, PL_WHOAMI) != 0xffffffff ? 0 : -EIO; |
3482 | } | 3504 | } |
3483 | 3505 | ||
3484 | static int __devinit get_flash_params(struct adapter *adap) | 3506 | static int get_flash_params(struct adapter *adap) |
3485 | { | 3507 | { |
3486 | int ret; | 3508 | int ret; |
3487 | u32 info; | 3509 | u32 info; |
@@ -3517,7 +3539,7 @@ static int __devinit get_flash_params(struct adapter *adap) | |||
3517 | * values for some adapter tunables, take PHYs out of reset, and | 3539 | * values for some adapter tunables, take PHYs out of reset, and |
3518 | * initialize the MDIO interface. | 3540 | * initialize the MDIO interface. |
3519 | */ | 3541 | */ |
3520 | int __devinit t4_prep_adapter(struct adapter *adapter) | 3542 | int t4_prep_adapter(struct adapter *adapter) |
3521 | { | 3543 | { |
3522 | int ret; | 3544 | int ret; |
3523 | 3545 | ||
@@ -3545,7 +3567,7 @@ int __devinit t4_prep_adapter(struct adapter *adapter) | |||
3545 | return 0; | 3567 | return 0; |
3546 | } | 3568 | } |
3547 | 3569 | ||
3548 | int __devinit t4_port_init(struct adapter *adap, int mbox, int pf, int vf) | 3570 | int t4_port_init(struct adapter *adap, int mbox, int pf, int vf) |
3549 | { | 3571 | { |
3550 | u8 addr[6]; | 3572 | u8 addr[6]; |
3551 | int ret, i, j = 0; | 3573 | int ret, i, j = 0; |