diff options
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c')
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 70 |
1 files changed, 35 insertions, 35 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c index 16c633f4bf8b..53ad8d3d9e4c 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | |||
@@ -359,8 +359,8 @@ MODULE_PARM_DESC(select_queue, | |||
359 | */ | 359 | */ |
360 | enum { | 360 | enum { |
361 | TP_VLAN_PRI_MAP_DEFAULT = HW_TPL_FR_MT_PR_IV_P_FC, | 361 | TP_VLAN_PRI_MAP_DEFAULT = HW_TPL_FR_MT_PR_IV_P_FC, |
362 | TP_VLAN_PRI_MAP_FIRST = FCOE_SHIFT, | 362 | TP_VLAN_PRI_MAP_FIRST = FCOE_S, |
363 | TP_VLAN_PRI_MAP_LAST = FRAGMENTATION_SHIFT, | 363 | TP_VLAN_PRI_MAP_LAST = FRAGMENTATION_S, |
364 | }; | 364 | }; |
365 | 365 | ||
366 | static unsigned int tp_vlan_pri_map = TP_VLAN_PRI_MAP_DEFAULT; | 366 | static unsigned int tp_vlan_pri_map = TP_VLAN_PRI_MAP_DEFAULT; |
@@ -1177,10 +1177,10 @@ freeout: t4_free_sge_resources(adap); | |||
1177 | } | 1177 | } |
1178 | 1178 | ||
1179 | t4_write_reg(adap, is_t4(adap->params.chip) ? | 1179 | t4_write_reg(adap, is_t4(adap->params.chip) ? |
1180 | MPS_TRC_RSS_CONTROL : | 1180 | MPS_TRC_RSS_CONTROL_A : |
1181 | MPS_T5_TRC_RSS_CONTROL, | 1181 | MPS_T5_TRC_RSS_CONTROL_A, |
1182 | RSSCONTROL(netdev2pinfo(adap->port[0])->tx_chan) | | 1182 | RSSCONTROL_V(netdev2pinfo(adap->port[0])->tx_chan) | |
1183 | QUEUENUMBER(s->ethrxq[0].rspq.abs_id)); | 1183 | QUEUENUMBER_V(s->ethrxq[0].rspq.abs_id)); |
1184 | return 0; | 1184 | return 0; |
1185 | } | 1185 | } |
1186 | 1186 | ||
@@ -4094,7 +4094,7 @@ static void uld_attach(struct adapter *adap, unsigned int uld) | |||
4094 | lli.nports = adap->params.nports; | 4094 | lli.nports = adap->params.nports; |
4095 | lli.wr_cred = adap->params.ofldq_wr_cred; | 4095 | lli.wr_cred = adap->params.ofldq_wr_cred; |
4096 | lli.adapter_type = adap->params.chip; | 4096 | lli.adapter_type = adap->params.chip; |
4097 | lli.iscsi_iolen = MAXRXDATA_GET(t4_read_reg(adap, TP_PARA_REG2)); | 4097 | lli.iscsi_iolen = MAXRXDATA_G(t4_read_reg(adap, TP_PARA_REG2_A)); |
4098 | lli.cclk_ps = 1000000000 / adap->params.vpd.cclk; | 4098 | lli.cclk_ps = 1000000000 / adap->params.vpd.cclk; |
4099 | lli.udb_density = 1 << adap->params.sge.eq_qpp; | 4099 | lli.udb_density = 1 << adap->params.sge.eq_qpp; |
4100 | lli.ucq_density = 1 << adap->params.sge.iq_qpp; | 4100 | lli.ucq_density = 1 << adap->params.sge.iq_qpp; |
@@ -4949,11 +4949,11 @@ static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) | |||
4949 | t4_sge_init(adap); | 4949 | t4_sge_init(adap); |
4950 | 4950 | ||
4951 | /* tweak some settings */ | 4951 | /* tweak some settings */ |
4952 | t4_write_reg(adap, TP_SHIFT_CNT, 0x64f8849); | 4952 | t4_write_reg(adap, TP_SHIFT_CNT_A, 0x64f8849); |
4953 | t4_write_reg(adap, ULP_RX_TDDP_PSZ, HPZ0(PAGE_SHIFT - 12)); | 4953 | t4_write_reg(adap, ULP_RX_TDDP_PSZ, HPZ0(PAGE_SHIFT - 12)); |
4954 | t4_write_reg(adap, TP_PIO_ADDR, TP_INGRESS_CONFIG); | 4954 | t4_write_reg(adap, TP_PIO_ADDR_A, TP_INGRESS_CONFIG_A); |
4955 | v = t4_read_reg(adap, TP_PIO_DATA); | 4955 | v = t4_read_reg(adap, TP_PIO_DATA_A); |
4956 | t4_write_reg(adap, TP_PIO_DATA, v & ~CSUM_HAS_PSEUDO_HDR); | 4956 | t4_write_reg(adap, TP_PIO_DATA_A, v & ~CSUM_HAS_PSEUDO_HDR_F); |
4957 | 4957 | ||
4958 | /* first 4 Tx modulation queues point to consecutive Tx channels */ | 4958 | /* first 4 Tx modulation queues point to consecutive Tx channels */ |
4959 | adap->params.tp.tx_modq_map = 0xE4; | 4959 | adap->params.tp.tx_modq_map = 0xE4; |
@@ -4962,11 +4962,11 @@ static int adap_init1(struct adapter *adap, struct fw_caps_config_cmd *c) | |||
4962 | 4962 | ||
4963 | /* associate each Tx modulation queue with consecutive Tx channels */ | 4963 | /* associate each Tx modulation queue with consecutive Tx channels */ |
4964 | v = 0x84218421; | 4964 | v = 0x84218421; |
4965 | t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA, | 4965 | t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, |
4966 | &v, 1, A_TP_TX_SCHED_HDR); | 4966 | &v, 1, A_TP_TX_SCHED_HDR); |
4967 | t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA, | 4967 | t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, |
4968 | &v, 1, A_TP_TX_SCHED_FIFO); | 4968 | &v, 1, A_TP_TX_SCHED_FIFO); |
4969 | t4_write_indirect(adap, TP_PIO_ADDR, TP_PIO_DATA, | 4969 | t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, |
4970 | &v, 1, A_TP_TX_SCHED_PCMD); | 4970 | &v, 1, A_TP_TX_SCHED_PCMD); |
4971 | 4971 | ||
4972 | #define T4_TX_MODQ_10G_WEIGHT_DEFAULT 16 /* in KB units */ | 4972 | #define T4_TX_MODQ_10G_WEIGHT_DEFAULT 16 /* in KB units */ |
@@ -5034,8 +5034,8 @@ static int adap_init0_tweaks(struct adapter *adapter) | |||
5034 | * Don't include the "IP Pseudo Header" in CPL_RX_PKT checksums: Linux | 5034 | * Don't include the "IP Pseudo Header" in CPL_RX_PKT checksums: Linux |
5035 | * adds the pseudo header itself. | 5035 | * adds the pseudo header itself. |
5036 | */ | 5036 | */ |
5037 | t4_tp_wr_bits_indirect(adapter, TP_INGRESS_CONFIG, | 5037 | t4_tp_wr_bits_indirect(adapter, TP_INGRESS_CONFIG_A, |
5038 | CSUM_HAS_PSEUDO_HDR, 0); | 5038 | CSUM_HAS_PSEUDO_HDR_F, 0); |
5039 | 5039 | ||
5040 | return 0; | 5040 | return 0; |
5041 | } | 5041 | } |
@@ -5401,34 +5401,34 @@ static int adap_init0_no_config(struct adapter *adapter, int reset) | |||
5401 | case 0: | 5401 | case 0: |
5402 | /* compressed filter field not enabled */ | 5402 | /* compressed filter field not enabled */ |
5403 | break; | 5403 | break; |
5404 | case FCOE_MASK: | 5404 | case FCOE_F: |
5405 | bits += 1; | 5405 | bits += 1; |
5406 | break; | 5406 | break; |
5407 | case PORT_MASK: | 5407 | case PORT_F: |
5408 | bits += 3; | 5408 | bits += 3; |
5409 | break; | 5409 | break; |
5410 | case VNIC_ID_MASK: | 5410 | case VNIC_F: |
5411 | bits += 17; | 5411 | bits += 17; |
5412 | break; | 5412 | break; |
5413 | case VLAN_MASK: | 5413 | case VLAN_F: |
5414 | bits += 17; | 5414 | bits += 17; |
5415 | break; | 5415 | break; |
5416 | case TOS_MASK: | 5416 | case TOS_F: |
5417 | bits += 8; | 5417 | bits += 8; |
5418 | break; | 5418 | break; |
5419 | case PROTOCOL_MASK: | 5419 | case PROTOCOL_F: |
5420 | bits += 8; | 5420 | bits += 8; |
5421 | break; | 5421 | break; |
5422 | case ETHERTYPE_MASK: | 5422 | case ETHERTYPE_F: |
5423 | bits += 16; | 5423 | bits += 16; |
5424 | break; | 5424 | break; |
5425 | case MACMATCH_MASK: | 5425 | case MACMATCH_F: |
5426 | bits += 9; | 5426 | bits += 9; |
5427 | break; | 5427 | break; |
5428 | case MPSHITTYPE_MASK: | 5428 | case MPSHITTYPE_F: |
5429 | bits += 3; | 5429 | bits += 3; |
5430 | break; | 5430 | break; |
5431 | case FRAGMENTATION_MASK: | 5431 | case FRAGMENTATION_F: |
5432 | bits += 1; | 5432 | bits += 1; |
5433 | break; | 5433 | break; |
5434 | } | 5434 | } |
@@ -5442,8 +5442,8 @@ static int adap_init0_no_config(struct adapter *adapter, int reset) | |||
5442 | } | 5442 | } |
5443 | } | 5443 | } |
5444 | v = tp_vlan_pri_map; | 5444 | v = tp_vlan_pri_map; |
5445 | t4_write_indirect(adapter, TP_PIO_ADDR, TP_PIO_DATA, | 5445 | t4_write_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A, |
5446 | &v, 1, TP_VLAN_PRI_MAP); | 5446 | &v, 1, TP_VLAN_PRI_MAP_A); |
5447 | 5447 | ||
5448 | /* | 5448 | /* |
5449 | * We need Five Tuple Lookup mode to be set in TP_GLOBAL_CONFIG order | 5449 | * We need Five Tuple Lookup mode to be set in TP_GLOBAL_CONFIG order |
@@ -5456,17 +5456,17 @@ static int adap_init0_no_config(struct adapter *adapter, int reset) | |||
5456 | * performance impact). | 5456 | * performance impact). |
5457 | */ | 5457 | */ |
5458 | if (tp_vlan_pri_map) | 5458 | if (tp_vlan_pri_map) |
5459 | t4_set_reg_field(adapter, TP_GLOBAL_CONFIG, | 5459 | t4_set_reg_field(adapter, TP_GLOBAL_CONFIG_A, |
5460 | FIVETUPLELOOKUP_MASK, | 5460 | FIVETUPLELOOKUP_V(FIVETUPLELOOKUP_M), |
5461 | FIVETUPLELOOKUP_MASK); | 5461 | FIVETUPLELOOKUP_V(FIVETUPLELOOKUP_M)); |
5462 | 5462 | ||
5463 | /* | 5463 | /* |
5464 | * Tweak some settings. | 5464 | * Tweak some settings. |
5465 | */ | 5465 | */ |
5466 | t4_write_reg(adapter, TP_SHIFT_CNT, SYNSHIFTMAX(6) | | 5466 | t4_write_reg(adapter, TP_SHIFT_CNT_A, SYNSHIFTMAX_V(6) | |
5467 | RXTSHIFTMAXR1(4) | RXTSHIFTMAXR2(15) | | 5467 | RXTSHIFTMAXR1_V(4) | RXTSHIFTMAXR2_V(15) | |
5468 | PERSHIFTBACKOFFMAX(8) | PERSHIFTMAX(8) | | 5468 | PERSHIFTBACKOFFMAX_V(8) | PERSHIFTMAX_V(8) | |
5469 | KEEPALIVEMAXR1(4) | KEEPALIVEMAXR2(9)); | 5469 | KEEPALIVEMAXR1_V(4) | KEEPALIVEMAXR2_V(9)); |
5470 | 5470 | ||
5471 | /* | 5471 | /* |
5472 | * Get basic stuff going by issuing the Firmware Initialize command. | 5472 | * Get basic stuff going by issuing the Firmware Initialize command. |