diff options
Diffstat (limited to 'drivers/net/ethernet/chelsio/cxgb4/cxgb4.h')
| -rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 41 |
1 files changed, 1 insertions, 40 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index 414fe7c487d5..55a47de544ea 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | |||
| @@ -49,6 +49,7 @@ | |||
| 49 | #include <linux/etherdevice.h> | 49 | #include <linux/etherdevice.h> |
| 50 | #include <linux/net_tstamp.h> | 50 | #include <linux/net_tstamp.h> |
| 51 | #include <asm/io.h> | 51 | #include <asm/io.h> |
| 52 | #include "t4_chip_type.h" | ||
| 52 | #include "cxgb4_uld.h" | 53 | #include "cxgb4_uld.h" |
| 53 | 54 | ||
| 54 | #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) | 55 | #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) |
| @@ -291,31 +292,6 @@ struct pci_params { | |||
| 291 | unsigned char width; | 292 | unsigned char width; |
| 292 | }; | 293 | }; |
| 293 | 294 | ||
| 294 | #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision)) | ||
| 295 | #define CHELSIO_CHIP_FPGA 0x100 | ||
| 296 | #define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf) | ||
| 297 | #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf) | ||
| 298 | |||
| 299 | #define CHELSIO_T4 0x4 | ||
| 300 | #define CHELSIO_T5 0x5 | ||
| 301 | #define CHELSIO_T6 0x6 | ||
| 302 | |||
| 303 | enum chip_type { | ||
| 304 | T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1), | ||
| 305 | T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2), | ||
| 306 | T4_FIRST_REV = T4_A1, | ||
| 307 | T4_LAST_REV = T4_A2, | ||
| 308 | |||
| 309 | T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0), | ||
| 310 | T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1), | ||
| 311 | T5_FIRST_REV = T5_A0, | ||
| 312 | T5_LAST_REV = T5_A1, | ||
| 313 | |||
| 314 | T6_A0 = CHELSIO_CHIP_CODE(CHELSIO_T6, 0), | ||
| 315 | T6_FIRST_REV = T6_A0, | ||
| 316 | T6_LAST_REV = T6_A0, | ||
| 317 | }; | ||
| 318 | |||
| 319 | struct devlog_params { | 295 | struct devlog_params { |
| 320 | u32 memtype; /* which memory (EDC0, EDC1, MC) */ | 296 | u32 memtype; /* which memory (EDC0, EDC1, MC) */ |
| 321 | u32 start; /* start of log in firmware memory */ | 297 | u32 start; /* start of log in firmware memory */ |
| @@ -909,21 +885,6 @@ static inline int is_offload(const struct adapter *adap) | |||
| 909 | return adap->params.offload; | 885 | return adap->params.offload; |
| 910 | } | 886 | } |
| 911 | 887 | ||
| 912 | static inline int is_t6(enum chip_type chip) | ||
| 913 | { | ||
| 914 | return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T6; | ||
| 915 | } | ||
| 916 | |||
| 917 | static inline int is_t5(enum chip_type chip) | ||
| 918 | { | ||
| 919 | return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5; | ||
| 920 | } | ||
| 921 | |||
| 922 | static inline int is_t4(enum chip_type chip) | ||
| 923 | { | ||
| 924 | return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4; | ||
| 925 | } | ||
| 926 | |||
| 927 | static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) | 888 | static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) |
| 928 | { | 889 | { |
| 929 | return readl(adap->regs + reg_addr); | 890 | return readl(adap->regs + reg_addr); |
