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path: root/drivers/misc/cxl/native.c
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Diffstat (limited to 'drivers/misc/cxl/native.c')
-rw-r--r--drivers/misc/cxl/native.c27
1 files changed, 21 insertions, 6 deletions
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c
index 4a82c313cf71..02b6b45b4c20 100644
--- a/drivers/misc/cxl/native.c
+++ b/drivers/misc/cxl/native.c
@@ -897,6 +897,14 @@ int cxl_attach_dedicated_process_psl9(struct cxl_context *ctx, u64 wed, u64 amr)
897 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes) 897 if (ctx->afu->adapter->native->sl_ops->update_dedicated_ivtes)
898 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx); 898 afu->adapter->native->sl_ops->update_dedicated_ivtes(ctx);
899 899
900 ctx->elem->software_state = cpu_to_be32(CXL_PE_SOFTWARE_STATE_V);
901 /*
902 * Ideally we should do a wmb() here to make sure the changes to the
903 * PE are visible to the card before we call afu_enable.
904 * On ppc64 though all mmios are preceded by a 'sync' instruction hence
905 * we dont dont need one here.
906 */
907
900 result = cxl_ops->afu_reset(afu); 908 result = cxl_ops->afu_reset(afu);
901 if (result) 909 if (result)
902 return result; 910 return result;
@@ -1077,13 +1085,11 @@ static int native_get_irq_info(struct cxl_afu *afu, struct cxl_irq_info *info)
1077 1085
1078void cxl_native_irq_dump_regs_psl9(struct cxl_context *ctx) 1086void cxl_native_irq_dump_regs_psl9(struct cxl_context *ctx)
1079{ 1087{
1080 u64 fir1, fir2, serr; 1088 u64 fir1, serr;
1081 1089
1082 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL9_FIR1); 1090 fir1 = cxl_p1_read(ctx->afu->adapter, CXL_PSL9_FIR1);
1083 fir2 = cxl_p1_read(ctx->afu->adapter, CXL_PSL9_FIR2);
1084 1091
1085 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1); 1092 dev_crit(&ctx->afu->dev, "PSL_FIR1: 0x%016llx\n", fir1);
1086 dev_crit(&ctx->afu->dev, "PSL_FIR2: 0x%016llx\n", fir2);
1087 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) { 1093 if (ctx->afu->adapter->native->sl_ops->register_serr_irq) {
1088 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An); 1094 serr = cxl_p1n_read(ctx->afu, CXL_PSL_SERR_An);
1089 cxl_afu_decode_psl_serr(ctx->afu, serr); 1095 cxl_afu_decode_psl_serr(ctx->afu, serr);
@@ -1257,14 +1263,23 @@ static irqreturn_t native_slice_irq_err(int irq, void *data)
1257 return IRQ_HANDLED; 1263 return IRQ_HANDLED;
1258} 1264}
1259 1265
1260void cxl_native_err_irq_dump_regs(struct cxl *adapter) 1266void cxl_native_err_irq_dump_regs_psl9(struct cxl *adapter)
1267{
1268 u64 fir1;
1269
1270 fir1 = cxl_p1_read(adapter, CXL_PSL9_FIR1);
1271 dev_crit(&adapter->dev, "PSL_FIR: 0x%016llx\n", fir1);
1272}
1273
1274void cxl_native_err_irq_dump_regs_psl8(struct cxl *adapter)
1261{ 1275{
1262 u64 fir1, fir2; 1276 u64 fir1, fir2;
1263 1277
1264 fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1); 1278 fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
1265 fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2); 1279 fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
1266 1280 dev_crit(&adapter->dev,
1267 dev_crit(&adapter->dev, "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n", fir1, fir2); 1281 "PSL_FIR1: 0x%016llx\nPSL_FIR2: 0x%016llx\n",
1282 fir1, fir2);
1268} 1283}
1269 1284
1270static irqreturn_t native_irq_err(int irq, void *data) 1285static irqreturn_t native_irq_err(int irq, void *data)