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path: root/drivers/iommu/amd_iommu_init.c
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Diffstat (limited to 'drivers/iommu/amd_iommu_init.c')
-rw-r--r--drivers/iommu/amd_iommu_init.c40
1 files changed, 10 insertions, 30 deletions
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index c17df04d7a7f..a24495eb4e26 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -226,6 +226,7 @@ static enum iommu_init_state init_state = IOMMU_START_STATE;
226 226
227static int amd_iommu_enable_interrupts(void); 227static int amd_iommu_enable_interrupts(void);
228static int __init iommu_go_to_state(enum iommu_init_state state); 228static int __init iommu_go_to_state(enum iommu_init_state state);
229static void init_device_table_dma(void);
229 230
230static inline void update_last_devid(u16 devid) 231static inline void update_last_devid(u16 devid)
231{ 232{
@@ -1389,9 +1390,15 @@ static int __init amd_iommu_init_pci(void)
1389 break; 1390 break;
1390 } 1391 }
1391 1392
1392 ret = amd_iommu_init_devices(); 1393 init_device_table_dma();
1394
1395 for_each_iommu(iommu)
1396 iommu_flush_all_caches(iommu);
1393 1397
1394 print_iommu_info(); 1398 ret = amd_iommu_init_api();
1399
1400 if (!ret)
1401 print_iommu_info();
1395 1402
1396 return ret; 1403 return ret;
1397} 1404}
@@ -1829,8 +1836,6 @@ static bool __init check_ioapic_information(void)
1829 1836
1830static void __init free_dma_resources(void) 1837static void __init free_dma_resources(void)
1831{ 1838{
1832 amd_iommu_uninit_devices();
1833
1834 free_pages((unsigned long)amd_iommu_pd_alloc_bitmap, 1839 free_pages((unsigned long)amd_iommu_pd_alloc_bitmap,
1835 get_order(MAX_DOMAIN_ID/8)); 1840 get_order(MAX_DOMAIN_ID/8));
1836 1841
@@ -2021,31 +2026,6 @@ static bool detect_ivrs(void)
2021 return true; 2026 return true;
2022} 2027}
2023 2028
2024static int amd_iommu_init_dma(void)
2025{
2026 struct amd_iommu *iommu;
2027 int ret;
2028
2029 if (iommu_pass_through)
2030 ret = amd_iommu_init_passthrough();
2031 else
2032 ret = amd_iommu_init_dma_ops();
2033
2034 if (ret)
2035 return ret;
2036
2037 init_device_table_dma();
2038
2039 for_each_iommu(iommu)
2040 iommu_flush_all_caches(iommu);
2041
2042 amd_iommu_init_api();
2043
2044 amd_iommu_init_notifier();
2045
2046 return 0;
2047}
2048
2049/**************************************************************************** 2029/****************************************************************************
2050 * 2030 *
2051 * AMD IOMMU Initialization State Machine 2031 * AMD IOMMU Initialization State Machine
@@ -2085,7 +2065,7 @@ static int __init state_next(void)
2085 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN; 2065 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_INTERRUPTS_EN;
2086 break; 2066 break;
2087 case IOMMU_INTERRUPTS_EN: 2067 case IOMMU_INTERRUPTS_EN:
2088 ret = amd_iommu_init_dma(); 2068 ret = amd_iommu_init_dma_ops();
2089 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_DMA_OPS; 2069 init_state = ret ? IOMMU_INIT_ERROR : IOMMU_DMA_OPS;
2090 break; 2070 break;
2091 case IOMMU_DMA_OPS: 2071 case IOMMU_DMA_OPS: