diff options
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_crtc.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_crtc.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_dmm_priv.h | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 46 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_dmm_tiler.h | 22 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_drv.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_fb.c | 18 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_gem.c | 41 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_gem.h | 16 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_irq.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_irq.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/omap_plane.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/tcm-sita.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/omapdrm/tcm.h | 4 |
14 files changed, 101 insertions, 98 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index 1b8154e58d18..95615a86e9f7 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c | |||
| @@ -272,7 +272,7 @@ static const struct dss_mgr_ops mgr_ops = { | |||
| 272 | * Setup, Flush and Page Flip | 272 | * Setup, Flush and Page Flip |
| 273 | */ | 273 | */ |
| 274 | 274 | ||
| 275 | void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus) | 275 | void omap_crtc_error_irq(struct drm_crtc *crtc, u32 irqstatus) |
| 276 | { | 276 | { |
| 277 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); | 277 | struct omap_crtc *omap_crtc = to_omap_crtc(crtc); |
| 278 | 278 | ||
| @@ -492,7 +492,7 @@ static int omap_crtc_atomic_check(struct drm_crtc *crtc, | |||
| 492 | struct drm_plane_state *pri_state; | 492 | struct drm_plane_state *pri_state; |
| 493 | 493 | ||
| 494 | if (state->color_mgmt_changed && state->gamma_lut) { | 494 | if (state->color_mgmt_changed && state->gamma_lut) { |
| 495 | uint length = state->gamma_lut->length / | 495 | unsigned int length = state->gamma_lut->length / |
| 496 | sizeof(struct drm_color_lut); | 496 | sizeof(struct drm_color_lut); |
| 497 | 497 | ||
| 498 | if (length < 2) | 498 | if (length < 2) |
| @@ -526,7 +526,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, | |||
| 526 | 526 | ||
| 527 | if (crtc->state->color_mgmt_changed) { | 527 | if (crtc->state->color_mgmt_changed) { |
| 528 | struct drm_color_lut *lut = NULL; | 528 | struct drm_color_lut *lut = NULL; |
| 529 | uint length = 0; | 529 | unsigned int length = 0; |
| 530 | 530 | ||
| 531 | if (crtc->state->gamma_lut) { | 531 | if (crtc->state->gamma_lut) { |
| 532 | lut = (struct drm_color_lut *) | 532 | lut = (struct drm_color_lut *) |
| @@ -557,7 +557,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, | |||
| 557 | static int omap_crtc_atomic_set_property(struct drm_crtc *crtc, | 557 | static int omap_crtc_atomic_set_property(struct drm_crtc *crtc, |
| 558 | struct drm_crtc_state *state, | 558 | struct drm_crtc_state *state, |
| 559 | struct drm_property *property, | 559 | struct drm_property *property, |
| 560 | uint64_t val) | 560 | u64 val) |
| 561 | { | 561 | { |
| 562 | struct omap_drm_private *priv = crtc->dev->dev_private; | 562 | struct omap_drm_private *priv = crtc->dev->dev_private; |
| 563 | struct drm_plane_state *plane_state; | 563 | struct drm_plane_state *plane_state; |
| @@ -585,7 +585,7 @@ static int omap_crtc_atomic_set_property(struct drm_crtc *crtc, | |||
| 585 | static int omap_crtc_atomic_get_property(struct drm_crtc *crtc, | 585 | static int omap_crtc_atomic_get_property(struct drm_crtc *crtc, |
| 586 | const struct drm_crtc_state *state, | 586 | const struct drm_crtc_state *state, |
| 587 | struct drm_property *property, | 587 | struct drm_property *property, |
| 588 | uint64_t *val) | 588 | u64 *val) |
| 589 | { | 589 | { |
| 590 | struct omap_drm_private *priv = crtc->dev->dev_private; | 590 | struct omap_drm_private *priv = crtc->dev->dev_private; |
| 591 | struct omap_crtc_state *omap_state = to_omap_crtc_state(state); | 591 | struct omap_crtc_state *omap_state = to_omap_crtc_state(state); |
| @@ -732,7 +732,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, | |||
| 732 | * gamma table is not supprted. | 732 | * gamma table is not supprted. |
| 733 | */ | 733 | */ |
| 734 | if (priv->dispc_ops->mgr_gamma_size(channel)) { | 734 | if (priv->dispc_ops->mgr_gamma_size(channel)) { |
| 735 | uint gamma_lut_size = 256; | 735 | unsigned int gamma_lut_size = 256; |
| 736 | 736 | ||
| 737 | drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); | 737 | drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); |
| 738 | drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); | 738 | drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); |
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.h b/drivers/gpu/drm/omapdrm/omap_crtc.h index ad7b007c6174..7f01e730a050 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.h +++ b/drivers/gpu/drm/omapdrm/omap_crtc.h | |||
| @@ -37,7 +37,7 @@ void omap_crtc_pre_uninit(void); | |||
| 37 | struct drm_crtc *omap_crtc_init(struct drm_device *dev, | 37 | struct drm_crtc *omap_crtc_init(struct drm_device *dev, |
| 38 | struct drm_plane *plane, struct omap_dss_device *dssdev); | 38 | struct drm_plane *plane, struct omap_dss_device *dssdev); |
| 39 | int omap_crtc_wait_pending(struct drm_crtc *crtc); | 39 | int omap_crtc_wait_pending(struct drm_crtc *crtc); |
| 40 | void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus); | 40 | void omap_crtc_error_irq(struct drm_crtc *crtc, u32 irqstatus); |
| 41 | void omap_crtc_vblank_irq(struct drm_crtc *crtc); | 41 | void omap_crtc_vblank_irq(struct drm_crtc *crtc); |
| 42 | 42 | ||
| 43 | #endif /* __OMAPDRM_CRTC_H__ */ | 43 | #endif /* __OMAPDRM_CRTC_H__ */ |
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_priv.h b/drivers/gpu/drm/omapdrm/omap_dmm_priv.h index 600064d5c25b..c2785cc98dc9 100644 --- a/drivers/gpu/drm/omapdrm/omap_dmm_priv.h +++ b/drivers/gpu/drm/omapdrm/omap_dmm_priv.h | |||
| @@ -102,10 +102,10 @@ struct pat_ctrl { | |||
| 102 | }; | 102 | }; |
| 103 | 103 | ||
| 104 | struct pat { | 104 | struct pat { |
| 105 | uint32_t next_pa; | 105 | u32 next_pa; |
| 106 | struct pat_area area; | 106 | struct pat_area area; |
| 107 | struct pat_ctrl ctrl; | 107 | struct pat_ctrl ctrl; |
| 108 | uint32_t data_pa; | 108 | u32 data_pa; |
| 109 | }; | 109 | }; |
| 110 | 110 | ||
| 111 | #define DMM_FIXED_RETRY_COUNT 1000 | 111 | #define DMM_FIXED_RETRY_COUNT 1000 |
| @@ -129,7 +129,7 @@ struct dmm_txn { | |||
| 129 | void *engine_handle; | 129 | void *engine_handle; |
| 130 | struct tcm *tcm; | 130 | struct tcm *tcm; |
| 131 | 131 | ||
| 132 | uint8_t *current_va; | 132 | u8 *current_va; |
| 133 | dma_addr_t current_pa; | 133 | dma_addr_t current_pa; |
| 134 | 134 | ||
| 135 | struct pat *last_pat; | 135 | struct pat *last_pat; |
| @@ -140,7 +140,7 @@ struct refill_engine { | |||
| 140 | struct dmm *dmm; | 140 | struct dmm *dmm; |
| 141 | struct tcm *tcm; | 141 | struct tcm *tcm; |
| 142 | 142 | ||
| 143 | uint8_t *refill_va; | 143 | u8 *refill_va; |
| 144 | dma_addr_t refill_pa; | 144 | dma_addr_t refill_pa; |
| 145 | 145 | ||
| 146 | /* only one trans per engine for now */ | 146 | /* only one trans per engine for now */ |
| @@ -154,7 +154,7 @@ struct refill_engine { | |||
| 154 | }; | 154 | }; |
| 155 | 155 | ||
| 156 | struct dmm_platform_data { | 156 | struct dmm_platform_data { |
| 157 | uint32_t cpu_cache_flags; | 157 | u32 cpu_cache_flags; |
| 158 | }; | 158 | }; |
| 159 | 159 | ||
| 160 | struct dmm { | 160 | struct dmm { |
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c index 4be0c94673f5..f9fa1c90b35c 100644 --- a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c +++ b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | |||
| @@ -58,11 +58,11 @@ static DEFINE_SPINLOCK(list_lock); | |||
| 58 | } | 58 | } |
| 59 | 59 | ||
| 60 | static const struct { | 60 | static const struct { |
| 61 | uint32_t x_shft; /* unused X-bits (as part of bpp) */ | 61 | u32 x_shft; /* unused X-bits (as part of bpp) */ |
| 62 | uint32_t y_shft; /* unused Y-bits (as part of bpp) */ | 62 | u32 y_shft; /* unused Y-bits (as part of bpp) */ |
| 63 | uint32_t cpp; /* bytes/chars per pixel */ | 63 | u32 cpp; /* bytes/chars per pixel */ |
| 64 | uint32_t slot_w; /* width of each slot (in pixels) */ | 64 | u32 slot_w; /* width of each slot (in pixels) */ |
| 65 | uint32_t slot_h; /* height of each slot (in pixels) */ | 65 | u32 slot_h; /* height of each slot (in pixels) */ |
| 66 | } geom[TILFMT_NFORMATS] = { | 66 | } geom[TILFMT_NFORMATS] = { |
| 67 | [TILFMT_8BIT] = GEOM(0, 0, 1), | 67 | [TILFMT_8BIT] = GEOM(0, 0, 1), |
| 68 | [TILFMT_16BIT] = GEOM(0, 1, 2), | 68 | [TILFMT_16BIT] = GEOM(0, 1, 2), |
| @@ -72,7 +72,7 @@ static const struct { | |||
| 72 | 72 | ||
| 73 | 73 | ||
| 74 | /* lookup table for registers w/ per-engine instances */ | 74 | /* lookup table for registers w/ per-engine instances */ |
| 75 | static const uint32_t reg[][4] = { | 75 | static const u32 reg[][4] = { |
| 76 | [PAT_STATUS] = {DMM_PAT_STATUS__0, DMM_PAT_STATUS__1, | 76 | [PAT_STATUS] = {DMM_PAT_STATUS__0, DMM_PAT_STATUS__1, |
| 77 | DMM_PAT_STATUS__2, DMM_PAT_STATUS__3}, | 77 | DMM_PAT_STATUS__2, DMM_PAT_STATUS__3}, |
| 78 | [PAT_DESCR] = {DMM_PAT_DESCR__0, DMM_PAT_DESCR__1, | 78 | [PAT_DESCR] = {DMM_PAT_DESCR__0, DMM_PAT_DESCR__1, |
| @@ -111,10 +111,10 @@ static void *alloc_dma(struct dmm_txn *txn, size_t sz, dma_addr_t *pa) | |||
| 111 | } | 111 | } |
| 112 | 112 | ||
| 113 | /* check status and spin until wait_mask comes true */ | 113 | /* check status and spin until wait_mask comes true */ |
| 114 | static int wait_status(struct refill_engine *engine, uint32_t wait_mask) | 114 | static int wait_status(struct refill_engine *engine, u32 wait_mask) |
| 115 | { | 115 | { |
| 116 | struct dmm *dmm = engine->dmm; | 116 | struct dmm *dmm = engine->dmm; |
| 117 | uint32_t r = 0, err, i; | 117 | u32 r = 0, err, i; |
| 118 | 118 | ||
| 119 | i = DMM_FIXED_RETRY_COUNT; | 119 | i = DMM_FIXED_RETRY_COUNT; |
| 120 | while (true) { | 120 | while (true) { |
| @@ -158,7 +158,7 @@ static void release_engine(struct refill_engine *engine) | |||
| 158 | static irqreturn_t omap_dmm_irq_handler(int irq, void *arg) | 158 | static irqreturn_t omap_dmm_irq_handler(int irq, void *arg) |
| 159 | { | 159 | { |
| 160 | struct dmm *dmm = arg; | 160 | struct dmm *dmm = arg; |
| 161 | uint32_t status = dmm_read(dmm, DMM_PAT_IRQSTATUS); | 161 | u32 status = dmm_read(dmm, DMM_PAT_IRQSTATUS); |
| 162 | int i; | 162 | int i; |
| 163 | 163 | ||
| 164 | /* ack IRQ */ | 164 | /* ack IRQ */ |
| @@ -226,10 +226,10 @@ static struct dmm_txn *dmm_txn_init(struct dmm *dmm, struct tcm *tcm) | |||
| 226 | * corresponding slot is cleared (ie. dummy_pa is programmed) | 226 | * corresponding slot is cleared (ie. dummy_pa is programmed) |
| 227 | */ | 227 | */ |
| 228 | static void dmm_txn_append(struct dmm_txn *txn, struct pat_area *area, | 228 | static void dmm_txn_append(struct dmm_txn *txn, struct pat_area *area, |
| 229 | struct page **pages, uint32_t npages, uint32_t roll) | 229 | struct page **pages, u32 npages, u32 roll) |
| 230 | { | 230 | { |
| 231 | dma_addr_t pat_pa = 0, data_pa = 0; | 231 | dma_addr_t pat_pa = 0, data_pa = 0; |
| 232 | uint32_t *data; | 232 | u32 *data; |
| 233 | struct pat *pat; | 233 | struct pat *pat; |
| 234 | struct refill_engine *engine = txn->engine_handle; | 234 | struct refill_engine *engine = txn->engine_handle; |
| 235 | int columns = (1 + area->x1 - area->x0); | 235 | int columns = (1 + area->x1 - area->x0); |
| @@ -239,7 +239,7 @@ static void dmm_txn_append(struct dmm_txn *txn, struct pat_area *area, | |||
| 239 | pat = alloc_dma(txn, sizeof(*pat), &pat_pa); | 239 | pat = alloc_dma(txn, sizeof(*pat), &pat_pa); |
| 240 | 240 | ||
| 241 | if (txn->last_pat) | 241 | if (txn->last_pat) |
| 242 | txn->last_pat->next_pa = (uint32_t)pat_pa; | 242 | txn->last_pat->next_pa = (u32)pat_pa; |
| 243 | 243 | ||
| 244 | pat->area = *area; | 244 | pat->area = *area; |
| 245 | 245 | ||
| @@ -330,7 +330,7 @@ cleanup: | |||
| 330 | * DMM programming | 330 | * DMM programming |
| 331 | */ | 331 | */ |
| 332 | static int fill(struct tcm_area *area, struct page **pages, | 332 | static int fill(struct tcm_area *area, struct page **pages, |
| 333 | uint32_t npages, uint32_t roll, bool wait) | 333 | u32 npages, u32 roll, bool wait) |
| 334 | { | 334 | { |
| 335 | int ret = 0; | 335 | int ret = 0; |
| 336 | struct tcm_area slice, area_s; | 336 | struct tcm_area slice, area_s; |
| @@ -378,7 +378,7 @@ static int fill(struct tcm_area *area, struct page **pages, | |||
| 378 | /* note: slots for which pages[i] == NULL are filled w/ dummy page | 378 | /* note: slots for which pages[i] == NULL are filled w/ dummy page |
| 379 | */ | 379 | */ |
| 380 | int tiler_pin(struct tiler_block *block, struct page **pages, | 380 | int tiler_pin(struct tiler_block *block, struct page **pages, |
| 381 | uint32_t npages, uint32_t roll, bool wait) | 381 | u32 npages, u32 roll, bool wait) |
| 382 | { | 382 | { |
| 383 | int ret; | 383 | int ret; |
| 384 | 384 | ||
| @@ -398,8 +398,8 @@ int tiler_unpin(struct tiler_block *block) | |||
| 398 | /* | 398 | /* |
| 399 | * Reserve/release | 399 | * Reserve/release |
| 400 | */ | 400 | */ |
| 401 | struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, uint16_t w, | 401 | struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, u16 w, |
| 402 | uint16_t h, uint16_t align) | 402 | u16 h, u16 align) |
| 403 | { | 403 | { |
| 404 | struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL); | 404 | struct tiler_block *block = kzalloc(sizeof(*block), GFP_KERNEL); |
| 405 | u32 min_align = 128; | 405 | u32 min_align = 128; |
| @@ -542,8 +542,8 @@ dma_addr_t tiler_ssptr(struct tiler_block *block) | |||
| 542 | block->area.p0.y * geom[block->fmt].slot_h); | 542 | block->area.p0.y * geom[block->fmt].slot_h); |
| 543 | } | 543 | } |
| 544 | 544 | ||
| 545 | dma_addr_t tiler_tsptr(struct tiler_block *block, uint32_t orient, | 545 | dma_addr_t tiler_tsptr(struct tiler_block *block, u32 orient, |
| 546 | uint32_t x, uint32_t y) | 546 | u32 x, u32 y) |
| 547 | { | 547 | { |
| 548 | struct tcm_pt *p = &block->area.p0; | 548 | struct tcm_pt *p = &block->area.p0; |
| 549 | BUG_ON(!validfmt(block->fmt)); | 549 | BUG_ON(!validfmt(block->fmt)); |
| @@ -553,14 +553,14 @@ dma_addr_t tiler_tsptr(struct tiler_block *block, uint32_t orient, | |||
| 553 | (p->y * geom[block->fmt].slot_h) + y); | 553 | (p->y * geom[block->fmt].slot_h) + y); |
| 554 | } | 554 | } |
| 555 | 555 | ||
| 556 | void tiler_align(enum tiler_fmt fmt, uint16_t *w, uint16_t *h) | 556 | void tiler_align(enum tiler_fmt fmt, u16 *w, u16 *h) |
| 557 | { | 557 | { |
| 558 | BUG_ON(!validfmt(fmt)); | 558 | BUG_ON(!validfmt(fmt)); |
| 559 | *w = round_up(*w, geom[fmt].slot_w); | 559 | *w = round_up(*w, geom[fmt].slot_w); |
| 560 | *h = round_up(*h, geom[fmt].slot_h); | 560 | *h = round_up(*h, geom[fmt].slot_h); |
| 561 | } | 561 | } |
| 562 | 562 | ||
| 563 | uint32_t tiler_stride(enum tiler_fmt fmt, uint32_t orient) | 563 | u32 tiler_stride(enum tiler_fmt fmt, u32 orient) |
| 564 | { | 564 | { |
| 565 | BUG_ON(!validfmt(fmt)); | 565 | BUG_ON(!validfmt(fmt)); |
| 566 | 566 | ||
| @@ -570,19 +570,19 @@ uint32_t tiler_stride(enum tiler_fmt fmt, uint32_t orient) | |||
| 570 | return 1 << (CONT_WIDTH_BITS + geom[fmt].y_shft); | 570 | return 1 << (CONT_WIDTH_BITS + geom[fmt].y_shft); |
| 571 | } | 571 | } |
| 572 | 572 | ||
| 573 | size_t tiler_size(enum tiler_fmt fmt, uint16_t w, uint16_t h) | 573 | size_t tiler_size(enum tiler_fmt fmt, u16 w, u16 h) |
| 574 | { | 574 | { |
| 575 | tiler_align(fmt, &w, &h); | 575 | tiler_align(fmt, &w, &h); |
| 576 | return geom[fmt].cpp * w * h; | 576 | return geom[fmt].cpp * w * h; |
| 577 | } | 577 | } |
| 578 | 578 | ||
| 579 | size_t tiler_vsize(enum tiler_fmt fmt, uint16_t w, uint16_t h) | 579 | size_t tiler_vsize(enum tiler_fmt fmt, u16 w, u16 h) |
| 580 | { | 580 | { |
| 581 | BUG_ON(!validfmt(fmt)); | 581 | BUG_ON(!validfmt(fmt)); |
| 582 | return round_up(geom[fmt].cpp * w, PAGE_SIZE) * h; | 582 | return round_up(geom[fmt].cpp * w, PAGE_SIZE) * h; |
| 583 | } | 583 | } |
| 584 | 584 | ||
| 585 | uint32_t tiler_get_cpu_cache_flags(void) | 585 | u32 tiler_get_cpu_cache_flags(void) |
| 586 | { | 586 | { |
| 587 | return omap_dmm->plat_data->cpu_cache_flags; | 587 | return omap_dmm->plat_data->cpu_cache_flags; |
| 588 | } | 588 | } |
diff --git a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.h b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.h index cc78ba4fe6ab..835e6654fa82 100644 --- a/drivers/gpu/drm/omapdrm/omap_dmm_tiler.h +++ b/drivers/gpu/drm/omapdrm/omap_dmm_tiler.h | |||
| @@ -88,30 +88,30 @@ int tiler_map_show(struct seq_file *s, void *arg); | |||
| 88 | 88 | ||
| 89 | /* pin/unpin */ | 89 | /* pin/unpin */ |
| 90 | int tiler_pin(struct tiler_block *block, struct page **pages, | 90 | int tiler_pin(struct tiler_block *block, struct page **pages, |
| 91 | uint32_t npages, uint32_t roll, bool wait); | 91 | u32 npages, u32 roll, bool wait); |
| 92 | int tiler_unpin(struct tiler_block *block); | 92 | int tiler_unpin(struct tiler_block *block); |
| 93 | 93 | ||
| 94 | /* reserve/release */ | 94 | /* reserve/release */ |
| 95 | struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, uint16_t w, uint16_t h, | 95 | struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, u16 w, u16 h, |
| 96 | uint16_t align); | 96 | u16 align); |
| 97 | struct tiler_block *tiler_reserve_1d(size_t size); | 97 | struct tiler_block *tiler_reserve_1d(size_t size); |
| 98 | int tiler_release(struct tiler_block *block); | 98 | int tiler_release(struct tiler_block *block); |
| 99 | 99 | ||
| 100 | /* utilities */ | 100 | /* utilities */ |
| 101 | dma_addr_t tiler_ssptr(struct tiler_block *block); | 101 | dma_addr_t tiler_ssptr(struct tiler_block *block); |
| 102 | dma_addr_t tiler_tsptr(struct tiler_block *block, uint32_t orient, | 102 | dma_addr_t tiler_tsptr(struct tiler_block *block, u32 orient, |
| 103 | uint32_t x, uint32_t y); | 103 | u32 x, u32 y); |
| 104 | uint32_t tiler_stride(enum tiler_fmt fmt, uint32_t orient); | 104 | u32 tiler_stride(enum tiler_fmt fmt, u32 orient); |
| 105 | size_t tiler_size(enum tiler_fmt fmt, uint16_t w, uint16_t h); | 105 | size_t tiler_size(enum tiler_fmt fmt, u16 w, u16 h); |
| 106 | size_t tiler_vsize(enum tiler_fmt fmt, uint16_t w, uint16_t h); | 106 | size_t tiler_vsize(enum tiler_fmt fmt, u16 w, u16 h); |
| 107 | void tiler_align(enum tiler_fmt fmt, uint16_t *w, uint16_t *h); | 107 | void tiler_align(enum tiler_fmt fmt, u16 *w, u16 *h); |
| 108 | uint32_t tiler_get_cpu_cache_flags(void); | 108 | u32 tiler_get_cpu_cache_flags(void); |
| 109 | bool dmm_is_available(void); | 109 | bool dmm_is_available(void); |
| 110 | 110 | ||
| 111 | extern struct platform_driver omap_dmm_driver; | 111 | extern struct platform_driver omap_dmm_driver; |
| 112 | 112 | ||
| 113 | /* GEM bo flags -> tiler fmt */ | 113 | /* GEM bo flags -> tiler fmt */ |
| 114 | static inline enum tiler_fmt gem2fmt(uint32_t flags) | 114 | static inline enum tiler_fmt gem2fmt(u32 flags) |
| 115 | { | 115 | { |
| 116 | switch (flags & OMAP_BO_TILED) { | 116 | switch (flags & OMAP_BO_TILED) { |
| 117 | case OMAP_BO_TILED_8: | 117 | case OMAP_BO_TILED_8: |
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h index 0ac97fe09f9b..ba322c519999 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.h +++ b/drivers/gpu/drm/omapdrm/omap_drv.h | |||
| @@ -46,7 +46,7 @@ | |||
| 46 | struct omap_drm_usergart; | 46 | struct omap_drm_usergart; |
| 47 | 47 | ||
| 48 | struct omap_drm_private { | 48 | struct omap_drm_private { |
| 49 | uint32_t omaprev; | 49 | u32 omaprev; |
| 50 | 50 | ||
| 51 | const struct dispc_ops *dispc_ops; | 51 | const struct dispc_ops *dispc_ops; |
| 52 | 52 | ||
| @@ -81,7 +81,7 @@ struct omap_drm_private { | |||
| 81 | /* irq handling: */ | 81 | /* irq handling: */ |
| 82 | spinlock_t wait_lock; /* protects the wait_list */ | 82 | spinlock_t wait_lock; /* protects the wait_list */ |
| 83 | struct list_head wait_list; /* list of omap_irq_wait */ | 83 | struct list_head wait_list; /* list of omap_irq_wait */ |
| 84 | uint32_t irq_mask; /* enabled irqs in addition to wait_list */ | 84 | u32 irq_mask; /* enabled irqs in addition to wait_list */ |
| 85 | 85 | ||
| 86 | /* memory bandwidth limit if it is needed on the platform */ | 86 | /* memory bandwidth limit if it is needed on the platform */ |
| 87 | unsigned int max_bandwidth; | 87 | unsigned int max_bandwidth; |
diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c index b2539a90e1a4..5fd22ca73913 100644 --- a/drivers/gpu/drm/omapdrm/omap_fb.c +++ b/drivers/gpu/drm/omapdrm/omap_fb.c | |||
| @@ -52,8 +52,8 @@ static const u32 formats[] = { | |||
| 52 | /* per-plane info for the fb: */ | 52 | /* per-plane info for the fb: */ |
| 53 | struct plane { | 53 | struct plane { |
| 54 | struct drm_gem_object *bo; | 54 | struct drm_gem_object *bo; |
| 55 | uint32_t pitch; | 55 | u32 pitch; |
| 56 | uint32_t offset; | 56 | u32 offset; |
| 57 | dma_addr_t dma_addr; | 57 | dma_addr_t dma_addr; |
| 58 | }; | 58 | }; |
| 59 | 59 | ||
| @@ -100,10 +100,10 @@ static const struct drm_framebuffer_funcs omap_framebuffer_funcs = { | |||
| 100 | .destroy = omap_framebuffer_destroy, | 100 | .destroy = omap_framebuffer_destroy, |
| 101 | }; | 101 | }; |
| 102 | 102 | ||
| 103 | static uint32_t get_linear_addr(struct plane *plane, | 103 | static u32 get_linear_addr(struct plane *plane, |
| 104 | const struct drm_format_info *format, int n, int x, int y) | 104 | const struct drm_format_info *format, int n, int x, int y) |
| 105 | { | 105 | { |
| 106 | uint32_t offset; | 106 | u32 offset; |
| 107 | 107 | ||
| 108 | offset = plane->offset | 108 | offset = plane->offset |
| 109 | + (x * format->cpp[n] / (n == 0 ? 1 : format->hsub)) | 109 | + (x * format->cpp[n] / (n == 0 ? 1 : format->hsub)) |
| @@ -121,9 +121,9 @@ bool omap_framebuffer_supports_rotation(struct drm_framebuffer *fb) | |||
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | /* Note: DRM rotates counter-clockwise, TILER & DSS rotates clockwise */ | 123 | /* Note: DRM rotates counter-clockwise, TILER & DSS rotates clockwise */ |
| 124 | static uint32_t drm_rotation_to_tiler(unsigned int drm_rot) | 124 | static u32 drm_rotation_to_tiler(unsigned int drm_rot) |
| 125 | { | 125 | { |
| 126 | uint32_t orient; | 126 | u32 orient; |
| 127 | 127 | ||
| 128 | switch (drm_rot & DRM_MODE_ROTATE_MASK) { | 128 | switch (drm_rot & DRM_MODE_ROTATE_MASK) { |
| 129 | default: | 129 | default: |
| @@ -158,7 +158,7 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, | |||
| 158 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); | 158 | struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb); |
| 159 | const struct drm_format_info *format = omap_fb->format; | 159 | const struct drm_format_info *format = omap_fb->format; |
| 160 | struct plane *plane = &omap_fb->planes[0]; | 160 | struct plane *plane = &omap_fb->planes[0]; |
| 161 | uint32_t x, y, orient = 0; | 161 | u32 x, y, orient = 0; |
| 162 | 162 | ||
| 163 | info->fourcc = fb->format->format; | 163 | info->fourcc = fb->format->format; |
| 164 | 164 | ||
| @@ -177,8 +177,8 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, | |||
| 177 | y = state->src_y >> 16; | 177 | y = state->src_y >> 16; |
| 178 | 178 | ||
| 179 | if (omap_gem_flags(plane->bo) & OMAP_BO_TILED) { | 179 | if (omap_gem_flags(plane->bo) & OMAP_BO_TILED) { |
| 180 | uint32_t w = state->src_w >> 16; | 180 | u32 w = state->src_w >> 16; |
| 181 | uint32_t h = state->src_h >> 16; | 181 | u32 h = state->src_h >> 16; |
| 182 | 182 | ||
| 183 | orient = drm_rotation_to_tiler(state->rotation); | 183 | orient = drm_rotation_to_tiler(state->rotation); |
| 184 | 184 | ||
diff --git a/drivers/gpu/drm/omapdrm/omap_gem.c b/drivers/gpu/drm/omapdrm/omap_gem.c index 443469d4fa46..0faf042b82e1 100644 --- a/drivers/gpu/drm/omapdrm/omap_gem.c +++ b/drivers/gpu/drm/omapdrm/omap_gem.c | |||
| @@ -39,13 +39,13 @@ struct omap_gem_object { | |||
| 39 | 39 | ||
| 40 | struct list_head mm_list; | 40 | struct list_head mm_list; |
| 41 | 41 | ||
| 42 | uint32_t flags; | 42 | u32 flags; |
| 43 | 43 | ||
| 44 | /** width/height for tiled formats (rounded up to slot boundaries) */ | 44 | /** width/height for tiled formats (rounded up to slot boundaries) */ |
| 45 | uint16_t width, height; | 45 | u16 width, height; |
| 46 | 46 | ||
| 47 | /** roll applied when mapping to DMM */ | 47 | /** roll applied when mapping to DMM */ |
| 48 | uint32_t roll; | 48 | u32 roll; |
| 49 | 49 | ||
| 50 | /** | 50 | /** |
| 51 | * dma_addr contains the buffer DMA address. It is valid for | 51 | * dma_addr contains the buffer DMA address. It is valid for |
| @@ -73,7 +73,7 @@ struct omap_gem_object { | |||
| 73 | /** | 73 | /** |
| 74 | * # of users of dma_addr | 74 | * # of users of dma_addr |
| 75 | */ | 75 | */ |
| 76 | uint32_t dma_addr_cnt; | 76 | u32 dma_addr_cnt; |
| 77 | 77 | ||
| 78 | /** | 78 | /** |
| 79 | * If the buffer has been imported from a dmabuf the OMAP_DB_DMABUF flag | 79 | * If the buffer has been imported from a dmabuf the OMAP_DB_DMABUF flag |
| @@ -137,7 +137,7 @@ struct omap_drm_usergart { | |||
| 137 | */ | 137 | */ |
| 138 | 138 | ||
| 139 | /** get mmap offset */ | 139 | /** get mmap offset */ |
| 140 | static uint64_t mmap_offset(struct drm_gem_object *obj) | 140 | static u64 mmap_offset(struct drm_gem_object *obj) |
| 141 | { | 141 | { |
| 142 | struct drm_device *dev = obj->dev; | 142 | struct drm_device *dev = obj->dev; |
| 143 | int ret; | 143 | int ret; |
| @@ -331,14 +331,15 @@ static void omap_gem_detach_pages(struct drm_gem_object *obj) | |||
| 331 | } | 331 | } |
| 332 | 332 | ||
| 333 | /* get buffer flags */ | 333 | /* get buffer flags */ |
| 334 | uint32_t omap_gem_flags(struct drm_gem_object *obj) | 334 | u32 omap_gem_flags(struct drm_gem_object *obj) |
| 335 | { | 335 | { |
| 336 | return to_omap_bo(obj)->flags; | 336 | return to_omap_bo(obj)->flags; |
| 337 | } | 337 | } |
| 338 | 338 | ||
| 339 | uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj) | 339 | u64 omap_gem_mmap_offset(struct drm_gem_object *obj) |
| 340 | { | 340 | { |
| 341 | uint64_t offset; | 341 | u64 offset; |
| 342 | |||
| 342 | mutex_lock(&obj->dev->struct_mutex); | 343 | mutex_lock(&obj->dev->struct_mutex); |
| 343 | offset = mmap_offset(obj); | 344 | offset = mmap_offset(obj); |
| 344 | mutex_unlock(&obj->dev->struct_mutex); | 345 | mutex_unlock(&obj->dev->struct_mutex); |
| @@ -649,7 +650,7 @@ int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev, | |||
| 649 | * into user memory. We don't have to do much here at the moment. | 650 | * into user memory. We don't have to do much here at the moment. |
| 650 | */ | 651 | */ |
| 651 | int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, | 652 | int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, |
| 652 | uint32_t handle, uint64_t *offset) | 653 | u32 handle, u64 *offset) |
| 653 | { | 654 | { |
| 654 | struct drm_gem_object *obj; | 655 | struct drm_gem_object *obj; |
| 655 | int ret = 0; | 656 | int ret = 0; |
| @@ -675,10 +676,10 @@ fail: | |||
| 675 | * | 676 | * |
| 676 | * Call only from non-atomic contexts. | 677 | * Call only from non-atomic contexts. |
| 677 | */ | 678 | */ |
| 678 | int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll) | 679 | int omap_gem_roll(struct drm_gem_object *obj, u32 roll) |
| 679 | { | 680 | { |
| 680 | struct omap_gem_object *omap_obj = to_omap_bo(obj); | 681 | struct omap_gem_object *omap_obj = to_omap_bo(obj); |
| 681 | uint32_t npages = obj->size >> PAGE_SHIFT; | 682 | u32 npages = obj->size >> PAGE_SHIFT; |
| 682 | int ret = 0; | 683 | int ret = 0; |
| 683 | 684 | ||
| 684 | if (roll > npages) { | 685 | if (roll > npages) { |
| @@ -808,7 +809,7 @@ int omap_gem_pin(struct drm_gem_object *obj, dma_addr_t *dma_addr) | |||
| 808 | if (!is_contiguous(omap_obj) && priv->has_dmm) { | 809 | if (!is_contiguous(omap_obj) && priv->has_dmm) { |
| 809 | if (omap_obj->dma_addr_cnt == 0) { | 810 | if (omap_obj->dma_addr_cnt == 0) { |
| 810 | struct page **pages; | 811 | struct page **pages; |
| 811 | uint32_t npages = obj->size >> PAGE_SHIFT; | 812 | u32 npages = obj->size >> PAGE_SHIFT; |
| 812 | enum tiler_fmt fmt = gem2fmt(omap_obj->flags); | 813 | enum tiler_fmt fmt = gem2fmt(omap_obj->flags); |
| 813 | struct tiler_block *block; | 814 | struct tiler_block *block; |
| 814 | 815 | ||
| @@ -904,7 +905,7 @@ void omap_gem_unpin(struct drm_gem_object *obj) | |||
| 904 | * specified orientation and x,y offset from top-left corner of buffer | 905 | * specified orientation and x,y offset from top-left corner of buffer |
| 905 | * (only valid for tiled 2d buffers) | 906 | * (only valid for tiled 2d buffers) |
| 906 | */ | 907 | */ |
| 907 | int omap_gem_rotated_dma_addr(struct drm_gem_object *obj, uint32_t orient, | 908 | int omap_gem_rotated_dma_addr(struct drm_gem_object *obj, u32 orient, |
| 908 | int x, int y, dma_addr_t *dma_addr) | 909 | int x, int y, dma_addr_t *dma_addr) |
| 909 | { | 910 | { |
| 910 | struct omap_gem_object *omap_obj = to_omap_bo(obj); | 911 | struct omap_gem_object *omap_obj = to_omap_bo(obj); |
| @@ -921,7 +922,7 @@ int omap_gem_rotated_dma_addr(struct drm_gem_object *obj, uint32_t orient, | |||
| 921 | } | 922 | } |
| 922 | 923 | ||
| 923 | /* Get tiler stride for the buffer (only valid for 2d tiled buffers) */ | 924 | /* Get tiler stride for the buffer (only valid for 2d tiled buffers) */ |
| 924 | int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient) | 925 | int omap_gem_tiled_stride(struct drm_gem_object *obj, u32 orient) |
| 925 | { | 926 | { |
| 926 | struct omap_gem_object *omap_obj = to_omap_bo(obj); | 927 | struct omap_gem_object *omap_obj = to_omap_bo(obj); |
| 927 | int ret = -EINVAL; | 928 | int ret = -EINVAL; |
| @@ -1003,7 +1004,8 @@ int omap_gem_resume(struct drm_device *dev) | |||
| 1003 | list_for_each_entry(omap_obj, &priv->obj_list, mm_list) { | 1004 | list_for_each_entry(omap_obj, &priv->obj_list, mm_list) { |
| 1004 | if (omap_obj->block) { | 1005 | if (omap_obj->block) { |
| 1005 | struct drm_gem_object *obj = &omap_obj->base; | 1006 | struct drm_gem_object *obj = &omap_obj->base; |
| 1006 | uint32_t npages = obj->size >> PAGE_SHIFT; | 1007 | u32 npages = obj->size >> PAGE_SHIFT; |
| 1008 | |||
| 1007 | WARN_ON(!omap_obj->pages); /* this can't happen */ | 1009 | WARN_ON(!omap_obj->pages); /* this can't happen */ |
| 1008 | ret = tiler_pin(omap_obj->block, | 1010 | ret = tiler_pin(omap_obj->block, |
| 1009 | omap_obj->pages, npages, | 1011 | omap_obj->pages, npages, |
| @@ -1027,7 +1029,7 @@ int omap_gem_resume(struct drm_device *dev) | |||
| 1027 | void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m) | 1029 | void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m) |
| 1028 | { | 1030 | { |
| 1029 | struct omap_gem_object *omap_obj = to_omap_bo(obj); | 1031 | struct omap_gem_object *omap_obj = to_omap_bo(obj); |
| 1030 | uint64_t off; | 1032 | u64 off; |
| 1031 | 1033 | ||
| 1032 | off = drm_vma_node_start(&obj->vma_node); | 1034 | off = drm_vma_node_start(&obj->vma_node); |
| 1033 | 1035 | ||
| @@ -1115,7 +1117,7 @@ void omap_gem_free_object(struct drm_gem_object *obj) | |||
| 1115 | 1117 | ||
| 1116 | /* GEM buffer object constructor */ | 1118 | /* GEM buffer object constructor */ |
| 1117 | struct drm_gem_object *omap_gem_new(struct drm_device *dev, | 1119 | struct drm_gem_object *omap_gem_new(struct drm_device *dev, |
| 1118 | union omap_gem_size gsize, uint32_t flags) | 1120 | union omap_gem_size gsize, u32 flags) |
| 1119 | { | 1121 | { |
| 1120 | struct omap_drm_private *priv = dev->dev_private; | 1122 | struct omap_drm_private *priv = dev->dev_private; |
| 1121 | struct omap_gem_object *omap_obj; | 1123 | struct omap_gem_object *omap_obj; |
| @@ -1280,7 +1282,7 @@ done: | |||
| 1280 | 1282 | ||
| 1281 | /* convenience method to construct a GEM buffer object, and userspace handle */ | 1283 | /* convenience method to construct a GEM buffer object, and userspace handle */ |
| 1282 | int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file, | 1284 | int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file, |
| 1283 | union omap_gem_size gsize, uint32_t flags, uint32_t *handle) | 1285 | union omap_gem_size gsize, u32 flags, u32 *handle) |
| 1284 | { | 1286 | { |
| 1285 | struct drm_gem_object *obj; | 1287 | struct drm_gem_object *obj; |
| 1286 | int ret; | 1288 | int ret; |
| @@ -1327,7 +1329,8 @@ void omap_gem_init(struct drm_device *dev) | |||
| 1327 | 1329 | ||
| 1328 | /* reserve 4k aligned/wide regions for userspace mappings: */ | 1330 | /* reserve 4k aligned/wide regions for userspace mappings: */ |
| 1329 | for (i = 0; i < ARRAY_SIZE(fmts); i++) { | 1331 | for (i = 0; i < ARRAY_SIZE(fmts); i++) { |
| 1330 | uint16_t h = 1, w = PAGE_SIZE >> i; | 1332 | u16 h = 1, w = PAGE_SIZE >> i; |
| 1333 | |||
| 1331 | tiler_align(fmts[i], &w, &h); | 1334 | tiler_align(fmts[i], &w, &h); |
| 1332 | /* note: since each region is 1 4kb page wide, and minimum | 1335 | /* note: since each region is 1 4kb page wide, and minimum |
| 1333 | * number of rows, the height ends up being the same as the | 1336 | * number of rows, the height ends up being the same as the |
diff --git a/drivers/gpu/drm/omapdrm/omap_gem.h b/drivers/gpu/drm/omapdrm/omap_gem.h index 35fa690b3d90..a78bde05193a 100644 --- a/drivers/gpu/drm/omapdrm/omap_gem.h +++ b/drivers/gpu/drm/omapdrm/omap_gem.h | |||
| @@ -53,17 +53,17 @@ void omap_gem_describe_objects(struct list_head *list, struct seq_file *m); | |||
| 53 | 53 | ||
| 54 | /* GEM Object Creation and Deletion */ | 54 | /* GEM Object Creation and Deletion */ |
| 55 | struct drm_gem_object *omap_gem_new(struct drm_device *dev, | 55 | struct drm_gem_object *omap_gem_new(struct drm_device *dev, |
| 56 | union omap_gem_size gsize, uint32_t flags); | 56 | union omap_gem_size gsize, u32 flags); |
| 57 | struct drm_gem_object *omap_gem_new_dmabuf(struct drm_device *dev, size_t size, | 57 | struct drm_gem_object *omap_gem_new_dmabuf(struct drm_device *dev, size_t size, |
| 58 | struct sg_table *sgt); | 58 | struct sg_table *sgt); |
| 59 | int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file, | 59 | int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file, |
| 60 | union omap_gem_size gsize, uint32_t flags, uint32_t *handle); | 60 | union omap_gem_size gsize, u32 flags, u32 *handle); |
| 61 | void omap_gem_free_object(struct drm_gem_object *obj); | 61 | void omap_gem_free_object(struct drm_gem_object *obj); |
| 62 | void *omap_gem_vaddr(struct drm_gem_object *obj); | 62 | void *omap_gem_vaddr(struct drm_gem_object *obj); |
| 63 | 63 | ||
| 64 | /* Dumb Buffers Interface */ | 64 | /* Dumb Buffers Interface */ |
| 65 | int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, | 65 | int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, |
| 66 | uint32_t handle, uint64_t *offset); | 66 | u32 handle, u64 *offset); |
| 67 | int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev, | 67 | int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev, |
| 68 | struct drm_mode_create_dumb *args); | 68 | struct drm_mode_create_dumb *args); |
| 69 | 69 | ||
| @@ -71,7 +71,7 @@ int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev, | |||
| 71 | int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma); | 71 | int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma); |
| 72 | int omap_gem_mmap_obj(struct drm_gem_object *obj, | 72 | int omap_gem_mmap_obj(struct drm_gem_object *obj, |
| 73 | struct vm_area_struct *vma); | 73 | struct vm_area_struct *vma); |
| 74 | uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj); | 74 | u64 omap_gem_mmap_offset(struct drm_gem_object *obj); |
| 75 | size_t omap_gem_mmap_size(struct drm_gem_object *obj); | 75 | size_t omap_gem_mmap_size(struct drm_gem_object *obj); |
| 76 | 76 | ||
| 77 | /* PRIME Interface */ | 77 | /* PRIME Interface */ |
| @@ -81,7 +81,7 @@ struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev, | |||
| 81 | struct dma_buf *buffer); | 81 | struct dma_buf *buffer); |
| 82 | 82 | ||
| 83 | int omap_gem_fault(struct vm_fault *vmf); | 83 | int omap_gem_fault(struct vm_fault *vmf); |
| 84 | int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll); | 84 | int omap_gem_roll(struct drm_gem_object *obj, u32 roll); |
| 85 | void omap_gem_cpu_sync_page(struct drm_gem_object *obj, int pgoff); | 85 | void omap_gem_cpu_sync_page(struct drm_gem_object *obj, int pgoff); |
| 86 | void omap_gem_dma_sync_buffer(struct drm_gem_object *obj, | 86 | void omap_gem_dma_sync_buffer(struct drm_gem_object *obj, |
| 87 | enum dma_data_direction dir); | 87 | enum dma_data_direction dir); |
| @@ -91,9 +91,9 @@ int omap_gem_get_pages(struct drm_gem_object *obj, struct page ***pages, | |||
| 91 | bool remap); | 91 | bool remap); |
| 92 | int omap_gem_put_pages(struct drm_gem_object *obj); | 92 | int omap_gem_put_pages(struct drm_gem_object *obj); |
| 93 | 93 | ||
| 94 | uint32_t omap_gem_flags(struct drm_gem_object *obj); | 94 | u32 omap_gem_flags(struct drm_gem_object *obj); |
| 95 | int omap_gem_rotated_dma_addr(struct drm_gem_object *obj, uint32_t orient, | 95 | int omap_gem_rotated_dma_addr(struct drm_gem_object *obj, u32 orient, |
| 96 | int x, int y, dma_addr_t *dma_addr); | 96 | int x, int y, dma_addr_t *dma_addr); |
| 97 | int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient); | 97 | int omap_gem_tiled_stride(struct drm_gem_object *obj, u32 orient); |
| 98 | 98 | ||
| 99 | #endif /* __OMAPDRM_GEM_H__ */ | 99 | #endif /* __OMAPDRM_GEM_H__ */ |
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c index 53ba424823b2..976dc0e44482 100644 --- a/drivers/gpu/drm/omapdrm/omap_irq.c +++ b/drivers/gpu/drm/omapdrm/omap_irq.c | |||
| @@ -20,7 +20,7 @@ | |||
| 20 | struct omap_irq_wait { | 20 | struct omap_irq_wait { |
| 21 | struct list_head node; | 21 | struct list_head node; |
| 22 | wait_queue_head_t wq; | 22 | wait_queue_head_t wq; |
| 23 | uint32_t irqmask; | 23 | u32 irqmask; |
| 24 | int count; | 24 | int count; |
| 25 | }; | 25 | }; |
| 26 | 26 | ||
| @@ -29,7 +29,7 @@ static void omap_irq_update(struct drm_device *dev) | |||
| 29 | { | 29 | { |
| 30 | struct omap_drm_private *priv = dev->dev_private; | 30 | struct omap_drm_private *priv = dev->dev_private; |
| 31 | struct omap_irq_wait *wait; | 31 | struct omap_irq_wait *wait; |
| 32 | uint32_t irqmask = priv->irq_mask; | 32 | u32 irqmask = priv->irq_mask; |
| 33 | 33 | ||
| 34 | assert_spin_locked(&priv->wait_lock); | 34 | assert_spin_locked(&priv->wait_lock); |
| 35 | 35 | ||
| @@ -48,7 +48,7 @@ static void omap_irq_wait_handler(struct omap_irq_wait *wait) | |||
| 48 | } | 48 | } |
| 49 | 49 | ||
| 50 | struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev, | 50 | struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev, |
| 51 | uint32_t irqmask, int count) | 51 | u32 irqmask, int count) |
| 52 | { | 52 | { |
| 53 | struct omap_drm_private *priv = dev->dev_private; | 53 | struct omap_drm_private *priv = dev->dev_private; |
| 54 | struct omap_irq_wait *wait = kzalloc(sizeof(*wait), GFP_KERNEL); | 54 | struct omap_irq_wait *wait = kzalloc(sizeof(*wait), GFP_KERNEL); |
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.h b/drivers/gpu/drm/omapdrm/omap_irq.h index 606c09932bc0..9d5441468eca 100644 --- a/drivers/gpu/drm/omapdrm/omap_irq.h +++ b/drivers/gpu/drm/omapdrm/omap_irq.h | |||
| @@ -32,7 +32,7 @@ void omap_drm_irq_uninstall(struct drm_device *dev); | |||
| 32 | int omap_drm_irq_install(struct drm_device *dev); | 32 | int omap_drm_irq_install(struct drm_device *dev); |
| 33 | 33 | ||
| 34 | struct omap_irq_wait *omap_irq_wait_init(struct drm_device *dev, | 34 | struct omap_irq_wait *omap_irq_wait_init(struct drm_device *dev, |
| 35 | uint32_t irqmask, int count); | 35 | u32 irqmask, int count); |
| 36 | int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait, | 36 | int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait, |
| 37 | unsigned long timeout); | 37 | unsigned long timeout); |
| 38 | 38 | ||
diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c index 7d789d1551a1..0665ed9fe395 100644 --- a/drivers/gpu/drm/omapdrm/omap_plane.c +++ b/drivers/gpu/drm/omapdrm/omap_plane.c | |||
| @@ -201,7 +201,7 @@ static void omap_plane_reset(struct drm_plane *plane) | |||
| 201 | static int omap_plane_atomic_set_property(struct drm_plane *plane, | 201 | static int omap_plane_atomic_set_property(struct drm_plane *plane, |
| 202 | struct drm_plane_state *state, | 202 | struct drm_plane_state *state, |
| 203 | struct drm_property *property, | 203 | struct drm_property *property, |
| 204 | uint64_t val) | 204 | u64 val) |
| 205 | { | 205 | { |
| 206 | struct omap_drm_private *priv = plane->dev->dev_private; | 206 | struct omap_drm_private *priv = plane->dev->dev_private; |
| 207 | 207 | ||
| @@ -216,7 +216,7 @@ static int omap_plane_atomic_set_property(struct drm_plane *plane, | |||
| 216 | static int omap_plane_atomic_get_property(struct drm_plane *plane, | 216 | static int omap_plane_atomic_get_property(struct drm_plane *plane, |
| 217 | const struct drm_plane_state *state, | 217 | const struct drm_plane_state *state, |
| 218 | struct drm_property *property, | 218 | struct drm_property *property, |
| 219 | uint64_t *val) | 219 | u64 *val) |
| 220 | { | 220 | { |
| 221 | struct omap_drm_private *priv = plane->dev->dev_private; | 221 | struct omap_drm_private *priv = plane->dev->dev_private; |
| 222 | 222 | ||
diff --git a/drivers/gpu/drm/omapdrm/tcm-sita.c b/drivers/gpu/drm/omapdrm/tcm-sita.c index 661362d072f7..d7f7bc9f061a 100644 --- a/drivers/gpu/drm/omapdrm/tcm-sita.c +++ b/drivers/gpu/drm/omapdrm/tcm-sita.c | |||
| @@ -33,8 +33,8 @@ static unsigned long mask[8]; | |||
| 33 | * map ptr to bitmap | 33 | * map ptr to bitmap |
| 34 | * stride slots in a row | 34 | * stride slots in a row |
| 35 | */ | 35 | */ |
| 36 | static void free_slots(unsigned long pos, uint16_t w, uint16_t h, | 36 | static void free_slots(unsigned long pos, u16 w, u16 h, |
| 37 | unsigned long *map, uint16_t stride) | 37 | unsigned long *map, u16 stride) |
| 38 | { | 38 | { |
| 39 | int i; | 39 | int i; |
| 40 | 40 | ||
| @@ -48,7 +48,7 @@ static void free_slots(unsigned long pos, uint16_t w, uint16_t h, | |||
| 48 | * map ptr to bitmap | 48 | * map ptr to bitmap |
| 49 | * num_bits number of bits in bitmap | 49 | * num_bits number of bits in bitmap |
| 50 | */ | 50 | */ |
| 51 | static int r2l_b2t_1d(uint16_t w, unsigned long *pos, unsigned long *map, | 51 | static int r2l_b2t_1d(u16 w, unsigned long *pos, unsigned long *map, |
| 52 | size_t num_bits) | 52 | size_t num_bits) |
| 53 | { | 53 | { |
| 54 | unsigned long search_count = 0; | 54 | unsigned long search_count = 0; |
| @@ -84,7 +84,7 @@ static int r2l_b2t_1d(uint16_t w, unsigned long *pos, unsigned long *map, | |||
| 84 | * num_bits = size of bitmap | 84 | * num_bits = size of bitmap |
| 85 | * stride = bits in one row of container | 85 | * stride = bits in one row of container |
| 86 | */ | 86 | */ |
| 87 | static int l2r_t2b(uint16_t w, uint16_t h, uint16_t a, int16_t offset, | 87 | static int l2r_t2b(u16 w, u16 h, u16 a, s16 offset, |
| 88 | unsigned long *pos, unsigned long slot_bytes, | 88 | unsigned long *pos, unsigned long slot_bytes, |
| 89 | unsigned long *map, size_t num_bits, size_t slot_stride) | 89 | unsigned long *map, size_t num_bits, size_t slot_stride) |
| 90 | { | 90 | { |
| @@ -179,7 +179,7 @@ static s32 sita_reserve_1d(struct tcm *tcm, u32 num_slots, | |||
| 179 | } | 179 | } |
| 180 | 180 | ||
| 181 | static s32 sita_reserve_2d(struct tcm *tcm, u16 h, u16 w, u16 align, | 181 | static s32 sita_reserve_2d(struct tcm *tcm, u16 h, u16 w, u16 align, |
| 182 | int16_t offset, uint16_t slot_bytes, | 182 | s16 offset, u16 slot_bytes, |
| 183 | struct tcm_area *area) | 183 | struct tcm_area *area) |
| 184 | { | 184 | { |
| 185 | unsigned long pos; | 185 | unsigned long pos; |
| @@ -208,7 +208,7 @@ static void sita_deinit(struct tcm *tcm) | |||
| 208 | static s32 sita_free(struct tcm *tcm, struct tcm_area *area) | 208 | static s32 sita_free(struct tcm *tcm, struct tcm_area *area) |
| 209 | { | 209 | { |
| 210 | unsigned long pos; | 210 | unsigned long pos; |
| 211 | uint16_t w, h; | 211 | u16 w, h; |
| 212 | 212 | ||
| 213 | pos = area->p0.x + area->p0.y * tcm->width; | 213 | pos = area->p0.x + area->p0.y * tcm->width; |
| 214 | if (area->is2d) { | 214 | if (area->is2d) { |
diff --git a/drivers/gpu/drm/omapdrm/tcm.h b/drivers/gpu/drm/omapdrm/tcm.h index d8a369a4f269..8efcda93c50d 100644 --- a/drivers/gpu/drm/omapdrm/tcm.h +++ b/drivers/gpu/drm/omapdrm/tcm.h | |||
| @@ -65,7 +65,7 @@ struct tcm { | |||
| 65 | 65 | ||
| 66 | /* function table */ | 66 | /* function table */ |
| 67 | s32 (*reserve_2d)(struct tcm *tcm, u16 height, u16 width, u16 align, | 67 | s32 (*reserve_2d)(struct tcm *tcm, u16 height, u16 width, u16 align, |
| 68 | int16_t offset, uint16_t slot_bytes, | 68 | s16 offset, u16 slot_bytes, |
| 69 | struct tcm_area *area); | 69 | struct tcm_area *area); |
| 70 | s32 (*reserve_1d)(struct tcm *tcm, u32 slots, struct tcm_area *area); | 70 | s32 (*reserve_1d)(struct tcm *tcm, u32 slots, struct tcm_area *area); |
| 71 | s32 (*free)(struct tcm *tcm, struct tcm_area *area); | 71 | s32 (*free)(struct tcm *tcm, struct tcm_area *area); |
| @@ -129,7 +129,7 @@ static inline void tcm_deinit(struct tcm *tcm) | |||
| 129 | * allocation. | 129 | * allocation. |
| 130 | */ | 130 | */ |
| 131 | static inline s32 tcm_reserve_2d(struct tcm *tcm, u16 width, u16 height, | 131 | static inline s32 tcm_reserve_2d(struct tcm *tcm, u16 width, u16 height, |
| 132 | u16 align, int16_t offset, uint16_t slot_bytes, | 132 | u16 align, s16 offset, u16 slot_bytes, |
| 133 | struct tcm_area *area) | 133 | struct tcm_area *area) |
| 134 | { | 134 | { |
| 135 | /* perform rudimentary error checking */ | 135 | /* perform rudimentary error checking */ |
