diff options
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 24 |
3 files changed, 38 insertions, 19 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 421b7e2ece3b..8d9e7c0e9e4b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -8091,6 +8091,9 @@ intel_pipe_config_compare(struct drm_device *dev, | |||
8091 | return false; \ | 8091 | return false; \ |
8092 | } | 8092 | } |
8093 | 8093 | ||
8094 | #define PIPE_CONF_QUIRK(quirk) \ | ||
8095 | ((current_config->quirks | pipe_config->quirks) & (quirk)) | ||
8096 | |||
8094 | PIPE_CONF_CHECK_I(cpu_transcoder); | 8097 | PIPE_CONF_CHECK_I(cpu_transcoder); |
8095 | 8098 | ||
8096 | PIPE_CONF_CHECK_I(has_pch_encoder); | 8099 | PIPE_CONF_CHECK_I(has_pch_encoder); |
@@ -8121,14 +8124,16 @@ intel_pipe_config_compare(struct drm_device *dev, | |||
8121 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, | 8124 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, |
8122 | DRM_MODE_FLAG_INTERLACE); | 8125 | DRM_MODE_FLAG_INTERLACE); |
8123 | 8126 | ||
8124 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, | 8127 | if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) { |
8125 | DRM_MODE_FLAG_PHSYNC); | 8128 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, |
8126 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, | 8129 | DRM_MODE_FLAG_PHSYNC); |
8127 | DRM_MODE_FLAG_NHSYNC); | 8130 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, |
8128 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, | 8131 | DRM_MODE_FLAG_NHSYNC); |
8129 | DRM_MODE_FLAG_PVSYNC); | 8132 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, |
8130 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, | 8133 | DRM_MODE_FLAG_PVSYNC); |
8131 | DRM_MODE_FLAG_NVSYNC); | 8134 | PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, |
8135 | DRM_MODE_FLAG_NVSYNC); | ||
8136 | } | ||
8132 | 8137 | ||
8133 | PIPE_CONF_CHECK_I(requested_mode.hdisplay); | 8138 | PIPE_CONF_CHECK_I(requested_mode.hdisplay); |
8134 | PIPE_CONF_CHECK_I(requested_mode.vdisplay); | 8139 | PIPE_CONF_CHECK_I(requested_mode.vdisplay); |
@@ -8145,6 +8150,7 @@ intel_pipe_config_compare(struct drm_device *dev, | |||
8145 | 8150 | ||
8146 | #undef PIPE_CONF_CHECK_I | 8151 | #undef PIPE_CONF_CHECK_I |
8147 | #undef PIPE_CONF_CHECK_FLAGS | 8152 | #undef PIPE_CONF_CHECK_FLAGS |
8153 | #undef PIPE_CONF_QUIRK | ||
8148 | 8154 | ||
8149 | return true; | 8155 | return true; |
8150 | } | 8156 | } |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1735cdc86770..b76a956cfb9a 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -193,6 +193,17 @@ typedef struct dpll { | |||
193 | } intel_clock_t; | 193 | } intel_clock_t; |
194 | 194 | ||
195 | struct intel_crtc_config { | 195 | struct intel_crtc_config { |
196 | /** | ||
197 | * quirks - bitfield with hw state readout quirks | ||
198 | * | ||
199 | * For various reasons the hw state readout code might not be able to | ||
200 | * completely faithfully read out the current state. These cases are | ||
201 | * tracked with quirk flags so that fastboot and state checker can act | ||
202 | * accordingly. | ||
203 | */ | ||
204 | #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS (1<<0) /* unreliable sync mode.flags */ | ||
205 | unsigned long quirks; | ||
206 | |||
196 | struct drm_display_mode requested_mode; | 207 | struct drm_display_mode requested_mode; |
197 | struct drm_display_mode adjusted_mode; | 208 | struct drm_display_mode adjusted_mode; |
198 | /* This flag must be set by the encoder's compute_config callback if it | 209 | /* This flag must be set by the encoder's compute_config callback if it |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 5c816dd75bec..960358d8e336 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -1324,19 +1324,21 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder, | |||
1324 | 1324 | ||
1325 | ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); | 1325 | ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd); |
1326 | if (!ret) { | 1326 | if (!ret) { |
1327 | /* Some sdvo encoders are not spec compliant and don't | ||
1328 | * implement the mandatory get_timings function. */ | ||
1327 | DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); | 1329 | DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n"); |
1328 | return; | 1330 | pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS; |
1329 | } | 1331 | } else { |
1330 | 1332 | if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) | |
1331 | if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE) | 1333 | flags |= DRM_MODE_FLAG_PHSYNC; |
1332 | flags |= DRM_MODE_FLAG_PHSYNC; | 1334 | else |
1333 | else | 1335 | flags |= DRM_MODE_FLAG_NHSYNC; |
1334 | flags |= DRM_MODE_FLAG_NHSYNC; | ||
1335 | 1336 | ||
1336 | if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) | 1337 | if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE) |
1337 | flags |= DRM_MODE_FLAG_PVSYNC; | 1338 | flags |= DRM_MODE_FLAG_PVSYNC; |
1338 | else | 1339 | else |
1339 | flags |= DRM_MODE_FLAG_NVSYNC; | 1340 | flags |= DRM_MODE_FLAG_NVSYNC; |
1341 | } | ||
1340 | 1342 | ||
1341 | pipe_config->adjusted_mode.flags |= flags; | 1343 | pipe_config->adjusted_mode.flags |= flags; |
1342 | 1344 | ||