diff options
Diffstat (limited to 'drivers/gpu')
37 files changed, 209 insertions, 139 deletions
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c index 359d37d5c958..1fa2f65c3cd1 100644 --- a/drivers/gpu/drm/i915/gvt/aperture_gm.c +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c | |||
@@ -180,7 +180,7 @@ static void free_vgpu_fence(struct intel_vgpu *vgpu) | |||
180 | } | 180 | } |
181 | mutex_unlock(&dev_priv->drm.struct_mutex); | 181 | mutex_unlock(&dev_priv->drm.struct_mutex); |
182 | 182 | ||
183 | intel_runtime_pm_put(dev_priv); | 183 | intel_runtime_pm_put_unchecked(dev_priv); |
184 | } | 184 | } |
185 | 185 | ||
186 | static int alloc_vgpu_fence(struct intel_vgpu *vgpu) | 186 | static int alloc_vgpu_fence(struct intel_vgpu *vgpu) |
@@ -206,7 +206,7 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu) | |||
206 | _clear_vgpu_fence(vgpu); | 206 | _clear_vgpu_fence(vgpu); |
207 | 207 | ||
208 | mutex_unlock(&dev_priv->drm.struct_mutex); | 208 | mutex_unlock(&dev_priv->drm.struct_mutex); |
209 | intel_runtime_pm_put(dev_priv); | 209 | intel_runtime_pm_put_unchecked(dev_priv); |
210 | return 0; | 210 | return 0; |
211 | out_free_fence: | 211 | out_free_fence: |
212 | gvt_vgpu_err("Failed to alloc fences\n"); | 212 | gvt_vgpu_err("Failed to alloc fences\n"); |
@@ -219,7 +219,7 @@ out_free_fence: | |||
219 | vgpu->fence.regs[i] = NULL; | 219 | vgpu->fence.regs[i] = NULL; |
220 | } | 220 | } |
221 | mutex_unlock(&dev_priv->drm.struct_mutex); | 221 | mutex_unlock(&dev_priv->drm.struct_mutex); |
222 | intel_runtime_pm_put(dev_priv); | 222 | intel_runtime_pm_put_unchecked(dev_priv); |
223 | return -ENOSPC; | 223 | return -ENOSPC; |
224 | } | 224 | } |
225 | 225 | ||
@@ -317,7 +317,7 @@ void intel_vgpu_reset_resource(struct intel_vgpu *vgpu) | |||
317 | 317 | ||
318 | intel_runtime_pm_get(dev_priv); | 318 | intel_runtime_pm_get(dev_priv); |
319 | _clear_vgpu_fence(vgpu); | 319 | _clear_vgpu_fence(vgpu); |
320 | intel_runtime_pm_put(dev_priv); | 320 | intel_runtime_pm_put_unchecked(dev_priv); |
321 | } | 321 | } |
322 | 322 | ||
323 | /** | 323 | /** |
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index b4ab1dad0143..435c746c3f73 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h | |||
@@ -597,7 +597,7 @@ static inline void mmio_hw_access_pre(struct drm_i915_private *dev_priv) | |||
597 | 597 | ||
598 | static inline void mmio_hw_access_post(struct drm_i915_private *dev_priv) | 598 | static inline void mmio_hw_access_post(struct drm_i915_private *dev_priv) |
599 | { | 599 | { |
600 | intel_runtime_pm_put(dev_priv); | 600 | intel_runtime_pm_put_unchecked(dev_priv); |
601 | } | 601 | } |
602 | 602 | ||
603 | /** | 603 | /** |
diff --git a/drivers/gpu/drm/i915/gvt/sched_policy.c b/drivers/gpu/drm/i915/gvt/sched_policy.c index c32e7d5e8629..f04b3b965bfc 100644 --- a/drivers/gpu/drm/i915/gvt/sched_policy.c +++ b/drivers/gpu/drm/i915/gvt/sched_policy.c | |||
@@ -474,6 +474,6 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu) | |||
474 | } | 474 | } |
475 | } | 475 | } |
476 | spin_unlock_bh(&scheduler->mmio_context_lock); | 476 | spin_unlock_bh(&scheduler->mmio_context_lock); |
477 | intel_runtime_pm_put(dev_priv); | 477 | intel_runtime_pm_put_unchecked(dev_priv); |
478 | mutex_unlock(&vgpu->gvt->sched_lock); | 478 | mutex_unlock(&vgpu->gvt->sched_lock); |
479 | } | 479 | } |
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 1ad8c5e1455d..3816dcae2185 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c | |||
@@ -997,7 +997,7 @@ complete: | |||
997 | intel_uncore_forcewake_put(gvt->dev_priv, | 997 | intel_uncore_forcewake_put(gvt->dev_priv, |
998 | FORCEWAKE_ALL); | 998 | FORCEWAKE_ALL); |
999 | 999 | ||
1000 | intel_runtime_pm_put(gvt->dev_priv); | 1000 | intel_runtime_pm_put_unchecked(gvt->dev_priv); |
1001 | if (ret && (vgpu_is_vm_unhealthy(ret))) | 1001 | if (ret && (vgpu_is_vm_unhealthy(ret))) |
1002 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_GUEST_ERR); | 1002 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_GUEST_ERR); |
1003 | } | 1003 | } |
@@ -1451,7 +1451,7 @@ intel_vgpu_create_workload(struct intel_vgpu *vgpu, int ring_id, | |||
1451 | mutex_lock(&dev_priv->drm.struct_mutex); | 1451 | mutex_lock(&dev_priv->drm.struct_mutex); |
1452 | ret = intel_gvt_scan_and_shadow_workload(workload); | 1452 | ret = intel_gvt_scan_and_shadow_workload(workload); |
1453 | mutex_unlock(&dev_priv->drm.struct_mutex); | 1453 | mutex_unlock(&dev_priv->drm.struct_mutex); |
1454 | intel_runtime_pm_put(dev_priv); | 1454 | intel_runtime_pm_put_unchecked(dev_priv); |
1455 | } | 1455 | } |
1456 | 1456 | ||
1457 | if (ret && (vgpu_is_vm_unhealthy(ret))) { | 1457 | if (ret && (vgpu_is_vm_unhealthy(ret))) { |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 050cf8abd426..6818079669a7 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -877,7 +877,7 @@ static int i915_interrupt_info(struct seq_file *m, void *data) | |||
877 | } | 877 | } |
878 | } | 878 | } |
879 | 879 | ||
880 | intel_runtime_pm_put(dev_priv); | 880 | intel_runtime_pm_put_unchecked(dev_priv); |
881 | 881 | ||
882 | return 0; | 882 | return 0; |
883 | } | 883 | } |
@@ -953,7 +953,7 @@ static int i915_gpu_info_open(struct inode *inode, struct file *file) | |||
953 | 953 | ||
954 | intel_runtime_pm_get(i915); | 954 | intel_runtime_pm_get(i915); |
955 | gpu = i915_capture_gpu_state(i915); | 955 | gpu = i915_capture_gpu_state(i915); |
956 | intel_runtime_pm_put(i915); | 956 | intel_runtime_pm_put_unchecked(i915); |
957 | if (IS_ERR(gpu)) | 957 | if (IS_ERR(gpu)) |
958 | return PTR_ERR(gpu); | 958 | return PTR_ERR(gpu); |
959 | 959 | ||
@@ -1226,7 +1226,7 @@ static int i915_frequency_info(struct seq_file *m, void *unused) | |||
1226 | seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq); | 1226 | seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq); |
1227 | seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq); | 1227 | seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq); |
1228 | 1228 | ||
1229 | intel_runtime_pm_put(dev_priv); | 1229 | intel_runtime_pm_put_unchecked(dev_priv); |
1230 | return ret; | 1230 | return ret; |
1231 | } | 1231 | } |
1232 | 1232 | ||
@@ -1292,7 +1292,7 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused) | |||
1292 | 1292 | ||
1293 | intel_engine_get_instdone(dev_priv->engine[RCS], &instdone); | 1293 | intel_engine_get_instdone(dev_priv->engine[RCS], &instdone); |
1294 | 1294 | ||
1295 | intel_runtime_pm_put(dev_priv); | 1295 | intel_runtime_pm_put_unchecked(dev_priv); |
1296 | 1296 | ||
1297 | if (timer_pending(&dev_priv->gpu_error.hangcheck_work.timer)) | 1297 | if (timer_pending(&dev_priv->gpu_error.hangcheck_work.timer)) |
1298 | seq_printf(m, "Hangcheck active, timer fires in %dms\n", | 1298 | seq_printf(m, "Hangcheck active, timer fires in %dms\n", |
@@ -1579,7 +1579,7 @@ static int i915_drpc_info(struct seq_file *m, void *unused) | |||
1579 | else | 1579 | else |
1580 | err = ironlake_drpc_info(m); | 1580 | err = ironlake_drpc_info(m); |
1581 | 1581 | ||
1582 | intel_runtime_pm_put(dev_priv); | 1582 | intel_runtime_pm_put_unchecked(dev_priv); |
1583 | 1583 | ||
1584 | return err; | 1584 | return err; |
1585 | } | 1585 | } |
@@ -1632,7 +1632,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused) | |||
1632 | } | 1632 | } |
1633 | 1633 | ||
1634 | mutex_unlock(&fbc->lock); | 1634 | mutex_unlock(&fbc->lock); |
1635 | intel_runtime_pm_put(dev_priv); | 1635 | intel_runtime_pm_put_unchecked(dev_priv); |
1636 | 1636 | ||
1637 | return 0; | 1637 | return 0; |
1638 | } | 1638 | } |
@@ -1695,7 +1695,7 @@ static int i915_ips_status(struct seq_file *m, void *unused) | |||
1695 | seq_puts(m, "Currently: disabled\n"); | 1695 | seq_puts(m, "Currently: disabled\n"); |
1696 | } | 1696 | } |
1697 | 1697 | ||
1698 | intel_runtime_pm_put(dev_priv); | 1698 | intel_runtime_pm_put_unchecked(dev_priv); |
1699 | 1699 | ||
1700 | return 0; | 1700 | return 0; |
1701 | } | 1701 | } |
@@ -1723,7 +1723,7 @@ static int i915_sr_status(struct seq_file *m, void *unused) | |||
1723 | sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; | 1723 | sr_enabled = I915_READ(FW_BLC_SELF_VLV) & FW_CSPWRDWNEN; |
1724 | 1724 | ||
1725 | intel_display_power_put(dev_priv, POWER_DOMAIN_INIT); | 1725 | intel_display_power_put(dev_priv, POWER_DOMAIN_INIT); |
1726 | intel_runtime_pm_put(dev_priv); | 1726 | intel_runtime_pm_put_unchecked(dev_priv); |
1727 | 1727 | ||
1728 | seq_printf(m, "self-refresh: %s\n", enableddisabled(sr_enabled)); | 1728 | seq_printf(m, "self-refresh: %s\n", enableddisabled(sr_enabled)); |
1729 | 1729 | ||
@@ -1756,7 +1756,7 @@ static int i915_emon_status(struct seq_file *m, void *unused) | |||
1756 | seq_printf(m, "GFX power: %ld\n", gfx); | 1756 | seq_printf(m, "GFX power: %ld\n", gfx); |
1757 | seq_printf(m, "Total power: %ld\n", chipset + gfx); | 1757 | seq_printf(m, "Total power: %ld\n", chipset + gfx); |
1758 | 1758 | ||
1759 | intel_runtime_pm_put(dev_priv); | 1759 | intel_runtime_pm_put_unchecked(dev_priv); |
1760 | 1760 | ||
1761 | return 0; | 1761 | return 0; |
1762 | } | 1762 | } |
@@ -1805,7 +1805,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) | |||
1805 | mutex_unlock(&dev_priv->pcu_lock); | 1805 | mutex_unlock(&dev_priv->pcu_lock); |
1806 | 1806 | ||
1807 | out: | 1807 | out: |
1808 | intel_runtime_pm_put(dev_priv); | 1808 | intel_runtime_pm_put_unchecked(dev_priv); |
1809 | return ret; | 1809 | return ret; |
1810 | } | 1810 | } |
1811 | 1811 | ||
@@ -2017,7 +2017,7 @@ static int i915_swizzle_info(struct seq_file *m, void *data) | |||
2017 | if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) | 2017 | if (dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) |
2018 | seq_puts(m, "L-shaped memory detected\n"); | 2018 | seq_puts(m, "L-shaped memory detected\n"); |
2019 | 2019 | ||
2020 | intel_runtime_pm_put(dev_priv); | 2020 | intel_runtime_pm_put_unchecked(dev_priv); |
2021 | 2021 | ||
2022 | return 0; | 2022 | return 0; |
2023 | } | 2023 | } |
@@ -2067,7 +2067,7 @@ static int i915_rps_boost_info(struct seq_file *m, void *data) | |||
2067 | act_freq = intel_get_cagf(dev_priv, | 2067 | act_freq = intel_get_cagf(dev_priv, |
2068 | I915_READ(GEN6_RPSTAT1)); | 2068 | I915_READ(GEN6_RPSTAT1)); |
2069 | } | 2069 | } |
2070 | intel_runtime_pm_put(dev_priv); | 2070 | intel_runtime_pm_put_unchecked(dev_priv); |
2071 | } | 2071 | } |
2072 | 2072 | ||
2073 | seq_printf(m, "RPS enabled? %d\n", rps->enabled); | 2073 | seq_printf(m, "RPS enabled? %d\n", rps->enabled); |
@@ -2160,7 +2160,7 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data) | |||
2160 | 2160 | ||
2161 | intel_runtime_pm_get(dev_priv); | 2161 | intel_runtime_pm_get(dev_priv); |
2162 | seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2)); | 2162 | seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2)); |
2163 | intel_runtime_pm_put(dev_priv); | 2163 | intel_runtime_pm_put_unchecked(dev_priv); |
2164 | 2164 | ||
2165 | return 0; | 2165 | return 0; |
2166 | } | 2166 | } |
@@ -2192,7 +2192,7 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data) | |||
2192 | for (i = 0; i < 16; i++) | 2192 | for (i = 0; i < 16; i++) |
2193 | seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i))); | 2193 | seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i))); |
2194 | 2194 | ||
2195 | intel_runtime_pm_put(dev_priv); | 2195 | intel_runtime_pm_put_unchecked(dev_priv); |
2196 | 2196 | ||
2197 | return 0; | 2197 | return 0; |
2198 | } | 2198 | } |
@@ -2601,7 +2601,7 @@ static int i915_edp_psr_status(struct seq_file *m, void *data) | |||
2601 | dev_priv->psr.last_exit); | 2601 | dev_priv->psr.last_exit); |
2602 | } | 2602 | } |
2603 | 2603 | ||
2604 | intel_runtime_pm_put(dev_priv); | 2604 | intel_runtime_pm_put_unchecked(dev_priv); |
2605 | return 0; | 2605 | return 0; |
2606 | } | 2606 | } |
2607 | 2607 | ||
@@ -2632,7 +2632,7 @@ retry: | |||
2632 | drm_modeset_drop_locks(&ctx); | 2632 | drm_modeset_drop_locks(&ctx); |
2633 | drm_modeset_acquire_fini(&ctx); | 2633 | drm_modeset_acquire_fini(&ctx); |
2634 | 2634 | ||
2635 | intel_runtime_pm_put(dev_priv); | 2635 | intel_runtime_pm_put_unchecked(dev_priv); |
2636 | 2636 | ||
2637 | return ret; | 2637 | return ret; |
2638 | } | 2638 | } |
@@ -2665,7 +2665,7 @@ static int i915_energy_uJ(struct seq_file *m, void *data) | |||
2665 | intel_runtime_pm_get(dev_priv); | 2665 | intel_runtime_pm_get(dev_priv); |
2666 | 2666 | ||
2667 | if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &power)) { | 2667 | if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &power)) { |
2668 | intel_runtime_pm_put(dev_priv); | 2668 | intel_runtime_pm_put_unchecked(dev_priv); |
2669 | return -ENODEV; | 2669 | return -ENODEV; |
2670 | } | 2670 | } |
2671 | 2671 | ||
@@ -2673,7 +2673,7 @@ static int i915_energy_uJ(struct seq_file *m, void *data) | |||
2673 | power = I915_READ(MCH_SECP_NRG_STTS); | 2673 | power = I915_READ(MCH_SECP_NRG_STTS); |
2674 | power = (1000000 * power) >> units; /* convert to uJ */ | 2674 | power = (1000000 * power) >> units; /* convert to uJ */ |
2675 | 2675 | ||
2676 | intel_runtime_pm_put(dev_priv); | 2676 | intel_runtime_pm_put_unchecked(dev_priv); |
2677 | 2677 | ||
2678 | seq_printf(m, "%llu", power); | 2678 | seq_printf(m, "%llu", power); |
2679 | 2679 | ||
@@ -2775,7 +2775,7 @@ out: | |||
2775 | seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE)); | 2775 | seq_printf(m, "ssp base: 0x%08x\n", I915_READ(CSR_SSP_BASE)); |
2776 | seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL)); | 2776 | seq_printf(m, "htp: 0x%08x\n", I915_READ(CSR_HTP_SKL)); |
2777 | 2777 | ||
2778 | intel_runtime_pm_put(dev_priv); | 2778 | intel_runtime_pm_put_unchecked(dev_priv); |
2779 | 2779 | ||
2780 | return 0; | 2780 | return 0; |
2781 | } | 2781 | } |
@@ -3114,7 +3114,7 @@ static int i915_display_info(struct seq_file *m, void *unused) | |||
3114 | drm_connector_list_iter_end(&conn_iter); | 3114 | drm_connector_list_iter_end(&conn_iter); |
3115 | mutex_unlock(&dev->mode_config.mutex); | 3115 | mutex_unlock(&dev->mode_config.mutex); |
3116 | 3116 | ||
3117 | intel_runtime_pm_put(dev_priv); | 3117 | intel_runtime_pm_put_unchecked(dev_priv); |
3118 | 3118 | ||
3119 | return 0; | 3119 | return 0; |
3120 | } | 3120 | } |
@@ -3139,7 +3139,7 @@ static int i915_engine_info(struct seq_file *m, void *unused) | |||
3139 | for_each_engine(engine, dev_priv, id) | 3139 | for_each_engine(engine, dev_priv, id) |
3140 | intel_engine_dump(engine, &p, "%s\n", engine->name); | 3140 | intel_engine_dump(engine, &p, "%s\n", engine->name); |
3141 | 3141 | ||
3142 | intel_runtime_pm_put(dev_priv); | 3142 | intel_runtime_pm_put_unchecked(dev_priv); |
3143 | 3143 | ||
3144 | return 0; | 3144 | return 0; |
3145 | } | 3145 | } |
@@ -3265,7 +3265,7 @@ static ssize_t i915_ipc_status_write(struct file *file, const char __user *ubuf, | |||
3265 | dev_priv->wm.distrust_bios_wm = true; | 3265 | dev_priv->wm.distrust_bios_wm = true; |
3266 | dev_priv->ipc_enabled = enable; | 3266 | dev_priv->ipc_enabled = enable; |
3267 | intel_enable_ipc(dev_priv); | 3267 | intel_enable_ipc(dev_priv); |
3268 | intel_runtime_pm_put(dev_priv); | 3268 | intel_runtime_pm_put_unchecked(dev_priv); |
3269 | 3269 | ||
3270 | return len; | 3270 | return len; |
3271 | } | 3271 | } |
@@ -4090,7 +4090,7 @@ i915_drop_caches_set(void *data, u64 val) | |||
4090 | i915_gem_drain_freed_objects(i915); | 4090 | i915_gem_drain_freed_objects(i915); |
4091 | 4091 | ||
4092 | out: | 4092 | out: |
4093 | intel_runtime_pm_put(i915); | 4093 | intel_runtime_pm_put_unchecked(i915); |
4094 | 4094 | ||
4095 | return ret; | 4095 | return ret; |
4096 | } | 4096 | } |
@@ -4112,7 +4112,7 @@ i915_cache_sharing_get(void *data, u64 *val) | |||
4112 | 4112 | ||
4113 | snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); | 4113 | snpcr = I915_READ(GEN6_MBCUNIT_SNPCR); |
4114 | 4114 | ||
4115 | intel_runtime_pm_put(dev_priv); | 4115 | intel_runtime_pm_put_unchecked(dev_priv); |
4116 | 4116 | ||
4117 | *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT; | 4117 | *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT; |
4118 | 4118 | ||
@@ -4140,7 +4140,7 @@ i915_cache_sharing_set(void *data, u64 val) | |||
4140 | snpcr |= (val << GEN6_MBC_SNPCR_SHIFT); | 4140 | snpcr |= (val << GEN6_MBC_SNPCR_SHIFT); |
4141 | I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr); | 4141 | I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr); |
4142 | 4142 | ||
4143 | intel_runtime_pm_put(dev_priv); | 4143 | intel_runtime_pm_put_unchecked(dev_priv); |
4144 | return 0; | 4144 | return 0; |
4145 | } | 4145 | } |
4146 | 4146 | ||
@@ -4388,7 +4388,7 @@ static int i915_sseu_status(struct seq_file *m, void *unused) | |||
4388 | gen10_sseu_device_status(dev_priv, &sseu); | 4388 | gen10_sseu_device_status(dev_priv, &sseu); |
4389 | } | 4389 | } |
4390 | 4390 | ||
4391 | intel_runtime_pm_put(dev_priv); | 4391 | intel_runtime_pm_put_unchecked(dev_priv); |
4392 | 4392 | ||
4393 | i915_print_sseu_info(m, false, &sseu); | 4393 | i915_print_sseu_info(m, false, &sseu); |
4394 | 4394 | ||
@@ -4416,7 +4416,7 @@ static int i915_forcewake_release(struct inode *inode, struct file *file) | |||
4416 | return 0; | 4416 | return 0; |
4417 | 4417 | ||
4418 | intel_uncore_forcewake_user_put(i915); | 4418 | intel_uncore_forcewake_user_put(i915); |
4419 | intel_runtime_pm_put(i915); | 4419 | intel_runtime_pm_put_unchecked(i915); |
4420 | 4420 | ||
4421 | return 0; | 4421 | return 0; |
4422 | } | 4422 | } |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7e3566a0ba72..e9c909c43759 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -131,6 +131,8 @@ bool i915_error_injected(void); | |||
131 | __i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \ | 131 | __i915_printk(i915, i915_error_injected() ? KERN_DEBUG : KERN_ERR, \ |
132 | fmt, ##__VA_ARGS__) | 132 | fmt, ##__VA_ARGS__) |
133 | 133 | ||
134 | typedef depot_stack_handle_t intel_wakeref_t; | ||
135 | |||
134 | enum hpd_pin { | 136 | enum hpd_pin { |
135 | HPD_NONE = 0, | 137 | HPD_NONE = 0, |
136 | HPD_TV = HPD_NONE, /* TV is known to be unreliable */ | 138 | HPD_TV = HPD_NONE, /* TV is known to be unreliable */ |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 74710e5d946e..640e6361dda3 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -175,7 +175,7 @@ static u32 __i915_gem_park(struct drm_i915_private *i915) | |||
175 | 175 | ||
176 | intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ); | 176 | intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ); |
177 | 177 | ||
178 | intel_runtime_pm_put(i915); | 178 | intel_runtime_pm_put_unchecked(i915); |
179 | 179 | ||
180 | return i915->gt.epoch; | 180 | return i915->gt.epoch; |
181 | } | 181 | } |
@@ -814,7 +814,7 @@ void i915_gem_flush_ggtt_writes(struct drm_i915_private *dev_priv) | |||
814 | POSTING_READ_FW(RING_HEAD(RENDER_RING_BASE)); | 814 | POSTING_READ_FW(RING_HEAD(RENDER_RING_BASE)); |
815 | 815 | ||
816 | spin_unlock_irq(&dev_priv->uncore.lock); | 816 | spin_unlock_irq(&dev_priv->uncore.lock); |
817 | intel_runtime_pm_put(dev_priv); | 817 | intel_runtime_pm_put_unchecked(dev_priv); |
818 | } | 818 | } |
819 | 819 | ||
820 | static void | 820 | static void |
@@ -1149,7 +1149,7 @@ out_unpin: | |||
1149 | i915_vma_unpin(vma); | 1149 | i915_vma_unpin(vma); |
1150 | } | 1150 | } |
1151 | out_unlock: | 1151 | out_unlock: |
1152 | intel_runtime_pm_put(i915); | 1152 | intel_runtime_pm_put_unchecked(i915); |
1153 | mutex_unlock(&i915->drm.struct_mutex); | 1153 | mutex_unlock(&i915->drm.struct_mutex); |
1154 | 1154 | ||
1155 | return ret; | 1155 | return ret; |
@@ -1356,7 +1356,7 @@ out_unpin: | |||
1356 | i915_vma_unpin(vma); | 1356 | i915_vma_unpin(vma); |
1357 | } | 1357 | } |
1358 | out_rpm: | 1358 | out_rpm: |
1359 | intel_runtime_pm_put(i915); | 1359 | intel_runtime_pm_put_unchecked(i915); |
1360 | out_unlock: | 1360 | out_unlock: |
1361 | mutex_unlock(&i915->drm.struct_mutex); | 1361 | mutex_unlock(&i915->drm.struct_mutex); |
1362 | return ret; | 1362 | return ret; |
@@ -1968,7 +1968,7 @@ err_unpin: | |||
1968 | err_unlock: | 1968 | err_unlock: |
1969 | mutex_unlock(&dev->struct_mutex); | 1969 | mutex_unlock(&dev->struct_mutex); |
1970 | err_rpm: | 1970 | err_rpm: |
1971 | intel_runtime_pm_put(dev_priv); | 1971 | intel_runtime_pm_put_unchecked(dev_priv); |
1972 | i915_gem_object_unpin_pages(obj); | 1972 | i915_gem_object_unpin_pages(obj); |
1973 | err: | 1973 | err: |
1974 | switch (ret) { | 1974 | switch (ret) { |
@@ -2068,7 +2068,7 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj) | |||
2068 | wmb(); | 2068 | wmb(); |
2069 | 2069 | ||
2070 | out: | 2070 | out: |
2071 | intel_runtime_pm_put(i915); | 2071 | intel_runtime_pm_put_unchecked(i915); |
2072 | } | 2072 | } |
2073 | 2073 | ||
2074 | void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) | 2074 | void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv) |
@@ -4765,7 +4765,7 @@ static void __i915_gem_free_objects(struct drm_i915_private *i915, | |||
4765 | if (on) | 4765 | if (on) |
4766 | cond_resched(); | 4766 | cond_resched(); |
4767 | } | 4767 | } |
4768 | intel_runtime_pm_put(i915); | 4768 | intel_runtime_pm_put_unchecked(i915); |
4769 | } | 4769 | } |
4770 | 4770 | ||
4771 | static void i915_gem_flush_free_objects(struct drm_i915_private *i915) | 4771 | static void i915_gem_flush_free_objects(struct drm_i915_private *i915) |
@@ -4901,7 +4901,7 @@ void i915_gem_sanitize(struct drm_i915_private *i915) | |||
4901 | intel_engines_sanitize(i915, false); | 4901 | intel_engines_sanitize(i915, false); |
4902 | 4902 | ||
4903 | intel_uncore_forcewake_put(i915, FORCEWAKE_ALL); | 4903 | intel_uncore_forcewake_put(i915, FORCEWAKE_ALL); |
4904 | intel_runtime_pm_put(i915); | 4904 | intel_runtime_pm_put_unchecked(i915); |
4905 | 4905 | ||
4906 | i915_gem_contexts_lost(i915); | 4906 | i915_gem_contexts_lost(i915); |
4907 | mutex_unlock(&i915->drm.struct_mutex); | 4907 | mutex_unlock(&i915->drm.struct_mutex); |
@@ -4965,12 +4965,12 @@ int i915_gem_suspend(struct drm_i915_private *i915) | |||
4965 | if (WARN_ON(!intel_engines_are_idle(i915))) | 4965 | if (WARN_ON(!intel_engines_are_idle(i915))) |
4966 | i915_gem_set_wedged(i915); /* no hope, discard everything */ | 4966 | i915_gem_set_wedged(i915); /* no hope, discard everything */ |
4967 | 4967 | ||
4968 | intel_runtime_pm_put(i915); | 4968 | intel_runtime_pm_put_unchecked(i915); |
4969 | return 0; | 4969 | return 0; |
4970 | 4970 | ||
4971 | err_unlock: | 4971 | err_unlock: |
4972 | mutex_unlock(&i915->drm.struct_mutex); | 4972 | mutex_unlock(&i915->drm.struct_mutex); |
4973 | intel_runtime_pm_put(i915); | 4973 | intel_runtime_pm_put_unchecked(i915); |
4974 | return ret; | 4974 | return ret; |
4975 | } | 4975 | } |
4976 | 4976 | ||
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index e7994505d850..c80943698ca2 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
@@ -2424,7 +2424,7 @@ err_vma: | |||
2424 | eb_release_vmas(&eb); | 2424 | eb_release_vmas(&eb); |
2425 | mutex_unlock(&dev->struct_mutex); | 2425 | mutex_unlock(&dev->struct_mutex); |
2426 | err_rpm: | 2426 | err_rpm: |
2427 | intel_runtime_pm_put(eb.i915); | 2427 | intel_runtime_pm_put_unchecked(eb.i915); |
2428 | i915_gem_context_put(eb.ctx); | 2428 | i915_gem_context_put(eb.ctx); |
2429 | err_destroy: | 2429 | err_destroy: |
2430 | eb_destroy(&eb); | 2430 | eb_destroy(&eb); |
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/i915_gem_fence_reg.c index d67c07cdd0b8..b3391070acf7 100644 --- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c +++ b/drivers/gpu/drm/i915/i915_gem_fence_reg.c | |||
@@ -258,7 +258,7 @@ static int fence_update(struct drm_i915_fence_reg *fence, | |||
258 | */ | 258 | */ |
259 | if (intel_runtime_pm_get_if_in_use(fence->i915)) { | 259 | if (intel_runtime_pm_get_if_in_use(fence->i915)) { |
260 | fence_write(fence, vma); | 260 | fence_write(fence, vma); |
261 | intel_runtime_pm_put(fence->i915); | 261 | intel_runtime_pm_put_unchecked(fence->i915); |
262 | } | 262 | } |
263 | 263 | ||
264 | if (vma) { | 264 | if (vma) { |
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index a8807fbed0aa..51f80ddd938d 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c | |||
@@ -2536,7 +2536,7 @@ static int ggtt_bind_vma(struct i915_vma *vma, | |||
2536 | 2536 | ||
2537 | intel_runtime_pm_get(i915); | 2537 | intel_runtime_pm_get(i915); |
2538 | vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags); | 2538 | vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags); |
2539 | intel_runtime_pm_put(i915); | 2539 | intel_runtime_pm_put_unchecked(i915); |
2540 | 2540 | ||
2541 | vma->page_sizes.gtt = I915_GTT_PAGE_SIZE; | 2541 | vma->page_sizes.gtt = I915_GTT_PAGE_SIZE; |
2542 | 2542 | ||
@@ -2556,7 +2556,7 @@ static void ggtt_unbind_vma(struct i915_vma *vma) | |||
2556 | 2556 | ||
2557 | intel_runtime_pm_get(i915); | 2557 | intel_runtime_pm_get(i915); |
2558 | vma->vm->clear_range(vma->vm, vma->node.start, vma->size); | 2558 | vma->vm->clear_range(vma->vm, vma->node.start, vma->size); |
2559 | intel_runtime_pm_put(i915); | 2559 | intel_runtime_pm_put_unchecked(i915); |
2560 | } | 2560 | } |
2561 | 2561 | ||
2562 | static int aliasing_gtt_bind_vma(struct i915_vma *vma, | 2562 | static int aliasing_gtt_bind_vma(struct i915_vma *vma, |
@@ -2590,7 +2590,7 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma, | |||
2590 | if (flags & I915_VMA_GLOBAL_BIND) { | 2590 | if (flags & I915_VMA_GLOBAL_BIND) { |
2591 | intel_runtime_pm_get(i915); | 2591 | intel_runtime_pm_get(i915); |
2592 | vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags); | 2592 | vma->vm->insert_entries(vma->vm, vma, cache_level, pte_flags); |
2593 | intel_runtime_pm_put(i915); | 2593 | intel_runtime_pm_put_unchecked(i915); |
2594 | } | 2594 | } |
2595 | 2595 | ||
2596 | return 0; | 2596 | return 0; |
@@ -2603,7 +2603,7 @@ static void aliasing_gtt_unbind_vma(struct i915_vma *vma) | |||
2603 | if (vma->flags & I915_VMA_GLOBAL_BIND) { | 2603 | if (vma->flags & I915_VMA_GLOBAL_BIND) { |
2604 | intel_runtime_pm_get(i915); | 2604 | intel_runtime_pm_get(i915); |
2605 | vma->vm->clear_range(vma->vm, vma->node.start, vma->size); | 2605 | vma->vm->clear_range(vma->vm, vma->node.start, vma->size); |
2606 | intel_runtime_pm_put(i915); | 2606 | intel_runtime_pm_put_unchecked(i915); |
2607 | } | 2607 | } |
2608 | 2608 | ||
2609 | if (vma->flags & I915_VMA_LOCAL_BIND) { | 2609 | if (vma->flags & I915_VMA_LOCAL_BIND) { |
diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c b/drivers/gpu/drm/i915/i915_gem_shrinker.c index 6cc2b964c955..2bef02d0883d 100644 --- a/drivers/gpu/drm/i915/i915_gem_shrinker.c +++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c | |||
@@ -265,7 +265,7 @@ i915_gem_shrink(struct drm_i915_private *i915, | |||
265 | } | 265 | } |
266 | 266 | ||
267 | if (flags & I915_SHRINK_BOUND) | 267 | if (flags & I915_SHRINK_BOUND) |
268 | intel_runtime_pm_put(i915); | 268 | intel_runtime_pm_put_unchecked(i915); |
269 | 269 | ||
270 | i915_retire_requests(i915); | 270 | i915_retire_requests(i915); |
271 | 271 | ||
@@ -299,7 +299,7 @@ unsigned long i915_gem_shrink_all(struct drm_i915_private *i915) | |||
299 | I915_SHRINK_BOUND | | 299 | I915_SHRINK_BOUND | |
300 | I915_SHRINK_UNBOUND | | 300 | I915_SHRINK_UNBOUND | |
301 | I915_SHRINK_ACTIVE); | 301 | I915_SHRINK_ACTIVE); |
302 | intel_runtime_pm_put(i915); | 302 | intel_runtime_pm_put_unchecked(i915); |
303 | 303 | ||
304 | return freed; | 304 | return freed; |
305 | } | 305 | } |
@@ -377,7 +377,7 @@ i915_gem_shrinker_scan(struct shrinker *shrinker, struct shrink_control *sc) | |||
377 | I915_SHRINK_ACTIVE | | 377 | I915_SHRINK_ACTIVE | |
378 | I915_SHRINK_BOUND | | 378 | I915_SHRINK_BOUND | |
379 | I915_SHRINK_UNBOUND); | 379 | I915_SHRINK_UNBOUND); |
380 | intel_runtime_pm_put(i915); | 380 | intel_runtime_pm_put_unchecked(i915); |
381 | } | 381 | } |
382 | 382 | ||
383 | shrinker_unlock(i915, unlock); | 383 | shrinker_unlock(i915, unlock); |
@@ -397,7 +397,7 @@ i915_gem_shrinker_oom(struct notifier_block *nb, unsigned long event, void *ptr) | |||
397 | freed_pages = i915_gem_shrink(i915, -1UL, NULL, | 397 | freed_pages = i915_gem_shrink(i915, -1UL, NULL, |
398 | I915_SHRINK_BOUND | | 398 | I915_SHRINK_BOUND | |
399 | I915_SHRINK_UNBOUND); | 399 | I915_SHRINK_UNBOUND); |
400 | intel_runtime_pm_put(i915); | 400 | intel_runtime_pm_put_unchecked(i915); |
401 | 401 | ||
402 | /* Because we may be allocating inside our own driver, we cannot | 402 | /* Because we may be allocating inside our own driver, we cannot |
403 | * assert that there are no objects with pinned pages that are not | 403 | * assert that there are no objects with pinned pages that are not |
@@ -451,7 +451,7 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned long event, void *ptr | |||
451 | I915_SHRINK_BOUND | | 451 | I915_SHRINK_BOUND | |
452 | I915_SHRINK_UNBOUND | | 452 | I915_SHRINK_UNBOUND | |
453 | I915_SHRINK_VMAPS); | 453 | I915_SHRINK_VMAPS); |
454 | intel_runtime_pm_put(i915); | 454 | intel_runtime_pm_put_unchecked(i915); |
455 | 455 | ||
456 | /* We also want to clear any cached iomaps as they wrap vmap */ | 456 | /* We also want to clear any cached iomaps as they wrap vmap */ |
457 | list_for_each_entry_safe(vma, next, | 457 | list_for_each_entry_safe(vma, next, |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 288b0662f7b7..787a9ed1ef7d 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -3374,7 +3374,7 @@ void i915_handle_error(struct drm_i915_private *dev_priv, | |||
3374 | wake_up_all(&dev_priv->gpu_error.reset_queue); | 3374 | wake_up_all(&dev_priv->gpu_error.reset_queue); |
3375 | 3375 | ||
3376 | out: | 3376 | out: |
3377 | intel_runtime_pm_put(dev_priv); | 3377 | intel_runtime_pm_put_unchecked(dev_priv); |
3378 | } | 3378 | } |
3379 | 3379 | ||
3380 | /* Called from drm generic code, passed 'crtc' which | 3380 | /* Called from drm generic code, passed 'crtc' which |
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c index 5b1ae5ed97b3..e4dfd1477c78 100644 --- a/drivers/gpu/drm/i915/i915_perf.c +++ b/drivers/gpu/drm/i915/i915_perf.c | |||
@@ -1365,7 +1365,7 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream) | |||
1365 | free_oa_buffer(dev_priv); | 1365 | free_oa_buffer(dev_priv); |
1366 | 1366 | ||
1367 | intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); | 1367 | intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); |
1368 | intel_runtime_pm_put(dev_priv); | 1368 | intel_runtime_pm_put_unchecked(dev_priv); |
1369 | 1369 | ||
1370 | if (stream->ctx) | 1370 | if (stream->ctx) |
1371 | oa_put_render_ctx_id(stream); | 1371 | oa_put_render_ctx_id(stream); |
@@ -2123,7 +2123,7 @@ err_oa_buf_alloc: | |||
2123 | put_oa_config(dev_priv, stream->oa_config); | 2123 | put_oa_config(dev_priv, stream->oa_config); |
2124 | 2124 | ||
2125 | intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); | 2125 | intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); |
2126 | intel_runtime_pm_put(dev_priv); | 2126 | intel_runtime_pm_put_unchecked(dev_priv); |
2127 | 2127 | ||
2128 | err_config: | 2128 | err_config: |
2129 | if (stream->ctx) | 2129 | if (stream->ctx) |
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c index d6c8f8fdfda5..c99fcfce79d5 100644 --- a/drivers/gpu/drm/i915/i915_pmu.c +++ b/drivers/gpu/drm/i915/i915_pmu.c | |||
@@ -210,7 +210,7 @@ engines_sample(struct drm_i915_private *dev_priv, unsigned int period_ns) | |||
210 | if (fw) | 210 | if (fw) |
211 | intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); | 211 | intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); |
212 | 212 | ||
213 | intel_runtime_pm_put(dev_priv); | 213 | intel_runtime_pm_put_unchecked(dev_priv); |
214 | } | 214 | } |
215 | 215 | ||
216 | static void | 216 | static void |
@@ -231,7 +231,7 @@ frequency_sample(struct drm_i915_private *dev_priv, unsigned int period_ns) | |||
231 | intel_runtime_pm_get_if_in_use(dev_priv)) { | 231 | intel_runtime_pm_get_if_in_use(dev_priv)) { |
232 | val = intel_get_cagf(dev_priv, | 232 | val = intel_get_cagf(dev_priv, |
233 | I915_READ_NOTRACE(GEN6_RPSTAT1)); | 233 | I915_READ_NOTRACE(GEN6_RPSTAT1)); |
234 | intel_runtime_pm_put(dev_priv); | 234 | intel_runtime_pm_put_unchecked(dev_priv); |
235 | } | 235 | } |
236 | 236 | ||
237 | add_sample_mult(&dev_priv->pmu.sample[__I915_SAMPLE_FREQ_ACT], | 237 | add_sample_mult(&dev_priv->pmu.sample[__I915_SAMPLE_FREQ_ACT], |
@@ -448,7 +448,7 @@ static u64 get_rc6(struct drm_i915_private *i915) | |||
448 | 448 | ||
449 | if (intel_runtime_pm_get_if_in_use(i915)) { | 449 | if (intel_runtime_pm_get_if_in_use(i915)) { |
450 | val = __get_rc6(i915); | 450 | val = __get_rc6(i915); |
451 | intel_runtime_pm_put(i915); | 451 | intel_runtime_pm_put_unchecked(i915); |
452 | 452 | ||
453 | /* | 453 | /* |
454 | * If we are coming back from being runtime suspended we must | 454 | * If we are coming back from being runtime suspended we must |
diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index c0cfe7ae2ba5..53c20e103d56 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c | |||
@@ -46,7 +46,7 @@ static u32 calc_residency(struct drm_i915_private *dev_priv, | |||
46 | 46 | ||
47 | intel_runtime_pm_get(dev_priv); | 47 | intel_runtime_pm_get(dev_priv); |
48 | res = intel_rc6_residency_us(dev_priv, reg); | 48 | res = intel_rc6_residency_us(dev_priv, reg); |
49 | intel_runtime_pm_put(dev_priv); | 49 | intel_runtime_pm_put_unchecked(dev_priv); |
50 | 50 | ||
51 | return DIV_ROUND_CLOSEST_ULL(res, 1000); | 51 | return DIV_ROUND_CLOSEST_ULL(res, 1000); |
52 | } | 52 | } |
@@ -274,7 +274,7 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev, | |||
274 | } | 274 | } |
275 | mutex_unlock(&dev_priv->pcu_lock); | 275 | mutex_unlock(&dev_priv->pcu_lock); |
276 | 276 | ||
277 | intel_runtime_pm_put(dev_priv); | 277 | intel_runtime_pm_put_unchecked(dev_priv); |
278 | 278 | ||
279 | return snprintf(buf, PAGE_SIZE, "%d\n", ret); | 279 | return snprintf(buf, PAGE_SIZE, "%d\n", ret); |
280 | } | 280 | } |
@@ -371,7 +371,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, | |||
371 | val > rps->max_freq || | 371 | val > rps->max_freq || |
372 | val < rps->min_freq_softlimit) { | 372 | val < rps->min_freq_softlimit) { |
373 | mutex_unlock(&dev_priv->pcu_lock); | 373 | mutex_unlock(&dev_priv->pcu_lock); |
374 | intel_runtime_pm_put(dev_priv); | 374 | intel_runtime_pm_put_unchecked(dev_priv); |
375 | return -EINVAL; | 375 | return -EINVAL; |
376 | } | 376 | } |
377 | 377 | ||
@@ -392,7 +392,7 @@ static ssize_t gt_max_freq_mhz_store(struct device *kdev, | |||
392 | 392 | ||
393 | mutex_unlock(&dev_priv->pcu_lock); | 393 | mutex_unlock(&dev_priv->pcu_lock); |
394 | 394 | ||
395 | intel_runtime_pm_put(dev_priv); | 395 | intel_runtime_pm_put_unchecked(dev_priv); |
396 | 396 | ||
397 | return ret ?: count; | 397 | return ret ?: count; |
398 | } | 398 | } |
@@ -429,7 +429,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, | |||
429 | val > rps->max_freq || | 429 | val > rps->max_freq || |
430 | val > rps->max_freq_softlimit) { | 430 | val > rps->max_freq_softlimit) { |
431 | mutex_unlock(&dev_priv->pcu_lock); | 431 | mutex_unlock(&dev_priv->pcu_lock); |
432 | intel_runtime_pm_put(dev_priv); | 432 | intel_runtime_pm_put_unchecked(dev_priv); |
433 | return -EINVAL; | 433 | return -EINVAL; |
434 | } | 434 | } |
435 | 435 | ||
@@ -446,7 +446,7 @@ static ssize_t gt_min_freq_mhz_store(struct device *kdev, | |||
446 | 446 | ||
447 | mutex_unlock(&dev_priv->pcu_lock); | 447 | mutex_unlock(&dev_priv->pcu_lock); |
448 | 448 | ||
449 | intel_runtime_pm_put(dev_priv); | 449 | intel_runtime_pm_put_unchecked(dev_priv); |
450 | 450 | ||
451 | return ret ?: count; | 451 | return ret ?: count; |
452 | } | 452 | } |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1cc441f06c73..a980d5d1e601 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -2101,7 +2101,7 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, | |||
2101 | err: | 2101 | err: |
2102 | atomic_dec(&dev_priv->gpu_error.pending_fb_pin); | 2102 | atomic_dec(&dev_priv->gpu_error.pending_fb_pin); |
2103 | 2103 | ||
2104 | intel_runtime_pm_put(dev_priv); | 2104 | intel_runtime_pm_put_unchecked(dev_priv); |
2105 | return vma; | 2105 | return vma; |
2106 | } | 2106 | } |
2107 | 2107 | ||
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index ac513fd70315..a1e4e1033289 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
30 | #include <linux/hdmi.h> | 30 | #include <linux/hdmi.h> |
31 | #include <linux/sched/clock.h> | 31 | #include <linux/sched/clock.h> |
32 | #include <linux/stackdepot.h> | ||
32 | #include <drm/i915_drm.h> | 33 | #include <drm/i915_drm.h> |
33 | #include "i915_drv.h" | 34 | #include "i915_drv.h" |
34 | #include <drm/drm_crtc.h> | 35 | #include <drm/drm_crtc.h> |
@@ -2182,10 +2183,16 @@ enable_rpm_wakeref_asserts(struct drm_i915_private *i915) | |||
2182 | atomic_dec(&i915->runtime_pm.wakeref_count); | 2183 | atomic_dec(&i915->runtime_pm.wakeref_count); |
2183 | } | 2184 | } |
2184 | 2185 | ||
2185 | void intel_runtime_pm_get(struct drm_i915_private *i915); | 2186 | intel_wakeref_t intel_runtime_pm_get(struct drm_i915_private *i915); |
2186 | bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915); | 2187 | intel_wakeref_t intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915); |
2187 | void intel_runtime_pm_get_noresume(struct drm_i915_private *i915); | 2188 | intel_wakeref_t intel_runtime_pm_get_noresume(struct drm_i915_private *i915); |
2188 | void intel_runtime_pm_put(struct drm_i915_private *i915); | 2189 | |
2190 | void intel_runtime_pm_put_unchecked(struct drm_i915_private *i915); | ||
2191 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) | ||
2192 | void intel_runtime_pm_put(struct drm_i915_private *i915, intel_wakeref_t wref); | ||
2193 | #else | ||
2194 | #define intel_runtime_pm_put(i915, wref) intel_runtime_pm_put_unchecked(i915) | ||
2195 | #endif | ||
2189 | 2196 | ||
2190 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) | 2197 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) |
2191 | void print_intel_runtime_pm_wakeref(struct drm_i915_private *i915, | 2198 | void print_intel_runtime_pm_wakeref(struct drm_i915_private *i915, |
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c index 5990f8500bca..2e60463f2468 100644 --- a/drivers/gpu/drm/i915/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/intel_engine_cs.c | |||
@@ -928,7 +928,7 @@ static bool ring_is_idle(struct intel_engine_cs *engine) | |||
928 | if (INTEL_GEN(dev_priv) > 2 && !(I915_READ_MODE(engine) & MODE_IDLE)) | 928 | if (INTEL_GEN(dev_priv) > 2 && !(I915_READ_MODE(engine) & MODE_IDLE)) |
929 | idle = false; | 929 | idle = false; |
930 | 930 | ||
931 | intel_runtime_pm_put(dev_priv); | 931 | intel_runtime_pm_put_unchecked(dev_priv); |
932 | 932 | ||
933 | return idle; | 933 | return idle; |
934 | } | 934 | } |
@@ -1485,7 +1485,7 @@ void intel_engine_dump(struct intel_engine_cs *engine, | |||
1485 | 1485 | ||
1486 | if (intel_runtime_pm_get_if_in_use(engine->i915)) { | 1486 | if (intel_runtime_pm_get_if_in_use(engine->i915)) { |
1487 | intel_engine_print_registers(engine, m); | 1487 | intel_engine_print_registers(engine, m); |
1488 | intel_runtime_pm_put(engine->i915); | 1488 | intel_runtime_pm_put_unchecked(engine->i915); |
1489 | } else { | 1489 | } else { |
1490 | drm_printf(m, "\tDevice is asleep; skipping register dump\n"); | 1490 | drm_printf(m, "\tDevice is asleep; skipping register dump\n"); |
1491 | } | 1491 | } |
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index a0c5046e170c..215e5894842d 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c | |||
@@ -276,7 +276,7 @@ static int intelfb_create(struct drm_fb_helper *helper, | |||
276 | ifbdev->vma = vma; | 276 | ifbdev->vma = vma; |
277 | ifbdev->vma_flags = flags; | 277 | ifbdev->vma_flags = flags; |
278 | 278 | ||
279 | intel_runtime_pm_put(dev_priv); | 279 | intel_runtime_pm_put_unchecked(dev_priv); |
280 | mutex_unlock(&dev->struct_mutex); | 280 | mutex_unlock(&dev->struct_mutex); |
281 | vga_switcheroo_client_fb_set(pdev, info); | 281 | vga_switcheroo_client_fb_set(pdev, info); |
282 | return 0; | 282 | return 0; |
@@ -284,7 +284,7 @@ static int intelfb_create(struct drm_fb_helper *helper, | |||
284 | out_unpin: | 284 | out_unpin: |
285 | intel_unpin_fb_vma(vma, flags); | 285 | intel_unpin_fb_vma(vma, flags); |
286 | out_unlock: | 286 | out_unlock: |
287 | intel_runtime_pm_put(dev_priv); | 287 | intel_runtime_pm_put_unchecked(dev_priv); |
288 | mutex_unlock(&dev->struct_mutex); | 288 | mutex_unlock(&dev->struct_mutex); |
289 | return ret; | 289 | return ret; |
290 | } | 290 | } |
diff --git a/drivers/gpu/drm/i915/intel_guc_log.c b/drivers/gpu/drm/i915/intel_guc_log.c index d3ebdbc0182e..1b1581a42aa1 100644 --- a/drivers/gpu/drm/i915/intel_guc_log.c +++ b/drivers/gpu/drm/i915/intel_guc_log.c | |||
@@ -445,7 +445,7 @@ static void guc_log_capture_logs(struct intel_guc_log *log) | |||
445 | */ | 445 | */ |
446 | intel_runtime_pm_get(dev_priv); | 446 | intel_runtime_pm_get(dev_priv); |
447 | guc_action_flush_log_complete(guc); | 447 | guc_action_flush_log_complete(guc); |
448 | intel_runtime_pm_put(dev_priv); | 448 | intel_runtime_pm_put_unchecked(dev_priv); |
449 | } | 449 | } |
450 | 450 | ||
451 | int intel_guc_log_create(struct intel_guc_log *log) | 451 | int intel_guc_log_create(struct intel_guc_log *log) |
@@ -528,7 +528,7 @@ int intel_guc_log_set_level(struct intel_guc_log *log, u32 level) | |||
528 | ret = guc_action_control_log(guc, GUC_LOG_LEVEL_IS_VERBOSE(level), | 528 | ret = guc_action_control_log(guc, GUC_LOG_LEVEL_IS_VERBOSE(level), |
529 | GUC_LOG_LEVEL_IS_ENABLED(level), | 529 | GUC_LOG_LEVEL_IS_ENABLED(level), |
530 | GUC_LOG_LEVEL_TO_VERBOSITY(level)); | 530 | GUC_LOG_LEVEL_TO_VERBOSITY(level)); |
531 | intel_runtime_pm_put(dev_priv); | 531 | intel_runtime_pm_put_unchecked(dev_priv); |
532 | if (ret) { | 532 | if (ret) { |
533 | DRM_DEBUG_DRIVER("guc_log_control action failed %d\n", ret); | 533 | DRM_DEBUG_DRIVER("guc_log_control action failed %d\n", ret); |
534 | goto out_unlock; | 534 | goto out_unlock; |
@@ -610,7 +610,7 @@ void intel_guc_log_relay_flush(struct intel_guc_log *log) | |||
610 | 610 | ||
611 | intel_runtime_pm_get(i915); | 611 | intel_runtime_pm_get(i915); |
612 | guc_action_flush_log(guc); | 612 | guc_action_flush_log(guc); |
613 | intel_runtime_pm_put(i915); | 613 | intel_runtime_pm_put_unchecked(i915); |
614 | 614 | ||
615 | /* GuC would have updated log buffer by now, so capture it */ | 615 | /* GuC would have updated log buffer by now, so capture it */ |
616 | guc_log_capture_logs(log); | 616 | guc_log_capture_logs(log); |
diff --git a/drivers/gpu/drm/i915/intel_hotplug.c b/drivers/gpu/drm/i915/intel_hotplug.c index ae92d6560165..b1a9cb960ca4 100644 --- a/drivers/gpu/drm/i915/intel_hotplug.c +++ b/drivers/gpu/drm/i915/intel_hotplug.c | |||
@@ -261,7 +261,7 @@ static void intel_hpd_irq_storm_reenable_work(struct work_struct *work) | |||
261 | dev_priv->display.hpd_irq_setup(dev_priv); | 261 | dev_priv->display.hpd_irq_setup(dev_priv); |
262 | spin_unlock_irq(&dev_priv->irq_lock); | 262 | spin_unlock_irq(&dev_priv->irq_lock); |
263 | 263 | ||
264 | intel_runtime_pm_put(dev_priv); | 264 | intel_runtime_pm_put_unchecked(dev_priv); |
265 | } | 265 | } |
266 | 266 | ||
267 | bool intel_encoder_hotplug(struct intel_encoder *encoder, | 267 | bool intel_encoder_hotplug(struct intel_encoder *encoder, |
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c index bc27b691d824..c2b076e9bada 100644 --- a/drivers/gpu/drm/i915/intel_huc.c +++ b/drivers/gpu/drm/i915/intel_huc.c | |||
@@ -122,7 +122,7 @@ int intel_huc_check_status(struct intel_huc *huc) | |||
122 | 122 | ||
123 | intel_runtime_pm_get(dev_priv); | 123 | intel_runtime_pm_get(dev_priv); |
124 | status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED; | 124 | status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED; |
125 | intel_runtime_pm_put(dev_priv); | 125 | intel_runtime_pm_put_unchecked(dev_priv); |
126 | 126 | ||
127 | return status; | 127 | return status; |
128 | } | 128 | } |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index ee3e0842d542..c2b7455a023e 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -1213,7 +1213,7 @@ static int intel_backlight_device_get_brightness(struct backlight_device *bd) | |||
1213 | ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); | 1213 | ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness); |
1214 | 1214 | ||
1215 | drm_modeset_unlock(&dev->mode_config.connection_mutex); | 1215 | drm_modeset_unlock(&dev->mode_config.connection_mutex); |
1216 | intel_runtime_pm_put(dev_priv); | 1216 | intel_runtime_pm_put_unchecked(dev_priv); |
1217 | 1217 | ||
1218 | return ret; | 1218 | return ret; |
1219 | } | 1219 | } |
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 08f809371bbd..c29577d7a35a 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c | |||
@@ -94,7 +94,7 @@ static void init_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | |||
94 | spin_lock_init(&rpm->debug.lock); | 94 | spin_lock_init(&rpm->debug.lock); |
95 | } | 95 | } |
96 | 96 | ||
97 | static noinline void | 97 | static noinline depot_stack_handle_t |
98 | track_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | 98 | track_intel_runtime_pm_wakeref(struct drm_i915_private *i915) |
99 | { | 99 | { |
100 | struct i915_runtime_pm *rpm = &i915->runtime_pm; | 100 | struct i915_runtime_pm *rpm = &i915->runtime_pm; |
@@ -105,11 +105,11 @@ track_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | |||
105 | assert_rpm_wakelock_held(i915); | 105 | assert_rpm_wakelock_held(i915); |
106 | 106 | ||
107 | if (!HAS_RUNTIME_PM(i915)) | 107 | if (!HAS_RUNTIME_PM(i915)) |
108 | return; | 108 | return -1; |
109 | 109 | ||
110 | stack = __save_depot_stack(); | 110 | stack = __save_depot_stack(); |
111 | if (!stack) | 111 | if (!stack) |
112 | return; | 112 | return -1; |
113 | 113 | ||
114 | spin_lock_irqsave(&rpm->debug.lock, flags); | 114 | spin_lock_irqsave(&rpm->debug.lock, flags); |
115 | 115 | ||
@@ -122,9 +122,57 @@ track_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | |||
122 | if (stacks) { | 122 | if (stacks) { |
123 | stacks[rpm->debug.count++] = stack; | 123 | stacks[rpm->debug.count++] = stack; |
124 | rpm->debug.owners = stacks; | 124 | rpm->debug.owners = stacks; |
125 | } else { | ||
126 | stack = -1; | ||
125 | } | 127 | } |
126 | 128 | ||
127 | spin_unlock_irqrestore(&rpm->debug.lock, flags); | 129 | spin_unlock_irqrestore(&rpm->debug.lock, flags); |
130 | |||
131 | return stack; | ||
132 | } | ||
133 | |||
134 | static void cancel_intel_runtime_pm_wakeref(struct drm_i915_private *i915, | ||
135 | depot_stack_handle_t stack) | ||
136 | { | ||
137 | struct i915_runtime_pm *rpm = &i915->runtime_pm; | ||
138 | unsigned long flags, n; | ||
139 | bool found = false; | ||
140 | |||
141 | if (unlikely(stack == -1)) | ||
142 | return; | ||
143 | |||
144 | spin_lock_irqsave(&rpm->debug.lock, flags); | ||
145 | for (n = rpm->debug.count; n--; ) { | ||
146 | if (rpm->debug.owners[n] == stack) { | ||
147 | memmove(rpm->debug.owners + n, | ||
148 | rpm->debug.owners + n + 1, | ||
149 | (--rpm->debug.count - n) * sizeof(stack)); | ||
150 | found = true; | ||
151 | break; | ||
152 | } | ||
153 | } | ||
154 | spin_unlock_irqrestore(&rpm->debug.lock, flags); | ||
155 | |||
156 | if (WARN(!found, | ||
157 | "Unmatched wakeref (tracking %lu), count %u\n", | ||
158 | rpm->debug.count, atomic_read(&rpm->wakeref_count))) { | ||
159 | char *buf; | ||
160 | |||
161 | buf = kmalloc(PAGE_SIZE, GFP_KERNEL); | ||
162 | if (!buf) | ||
163 | return; | ||
164 | |||
165 | __print_depot_stack(stack, buf, PAGE_SIZE, 2); | ||
166 | DRM_DEBUG_DRIVER("wakeref %x from\n%s", stack, buf); | ||
167 | |||
168 | stack = READ_ONCE(rpm->debug.last_release); | ||
169 | if (stack) { | ||
170 | __print_depot_stack(stack, buf, PAGE_SIZE, 2); | ||
171 | DRM_DEBUG_DRIVER("wakeref last released at\n%s", buf); | ||
172 | } | ||
173 | |||
174 | kfree(buf); | ||
175 | } | ||
128 | } | 176 | } |
129 | 177 | ||
130 | static int cmphandle(const void *_a, const void *_b) | 178 | static int cmphandle(const void *_a, const void *_b) |
@@ -249,10 +297,12 @@ static void init_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | |||
249 | { | 297 | { |
250 | } | 298 | } |
251 | 299 | ||
252 | static void track_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | 300 | static depot_stack_handle_t |
301 | track_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | ||
253 | { | 302 | { |
254 | atomic_inc(&i915->runtime_pm.wakeref_count); | 303 | atomic_inc(&i915->runtime_pm.wakeref_count); |
255 | assert_rpm_wakelock_held(i915); | 304 | assert_rpm_wakelock_held(i915); |
305 | return -1; | ||
256 | } | 306 | } |
257 | 307 | ||
258 | static void untrack_intel_runtime_pm_wakeref(struct drm_i915_private *i915) | 308 | static void untrack_intel_runtime_pm_wakeref(struct drm_i915_private *i915) |
@@ -1852,7 +1902,7 @@ bool intel_display_power_get_if_enabled(struct drm_i915_private *dev_priv, | |||
1852 | mutex_unlock(&power_domains->lock); | 1902 | mutex_unlock(&power_domains->lock); |
1853 | 1903 | ||
1854 | if (!is_enabled) | 1904 | if (!is_enabled) |
1855 | intel_runtime_pm_put(dev_priv); | 1905 | intel_runtime_pm_put_unchecked(dev_priv); |
1856 | 1906 | ||
1857 | return is_enabled; | 1907 | return is_enabled; |
1858 | } | 1908 | } |
@@ -1886,7 +1936,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv, | |||
1886 | 1936 | ||
1887 | mutex_unlock(&power_domains->lock); | 1937 | mutex_unlock(&power_domains->lock); |
1888 | 1938 | ||
1889 | intel_runtime_pm_put(dev_priv); | 1939 | intel_runtime_pm_put_unchecked(dev_priv); |
1890 | } | 1940 | } |
1891 | 1941 | ||
1892 | #define I830_PIPES_POWER_DOMAINS ( \ | 1942 | #define I830_PIPES_POWER_DOMAINS ( \ |
@@ -3994,7 +4044,7 @@ void intel_power_domains_init_hw(struct drm_i915_private *dev_priv, bool resume) | |||
3994 | void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv) | 4044 | void intel_power_domains_fini_hw(struct drm_i915_private *dev_priv) |
3995 | { | 4045 | { |
3996 | /* Keep the power well enabled, but cancel its rpm wakeref. */ | 4046 | /* Keep the power well enabled, but cancel its rpm wakeref. */ |
3997 | intel_runtime_pm_put(dev_priv); | 4047 | intel_runtime_pm_put_unchecked(dev_priv); |
3998 | 4048 | ||
3999 | /* Remove the refcount we took to keep power well support disabled. */ | 4049 | /* Remove the refcount we took to keep power well support disabled. */ |
4000 | if (!i915_modparams.disable_power_well) | 4050 | if (!i915_modparams.disable_power_well) |
@@ -4207,8 +4257,10 @@ static void intel_power_domains_verify_state(struct drm_i915_private *dev_priv) | |||
4207 | * | 4257 | * |
4208 | * Any runtime pm reference obtained by this function must have a symmetric | 4258 | * Any runtime pm reference obtained by this function must have a symmetric |
4209 | * call to intel_runtime_pm_put() to release the reference again. | 4259 | * call to intel_runtime_pm_put() to release the reference again. |
4260 | * | ||
4261 | * Returns: the wakeref cookie to pass to intel_runtime_pm_put() | ||
4210 | */ | 4262 | */ |
4211 | void intel_runtime_pm_get(struct drm_i915_private *i915) | 4263 | intel_wakeref_t intel_runtime_pm_get(struct drm_i915_private *i915) |
4212 | { | 4264 | { |
4213 | struct pci_dev *pdev = i915->drm.pdev; | 4265 | struct pci_dev *pdev = i915->drm.pdev; |
4214 | struct device *kdev = &pdev->dev; | 4266 | struct device *kdev = &pdev->dev; |
@@ -4217,7 +4269,7 @@ void intel_runtime_pm_get(struct drm_i915_private *i915) | |||
4217 | ret = pm_runtime_get_sync(kdev); | 4269 | ret = pm_runtime_get_sync(kdev); |
4218 | WARN_ONCE(ret < 0, "pm_runtime_get_sync() failed: %d\n", ret); | 4270 | WARN_ONCE(ret < 0, "pm_runtime_get_sync() failed: %d\n", ret); |
4219 | 4271 | ||
4220 | track_intel_runtime_pm_wakeref(i915); | 4272 | return track_intel_runtime_pm_wakeref(i915); |
4221 | } | 4273 | } |
4222 | 4274 | ||
4223 | /** | 4275 | /** |
@@ -4231,9 +4283,10 @@ void intel_runtime_pm_get(struct drm_i915_private *i915) | |||
4231 | * Any runtime pm reference obtained by this function must have a symmetric | 4283 | * Any runtime pm reference obtained by this function must have a symmetric |
4232 | * call to intel_runtime_pm_put() to release the reference again. | 4284 | * call to intel_runtime_pm_put() to release the reference again. |
4233 | * | 4285 | * |
4234 | * Returns: True if the wakeref was acquired, or False otherwise. | 4286 | * Returns: the wakeref cookie to pass to intel_runtime_pm_put(), evaluates |
4287 | * as True if the wakeref was acquired, or False otherwise. | ||
4235 | */ | 4288 | */ |
4236 | bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915) | 4289 | intel_wakeref_t intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915) |
4237 | { | 4290 | { |
4238 | if (IS_ENABLED(CONFIG_PM)) { | 4291 | if (IS_ENABLED(CONFIG_PM)) { |
4239 | struct pci_dev *pdev = i915->drm.pdev; | 4292 | struct pci_dev *pdev = i915->drm.pdev; |
@@ -4246,12 +4299,10 @@ bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915) | |||
4246 | * atm to the late/early system suspend/resume handlers. | 4299 | * atm to the late/early system suspend/resume handlers. |
4247 | */ | 4300 | */ |
4248 | if (pm_runtime_get_if_in_use(kdev) <= 0) | 4301 | if (pm_runtime_get_if_in_use(kdev) <= 0) |
4249 | return false; | 4302 | return 0; |
4250 | } | 4303 | } |
4251 | 4304 | ||
4252 | track_intel_runtime_pm_wakeref(i915); | 4305 | return track_intel_runtime_pm_wakeref(i915); |
4253 | |||
4254 | return true; | ||
4255 | } | 4306 | } |
4256 | 4307 | ||
4257 | /** | 4308 | /** |
@@ -4270,8 +4321,10 @@ bool intel_runtime_pm_get_if_in_use(struct drm_i915_private *i915) | |||
4270 | * | 4321 | * |
4271 | * Any runtime pm reference obtained by this function must have a symmetric | 4322 | * Any runtime pm reference obtained by this function must have a symmetric |
4272 | * call to intel_runtime_pm_put() to release the reference again. | 4323 | * call to intel_runtime_pm_put() to release the reference again. |
4324 | * | ||
4325 | * Returns: the wakeref cookie to pass to intel_runtime_pm_put() | ||
4273 | */ | 4326 | */ |
4274 | void intel_runtime_pm_get_noresume(struct drm_i915_private *i915) | 4327 | intel_wakeref_t intel_runtime_pm_get_noresume(struct drm_i915_private *i915) |
4275 | { | 4328 | { |
4276 | struct pci_dev *pdev = i915->drm.pdev; | 4329 | struct pci_dev *pdev = i915->drm.pdev; |
4277 | struct device *kdev = &pdev->dev; | 4330 | struct device *kdev = &pdev->dev; |
@@ -4279,7 +4332,7 @@ void intel_runtime_pm_get_noresume(struct drm_i915_private *i915) | |||
4279 | assert_rpm_wakelock_held(i915); | 4332 | assert_rpm_wakelock_held(i915); |
4280 | pm_runtime_get_noresume(kdev); | 4333 | pm_runtime_get_noresume(kdev); |
4281 | 4334 | ||
4282 | track_intel_runtime_pm_wakeref(i915); | 4335 | return track_intel_runtime_pm_wakeref(i915); |
4283 | } | 4336 | } |
4284 | 4337 | ||
4285 | /** | 4338 | /** |
@@ -4290,7 +4343,7 @@ void intel_runtime_pm_get_noresume(struct drm_i915_private *i915) | |||
4290 | * intel_runtime_pm_get() and might power down the corresponding | 4343 | * intel_runtime_pm_get() and might power down the corresponding |
4291 | * hardware block right away if this is the last reference. | 4344 | * hardware block right away if this is the last reference. |
4292 | */ | 4345 | */ |
4293 | void intel_runtime_pm_put(struct drm_i915_private *i915) | 4346 | void intel_runtime_pm_put_unchecked(struct drm_i915_private *i915) |
4294 | { | 4347 | { |
4295 | struct pci_dev *pdev = i915->drm.pdev; | 4348 | struct pci_dev *pdev = i915->drm.pdev; |
4296 | struct device *kdev = &pdev->dev; | 4349 | struct device *kdev = &pdev->dev; |
@@ -4301,6 +4354,14 @@ void intel_runtime_pm_put(struct drm_i915_private *i915) | |||
4301 | pm_runtime_put_autosuspend(kdev); | 4354 | pm_runtime_put_autosuspend(kdev); |
4302 | } | 4355 | } |
4303 | 4356 | ||
4357 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_RUNTIME_PM) | ||
4358 | void intel_runtime_pm_put(struct drm_i915_private *i915, intel_wakeref_t wref) | ||
4359 | { | ||
4360 | cancel_intel_runtime_pm_wakeref(i915, wref); | ||
4361 | intel_runtime_pm_put_unchecked(i915); | ||
4362 | } | ||
4363 | #endif | ||
4364 | |||
4304 | /** | 4365 | /** |
4305 | * intel_runtime_pm_enable - enable runtime pm | 4366 | * intel_runtime_pm_enable - enable runtime pm |
4306 | * @i915: i915 device instance | 4367 | * @i915: i915 device instance |
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index fff468f17d2d..8d4c76ac0e7d 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c | |||
@@ -1709,7 +1709,7 @@ int i915_reg_read_ioctl(struct drm_device *dev, | |||
1709 | reg->val = I915_READ8(entry->offset_ldw); | 1709 | reg->val = I915_READ8(entry->offset_ldw); |
1710 | else | 1710 | else |
1711 | ret = -EINVAL; | 1711 | ret = -EINVAL; |
1712 | intel_runtime_pm_put(dev_priv); | 1712 | intel_runtime_pm_put_unchecked(dev_priv); |
1713 | 1713 | ||
1714 | return ret; | 1714 | return ret; |
1715 | } | 1715 | } |
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c index 6c10734e948d..a4d8b12be12c 100644 --- a/drivers/gpu/drm/i915/selftests/huge_pages.c +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c | |||
@@ -1785,7 +1785,7 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *dev_priv) | |||
1785 | err = i915_subtests(tests, ctx); | 1785 | err = i915_subtests(tests, ctx); |
1786 | 1786 | ||
1787 | out_unlock: | 1787 | out_unlock: |
1788 | intel_runtime_pm_put(dev_priv); | 1788 | intel_runtime_pm_put_unchecked(dev_priv); |
1789 | mutex_unlock(&dev_priv->drm.struct_mutex); | 1789 | mutex_unlock(&dev_priv->drm.struct_mutex); |
1790 | 1790 | ||
1791 | mock_file_free(dev_priv, file); | 1791 | mock_file_free(dev_priv, file); |
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c index bdcc53e15e75..762e1a7125f5 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem.c | |||
@@ -32,7 +32,7 @@ static int switch_to_context(struct drm_i915_private *i915, | |||
32 | i915_request_add(rq); | 32 | i915_request_add(rq); |
33 | } | 33 | } |
34 | 34 | ||
35 | intel_runtime_pm_put(i915); | 35 | intel_runtime_pm_put_unchecked(i915); |
36 | 36 | ||
37 | return err; | 37 | return err; |
38 | } | 38 | } |
@@ -76,7 +76,7 @@ static void simulate_hibernate(struct drm_i915_private *i915) | |||
76 | */ | 76 | */ |
77 | trash_stolen(i915); | 77 | trash_stolen(i915); |
78 | 78 | ||
79 | intel_runtime_pm_put(i915); | 79 | intel_runtime_pm_put_unchecked(i915); |
80 | } | 80 | } |
81 | 81 | ||
82 | static int pm_prepare(struct drm_i915_private *i915) | 82 | static int pm_prepare(struct drm_i915_private *i915) |
@@ -98,7 +98,7 @@ static void pm_suspend(struct drm_i915_private *i915) | |||
98 | i915_gem_suspend_gtt_mappings(i915); | 98 | i915_gem_suspend_gtt_mappings(i915); |
99 | i915_gem_suspend_late(i915); | 99 | i915_gem_suspend_late(i915); |
100 | 100 | ||
101 | intel_runtime_pm_put(i915); | 101 | intel_runtime_pm_put_unchecked(i915); |
102 | } | 102 | } |
103 | 103 | ||
104 | static void pm_hibernate(struct drm_i915_private *i915) | 104 | static void pm_hibernate(struct drm_i915_private *i915) |
@@ -110,7 +110,7 @@ static void pm_hibernate(struct drm_i915_private *i915) | |||
110 | i915_gem_freeze(i915); | 110 | i915_gem_freeze(i915); |
111 | i915_gem_freeze_late(i915); | 111 | i915_gem_freeze_late(i915); |
112 | 112 | ||
113 | intel_runtime_pm_put(i915); | 113 | intel_runtime_pm_put_unchecked(i915); |
114 | } | 114 | } |
115 | 115 | ||
116 | static void pm_resume(struct drm_i915_private *i915) | 116 | static void pm_resume(struct drm_i915_private *i915) |
@@ -125,7 +125,7 @@ static void pm_resume(struct drm_i915_private *i915) | |||
125 | i915_gem_sanitize(i915); | 125 | i915_gem_sanitize(i915); |
126 | i915_gem_resume(i915); | 126 | i915_gem_resume(i915); |
127 | 127 | ||
128 | intel_runtime_pm_put(i915); | 128 | intel_runtime_pm_put_unchecked(i915); |
129 | } | 129 | } |
130 | 130 | ||
131 | static int igt_gem_suspend(void *arg) | 131 | static int igt_gem_suspend(void *arg) |
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c b/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c index f7392c1ffe75..eea4fc2445ae 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_coherency.c | |||
@@ -376,7 +376,7 @@ static int igt_gem_coherency(void *arg) | |||
376 | } | 376 | } |
377 | } | 377 | } |
378 | unlock: | 378 | unlock: |
379 | intel_runtime_pm_put(i915); | 379 | intel_runtime_pm_put_unchecked(i915); |
380 | mutex_unlock(&i915->drm.struct_mutex); | 380 | mutex_unlock(&i915->drm.struct_mutex); |
381 | kfree(offsets); | 381 | kfree(offsets); |
382 | return err; | 382 | return err; |
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c index d00cdf3c2939..6e1a0711d201 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c | |||
@@ -243,7 +243,7 @@ static int live_nop_switch(void *arg) | |||
243 | } | 243 | } |
244 | 244 | ||
245 | out_unlock: | 245 | out_unlock: |
246 | intel_runtime_pm_put(i915); | 246 | intel_runtime_pm_put_unchecked(i915); |
247 | mutex_unlock(&i915->drm.struct_mutex); | 247 | mutex_unlock(&i915->drm.struct_mutex); |
248 | mock_file_free(i915, file); | 248 | mock_file_free(i915, file); |
249 | return err; | 249 | return err; |
@@ -609,7 +609,7 @@ static int igt_ctx_exec(void *arg) | |||
609 | 609 | ||
610 | intel_runtime_pm_get(i915); | 610 | intel_runtime_pm_get(i915); |
611 | err = gpu_fill(obj, ctx, engine, dw); | 611 | err = gpu_fill(obj, ctx, engine, dw); |
612 | intel_runtime_pm_put(i915); | 612 | intel_runtime_pm_put_unchecked(i915); |
613 | if (err) { | 613 | if (err) { |
614 | pr_err("Failed to fill dword %lu [%lu/%lu] with gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n", | 614 | pr_err("Failed to fill dword %lu [%lu/%lu] with gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n", |
615 | ndwords, dw, max_dwords(obj), | 615 | ndwords, dw, max_dwords(obj), |
@@ -715,7 +715,7 @@ static int igt_ctx_readonly(void *arg) | |||
715 | 715 | ||
716 | intel_runtime_pm_get(i915); | 716 | intel_runtime_pm_get(i915); |
717 | err = gpu_fill(obj, ctx, engine, dw); | 717 | err = gpu_fill(obj, ctx, engine, dw); |
718 | intel_runtime_pm_put(i915); | 718 | intel_runtime_pm_put_unchecked(i915); |
719 | if (err) { | 719 | if (err) { |
720 | pr_err("Failed to fill dword %lu [%lu/%lu] with gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n", | 720 | pr_err("Failed to fill dword %lu [%lu/%lu] with gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n", |
721 | ndwords, dw, max_dwords(obj), | 721 | ndwords, dw, max_dwords(obj), |
@@ -1067,7 +1067,7 @@ static int igt_vm_isolation(void *arg) | |||
1067 | count, RUNTIME_INFO(i915)->num_rings); | 1067 | count, RUNTIME_INFO(i915)->num_rings); |
1068 | 1068 | ||
1069 | out_rpm: | 1069 | out_rpm: |
1070 | intel_runtime_pm_put(i915); | 1070 | intel_runtime_pm_put_unchecked(i915); |
1071 | out_unlock: | 1071 | out_unlock: |
1072 | if (end_live_test(&t)) | 1072 | if (end_live_test(&t)) |
1073 | err = -EIO; | 1073 | err = -EIO; |
@@ -1200,7 +1200,7 @@ out_unlock: | |||
1200 | if (igt_flush_test(i915, I915_WAIT_LOCKED)) | 1200 | if (igt_flush_test(i915, I915_WAIT_LOCKED)) |
1201 | err = -EIO; | 1201 | err = -EIO; |
1202 | 1202 | ||
1203 | intel_runtime_pm_put(i915); | 1203 | intel_runtime_pm_put_unchecked(i915); |
1204 | mutex_unlock(&i915->drm.struct_mutex); | 1204 | mutex_unlock(&i915->drm.struct_mutex); |
1205 | 1205 | ||
1206 | kernel_context_close(ctx); | 1206 | kernel_context_close(ctx); |
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c index 4365979d8222..8d22f73a9b63 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c | |||
@@ -464,7 +464,7 @@ out_locked: | |||
464 | } | 464 | } |
465 | if (drm_mm_node_allocated(&hole)) | 465 | if (drm_mm_node_allocated(&hole)) |
466 | drm_mm_remove_node(&hole); | 466 | drm_mm_remove_node(&hole); |
467 | intel_runtime_pm_put(i915); | 467 | intel_runtime_pm_put_unchecked(i915); |
468 | mutex_unlock(&i915->drm.struct_mutex); | 468 | mutex_unlock(&i915->drm.struct_mutex); |
469 | 469 | ||
470 | return err; | 470 | return err; |
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index a9ed0ecc94e2..87cb0602a5fc 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | |||
@@ -295,7 +295,7 @@ static int lowlevel_hole(struct drm_i915_private *i915, | |||
295 | 295 | ||
296 | intel_runtime_pm_get(i915); | 296 | intel_runtime_pm_get(i915); |
297 | vm->insert_entries(vm, &mock_vma, I915_CACHE_NONE, 0); | 297 | vm->insert_entries(vm, &mock_vma, I915_CACHE_NONE, 0); |
298 | intel_runtime_pm_put(i915); | 298 | intel_runtime_pm_put_unchecked(i915); |
299 | } | 299 | } |
300 | count = n; | 300 | count = n; |
301 | 301 | ||
@@ -1216,7 +1216,7 @@ static int igt_ggtt_page(void *arg) | |||
1216 | kfree(order); | 1216 | kfree(order); |
1217 | out_remove: | 1217 | out_remove: |
1218 | ggtt->vm.clear_range(&ggtt->vm, tmp.start, tmp.size); | 1218 | ggtt->vm.clear_range(&ggtt->vm, tmp.start, tmp.size); |
1219 | intel_runtime_pm_put(i915); | 1219 | intel_runtime_pm_put_unchecked(i915); |
1220 | drm_mm_remove_node(&tmp); | 1220 | drm_mm_remove_node(&tmp); |
1221 | out_unpin: | 1221 | out_unpin: |
1222 | i915_gem_object_unpin_pages(obj); | 1222 | i915_gem_object_unpin_pages(obj); |
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c index be7ecb66ad11..b03890c590d7 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c | |||
@@ -444,7 +444,7 @@ next_tiling: ; | |||
444 | } | 444 | } |
445 | 445 | ||
446 | out_unlock: | 446 | out_unlock: |
447 | intel_runtime_pm_put(i915); | 447 | intel_runtime_pm_put_unchecked(i915); |
448 | mutex_unlock(&i915->drm.struct_mutex); | 448 | mutex_unlock(&i915->drm.struct_mutex); |
449 | i915_gem_object_unpin_pages(obj); | 449 | i915_gem_object_unpin_pages(obj); |
450 | out: | 450 | out: |
@@ -508,7 +508,7 @@ static void disable_retire_worker(struct drm_i915_private *i915) | |||
508 | if (!i915->gt.active_requests++) { | 508 | if (!i915->gt.active_requests++) { |
509 | intel_runtime_pm_get(i915); | 509 | intel_runtime_pm_get(i915); |
510 | i915_gem_unpark(i915); | 510 | i915_gem_unpark(i915); |
511 | intel_runtime_pm_put(i915); | 511 | intel_runtime_pm_put_unchecked(i915); |
512 | } | 512 | } |
513 | mutex_unlock(&i915->drm.struct_mutex); | 513 | mutex_unlock(&i915->drm.struct_mutex); |
514 | cancel_delayed_work_sync(&i915->gt.retire_work); | 514 | cancel_delayed_work_sync(&i915->gt.retire_work); |
@@ -590,7 +590,7 @@ static int igt_mmap_offset_exhaustion(void *arg) | |||
590 | mutex_lock(&i915->drm.struct_mutex); | 590 | mutex_lock(&i915->drm.struct_mutex); |
591 | intel_runtime_pm_get(i915); | 591 | intel_runtime_pm_get(i915); |
592 | err = make_obj_busy(obj); | 592 | err = make_obj_busy(obj); |
593 | intel_runtime_pm_put(i915); | 593 | intel_runtime_pm_put_unchecked(i915); |
594 | mutex_unlock(&i915->drm.struct_mutex); | 594 | mutex_unlock(&i915->drm.struct_mutex); |
595 | if (err) { | 595 | if (err) { |
596 | pr_err("[loop %d] Failed to busy the object\n", loop); | 596 | pr_err("[loop %d] Failed to busy the object\n", loop); |
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c index 07e557815308..e8880cabd5c7 100644 --- a/drivers/gpu/drm/i915/selftests/i915_request.c +++ b/drivers/gpu/drm/i915/selftests/i915_request.c | |||
@@ -403,7 +403,7 @@ static int live_nop_request(void *arg) | |||
403 | } | 403 | } |
404 | 404 | ||
405 | out_unlock: | 405 | out_unlock: |
406 | intel_runtime_pm_put(i915); | 406 | intel_runtime_pm_put_unchecked(i915); |
407 | mutex_unlock(&i915->drm.struct_mutex); | 407 | mutex_unlock(&i915->drm.struct_mutex); |
408 | return err; | 408 | return err; |
409 | } | 409 | } |
@@ -553,7 +553,7 @@ out_batch: | |||
553 | i915_vma_unpin(batch); | 553 | i915_vma_unpin(batch); |
554 | i915_vma_put(batch); | 554 | i915_vma_put(batch); |
555 | out_unlock: | 555 | out_unlock: |
556 | intel_runtime_pm_put(i915); | 556 | intel_runtime_pm_put_unchecked(i915); |
557 | mutex_unlock(&i915->drm.struct_mutex); | 557 | mutex_unlock(&i915->drm.struct_mutex); |
558 | return err; | 558 | return err; |
559 | } | 559 | } |
@@ -731,7 +731,7 @@ out_request: | |||
731 | i915_vma_unpin(batch); | 731 | i915_vma_unpin(batch); |
732 | i915_vma_put(batch); | 732 | i915_vma_put(batch); |
733 | out_unlock: | 733 | out_unlock: |
734 | intel_runtime_pm_put(i915); | 734 | intel_runtime_pm_put_unchecked(i915); |
735 | mutex_unlock(&i915->drm.struct_mutex); | 735 | mutex_unlock(&i915->drm.struct_mutex); |
736 | return err; | 736 | return err; |
737 | } | 737 | } |
@@ -860,7 +860,7 @@ out_request: | |||
860 | i915_request_put(request[id]); | 860 | i915_request_put(request[id]); |
861 | } | 861 | } |
862 | out_unlock: | 862 | out_unlock: |
863 | intel_runtime_pm_put(i915); | 863 | intel_runtime_pm_put_unchecked(i915); |
864 | mutex_unlock(&i915->drm.struct_mutex); | 864 | mutex_unlock(&i915->drm.struct_mutex); |
865 | return err; | 865 | return err; |
866 | } | 866 | } |
diff --git a/drivers/gpu/drm/i915/selftests/intel_guc.c b/drivers/gpu/drm/i915/selftests/intel_guc.c index 32cba4cae31a..3590ba3d8897 100644 --- a/drivers/gpu/drm/i915/selftests/intel_guc.c +++ b/drivers/gpu/drm/i915/selftests/intel_guc.c | |||
@@ -225,7 +225,7 @@ out: | |||
225 | guc_clients_create(guc); | 225 | guc_clients_create(guc); |
226 | guc_clients_enable(guc); | 226 | guc_clients_enable(guc); |
227 | unlock: | 227 | unlock: |
228 | intel_runtime_pm_put(dev_priv); | 228 | intel_runtime_pm_put_unchecked(dev_priv); |
229 | mutex_unlock(&dev_priv->drm.struct_mutex); | 229 | mutex_unlock(&dev_priv->drm.struct_mutex); |
230 | return err; | 230 | return err; |
231 | } | 231 | } |
@@ -337,7 +337,7 @@ out: | |||
337 | guc_client_free(clients[i]); | 337 | guc_client_free(clients[i]); |
338 | } | 338 | } |
339 | unlock: | 339 | unlock: |
340 | intel_runtime_pm_put(dev_priv); | 340 | intel_runtime_pm_put_unchecked(dev_priv); |
341 | mutex_unlock(&dev_priv->drm.struct_mutex); | 341 | mutex_unlock(&dev_priv->drm.struct_mutex); |
342 | return err; | 342 | return err; |
343 | } | 343 | } |
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c index 797cf5e6d6d4..58cba8188bd2 100644 --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c | |||
@@ -402,7 +402,7 @@ static int igt_wedged_reset(void *arg) | |||
402 | i915_reset(i915, ALL_ENGINES, NULL); | 402 | i915_reset(i915, ALL_ENGINES, NULL); |
403 | GEM_BUG_ON(test_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags)); | 403 | GEM_BUG_ON(test_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags)); |
404 | 404 | ||
405 | intel_runtime_pm_put(i915); | 405 | intel_runtime_pm_put_unchecked(i915); |
406 | mutex_unlock(&i915->drm.struct_mutex); | 406 | mutex_unlock(&i915->drm.struct_mutex); |
407 | igt_global_reset_unlock(i915); | 407 | igt_global_reset_unlock(i915); |
408 | 408 | ||
@@ -1636,7 +1636,7 @@ out: | |||
1636 | force_reset(i915); | 1636 | force_reset(i915); |
1637 | 1637 | ||
1638 | unlock: | 1638 | unlock: |
1639 | intel_runtime_pm_put(i915); | 1639 | intel_runtime_pm_put_unchecked(i915); |
1640 | mutex_unlock(&i915->drm.struct_mutex); | 1640 | mutex_unlock(&i915->drm.struct_mutex); |
1641 | igt_global_reset_unlock(i915); | 1641 | igt_global_reset_unlock(i915); |
1642 | 1642 | ||
@@ -1679,7 +1679,7 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915) | |||
1679 | mutex_unlock(&i915->drm.struct_mutex); | 1679 | mutex_unlock(&i915->drm.struct_mutex); |
1680 | 1680 | ||
1681 | i915_modparams.enable_hangcheck = saved_hangcheck; | 1681 | i915_modparams.enable_hangcheck = saved_hangcheck; |
1682 | intel_runtime_pm_put(i915); | 1682 | intel_runtime_pm_put_unchecked(i915); |
1683 | 1683 | ||
1684 | return err; | 1684 | return err; |
1685 | } | 1685 | } |
diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c index 00caaa00f02f..ac1b18a17f3c 100644 --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c | |||
@@ -65,7 +65,7 @@ err_spin: | |||
65 | igt_spinner_fini(&spin); | 65 | igt_spinner_fini(&spin); |
66 | err_unlock: | 66 | err_unlock: |
67 | igt_flush_test(i915, I915_WAIT_LOCKED); | 67 | igt_flush_test(i915, I915_WAIT_LOCKED); |
68 | intel_runtime_pm_put(i915); | 68 | intel_runtime_pm_put_unchecked(i915); |
69 | mutex_unlock(&i915->drm.struct_mutex); | 69 | mutex_unlock(&i915->drm.struct_mutex); |
70 | return err; | 70 | return err; |
71 | } | 71 | } |
@@ -158,7 +158,7 @@ err_spin_hi: | |||
158 | igt_spinner_fini(&spin_hi); | 158 | igt_spinner_fini(&spin_hi); |
159 | err_unlock: | 159 | err_unlock: |
160 | igt_flush_test(i915, I915_WAIT_LOCKED); | 160 | igt_flush_test(i915, I915_WAIT_LOCKED); |
161 | intel_runtime_pm_put(i915); | 161 | intel_runtime_pm_put_unchecked(i915); |
162 | mutex_unlock(&i915->drm.struct_mutex); | 162 | mutex_unlock(&i915->drm.struct_mutex); |
163 | return err; | 163 | return err; |
164 | } | 164 | } |
@@ -251,7 +251,7 @@ err_spin_hi: | |||
251 | igt_spinner_fini(&spin_hi); | 251 | igt_spinner_fini(&spin_hi); |
252 | err_unlock: | 252 | err_unlock: |
253 | igt_flush_test(i915, I915_WAIT_LOCKED); | 253 | igt_flush_test(i915, I915_WAIT_LOCKED); |
254 | intel_runtime_pm_put(i915); | 254 | intel_runtime_pm_put_unchecked(i915); |
255 | mutex_unlock(&i915->drm.struct_mutex); | 255 | mutex_unlock(&i915->drm.struct_mutex); |
256 | return err; | 256 | return err; |
257 | 257 | ||
@@ -374,7 +374,7 @@ err_spin_hi: | |||
374 | igt_spinner_fini(&spin_hi); | 374 | igt_spinner_fini(&spin_hi); |
375 | err_unlock: | 375 | err_unlock: |
376 | igt_flush_test(i915, I915_WAIT_LOCKED); | 376 | igt_flush_test(i915, I915_WAIT_LOCKED); |
377 | intel_runtime_pm_put(i915); | 377 | intel_runtime_pm_put_unchecked(i915); |
378 | mutex_unlock(&i915->drm.struct_mutex); | 378 | mutex_unlock(&i915->drm.struct_mutex); |
379 | return err; | 379 | return err; |
380 | } | 380 | } |
@@ -627,7 +627,7 @@ err_ctx: | |||
627 | err_batch: | 627 | err_batch: |
628 | i915_gem_object_put(smoke.batch); | 628 | i915_gem_object_put(smoke.batch); |
629 | err_unlock: | 629 | err_unlock: |
630 | intel_runtime_pm_put(smoke.i915); | 630 | intel_runtime_pm_put_unchecked(smoke.i915); |
631 | mutex_unlock(&smoke.i915->drm.struct_mutex); | 631 | mutex_unlock(&smoke.i915->drm.struct_mutex); |
632 | kfree(smoke.contexts); | 632 | kfree(smoke.contexts); |
633 | 633 | ||
diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c index 8b3f3200a3bd..b1b39c70c702 100644 --- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c +++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c | |||
@@ -94,7 +94,7 @@ read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine) | |||
94 | 94 | ||
95 | intel_runtime_pm_get(engine->i915); | 95 | intel_runtime_pm_get(engine->i915); |
96 | rq = i915_request_alloc(engine, ctx); | 96 | rq = i915_request_alloc(engine, ctx); |
97 | intel_runtime_pm_put(engine->i915); | 97 | intel_runtime_pm_put_unchecked(engine->i915); |
98 | if (IS_ERR(rq)) { | 98 | if (IS_ERR(rq)) { |
99 | err = PTR_ERR(rq); | 99 | err = PTR_ERR(rq); |
100 | goto err_pin; | 100 | goto err_pin; |
@@ -241,7 +241,7 @@ switch_to_scratch_context(struct intel_engine_cs *engine, | |||
241 | else | 241 | else |
242 | rq = i915_request_alloc(engine, ctx); | 242 | rq = i915_request_alloc(engine, ctx); |
243 | 243 | ||
244 | intel_runtime_pm_put(engine->i915); | 244 | intel_runtime_pm_put_unchecked(engine->i915); |
245 | 245 | ||
246 | kernel_context_close(ctx); | 246 | kernel_context_close(ctx); |
247 | 247 | ||
@@ -300,7 +300,7 @@ static int check_whitelist_across_reset(struct intel_engine_cs *engine, | |||
300 | 300 | ||
301 | intel_runtime_pm_get(i915); | 301 | intel_runtime_pm_get(i915); |
302 | err = reset(engine); | 302 | err = reset(engine); |
303 | intel_runtime_pm_put(i915); | 303 | intel_runtime_pm_put_unchecked(i915); |
304 | 304 | ||
305 | if (want_spin) { | 305 | if (want_spin) { |
306 | igt_spinner_end(&spin); | 306 | igt_spinner_end(&spin); |
@@ -414,7 +414,7 @@ live_gpu_reset_gt_engine_workarounds(void *arg) | |||
414 | 414 | ||
415 | out: | 415 | out: |
416 | reference_lists_fini(i915, &lists); | 416 | reference_lists_fini(i915, &lists); |
417 | intel_runtime_pm_put(i915); | 417 | intel_runtime_pm_put_unchecked(i915); |
418 | igt_global_reset_unlock(i915); | 418 | igt_global_reset_unlock(i915); |
419 | 419 | ||
420 | return ok ? 0 : -ESRCH; | 420 | return ok ? 0 : -ESRCH; |
@@ -496,7 +496,7 @@ live_engine_reset_gt_engine_workarounds(void *arg) | |||
496 | 496 | ||
497 | err: | 497 | err: |
498 | reference_lists_fini(i915, &lists); | 498 | reference_lists_fini(i915, &lists); |
499 | intel_runtime_pm_put(i915); | 499 | intel_runtime_pm_put_unchecked(i915); |
500 | igt_global_reset_unlock(i915); | 500 | igt_global_reset_unlock(i915); |
501 | kernel_context_close(ctx); | 501 | kernel_context_close(ctx); |
502 | 502 | ||