diff options
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 12 |
2 files changed, 0 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 107e2d7c9fba..96c80fa0fcac 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -2985,9 +2985,6 @@ enum i915_power_well_id { | |||
| 2985 | #define ILK_DPFC_CHICKEN _MMIO(0x43224) | 2985 | #define ILK_DPFC_CHICKEN _MMIO(0x43224) |
| 2986 | #define ILK_DPFC_DISABLE_DUMMY0 (1<<8) | 2986 | #define ILK_DPFC_DISABLE_DUMMY0 (1<<8) |
| 2987 | #define ILK_DPFC_NUKE_ON_ANY_MODIFICATION (1<<23) | 2987 | #define ILK_DPFC_NUKE_ON_ANY_MODIFICATION (1<<23) |
| 2988 | #define GLK_SKIP_SEG_EN (1<<12) | ||
| 2989 | #define GLK_SKIP_SEG_COUNT_MASK (3<<10) | ||
| 2990 | #define GLK_SKIP_SEG_COUNT(x) ((x)<<10) | ||
| 2991 | #define ILK_FBC_RT_BASE _MMIO(0x2128) | 2988 | #define ILK_FBC_RT_BASE _MMIO(0x2128) |
| 2992 | #define ILK_FBC_RT_VALID (1<<0) | 2989 | #define ILK_FBC_RT_VALID (1<<0) |
| 2993 | #define SNB_FBC_FRONT_BUFFER (1<<1) | 2990 | #define SNB_FBC_FRONT_BUFFER (1<<1) |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 3c55e4026331..4d2cd432f739 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
| @@ -121,7 +121,6 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv) | |||
| 121 | 121 | ||
| 122 | static void glk_init_clock_gating(struct drm_i915_private *dev_priv) | 122 | static void glk_init_clock_gating(struct drm_i915_private *dev_priv) |
| 123 | { | 123 | { |
| 124 | u32 val; | ||
| 125 | gen9_init_clock_gating(dev_priv); | 124 | gen9_init_clock_gating(dev_priv); |
| 126 | 125 | ||
| 127 | /* | 126 | /* |
| @@ -141,11 +140,6 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv) | |||
| 141 | I915_WRITE(CHICKEN_MISC_2, val); | 140 | I915_WRITE(CHICKEN_MISC_2, val); |
| 142 | } | 141 | } |
| 143 | 142 | ||
| 144 | /* Display WA #1133: WaFbcSkipSegments:glk */ | ||
| 145 | val = I915_READ(ILK_DPFC_CHICKEN); | ||
| 146 | val &= ~GLK_SKIP_SEG_COUNT_MASK; | ||
| 147 | val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1); | ||
| 148 | I915_WRITE(ILK_DPFC_CHICKEN, val); | ||
| 149 | } | 143 | } |
| 150 | 144 | ||
| 151 | static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv) | 145 | static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv) |
| @@ -8503,12 +8497,6 @@ static void cnl_init_clock_gating(struct drm_i915_private *dev_priv) | |||
| 8503 | if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0)) | 8497 | if (IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_B0)) |
| 8504 | val |= SARBUNIT_CLKGATE_DIS; | 8498 | val |= SARBUNIT_CLKGATE_DIS; |
| 8505 | I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val); | 8499 | I915_WRITE(SLICE_UNIT_LEVEL_CLKGATE, val); |
| 8506 | |||
| 8507 | /* Display WA #1133: WaFbcSkipSegments:cnl */ | ||
| 8508 | val = I915_READ(ILK_DPFC_CHICKEN); | ||
| 8509 | val &= ~GLK_SKIP_SEG_COUNT_MASK; | ||
| 8510 | val |= GLK_SKIP_SEG_EN | GLK_SKIP_SEG_COUNT(1); | ||
| 8511 | I915_WRITE(ILK_DPFC_CHICKEN, val); | ||
| 8512 | } | 8500 | } |
| 8513 | 8501 | ||
| 8514 | static void cfl_init_clock_gating(struct drm_i915_private *dev_priv) | 8502 | static void cfl_init_clock_gating(struct drm_i915_private *dev_priv) |
