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-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c4
-rw-r--r--drivers/gpu/drm/amd/include/cgs_common.h1
2 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index e525de2ecb2d..9b589402b58d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -240,6 +240,8 @@ static uint32_t amdgpu_cgs_read_ind_register(struct cgs_device *cgs_device,
240 return RREG32_DIDT(index); 240 return RREG32_DIDT(index);
241 case CGS_IND_REG_GC_CAC: 241 case CGS_IND_REG_GC_CAC:
242 return RREG32_GC_CAC(index); 242 return RREG32_GC_CAC(index);
243 case CGS_IND_REG_SE_CAC:
244 return RREG32_SE_CAC(index);
243 case CGS_IND_REG__AUDIO_ENDPT: 245 case CGS_IND_REG__AUDIO_ENDPT:
244 DRM_ERROR("audio endpt register access not implemented.\n"); 246 DRM_ERROR("audio endpt register access not implemented.\n");
245 return 0; 247 return 0;
@@ -266,6 +268,8 @@ static void amdgpu_cgs_write_ind_register(struct cgs_device *cgs_device,
266 return WREG32_DIDT(index, value); 268 return WREG32_DIDT(index, value);
267 case CGS_IND_REG_GC_CAC: 269 case CGS_IND_REG_GC_CAC:
268 return WREG32_GC_CAC(index, value); 270 return WREG32_GC_CAC(index, value);
271 case CGS_IND_REG_SE_CAC:
272 return WREG32_SE_CAC(index, value);
269 case CGS_IND_REG__AUDIO_ENDPT: 273 case CGS_IND_REG__AUDIO_ENDPT:
270 DRM_ERROR("audio endpt register access not implemented.\n"); 274 DRM_ERROR("audio endpt register access not implemented.\n");
271 return; 275 return;
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h
index 0a94f749e3c0..b46d12df8df0 100644
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -50,6 +50,7 @@ enum cgs_ind_reg {
50 CGS_IND_REG__UVD_CTX, 50 CGS_IND_REG__UVD_CTX,
51 CGS_IND_REG__DIDT, 51 CGS_IND_REG__DIDT,
52 CGS_IND_REG_GC_CAC, 52 CGS_IND_REG_GC_CAC,
53 CGS_IND_REG_SE_CAC,
53 CGS_IND_REG__AUDIO_ENDPT 54 CGS_IND_REG__AUDIO_ENDPT
54}; 55};
55 56