6 files changed, 23 insertions, 0 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 1950c25557de..e6b1bf3dc292 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -696,6 +696,9 @@ static uint32_t fw_type_convert(struct cgs_device *cgs_device, uint32_t fw_type)
         case CGS_UCODE_ID_RLC_G:
                 result = AMDGPU_UCODE_ID_RLC_G;
                 break;
+        case CGS_UCODE_ID_STORAGE:
+                result = AMDGPU_UCODE_ID_STORAGE;
+                break;
         default:
                 DRM_ERROR("Firmware type not supported\n");
         }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index b7b82a270420..5d3f6ca742a4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -228,6 +228,9 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_firmware_info *ucode,
         ucode->mc_addr = mc_addr;
         ucode->kaddr = kptr;
 
+        if (ucode->ucode_id == AMDGPU_UCODE_ID_STORAGE)
+                return 0;
+
         header = (const struct common_firmware_header *)ucode->fw->data;
         memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data +
                 le32_to_cpu(header->ucode_array_offset_bytes)),
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
index e468be4e28fa..a8a4230729f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
@@ -130,6 +130,7 @@ enum AMDGPU_UCODE_ID {
         AMDGPU_UCODE_ID_CP_MEC1,
         AMDGPU_UCODE_ID_CP_MEC2,
         AMDGPU_UCODE_ID_RLC_G,
+        AMDGPU_UCODE_ID_STORAGE,
         AMDGPU_UCODE_ID_MAXIMUM,
 };
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index bd4d041717bf..45d194a58c57 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1058,6 +1058,14 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
                 adev->firmware.fw_size +=
                         ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);
 
+                if (amdgpu_sriov_vf(adev)) {
+                        info = &adev->firmware.ucode[AMDGPU_UCODE_ID_STORAGE];
+                        info->ucode_id = AMDGPU_UCODE_ID_STORAGE;
+                        info->fw = adev->gfx.mec_fw;
+                        adev->firmware.fw_size +=
+                                ALIGN(le32_to_cpu(64 * PAGE_SIZE), PAGE_SIZE);
+                }
+
                 if (adev->gfx.mec2_fw) {
                         info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2];
                         info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2;
diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h
index 9695c2ebd92a..e4a1697ec1d3 100755
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -106,6 +106,7 @@ enum cgs_ucode_id {
         CGS_UCODE_ID_CP_MEC_JT2,
         CGS_UCODE_ID_GMCON_RENG,
         CGS_UCODE_ID_RLC_G,
+        CGS_UCODE_ID_STORAGE,
         CGS_UCODE_ID_MAXIMUM,
 };
 
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
index 6af744f42ec9..6df0d6edfdd1 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
@@ -278,6 +278,9 @@ enum cgs_ucode_id smu7_convert_fw_type_to_cgs(uint32_t fw_type)
         case UCODE_ID_RLC_G:
                 result = CGS_UCODE_ID_RLC_G;
                 break;
+        case UCODE_ID_MEC_STORAGE:
+                result = CGS_UCODE_ID_STORAGE;
+                break;
         default:
                 break;
         }
@@ -452,6 +455,10 @@ int smu7_request_smu_load_fw(struct pp_smumgr *smumgr)
         PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(smumgr,
                                 UCODE_ID_SDMA1, &toc->entry[toc->num_entries++]),
                                 "Failed to Get Firmware Entry.", return -EINVAL);
+        if (cgs_is_virtualization_enabled(smumgr->device))
+                PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(smumgr,
+                                UCODE_ID_MEC_STORAGE, &toc->entry[toc->num_entries++]),
+                                "Failed to Get Firmware Entry.", return -EINVAL);
 
         smu7_send_msg_to_smc_with_parameter(smumgr, PPSMC_MSG_DRV_DRAM_ADDR_HI, smu_data->header_buffer.mc_addr_high);
         smu7_send_msg_to_smc_with_parameter(smumgr, PPSMC_MSG_DRV_DRAM_ADDR_LO, smu_data->header_buffer.mc_addr_low);