1 files changed, 20 insertions, 7 deletions

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f904bf73dbd6..3c55e4026331 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1406,17 +1406,29 @@ static int g4x_compute_pipe_wm(struct intel_crtc_state *crtc_state)
 
 static int g4x_compute_intermediate_wm(struct drm_device *dev,
                                        struct intel_crtc *crtc,
-                                       struct intel_crtc_state *crtc_state)
+                                       struct intel_crtc_state *new_crtc_state)
 {
-        struct g4x_wm_state *intermediate = &crtc_state->wm.g4x.intermediate;
-        const struct g4x_wm_state *optimal = &crtc_state->wm.g4x.optimal;
-        const struct g4x_wm_state *active = &crtc->wm.active.g4x;
+        struct g4x_wm_state *intermediate = &new_crtc_state->wm.g4x.intermediate;
+        const struct g4x_wm_state *optimal = &new_crtc_state->wm.g4x.optimal;
+        struct intel_atomic_state *intel_state =
+                to_intel_atomic_state(new_crtc_state->base.state);
+        const struct intel_crtc_state *old_crtc_state =
+                intel_atomic_get_old_crtc_state(intel_state, crtc);
+        const struct g4x_wm_state *active = &old_crtc_state->wm.g4x.optimal;
         enum plane_id plane_id;
 
+        if (!new_crtc_state->base.active || drm_atomic_crtc_needs_modeset(&new_crtc_state->base)) {
+                *intermediate = *optimal;
+
+                intermediate->cxsr = false;
+                intermediate->hpll_en = false;
+                goto out;
+        }
+
         intermediate->cxsr = optimal->cxsr && active->cxsr &&
-                !crtc_state->disable_cxsr;
+                !new_crtc_state->disable_cxsr;
         intermediate->hpll_en = optimal->hpll_en && active->hpll_en &&
-                !crtc_state->disable_cxsr;
+                !new_crtc_state->disable_cxsr;
         intermediate->fbc_en = optimal->fbc_en && active->fbc_en;
 
         for_each_plane_id_on_crtc(crtc, plane_id) {
@@ -1458,12 +1470,13 @@ static int g4x_compute_intermediate_wm(struct drm_device *dev,
         WARN_ON(intermediate->hpll.fbc > g4x_fbc_fifo_size(2) &&
                 intermediate->fbc_en && intermediate->hpll_en);
 
+out:
         /*
          * If our intermediate WM are identical to the final WM, then we can
          * omit the post-vblank programming; only update if it's different.
          */
         if (memcmp(intermediate, optimal, sizeof(*intermediate)) != 0)
-                crtc_state->wm.need_postvbl_update = true;
+                new_crtc_state->wm.need_postvbl_update = true;
 
         return 0;
 }