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path: root/drivers/gpu/drm/vc4/vc4_v3d.c
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Diffstat (limited to 'drivers/gpu/drm/vc4/vc4_v3d.c')
-rw-r--r--drivers/gpu/drm/vc4/vc4_v3d.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c
index 424d515ffcda..314ff71db978 100644
--- a/drivers/gpu/drm/vc4/vc4_v3d.c
+++ b/drivers/gpu/drm/vc4/vc4_v3d.c
@@ -144,19 +144,16 @@ int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused)
144} 144}
145#endif /* CONFIG_DEBUG_FS */ 145#endif /* CONFIG_DEBUG_FS */
146 146
147/*
148 * Asks the firmware to turn on power to the V3D engine.
149 *
150 * This may be doable with just the clocks interface, though this
151 * packet does some other register setup from the firmware, too.
152 */
153int 147int
154vc4_v3d_set_power(struct vc4_dev *vc4, bool on) 148vc4_v3d_set_power(struct vc4_dev *vc4, bool on)
155{ 149{
156 if (on) 150 /* XXX: This interface is needed for GPU reset, and the way to
157 return pm_generic_poweroff(&vc4->v3d->pdev->dev); 151 * do it is to turn our power domain off and back on. We
158 else 152 * can't just reset from within the driver, because the reset
159 return pm_generic_resume(&vc4->v3d->pdev->dev); 153 * bits are in the power domain's register area, and get set
154 * during the poweron process.
155 */
156 return 0;
160} 157}
161 158
162static void vc4_v3d_init_hw(struct drm_device *dev) 159static void vc4_v3d_init_hw(struct drm_device *dev)