1 files changed, 202 insertions, 43 deletions

diff --git a/drivers/gpu/drm/tegra/dpaux.c b/drivers/gpu/drm/tegra/dpaux.c
index b24a0f14821a..059f409556d5 100644
--- a/drivers/gpu/drm/tegra/dpaux.c
+++ b/drivers/gpu/drm/tegra/dpaux.c
@@ -12,6 +12,9 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/of_gpio.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
 #include <linux/platform_device.h>
 #include <linux/reset.h>
 #include <linux/regulator/consumer.h>
@@ -44,6 +47,11 @@ struct tegra_dpaux {
         struct completion complete;
         struct work_struct work;
         struct list_head list;
+
+#ifdef CONFIG_GENERIC_PINCONF
+        struct pinctrl_dev *pinctrl;
+        struct pinctrl_desc desc;
+#endif
 };
 
 static inline struct tegra_dpaux *to_dpaux(struct drm_dp_aux *aux)
@@ -267,6 +275,148 @@ static irqreturn_t tegra_dpaux_irq(int irq, void *data)
         return ret;
 }
 
+enum tegra_dpaux_functions {
+        DPAUX_PADCTL_FUNC_AUX,
+        DPAUX_PADCTL_FUNC_I2C,
+        DPAUX_PADCTL_FUNC_OFF,
+};
+
+static void tegra_dpaux_pad_power_down(struct tegra_dpaux *dpaux)
+{
+        u32 value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
+
+        value |= DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
+
+        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);
+}
+
+static void tegra_dpaux_pad_power_up(struct tegra_dpaux *dpaux)
+{
+        u32 value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
+
+        value &= ~DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
+
+        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);
+}
+
+static int tegra_dpaux_pad_config(struct tegra_dpaux *dpaux, unsigned function)
+{
+        u32 value;
+
+        switch (function) {
+        case DPAUX_PADCTL_FUNC_AUX:
+                value = DPAUX_HYBRID_PADCTL_AUX_CMH(2) |
+                        DPAUX_HYBRID_PADCTL_AUX_DRVZ(4) |
+                        DPAUX_HYBRID_PADCTL_AUX_DRVI(0x18) |
+                        DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV |
+                        DPAUX_HYBRID_PADCTL_MODE_AUX;
+                break;
+
+        case DPAUX_PADCTL_FUNC_I2C:
+                value = DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV |
+                        DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV |
+                        DPAUX_HYBRID_PADCTL_MODE_I2C;
+                break;
+
+        case DPAUX_PADCTL_FUNC_OFF:
+                tegra_dpaux_pad_power_down(dpaux);
+                return 0;
+
+        default:
+                return -ENOTSUPP;
+        }
+
+        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);
+        tegra_dpaux_pad_power_up(dpaux);
+
+        return 0;
+}
+
+#ifdef CONFIG_GENERIC_PINCONF
+static const struct pinctrl_pin_desc tegra_dpaux_pins[] = {
+        PINCTRL_PIN(0, "DP_AUX_CHx_P"),
+        PINCTRL_PIN(1, "DP_AUX_CHx_N"),
+};
+
+static const unsigned tegra_dpaux_pin_numbers[] = { 0, 1 };
+
+static const char * const tegra_dpaux_groups[] = {
+        "dpaux-io",
+};
+
+static const char * const tegra_dpaux_functions[] = {
+        "aux",
+        "i2c",
+        "off",
+};
+
+static int tegra_dpaux_get_groups_count(struct pinctrl_dev *pinctrl)
+{
+        return ARRAY_SIZE(tegra_dpaux_groups);
+}
+
+static const char *tegra_dpaux_get_group_name(struct pinctrl_dev *pinctrl,
+                                              unsigned int group)
+{
+        return tegra_dpaux_groups[group];
+}
+
+static int tegra_dpaux_get_group_pins(struct pinctrl_dev *pinctrl,
+                                      unsigned group, const unsigned **pins,
+                                      unsigned *num_pins)
+{
+        *pins = tegra_dpaux_pin_numbers;
+        *num_pins = ARRAY_SIZE(tegra_dpaux_pin_numbers);
+
+        return 0;
+}
+
+static const struct pinctrl_ops tegra_dpaux_pinctrl_ops = {
+        .get_groups_count = tegra_dpaux_get_groups_count,
+        .get_group_name = tegra_dpaux_get_group_name,
+        .get_group_pins = tegra_dpaux_get_group_pins,
+        .dt_node_to_map = pinconf_generic_dt_node_to_map_group,
+        .dt_free_map = pinconf_generic_dt_free_map,
+};
+
+static int tegra_dpaux_get_functions_count(struct pinctrl_dev *pinctrl)
+{
+        return ARRAY_SIZE(tegra_dpaux_functions);
+}
+
+static const char *tegra_dpaux_get_function_name(struct pinctrl_dev *pinctrl,
+                                                 unsigned int function)
+{
+        return tegra_dpaux_functions[function];
+}
+
+static int tegra_dpaux_get_function_groups(struct pinctrl_dev *pinctrl,
+                                           unsigned int function,
+                                           const char * const **groups,
+                                           unsigned * const num_groups)
+{
+        *num_groups = ARRAY_SIZE(tegra_dpaux_groups);
+        *groups = tegra_dpaux_groups;
+
+        return 0;
+}
+
+static int tegra_dpaux_set_mux(struct pinctrl_dev *pinctrl,
+                               unsigned int function, unsigned int group)
+{
+        struct tegra_dpaux *dpaux = pinctrl_dev_get_drvdata(pinctrl);
+
+        return tegra_dpaux_pad_config(dpaux, function);
+}
+
+static const struct pinmux_ops tegra_dpaux_pinmux_ops = {
+        .get_functions_count = tegra_dpaux_get_functions_count,
+        .get_function_name = tegra_dpaux_get_function_name,
+        .get_function_groups = tegra_dpaux_get_function_groups,
+        .set_mux = tegra_dpaux_set_mux,
+};
+#endif
+
 static int tegra_dpaux_probe(struct platform_device *pdev)
 {
         struct tegra_dpaux *dpaux;
@@ -294,11 +444,14 @@ static int tegra_dpaux_probe(struct platform_device *pdev)
                 return -ENXIO;
         }
 
-        dpaux->rst = devm_reset_control_get(&pdev->dev, "dpaux");
-        if (IS_ERR(dpaux->rst)) {
-                dev_err(&pdev->dev, "failed to get reset control: %ld\n",
-                        PTR_ERR(dpaux->rst));
-                return PTR_ERR(dpaux->rst);
+        if (!pdev->dev.pm_domain) {
+                dpaux->rst = devm_reset_control_get(&pdev->dev, "dpaux");
+                if (IS_ERR(dpaux->rst)) {
+                        dev_err(&pdev->dev,
+                                "failed to get reset control: %ld\n",
+                                PTR_ERR(dpaux->rst));
+                        return PTR_ERR(dpaux->rst);
+                }
         }
 
         dpaux->clk = devm_clk_get(&pdev->dev, NULL);
@@ -315,34 +468,37 @@ static int tegra_dpaux_probe(struct platform_device *pdev)
                 return err;
         }
 
-        reset_control_deassert(dpaux->rst);
+        if (dpaux->rst)
+                reset_control_deassert(dpaux->rst);
 
         dpaux->clk_parent = devm_clk_get(&pdev->dev, "parent");
         if (IS_ERR(dpaux->clk_parent)) {
                 dev_err(&pdev->dev, "failed to get parent clock: %ld\n",
                         PTR_ERR(dpaux->clk_parent));
-                return PTR_ERR(dpaux->clk_parent);
+                err = PTR_ERR(dpaux->clk_parent);
+                goto assert_reset;
         }
 
         err = clk_prepare_enable(dpaux->clk_parent);
         if (err < 0) {
                 dev_err(&pdev->dev, "failed to enable parent clock: %d\n",
                         err);
-                return err;
+                goto assert_reset;
         }
 
         err = clk_set_rate(dpaux->clk_parent, 270000000);
         if (err < 0) {
                 dev_err(&pdev->dev, "failed to set clock to 270 MHz: %d\n",
                         err);
-                return err;
+                goto disable_parent_clk;
         }
 
         dpaux->vdd = devm_regulator_get(&pdev->dev, "vdd");
         if (IS_ERR(dpaux->vdd)) {
                 dev_err(&pdev->dev, "failed to get VDD supply: %ld\n",
                         PTR_ERR(dpaux->vdd));
-                return PTR_ERR(dpaux->vdd);
+                err = PTR_ERR(dpaux->vdd);
+                goto disable_parent_clk;
         }
 
         err = devm_request_irq(dpaux->dev, dpaux->irq, tegra_dpaux_irq, 0,
@@ -350,7 +506,7 @@ static int tegra_dpaux_probe(struct platform_device *pdev)
         if (err < 0) {
                 dev_err(dpaux->dev, "failed to request IRQ#%u: %d\n",
                         dpaux->irq, err);
-                return err;
+                goto disable_parent_clk;
         }
 
         disable_irq(dpaux->irq);
@@ -360,7 +516,7 @@ static int tegra_dpaux_probe(struct platform_device *pdev)
 
         err = drm_dp_aux_register(&dpaux->aux);
         if (err < 0)
-                return err;
+                goto disable_parent_clk;
 
         /*
          * Assume that by default the DPAUX/I2C pads will be used for HDMI,
@@ -370,16 +526,24 @@ static int tegra_dpaux_probe(struct platform_device *pdev)
          * is no possibility to perform the I2C mode configuration in the
          * HDMI path.
          */
-        value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
-        value &= ~DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
-        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);
-
-        value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_PADCTL);
-        value = DPAUX_HYBRID_PADCTL_I2C_SDA_INPUT_RCV |
-                DPAUX_HYBRID_PADCTL_I2C_SCL_INPUT_RCV |
-                DPAUX_HYBRID_PADCTL_MODE_I2C;
-        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);
+        err = tegra_dpaux_pad_config(dpaux, DPAUX_HYBRID_PADCTL_MODE_I2C);
+        if (err < 0)
+                return err;
 
+#ifdef CONFIG_GENERIC_PINCONF
+        dpaux->desc.name = dev_name(&pdev->dev);
+        dpaux->desc.pins = tegra_dpaux_pins;
+        dpaux->desc.npins = ARRAY_SIZE(tegra_dpaux_pins);
+        dpaux->desc.pctlops = &tegra_dpaux_pinctrl_ops;
+        dpaux->desc.pmxops = &tegra_dpaux_pinmux_ops;
+        dpaux->desc.owner = THIS_MODULE;
+
+        dpaux->pinctrl = devm_pinctrl_register(&pdev->dev, &dpaux->desc, dpaux);
+        if (!dpaux->pinctrl) {
+                dev_err(&pdev->dev, "failed to register pincontrol\n");
+                return -ENODEV;
+        }
+#endif
         /* enable and clear all interrupts */
         value = DPAUX_INTR_AUX_DONE | DPAUX_INTR_IRQ_EVENT |
                 DPAUX_INTR_UNPLUG_EVENT | DPAUX_INTR_PLUG_EVENT;
@@ -393,17 +557,24 @@ static int tegra_dpaux_probe(struct platform_device *pdev)
         platform_set_drvdata(pdev, dpaux);
 
         return 0;
+
+disable_parent_clk:
+        clk_disable_unprepare(dpaux->clk_parent);
+assert_reset:
+        if (dpaux->rst)
+                reset_control_assert(dpaux->rst);
+
+        clk_disable_unprepare(dpaux->clk);
+
+        return err;
 }
 
 static int tegra_dpaux_remove(struct platform_device *pdev)
 {
         struct tegra_dpaux *dpaux = platform_get_drvdata(pdev);
-        u32 value;
 
         /* make sure pads are powered down when not in use */
-        value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
-        value |= DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
-        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);
+        tegra_dpaux_pad_power_down(dpaux);
 
         drm_dp_aux_unregister(&dpaux->aux);
 
@@ -414,7 +585,10 @@ static int tegra_dpaux_remove(struct platform_device *pdev)
         cancel_work_sync(&dpaux->work);
 
         clk_disable_unprepare(dpaux->clk_parent);
-        reset_control_assert(dpaux->rst);
+
+        if (dpaux->rst)
+                reset_control_assert(dpaux->rst);
+
         clk_disable_unprepare(dpaux->clk);
 
         return 0;
@@ -528,30 +702,15 @@ enum drm_connector_status drm_dp_aux_detect(struct drm_dp_aux *aux)
 int drm_dp_aux_enable(struct drm_dp_aux *aux)
 {
         struct tegra_dpaux *dpaux = to_dpaux(aux);
-        u32 value;
-
-        value = DPAUX_HYBRID_PADCTL_AUX_CMH(2) |
-                DPAUX_HYBRID_PADCTL_AUX_DRVZ(4) |
-                DPAUX_HYBRID_PADCTL_AUX_DRVI(0x18) |
-                DPAUX_HYBRID_PADCTL_AUX_INPUT_RCV |
-                DPAUX_HYBRID_PADCTL_MODE_AUX;
-        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_PADCTL);
-
-        value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
-        value &= ~DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
-        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);
 
-        return 0;
+        return tegra_dpaux_pad_config(dpaux, DPAUX_PADCTL_FUNC_AUX);
 }
 
 int drm_dp_aux_disable(struct drm_dp_aux *aux)
 {
         struct tegra_dpaux *dpaux = to_dpaux(aux);
-        u32 value;
 
-        value = tegra_dpaux_readl(dpaux, DPAUX_HYBRID_SPARE);
-        value |= DPAUX_HYBRID_SPARE_PAD_POWER_DOWN;
-        tegra_dpaux_writel(dpaux, value, DPAUX_HYBRID_SPARE);
+        tegra_dpaux_pad_power_down(dpaux);
 
         return 0;
 }