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path: root/drivers/gpu/drm/radeon/radeon_drv.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_drv.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c22
1 files changed, 17 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index cb1421369e3a..8df888908833 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -82,9 +82,11 @@
82 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 82 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
83 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 83 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
84 * 2.39.0 - Add INFO query for number of active CUs 84 * 2.39.0 - Add INFO query for number of active CUs
85 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
86 * CS to GPU
85 */ 87 */
86#define KMS_DRIVER_MAJOR 2 88#define KMS_DRIVER_MAJOR 2
87#define KMS_DRIVER_MINOR 39 89#define KMS_DRIVER_MINOR 40
88#define KMS_DRIVER_PATCHLEVEL 0 90#define KMS_DRIVER_PATCHLEVEL 0
89int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 91int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
90int radeon_driver_unload_kms(struct drm_device *dev); 92int radeon_driver_unload_kms(struct drm_device *dev);
@@ -132,6 +134,7 @@ struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
132 struct sg_table *sg); 134 struct sg_table *sg);
133int radeon_gem_prime_pin(struct drm_gem_object *obj); 135int radeon_gem_prime_pin(struct drm_gem_object *obj);
134void radeon_gem_prime_unpin(struct drm_gem_object *obj); 136void radeon_gem_prime_unpin(struct drm_gem_object *obj);
137struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
135void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 138void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
136void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 139void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
137extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, 140extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
@@ -173,9 +176,11 @@ int radeon_dpm = -1;
173int radeon_aspm = -1; 176int radeon_aspm = -1;
174int radeon_runtime_pm = -1; 177int radeon_runtime_pm = -1;
175int radeon_hard_reset = 0; 178int radeon_hard_reset = 0;
176int radeon_vm_size = 4096; 179int radeon_vm_size = 8;
177int radeon_vm_block_size = 9; 180int radeon_vm_block_size = -1;
178int radeon_deep_color = 0; 181int radeon_deep_color = 0;
182int radeon_use_pflipirq = 2;
183int radeon_bapm = -1;
179 184
180MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 185MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
181module_param_named(no_wb, radeon_no_wb, int, 0444); 186module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -243,15 +248,21 @@ module_param_named(runpm, radeon_runtime_pm, int, 0444);
243MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 248MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
244module_param_named(hard_reset, radeon_hard_reset, int, 0444); 249module_param_named(hard_reset, radeon_hard_reset, int, 0444);
245 250
246MODULE_PARM_DESC(vm_size, "VM address space size in megabytes (default 4GB)"); 251MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
247module_param_named(vm_size, radeon_vm_size, int, 0444); 252module_param_named(vm_size, radeon_vm_size, int, 0444);
248 253
249MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)"); 254MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
250module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); 255module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
251 256
252MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); 257MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
253module_param_named(deep_color, radeon_deep_color, int, 0444); 258module_param_named(deep_color, radeon_deep_color, int, 0444);
254 259
260MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
261module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
262
263MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
264module_param_named(bapm, radeon_bapm, int, 0444);
265
255static struct pci_device_id pciidlist[] = { 266static struct pci_device_id pciidlist[] = {
256 radeon_PCI_IDS 267 radeon_PCI_IDS
257}; 268};
@@ -566,6 +577,7 @@ static struct drm_driver kms_driver = {
566 .gem_prime_import = drm_gem_prime_import, 577 .gem_prime_import = drm_gem_prime_import,
567 .gem_prime_pin = radeon_gem_prime_pin, 578 .gem_prime_pin = radeon_gem_prime_pin,
568 .gem_prime_unpin = radeon_gem_prime_unpin, 579 .gem_prime_unpin = radeon_gem_prime_unpin,
580 .gem_prime_res_obj = radeon_gem_prime_res_obj,
569 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 581 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
570 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 582 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
571 .gem_prime_vmap = radeon_gem_prime_vmap, 583 .gem_prime_vmap = radeon_gem_prime_vmap,