diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_atombios.c')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 57 |
1 files changed, 48 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 2ed88a820935..5e414102c875 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
| @@ -82,18 +82,18 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_gpio(struct drm_device | |||
| 82 | 82 | ||
| 83 | i2c.mask_clk_reg = le16_to_cpu(gpio.usClkMaskRegisterIndex) * 4; | 83 | i2c.mask_clk_reg = le16_to_cpu(gpio.usClkMaskRegisterIndex) * 4; |
| 84 | i2c.mask_data_reg = le16_to_cpu(gpio.usDataMaskRegisterIndex) * 4; | 84 | i2c.mask_data_reg = le16_to_cpu(gpio.usDataMaskRegisterIndex) * 4; |
| 85 | i2c.put_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4; | 85 | i2c.en_clk_reg = le16_to_cpu(gpio.usClkEnRegisterIndex) * 4; |
| 86 | i2c.put_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4; | 86 | i2c.en_data_reg = le16_to_cpu(gpio.usDataEnRegisterIndex) * 4; |
| 87 | i2c.get_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4; | 87 | i2c.y_clk_reg = le16_to_cpu(gpio.usClkY_RegisterIndex) * 4; |
| 88 | i2c.get_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4; | 88 | i2c.y_data_reg = le16_to_cpu(gpio.usDataY_RegisterIndex) * 4; |
| 89 | i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4; | 89 | i2c.a_clk_reg = le16_to_cpu(gpio.usClkA_RegisterIndex) * 4; |
| 90 | i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4; | 90 | i2c.a_data_reg = le16_to_cpu(gpio.usDataA_RegisterIndex) * 4; |
| 91 | i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift); | 91 | i2c.mask_clk_mask = (1 << gpio.ucClkMaskShift); |
| 92 | i2c.mask_data_mask = (1 << gpio.ucDataMaskShift); | 92 | i2c.mask_data_mask = (1 << gpio.ucDataMaskShift); |
| 93 | i2c.put_clk_mask = (1 << gpio.ucClkEnShift); | 93 | i2c.en_clk_mask = (1 << gpio.ucClkEnShift); |
| 94 | i2c.put_data_mask = (1 << gpio.ucDataEnShift); | 94 | i2c.en_data_mask = (1 << gpio.ucDataEnShift); |
| 95 | i2c.get_clk_mask = (1 << gpio.ucClkY_Shift); | 95 | i2c.y_clk_mask = (1 << gpio.ucClkY_Shift); |
| 96 | i2c.get_data_mask = (1 << gpio.ucDataY_Shift); | 96 | i2c.y_data_mask = (1 << gpio.ucDataY_Shift); |
| 97 | i2c.a_clk_mask = (1 << gpio.ucClkA_Shift); | 97 | i2c.a_clk_mask = (1 << gpio.ucClkA_Shift); |
| 98 | i2c.a_data_mask = (1 << gpio.ucDataA_Shift); | 98 | i2c.a_data_mask = (1 << gpio.ucDataA_Shift); |
| 99 | i2c.valid = true; | 99 | i2c.valid = true; |
| @@ -135,6 +135,23 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev, | |||
| 135 | } | 135 | } |
| 136 | } | 136 | } |
| 137 | 137 | ||
| 138 | /* HIS X1300 is DVI+VGA, not DVI+DVI */ | ||
| 139 | if ((dev->pdev->device == 0x7146) && | ||
| 140 | (dev->pdev->subsystem_vendor == 0x17af) && | ||
| 141 | (dev->pdev->subsystem_device == 0x2058)) { | ||
| 142 | if (supported_device == ATOM_DEVICE_DFP1_SUPPORT) | ||
| 143 | return false; | ||
| 144 | } | ||
| 145 | |||
| 146 | /* Gigabyte X1300 is DVI+VGA, not DVI+DVI */ | ||
| 147 | if ((dev->pdev->device == 0x7142) && | ||
| 148 | (dev->pdev->subsystem_vendor == 0x1458) && | ||
| 149 | (dev->pdev->subsystem_device == 0x2134)) { | ||
| 150 | if (supported_device == ATOM_DEVICE_DFP1_SUPPORT) | ||
| 151 | return false; | ||
| 152 | } | ||
| 153 | |||
| 154 | |||
| 138 | /* Funky macbooks */ | 155 | /* Funky macbooks */ |
| 139 | if ((dev->pdev->device == 0x71C5) && | 156 | if ((dev->pdev->device == 0x71C5) && |
| 140 | (dev->pdev->subsystem_vendor == 0x106b) && | 157 | (dev->pdev->subsystem_vendor == 0x106b) && |
| @@ -172,6 +189,15 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev, | |||
| 172 | } | 189 | } |
| 173 | } | 190 | } |
| 174 | 191 | ||
| 192 | /* Acer laptop reports DVI-D as DVI-I */ | ||
| 193 | if ((dev->pdev->device == 0x95c4) && | ||
| 194 | (dev->pdev->subsystem_vendor == 0x1025) && | ||
| 195 | (dev->pdev->subsystem_device == 0x013c)) { | ||
| 196 | if ((*connector_type == DRM_MODE_CONNECTOR_DVII) && | ||
| 197 | (supported_device == ATOM_DEVICE_DFP1_SUPPORT)) | ||
| 198 | *connector_type = DRM_MODE_CONNECTOR_DVID; | ||
| 199 | } | ||
| 200 | |||
| 175 | return true; | 201 | return true; |
| 176 | } | 202 | } |
| 177 | 203 | ||
| @@ -901,7 +927,7 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
| 901 | struct radeon_device *rdev = dev->dev_private; | 927 | struct radeon_device *rdev = dev->dev_private; |
| 902 | struct radeon_mode_info *mode_info = &rdev->mode_info; | 928 | struct radeon_mode_info *mode_info = &rdev->mode_info; |
| 903 | int index = GetIndexIntoMasterTable(DATA, LVDS_Info); | 929 | int index = GetIndexIntoMasterTable(DATA, LVDS_Info); |
| 904 | uint16_t data_offset; | 930 | uint16_t data_offset, misc; |
| 905 | union lvds_info *lvds_info; | 931 | union lvds_info *lvds_info; |
| 906 | uint8_t frev, crev; | 932 | uint8_t frev, crev; |
| 907 | struct radeon_encoder_atom_dig *lvds = NULL; | 933 | struct radeon_encoder_atom_dig *lvds = NULL; |
| @@ -940,6 +966,19 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
| 940 | lvds->panel_pwr_delay = | 966 | lvds->panel_pwr_delay = |
| 941 | le16_to_cpu(lvds_info->info.usOffDelayInMs); | 967 | le16_to_cpu(lvds_info->info.usOffDelayInMs); |
| 942 | lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; | 968 | lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; |
| 969 | |||
| 970 | misc = le16_to_cpu(lvds_info->info.sLCDTiming.susModeMiscInfo.usAccess); | ||
| 971 | if (misc & ATOM_VSYNC_POLARITY) | ||
| 972 | lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; | ||
| 973 | if (misc & ATOM_HSYNC_POLARITY) | ||
| 974 | lvds->native_mode.flags |= DRM_MODE_FLAG_NHSYNC; | ||
| 975 | if (misc & ATOM_COMPOSITESYNC) | ||
| 976 | lvds->native_mode.flags |= DRM_MODE_FLAG_CSYNC; | ||
| 977 | if (misc & ATOM_INTERLACE) | ||
| 978 | lvds->native_mode.flags |= DRM_MODE_FLAG_INTERLACE; | ||
| 979 | if (misc & ATOM_DOUBLE_CLOCK_MODE) | ||
| 980 | lvds->native_mode.flags |= DRM_MODE_FLAG_DBLSCAN; | ||
| 981 | |||
| 943 | /* set crtc values */ | 982 | /* set crtc values */ |
| 944 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); | 983 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); |
| 945 | 984 | ||
