diff options
Diffstat (limited to 'drivers/gpu/drm/omapdrm/omap_irq.c')
-rw-r--r-- | drivers/gpu/drm/omapdrm/omap_irq.c | 32 |
1 files changed, 17 insertions, 15 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_irq.c b/drivers/gpu/drm/omapdrm/omap_irq.c index 976dc0e44482..c85115049f86 100644 --- a/drivers/gpu/drm/omapdrm/omap_irq.c +++ b/drivers/gpu/drm/omapdrm/omap_irq.c | |||
@@ -38,7 +38,7 @@ static void omap_irq_update(struct drm_device *dev) | |||
38 | 38 | ||
39 | DBG("irqmask=%08x", irqmask); | 39 | DBG("irqmask=%08x", irqmask); |
40 | 40 | ||
41 | priv->dispc_ops->write_irqenable(irqmask); | 41 | priv->dispc_ops->write_irqenable(priv->dispc, irqmask); |
42 | } | 42 | } |
43 | 43 | ||
44 | static void omap_irq_wait_handler(struct omap_irq_wait *wait) | 44 | static void omap_irq_wait_handler(struct omap_irq_wait *wait) |
@@ -108,7 +108,8 @@ int omap_irq_enable_vblank(struct drm_crtc *crtc) | |||
108 | DBG("dev=%p, crtc=%u", dev, channel); | 108 | DBG("dev=%p, crtc=%u", dev, channel); |
109 | 109 | ||
110 | spin_lock_irqsave(&priv->wait_lock, flags); | 110 | spin_lock_irqsave(&priv->wait_lock, flags); |
111 | priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(channel); | 111 | priv->irq_mask |= priv->dispc_ops->mgr_get_vsync_irq(priv->dispc, |
112 | channel); | ||
112 | omap_irq_update(dev); | 113 | omap_irq_update(dev); |
113 | spin_unlock_irqrestore(&priv->wait_lock, flags); | 114 | spin_unlock_irqrestore(&priv->wait_lock, flags); |
114 | 115 | ||
@@ -134,7 +135,8 @@ void omap_irq_disable_vblank(struct drm_crtc *crtc) | |||
134 | DBG("dev=%p, crtc=%u", dev, channel); | 135 | DBG("dev=%p, crtc=%u", dev, channel); |
135 | 136 | ||
136 | spin_lock_irqsave(&priv->wait_lock, flags); | 137 | spin_lock_irqsave(&priv->wait_lock, flags); |
137 | priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(channel); | 138 | priv->irq_mask &= ~priv->dispc_ops->mgr_get_vsync_irq(priv->dispc, |
139 | channel); | ||
138 | omap_irq_update(dev); | 140 | omap_irq_update(dev); |
139 | spin_unlock_irqrestore(&priv->wait_lock, flags); | 141 | spin_unlock_irqrestore(&priv->wait_lock, flags); |
140 | } | 142 | } |
@@ -198,9 +200,9 @@ static irqreturn_t omap_irq_handler(int irq, void *arg) | |||
198 | unsigned int id; | 200 | unsigned int id; |
199 | u32 irqstatus; | 201 | u32 irqstatus; |
200 | 202 | ||
201 | irqstatus = priv->dispc_ops->read_irqstatus(); | 203 | irqstatus = priv->dispc_ops->read_irqstatus(priv->dispc); |
202 | priv->dispc_ops->clear_irqstatus(irqstatus); | 204 | priv->dispc_ops->clear_irqstatus(priv->dispc, irqstatus); |
203 | priv->dispc_ops->read_irqstatus(); /* flush posted write */ | 205 | priv->dispc_ops->read_irqstatus(priv->dispc); /* flush posted write */ |
204 | 206 | ||
205 | VERB("irqs: %08x", irqstatus); | 207 | VERB("irqs: %08x", irqstatus); |
206 | 208 | ||
@@ -208,12 +210,12 @@ static irqreturn_t omap_irq_handler(int irq, void *arg) | |||
208 | struct drm_crtc *crtc = priv->crtcs[id]; | 210 | struct drm_crtc *crtc = priv->crtcs[id]; |
209 | enum omap_channel channel = omap_crtc_channel(crtc); | 211 | enum omap_channel channel = omap_crtc_channel(crtc); |
210 | 212 | ||
211 | if (irqstatus & priv->dispc_ops->mgr_get_vsync_irq(channel)) { | 213 | if (irqstatus & priv->dispc_ops->mgr_get_vsync_irq(priv->dispc, channel)) { |
212 | drm_handle_vblank(dev, id); | 214 | drm_handle_vblank(dev, id); |
213 | omap_crtc_vblank_irq(crtc); | 215 | omap_crtc_vblank_irq(crtc); |
214 | } | 216 | } |
215 | 217 | ||
216 | if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(channel)) | 218 | if (irqstatus & priv->dispc_ops->mgr_get_sync_lost_irq(priv->dispc, channel)) |
217 | omap_crtc_error_irq(crtc, irqstatus); | 219 | omap_crtc_error_irq(crtc, irqstatus); |
218 | } | 220 | } |
219 | 221 | ||
@@ -247,7 +249,7 @@ static const u32 omap_underflow_irqs[] = { | |||
247 | int omap_drm_irq_install(struct drm_device *dev) | 249 | int omap_drm_irq_install(struct drm_device *dev) |
248 | { | 250 | { |
249 | struct omap_drm_private *priv = dev->dev_private; | 251 | struct omap_drm_private *priv = dev->dev_private; |
250 | unsigned int num_mgrs = priv->dispc_ops->get_num_mgrs(); | 252 | unsigned int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc); |
251 | unsigned int max_planes; | 253 | unsigned int max_planes; |
252 | unsigned int i; | 254 | unsigned int i; |
253 | int ret; | 255 | int ret; |
@@ -265,13 +267,13 @@ int omap_drm_irq_install(struct drm_device *dev) | |||
265 | } | 267 | } |
266 | 268 | ||
267 | for (i = 0; i < num_mgrs; ++i) | 269 | for (i = 0; i < num_mgrs; ++i) |
268 | priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(i); | 270 | priv->irq_mask |= priv->dispc_ops->mgr_get_sync_lost_irq(priv->dispc, i); |
269 | 271 | ||
270 | priv->dispc_ops->runtime_get(); | 272 | priv->dispc_ops->runtime_get(priv->dispc); |
271 | priv->dispc_ops->clear_irqstatus(0xffffffff); | 273 | priv->dispc_ops->clear_irqstatus(priv->dispc, 0xffffffff); |
272 | priv->dispc_ops->runtime_put(); | 274 | priv->dispc_ops->runtime_put(priv->dispc); |
273 | 275 | ||
274 | ret = priv->dispc_ops->request_irq(omap_irq_handler, dev); | 276 | ret = priv->dispc_ops->request_irq(priv->dispc, omap_irq_handler, dev); |
275 | if (ret < 0) | 277 | if (ret < 0) |
276 | return ret; | 278 | return ret; |
277 | 279 | ||
@@ -289,5 +291,5 @@ void omap_drm_irq_uninstall(struct drm_device *dev) | |||
289 | 291 | ||
290 | dev->irq_enabled = false; | 292 | dev->irq_enabled = false; |
291 | 293 | ||
292 | priv->dispc_ops->free_irq(dev); | 294 | priv->dispc_ops->free_irq(priv->dispc, dev); |
293 | } | 295 | } |