diff options
Diffstat (limited to 'drivers/gpu/drm/omapdrm/omap_crtc.c')
-rw-r--r-- | drivers/gpu/drm/omapdrm/omap_crtc.c | 31 |
1 files changed, 19 insertions, 12 deletions
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c index ffe4f698d291..6c4d40b824e4 100644 --- a/drivers/gpu/drm/omapdrm/omap_crtc.c +++ b/drivers/gpu/drm/omapdrm/omap_crtc.c | |||
@@ -117,10 +117,13 @@ static int omap_crtc_dss_connect(struct omap_drm_private *priv, | |||
117 | enum omap_channel channel, | 117 | enum omap_channel channel, |
118 | struct omap_dss_device *dst) | 118 | struct omap_dss_device *dst) |
119 | { | 119 | { |
120 | const struct dispc_ops *dispc_ops = priv->dispc_ops; | ||
121 | struct dispc_device *dispc = priv->dispc; | ||
122 | |||
120 | if (omap_crtc_output[channel]) | 123 | if (omap_crtc_output[channel]) |
121 | return -EINVAL; | 124 | return -EINVAL; |
122 | 125 | ||
123 | if (!(priv->dispc_ops->mgr_get_supported_outputs(channel) & dst->id)) | 126 | if (!(dispc_ops->mgr_get_supported_outputs(dispc, channel) & dst->id)) |
124 | return -EINVAL; | 127 | return -EINVAL; |
125 | 128 | ||
126 | omap_crtc_output[channel] = dst; | 129 | omap_crtc_output[channel] = dst; |
@@ -157,7 +160,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | |||
157 | return; | 160 | return; |
158 | 161 | ||
159 | if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) { | 162 | if (omap_crtc_output[channel]->output_type == OMAP_DISPLAY_TYPE_HDMI) { |
160 | priv->dispc_ops->mgr_enable(channel, enable); | 163 | priv->dispc_ops->mgr_enable(priv->dispc, channel, enable); |
161 | omap_crtc->enabled = enable; | 164 | omap_crtc->enabled = enable; |
162 | return; | 165 | return; |
163 | } | 166 | } |
@@ -170,8 +173,9 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | |||
170 | omap_crtc->ignore_digit_sync_lost = true; | 173 | omap_crtc->ignore_digit_sync_lost = true; |
171 | } | 174 | } |
172 | 175 | ||
173 | framedone_irq = priv->dispc_ops->mgr_get_framedone_irq(channel); | 176 | framedone_irq = priv->dispc_ops->mgr_get_framedone_irq(priv->dispc, |
174 | vsync_irq = priv->dispc_ops->mgr_get_vsync_irq(channel); | 177 | channel); |
178 | vsync_irq = priv->dispc_ops->mgr_get_vsync_irq(priv->dispc, channel); | ||
175 | 179 | ||
176 | if (enable) { | 180 | if (enable) { |
177 | wait = omap_irq_wait_init(dev, vsync_irq, 1); | 181 | wait = omap_irq_wait_init(dev, vsync_irq, 1); |
@@ -191,7 +195,7 @@ static void omap_crtc_set_enabled(struct drm_crtc *crtc, bool enable) | |||
191 | wait = omap_irq_wait_init(dev, vsync_irq, 2); | 195 | wait = omap_irq_wait_init(dev, vsync_irq, 2); |
192 | } | 196 | } |
193 | 197 | ||
194 | priv->dispc_ops->mgr_enable(channel, enable); | 198 | priv->dispc_ops->mgr_enable(priv->dispc, channel, enable); |
195 | omap_crtc->enabled = enable; | 199 | omap_crtc->enabled = enable; |
196 | 200 | ||
197 | ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); | 201 | ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100)); |
@@ -213,7 +217,8 @@ static int omap_crtc_dss_enable(struct omap_drm_private *priv, | |||
213 | { | 217 | { |
214 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; | 218 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; |
215 | 219 | ||
216 | priv->dispc_ops->mgr_set_timings(omap_crtc->channel, &omap_crtc->vm); | 220 | priv->dispc_ops->mgr_set_timings(priv->dispc, omap_crtc->channel, |
221 | &omap_crtc->vm); | ||
217 | omap_crtc_set_enabled(&omap_crtc->base, true); | 222 | omap_crtc_set_enabled(&omap_crtc->base, true); |
218 | 223 | ||
219 | return 0; | 224 | return 0; |
@@ -243,7 +248,8 @@ static void omap_crtc_dss_set_lcd_config(struct omap_drm_private *priv, | |||
243 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; | 248 | struct omap_crtc *omap_crtc = omap_crtcs[channel]; |
244 | 249 | ||
245 | DBG("%s", omap_crtc->name); | 250 | DBG("%s", omap_crtc->name); |
246 | priv->dispc_ops->mgr_set_lcd_config(omap_crtc->channel, config); | 251 | priv->dispc_ops->mgr_set_lcd_config(priv->dispc, omap_crtc->channel, |
252 | config); | ||
247 | } | 253 | } |
248 | 254 | ||
249 | static int omap_crtc_dss_register_framedone( | 255 | static int omap_crtc_dss_register_framedone( |
@@ -300,7 +306,7 @@ void omap_crtc_vblank_irq(struct drm_crtc *crtc) | |||
300 | * If the dispc is busy we're racing the flush operation. Try again on | 306 | * If the dispc is busy we're racing the flush operation. Try again on |
301 | * the next vblank interrupt. | 307 | * the next vblank interrupt. |
302 | */ | 308 | */ |
303 | if (priv->dispc_ops->mgr_go_busy(omap_crtc->channel)) { | 309 | if (priv->dispc_ops->mgr_go_busy(priv->dispc, omap_crtc->channel)) { |
304 | spin_unlock(&crtc->dev->event_lock); | 310 | spin_unlock(&crtc->dev->event_lock); |
305 | return; | 311 | return; |
306 | } | 312 | } |
@@ -337,7 +343,7 @@ static void omap_crtc_write_crtc_properties(struct drm_crtc *crtc) | |||
337 | info.partial_alpha_enabled = false; | 343 | info.partial_alpha_enabled = false; |
338 | info.cpr_enable = false; | 344 | info.cpr_enable = false; |
339 | 345 | ||
340 | priv->dispc_ops->mgr_setup(omap_crtc->channel, &info); | 346 | priv->dispc_ops->mgr_setup(priv->dispc, omap_crtc->channel, &info); |
341 | } | 347 | } |
342 | 348 | ||
343 | /* ----------------------------------------------------------------------------- | 349 | /* ----------------------------------------------------------------------------- |
@@ -537,7 +543,8 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, | |||
537 | length = crtc->state->gamma_lut->length / | 543 | length = crtc->state->gamma_lut->length / |
538 | sizeof(*lut); | 544 | sizeof(*lut); |
539 | } | 545 | } |
540 | priv->dispc_ops->mgr_set_gamma(omap_crtc->channel, lut, length); | 546 | priv->dispc_ops->mgr_set_gamma(priv->dispc, omap_crtc->channel, |
547 | lut, length); | ||
541 | } | 548 | } |
542 | 549 | ||
543 | omap_crtc_write_crtc_properties(crtc); | 550 | omap_crtc_write_crtc_properties(crtc); |
@@ -552,7 +559,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc, | |||
552 | WARN_ON(ret != 0); | 559 | WARN_ON(ret != 0); |
553 | 560 | ||
554 | spin_lock_irq(&crtc->dev->event_lock); | 561 | spin_lock_irq(&crtc->dev->event_lock); |
555 | priv->dispc_ops->mgr_go(omap_crtc->channel); | 562 | priv->dispc_ops->mgr_go(priv->dispc, omap_crtc->channel); |
556 | omap_crtc_arm_event(crtc); | 563 | omap_crtc_arm_event(crtc); |
557 | spin_unlock_irq(&crtc->dev->event_lock); | 564 | spin_unlock_irq(&crtc->dev->event_lock); |
558 | } | 565 | } |
@@ -734,7 +741,7 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev, | |||
734 | * extracted with dispc_mgr_gamma_size(). If it returns 0 | 741 | * extracted with dispc_mgr_gamma_size(). If it returns 0 |
735 | * gamma table is not supprted. | 742 | * gamma table is not supprted. |
736 | */ | 743 | */ |
737 | if (priv->dispc_ops->mgr_gamma_size(channel)) { | 744 | if (priv->dispc_ops->mgr_gamma_size(priv->dispc, channel)) { |
738 | unsigned int gamma_lut_size = 256; | 745 | unsigned int gamma_lut_size = 256; |
739 | 746 | ||
740 | drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); | 747 | drm_crtc_enable_color_mgmt(crtc, 0, false, gamma_lut_size); |