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path: root/drivers/gpu/drm/omapdrm/dss/dsi.c
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Diffstat (limited to 'drivers/gpu/drm/omapdrm/dss/dsi.c')
-rw-r--r--drivers/gpu/drm/omapdrm/dss/dsi.c57
1 files changed, 31 insertions, 26 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c
index 9ed8272e54ae..6f45e9d00b41 100644
--- a/drivers/gpu/drm/omapdrm/dss/dsi.c
+++ b/drivers/gpu/drm/omapdrm/dss/dsi.c
@@ -42,9 +42,9 @@
42#include <linux/of_platform.h> 42#include <linux/of_platform.h>
43#include <linux/component.h> 43#include <linux/component.h>
44 44
45#include <video/omapdss.h>
46#include <video/mipi_display.h> 45#include <video/mipi_display.h>
47 46
47#include "omapdss.h"
48#include "dss.h" 48#include "dss.h"
49#include "dss_features.h" 49#include "dss_features.h"
50 50
@@ -1262,7 +1262,7 @@ static unsigned long dsi_fclk_rate(struct platform_device *dsidev)
1262 unsigned long r; 1262 unsigned long r;
1263 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); 1263 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
1264 1264
1265 if (dss_get_dsi_clk_source(dsi->module_id) == OMAP_DSS_CLK_SRC_FCK) { 1265 if (dss_get_dsi_clk_source(dsi->module_id) == DSS_CLK_SRC_FCK) {
1266 /* DSI FCLK source is DSS_CLK_FCK */ 1266 /* DSI FCLK source is DSS_CLK_FCK */
1267 r = clk_get_rate(dsi->dss_clk); 1267 r = clk_get_rate(dsi->dss_clk);
1268 } else { 1268 } else {
@@ -1475,7 +1475,7 @@ static void dsi_dump_dsidev_clocks(struct platform_device *dsidev,
1475{ 1475{
1476 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); 1476 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
1477 struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo; 1477 struct dss_pll_clock_info *cinfo = &dsi->pll.cinfo;
1478 enum omap_dss_clk_source dispc_clk_src, dsi_clk_src; 1478 enum dss_clk_source dispc_clk_src, dsi_clk_src;
1479 int dsi_module = dsi->module_id; 1479 int dsi_module = dsi->module_id;
1480 struct dss_pll *pll = &dsi->pll; 1480 struct dss_pll *pll = &dsi->pll;
1481 1481
@@ -1495,28 +1495,27 @@ static void dsi_dump_dsidev_clocks(struct platform_device *dsidev,
1495 cinfo->clkdco, cinfo->m); 1495 cinfo->clkdco, cinfo->m);
1496 1496
1497 seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n", 1497 seq_printf(s, "DSI_PLL_HSDIV_DISPC (%s)\t%-16lum_dispc %u\t(%s)\n",
1498 dss_feat_get_clk_source_name(dsi_module == 0 ? 1498 dss_get_clk_source_name(dsi_module == 0 ?
1499 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC : 1499 DSS_CLK_SRC_PLL1_1 :
1500 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC), 1500 DSS_CLK_SRC_PLL2_1),
1501 cinfo->clkout[HSDIV_DISPC], 1501 cinfo->clkout[HSDIV_DISPC],
1502 cinfo->mX[HSDIV_DISPC], 1502 cinfo->mX[HSDIV_DISPC],
1503 dispc_clk_src == OMAP_DSS_CLK_SRC_FCK ? 1503 dispc_clk_src == DSS_CLK_SRC_FCK ?
1504 "off" : "on"); 1504 "off" : "on");
1505 1505
1506 seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n", 1506 seq_printf(s, "DSI_PLL_HSDIV_DSI (%s)\t%-16lum_dsi %u\t(%s)\n",
1507 dss_feat_get_clk_source_name(dsi_module == 0 ? 1507 dss_get_clk_source_name(dsi_module == 0 ?
1508 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI : 1508 DSS_CLK_SRC_PLL1_2 :
1509 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI), 1509 DSS_CLK_SRC_PLL2_2),
1510 cinfo->clkout[HSDIV_DSI], 1510 cinfo->clkout[HSDIV_DSI],
1511 cinfo->mX[HSDIV_DSI], 1511 cinfo->mX[HSDIV_DSI],
1512 dsi_clk_src == OMAP_DSS_CLK_SRC_FCK ? 1512 dsi_clk_src == DSS_CLK_SRC_FCK ?
1513 "off" : "on"); 1513 "off" : "on");
1514 1514
1515 seq_printf(s, "- DSI%d -\n", dsi_module + 1); 1515 seq_printf(s, "- DSI%d -\n", dsi_module + 1);
1516 1516
1517 seq_printf(s, "dsi fclk source = %s (%s)\n", 1517 seq_printf(s, "dsi fclk source = %s\n",
1518 dss_get_generic_clk_source_name(dsi_clk_src), 1518 dss_get_clk_source_name(dsi_clk_src));
1519 dss_feat_get_clk_source_name(dsi_clk_src));
1520 1519
1521 seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate(dsidev)); 1520 seq_printf(s, "DSI_FCLK\t%lu\n", dsi_fclk_rate(dsidev));
1522 1521
@@ -4102,8 +4101,8 @@ static int dsi_display_init_dispc(struct platform_device *dsidev,
4102 int r; 4101 int r;
4103 4102
4104 dss_select_lcd_clk_source(channel, dsi->module_id == 0 ? 4103 dss_select_lcd_clk_source(channel, dsi->module_id == 0 ?
4105 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC : 4104 DSS_CLK_SRC_PLL1_1 :
4106 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC); 4105 DSS_CLK_SRC_PLL2_1);
4107 4106
4108 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) { 4107 if (dsi->mode == OMAP_DSS_DSI_CMD_MODE) {
4109 r = dss_mgr_register_framedone_handler(channel, 4108 r = dss_mgr_register_framedone_handler(channel,
@@ -4150,7 +4149,7 @@ err1:
4150 dss_mgr_unregister_framedone_handler(channel, 4149 dss_mgr_unregister_framedone_handler(channel,
4151 dsi_framedone_irq_callback, dsidev); 4150 dsi_framedone_irq_callback, dsidev);
4152err: 4151err:
4153 dss_select_lcd_clk_source(channel, OMAP_DSS_CLK_SRC_FCK); 4152 dss_select_lcd_clk_source(channel, DSS_CLK_SRC_FCK);
4154 return r; 4153 return r;
4155} 4154}
4156 4155
@@ -4163,7 +4162,7 @@ static void dsi_display_uninit_dispc(struct platform_device *dsidev,
4163 dss_mgr_unregister_framedone_handler(channel, 4162 dss_mgr_unregister_framedone_handler(channel,
4164 dsi_framedone_irq_callback, dsidev); 4163 dsi_framedone_irq_callback, dsidev);
4165 4164
4166 dss_select_lcd_clk_source(channel, OMAP_DSS_CLK_SRC_FCK); 4165 dss_select_lcd_clk_source(channel, DSS_CLK_SRC_FCK);
4167} 4166}
4168 4167
4169static int dsi_configure_dsi_clocks(struct platform_device *dsidev) 4168static int dsi_configure_dsi_clocks(struct platform_device *dsidev)
@@ -4197,8 +4196,8 @@ static int dsi_display_init_dsi(struct platform_device *dsidev)
4197 goto err1; 4196 goto err1;
4198 4197
4199 dss_select_dsi_clk_source(dsi->module_id, dsi->module_id == 0 ? 4198 dss_select_dsi_clk_source(dsi->module_id, dsi->module_id == 0 ?
4200 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI : 4199 DSS_CLK_SRC_PLL1_2 :
4201 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI); 4200 DSS_CLK_SRC_PLL2_2);
4202 4201
4203 DSSDBG("PLL OK\n"); 4202 DSSDBG("PLL OK\n");
4204 4203
@@ -4230,7 +4229,7 @@ static int dsi_display_init_dsi(struct platform_device *dsidev)
4230err3: 4229err3:
4231 dsi_cio_uninit(dsidev); 4230 dsi_cio_uninit(dsidev);
4232err2: 4231err2:
4233 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); 4232 dss_select_dsi_clk_source(dsi->module_id, DSS_CLK_SRC_FCK);
4234err1: 4233err1:
4235 dss_pll_disable(&dsi->pll); 4234 dss_pll_disable(&dsi->pll);
4236err0: 4235err0:
@@ -4252,7 +4251,7 @@ static void dsi_display_uninit_dsi(struct platform_device *dsidev,
4252 dsi_vc_enable(dsidev, 2, 0); 4251 dsi_vc_enable(dsidev, 2, 0);
4253 dsi_vc_enable(dsidev, 3, 0); 4252 dsi_vc_enable(dsidev, 3, 0);
4254 4253
4255 dss_select_dsi_clk_source(dsi->module_id, OMAP_DSS_CLK_SRC_FCK); 4254 dss_select_dsi_clk_source(dsi->module_id, DSS_CLK_SRC_FCK);
4256 dsi_cio_uninit(dsidev); 4255 dsi_cio_uninit(dsidev);
4257 dsi_pll_uninit(dsidev, disconnect_lanes); 4256 dsi_pll_uninit(dsidev, disconnect_lanes);
4258} 4257}
@@ -4453,7 +4452,7 @@ static bool dsi_cm_calc_pll_cb(int n, int m, unsigned long fint,
4453 ctx->dsi_cinfo.fint = fint; 4452 ctx->dsi_cinfo.fint = fint;
4454 ctx->dsi_cinfo.clkdco = clkdco; 4453 ctx->dsi_cinfo.clkdco = clkdco;
4455 4454
4456 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, 4455 return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
4457 dss_feat_get_param_max(FEAT_PARAM_DSS_FCK), 4456 dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
4458 dsi_cm_calc_hsdiv_cb, ctx); 4457 dsi_cm_calc_hsdiv_cb, ctx);
4459} 4458}
@@ -4492,7 +4491,7 @@ static bool dsi_cm_calc(struct dsi_data *dsi,
4492 pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4); 4491 pll_min = max(cfg->hs_clk_min * 4, txbyteclk * 4 * 4);
4493 pll_max = cfg->hs_clk_max * 4; 4492 pll_max = cfg->hs_clk_max * 4;
4494 4493
4495 return dss_pll_calc(ctx->pll, clkin, 4494 return dss_pll_calc_a(ctx->pll, clkin,
4496 pll_min, pll_max, 4495 pll_min, pll_max,
4497 dsi_cm_calc_pll_cb, ctx); 4496 dsi_cm_calc_pll_cb, ctx);
4498} 4497}
@@ -4751,7 +4750,7 @@ static bool dsi_vm_calc_pll_cb(int n, int m, unsigned long fint,
4751 ctx->dsi_cinfo.fint = fint; 4750 ctx->dsi_cinfo.fint = fint;
4752 ctx->dsi_cinfo.clkdco = clkdco; 4751 ctx->dsi_cinfo.clkdco = clkdco;
4753 4752
4754 return dss_pll_hsdiv_calc(ctx->pll, clkdco, ctx->req_pck_min, 4753 return dss_pll_hsdiv_calc_a(ctx->pll, clkdco, ctx->req_pck_min,
4755 dss_feat_get_param_max(FEAT_PARAM_DSS_FCK), 4754 dss_feat_get_param_max(FEAT_PARAM_DSS_FCK),
4756 dsi_vm_calc_hsdiv_cb, ctx); 4755 dsi_vm_calc_hsdiv_cb, ctx);
4757} 4756}
@@ -4793,7 +4792,7 @@ static bool dsi_vm_calc(struct dsi_data *dsi,
4793 pll_max = byteclk_max * 4 * 4; 4792 pll_max = byteclk_max * 4 * 4;
4794 } 4793 }
4795 4794
4796 return dss_pll_calc(ctx->pll, clkin, 4795 return dss_pll_calc_a(ctx->pll, clkin,
4797 pll_min, pll_max, 4796 pll_min, pll_max,
4798 dsi_vm_calc_pll_cb, ctx); 4797 dsi_vm_calc_pll_cb, ctx);
4799} 4798}
@@ -5139,6 +5138,8 @@ static const struct dss_pll_ops dsi_pll_ops = {
5139}; 5138};
5140 5139
5141static const struct dss_pll_hw dss_omap3_dsi_pll_hw = { 5140static const struct dss_pll_hw dss_omap3_dsi_pll_hw = {
5141 .type = DSS_PLL_TYPE_A,
5142
5142 .n_max = (1 << 7) - 1, 5143 .n_max = (1 << 7) - 1,
5143 .m_max = (1 << 11) - 1, 5144 .m_max = (1 << 11) - 1,
5144 .mX_max = (1 << 4) - 1, 5145 .mX_max = (1 << 4) - 1,
@@ -5164,6 +5165,8 @@ static const struct dss_pll_hw dss_omap3_dsi_pll_hw = {
5164}; 5165};
5165 5166
5166static const struct dss_pll_hw dss_omap4_dsi_pll_hw = { 5167static const struct dss_pll_hw dss_omap4_dsi_pll_hw = {
5168 .type = DSS_PLL_TYPE_A,
5169
5167 .n_max = (1 << 8) - 1, 5170 .n_max = (1 << 8) - 1,
5168 .m_max = (1 << 12) - 1, 5171 .m_max = (1 << 12) - 1,
5169 .mX_max = (1 << 5) - 1, 5172 .mX_max = (1 << 5) - 1,
@@ -5189,6 +5192,8 @@ static const struct dss_pll_hw dss_omap4_dsi_pll_hw = {
5189}; 5192};
5190 5193
5191static const struct dss_pll_hw dss_omap5_dsi_pll_hw = { 5194static const struct dss_pll_hw dss_omap5_dsi_pll_hw = {
5195 .type = DSS_PLL_TYPE_A,
5196
5192 .n_max = (1 << 8) - 1, 5197 .n_max = (1 << 8) - 1,
5193 .m_max = (1 << 12) - 1, 5198 .m_max = (1 << 12) - 1,
5194 .mX_max = (1 << 5) - 1, 5199 .mX_max = (1 << 5) - 1,